./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 023d838f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-023d838-m [2024-11-10 23:32:31,132 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-10 23:32:31,194 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-10 23:32:31,201 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-10 23:32:31,204 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-10 23:32:31,204 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-10 23:32:31,227 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-10 23:32:31,227 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-10 23:32:31,228 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-10 23:32:31,228 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-10 23:32:31,228 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-10 23:32:31,229 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-10 23:32:31,229 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-10 23:32:31,229 INFO L153 SettingsManager]: * Use SBE=true [2024-11-10 23:32:31,230 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-10 23:32:31,230 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-10 23:32:31,230 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-10 23:32:31,230 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-10 23:32:31,231 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-10 23:32:31,231 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-10 23:32:31,231 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-10 23:32:31,232 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-10 23:32:31,232 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-10 23:32:31,232 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-10 23:32:31,233 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-10 23:32:31,233 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-10 23:32:31,233 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-10 23:32:31,233 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-10 23:32:31,233 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-10 23:32:31,234 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-10 23:32:31,234 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-10 23:32:31,234 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-10 23:32:31,234 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-10 23:32:31,234 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-10 23:32:31,235 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-10 23:32:31,235 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-10 23:32:31,235 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-10 23:32:31,235 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-10 23:32:31,235 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-10 23:32:31,236 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-10 23:32:31,236 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 [2024-11-10 23:32:31,489 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-10 23:32:31,509 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-10 23:32:31,512 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-10 23:32:31,512 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-10 23:32:31,513 INFO L274 PluginConnector]: CDTParser initialized [2024-11-10 23:32:31,514 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2024-11-10 23:32:32,787 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-10 23:32:32,996 INFO L384 CDTParser]: Found 1 translation units. [2024-11-10 23:32:32,997 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2024-11-10 23:32:33,013 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2a86797d1/7201bfd4cdf0485d844efd7dc5f5ca4c/FLAG321e0db7f [2024-11-10 23:32:33,024 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/2a86797d1/7201bfd4cdf0485d844efd7dc5f5ca4c [2024-11-10 23:32:33,027 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-10 23:32:33,028 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-10 23:32:33,029 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-10 23:32:33,029 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-10 23:32:33,033 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-10 23:32:33,034 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,035 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@77d3f9bf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33, skipping insertion in model container [2024-11-10 23:32:33,035 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,071 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-10 23:32:33,461 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:32:33,476 INFO L200 MainTranslator]: Completed pre-run [2024-11-10 23:32:33,538 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-10 23:32:33,573 INFO L204 MainTranslator]: Completed translation [2024-11-10 23:32:33,574 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33 WrapperNode [2024-11-10 23:32:33,574 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-10 23:32:33,575 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-10 23:32:33,575 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-10 23:32:33,575 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-10 23:32:33,581 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,609 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,658 INFO L138 Inliner]: procedures = 176, calls = 221, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 942 [2024-11-10 23:32:33,658 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-10 23:32:33,659 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-10 23:32:33,659 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-10 23:32:33,659 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-10 23:32:33,668 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,668 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,674 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,752 INFO L175 MemorySlicer]: Split 206 memory accesses to 2 slices as follows [2, 204]. 99 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 50 writes are split as follows [0, 50]. [2024-11-10 23:32:33,752 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,759 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,812 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,814 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,817 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,820 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,826 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-10 23:32:33,827 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-10 23:32:33,827 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-10 23:32:33,827 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-10 23:32:33,828 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (1/1) ... [2024-11-10 23:32:33,832 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-10 23:32:33,844 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-10 23:32:33,864 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-10 23:32:33,868 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-10 23:32:33,929 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-10 23:32:33,929 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-10 23:32:33,930 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-10 23:32:33,930 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-10 23:32:33,930 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2024-11-10 23:32:33,930 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2024-11-10 23:32:33,931 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2024-11-10 23:32:33,931 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2024-11-10 23:32:33,931 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-10 23:32:33,931 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-10 23:32:33,931 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-10 23:32:33,932 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-11-10 23:32:33,932 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-10 23:32:33,933 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-11-10 23:32:33,933 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-10 23:32:33,933 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-10 23:32:33,933 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-10 23:32:33,933 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-10 23:32:33,933 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-10 23:32:34,110 INFO L256 CfgBuilder]: Building ICFG [2024-11-10 23:32:34,112 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-10 23:32:35,050 INFO L? ?]: Removed 219 outVars from TransFormulas that were not future-live. [2024-11-10 23:32:35,050 INFO L307 CfgBuilder]: Performing block encoding [2024-11-10 23:32:35,086 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-10 23:32:35,086 INFO L336 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-10 23:32:35,086 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:32:35 BoogieIcfgContainer [2024-11-10 23:32:35,086 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-10 23:32:35,087 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-10 23:32:35,087 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-10 23:32:35,089 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-10 23:32:35,090 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:32:35,090 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.11 11:32:33" (1/3) ... [2024-11-10 23:32:35,090 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@30ac5303 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:32:35, skipping insertion in model container [2024-11-10 23:32:35,090 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:32:35,090 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.11 11:32:33" (2/3) ... [2024-11-10 23:32:35,091 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@30ac5303 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.11 11:32:35, skipping insertion in model container [2024-11-10 23:32:35,091 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-10 23:32:35,091 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 10.11 11:32:35" (3/3) ... [2024-11-10 23:32:35,091 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_nondet_test1-2.i [2024-11-10 23:32:35,140 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-10 23:32:35,141 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-10 23:32:35,141 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-10 23:32:35,141 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-10 23:32:35,141 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-10 23:32:35,141 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-10 23:32:35,141 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-10 23:32:35,142 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-10 23:32:35,147 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 250 states, 245 states have (on average 1.5959183673469388) internal successors, (391), 245 states have internal predecessors, (391), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:35,175 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 232 [2024-11-10 23:32:35,175 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:35,176 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:35,181 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:35,181 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:32:35,182 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-10 23:32:35,183 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 250 states, 245 states have (on average 1.5959183673469388) internal successors, (391), 245 states have internal predecessors, (391), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:35,189 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 232 [2024-11-10 23:32:35,189 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:35,189 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:35,190 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:35,190 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1] [2024-11-10 23:32:35,196 INFO L745 eck$LassoCheckResult]: Stem: 242#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 21#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 19#L737true [2024-11-10 23:32:35,196 INFO L747 eck$LassoCheckResult]: Loop: 19#L737true assume true; 84#L737-2true assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 2#L739true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 33#L742true call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 60#L745true assume !true; 29#L737-1true main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 19#L737true [2024-11-10 23:32:35,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:35,201 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 1 times [2024-11-10 23:32:35,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:35,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345025126] [2024-11-10 23:32:35,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:35,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:35,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:35,285 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:35,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:35,321 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:35,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:35,324 INFO L85 PathProgramCache]: Analyzing trace with hash 663211375, now seen corresponding path program 1 times [2024-11-10 23:32:35,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:35,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749827771] [2024-11-10 23:32:35,324 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:35,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:35,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:35,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:35,387 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:35,387 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [749827771] [2024-11-10 23:32:35,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [749827771] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:35,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:35,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-10 23:32:35,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907257439] [2024-11-10 23:32:35,389 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:35,394 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:35,395 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:35,431 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-10 23:32:35,433 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-10 23:32:35,435 INFO L87 Difference]: Start difference. First operand has 250 states, 245 states have (on average 1.5959183673469388) internal successors, (391), 245 states have internal predecessors, (391), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:35,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:35,496 INFO L93 Difference]: Finished difference Result 249 states and 350 transitions. [2024-11-10 23:32:35,497 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 249 states and 350 transitions. [2024-11-10 23:32:35,501 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 232 [2024-11-10 23:32:35,508 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 249 states to 244 states and 345 transitions. [2024-11-10 23:32:35,509 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 244 [2024-11-10 23:32:35,511 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 244 [2024-11-10 23:32:35,511 INFO L73 IsDeterministic]: Start isDeterministic. Operand 244 states and 345 transitions. [2024-11-10 23:32:35,513 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:35,514 INFO L218 hiAutomatonCegarLoop]: Abstraction has 244 states and 345 transitions. [2024-11-10 23:32:35,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states and 345 transitions. [2024-11-10 23:32:35,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244. [2024-11-10 23:32:35,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 240 states have (on average 1.4125) internal successors, (339), 239 states have internal predecessors, (339), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:35,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 345 transitions. [2024-11-10 23:32:35,548 INFO L240 hiAutomatonCegarLoop]: Abstraction has 244 states and 345 transitions. [2024-11-10 23:32:35,550 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-10 23:32:35,554 INFO L425 stractBuchiCegarLoop]: Abstraction has 244 states and 345 transitions. [2024-11-10 23:32:35,554 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-10 23:32:35,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 244 states and 345 transitions. [2024-11-10 23:32:35,556 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 232 [2024-11-10 23:32:35,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:35,557 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:35,558 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:35,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:35,558 INFO L745 eck$LassoCheckResult]: Stem: 750#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 548#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 544#L737 [2024-11-10 23:32:35,560 INFO L747 eck$LassoCheckResult]: Loop: 544#L737 assume true; 545#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 507#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 508#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 567#L745 assume true;havoc main_~_ha_hashv~0#1; 615#L745-73 assume true; 518#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 519#L745-156 assume true; 691#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 740#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 585#L745-154 assume main_#t~switch28#1;call main_#t~mem29#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem29#1 % 256 % 4294967296); 586#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 729#L745-152 assume main_#t~switch28#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem30#1 % 256 % 4294967296); 692#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 687#L745-150 assume main_#t~switch28#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem31#1 % 256 % 4294967296); 688#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 681#L745-148 assume main_#t~switch28#1;call main_#t~mem32#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296); 682#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 695#L745-146 assume main_#t~switch28#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296); 662#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 663#L745-144 assume main_#t~switch28#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296); 708#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 694#L745-142 assume main_#t~switch28#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem35#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem35#1 % 256 % 4294967296 else main_#t~mem35#1 % 256 % 4294967296 - 4294967296); 608#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 609#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 685#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 686#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 641#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 560#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 561#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 707#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 673#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 593#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 594#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 657#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 664#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 583#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 642#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 521#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 523#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 570#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 552#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 535#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 744#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 632#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 613#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 557#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 558#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 526#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 527#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 551#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 716#L745-79 assume true; 538#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 539#L745-76 assume true; 690#L745-74 assume true; 648#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 649#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 683#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 713#L745-71 assume true; 634#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 650#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 651#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 604#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 721#L745-55 assume true; 745#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 746#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 702#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 643#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 597#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 599#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 633#L745-9 assume true; 601#L745-7 havoc main_~_ha_bkt~0#1; 602#L745-6 assume true; 671#L745-4 assume true; 747#L745-2 havoc main_~_ha_hashv~0#1; 587#L745-1 assume true; 559#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 544#L737 [2024-11-10 23:32:35,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:35,561 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 2 times [2024-11-10 23:32:35,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:35,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770885179] [2024-11-10 23:32:35,561 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:35,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:35,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:35,570 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:35,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:35,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:35,580 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:35,581 INFO L85 PathProgramCache]: Analyzing trace with hash -1313777428, now seen corresponding path program 1 times [2024-11-10 23:32:35,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:35,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535088989] [2024-11-10 23:32:35,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:35,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:35,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:35,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:35,985 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:35,986 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535088989] [2024-11-10 23:32:35,986 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1535088989] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:35,986 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:35,986 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 23:32:35,986 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1412804036] [2024-11-10 23:32:35,986 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:35,986 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:35,987 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:35,987 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:32:35,987 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:32:35,988 INFO L87 Difference]: Start difference. First operand 244 states and 345 transitions. cyclomatic complexity: 105 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:36,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:36,118 INFO L93 Difference]: Finished difference Result 247 states and 341 transitions. [2024-11-10 23:32:36,118 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 247 states and 341 transitions. [2024-11-10 23:32:36,119 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 235 [2024-11-10 23:32:36,122 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 247 states to 247 states and 341 transitions. [2024-11-10 23:32:36,122 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 247 [2024-11-10 23:32:36,123 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 247 [2024-11-10 23:32:36,123 INFO L73 IsDeterministic]: Start isDeterministic. Operand 247 states and 341 transitions. [2024-11-10 23:32:36,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:36,126 INFO L218 hiAutomatonCegarLoop]: Abstraction has 247 states and 341 transitions. [2024-11-10 23:32:36,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states and 341 transitions. [2024-11-10 23:32:36,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 244. [2024-11-10 23:32:36,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 244 states, 240 states have (on average 1.3833333333333333) internal successors, (332), 239 states have internal predecessors, (332), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:36,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 338 transitions. [2024-11-10 23:32:36,136 INFO L240 hiAutomatonCegarLoop]: Abstraction has 244 states and 338 transitions. [2024-11-10 23:32:36,137 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:32:36,138 INFO L425 stractBuchiCegarLoop]: Abstraction has 244 states and 338 transitions. [2024-11-10 23:32:36,138 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-10 23:32:36,138 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 244 states and 338 transitions. [2024-11-10 23:32:36,139 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 232 [2024-11-10 23:32:36,139 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:36,139 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:36,141 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:36,142 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:36,142 INFO L745 eck$LassoCheckResult]: Stem: 1250#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1048#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1044#L737 [2024-11-10 23:32:36,142 INFO L747 eck$LassoCheckResult]: Loop: 1044#L737 assume true; 1045#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 1007#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1008#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 1067#L745 assume true;havoc main_~_ha_hashv~0#1; 1115#L745-73 assume true; 1018#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1019#L745-156 assume true; 1191#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1240#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 1085#L745-154 assume !main_#t~switch28#1; 1086#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 1229#L745-152 assume !main_#t~switch28#1; 1192#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 1187#L745-150 assume !main_#t~switch28#1; 1188#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 1181#L745-148 assume !main_#t~switch28#1; 1182#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 1195#L745-146 assume !main_#t~switch28#1; 1162#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 1163#L745-144 assume !main_#t~switch28#1; 1208#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 1194#L745-142 assume !main_#t~switch28#1; 1108#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 1109#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 1185#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 1186#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 1141#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 1060#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 1061#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 1207#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 1173#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 1093#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1094#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1157#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1164#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1083#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1142#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1021#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1023#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1070#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1052#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1035#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1244#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1132#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1113#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1057#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1058#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1026#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1027#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1051#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 1216#L745-79 assume true; 1038#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1039#L745-76 assume true; 1190#L745-74 assume true; 1148#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1149#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 1183#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 1213#L745-71 assume true; 1134#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 1150#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 1151#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 1104#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 1221#L745-55 assume true; 1245#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1246#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 1202#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 1143#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 1097#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 1099#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1133#L745-9 assume true; 1101#L745-7 havoc main_~_ha_bkt~0#1; 1102#L745-6 assume true; 1171#L745-4 assume true; 1247#L745-2 havoc main_~_ha_hashv~0#1; 1087#L745-1 assume true; 1059#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 1044#L737 [2024-11-10 23:32:36,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:36,143 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 3 times [2024-11-10 23:32:36,143 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:36,143 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993643085] [2024-11-10 23:32:36,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:36,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:36,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:36,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:36,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:36,163 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:36,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:36,164 INFO L85 PathProgramCache]: Analyzing trace with hash -388653965, now seen corresponding path program 1 times [2024-11-10 23:32:36,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:36,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1191670747] [2024-11-10 23:32:36,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:36,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:36,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:36,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:36,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1191670747] [2024-11-10 23:32:36,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1191670747] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:36,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:36,773 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-10 23:32:36,774 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [60629626] [2024-11-10 23:32:36,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:36,774 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:36,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:36,775 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-10 23:32:36,775 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-10 23:32:36,775 INFO L87 Difference]: Start difference. First operand 244 states and 338 transitions. cyclomatic complexity: 98 Second operand has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:37,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:37,327 INFO L93 Difference]: Finished difference Result 280 states and 383 transitions. [2024-11-10 23:32:37,328 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 280 states and 383 transitions. [2024-11-10 23:32:37,329 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 268 [2024-11-10 23:32:37,331 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 280 states to 280 states and 383 transitions. [2024-11-10 23:32:37,331 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 280 [2024-11-10 23:32:37,332 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 280 [2024-11-10 23:32:37,332 INFO L73 IsDeterministic]: Start isDeterministic. Operand 280 states and 383 transitions. [2024-11-10 23:32:37,333 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:37,333 INFO L218 hiAutomatonCegarLoop]: Abstraction has 280 states and 383 transitions. [2024-11-10 23:32:37,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states and 383 transitions. [2024-11-10 23:32:37,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 275. [2024-11-10 23:32:37,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 275 states, 271 states have (on average 1.3653136531365313) internal successors, (370), 270 states have internal predecessors, (370), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:37,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 376 transitions. [2024-11-10 23:32:37,340 INFO L240 hiAutomatonCegarLoop]: Abstraction has 275 states and 376 transitions. [2024-11-10 23:32:37,340 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-10 23:32:37,341 INFO L425 stractBuchiCegarLoop]: Abstraction has 275 states and 376 transitions. [2024-11-10 23:32:37,341 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-10 23:32:37,341 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 275 states and 376 transitions. [2024-11-10 23:32:37,342 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 263 [2024-11-10 23:32:37,342 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:37,342 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:37,343 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:37,343 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:37,343 INFO L745 eck$LassoCheckResult]: Stem: 1789#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 1583#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 1579#L737 [2024-11-10 23:32:37,344 INFO L747 eck$LassoCheckResult]: Loop: 1579#L737 assume true; 1580#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 1542#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1543#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 1602#L745 assume true;havoc main_~_ha_hashv~0#1; 1649#L745-73 assume true; 1553#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1554#L745-156 assume true; 1816#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1815#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 1619#L745-154 assume !main_#t~switch28#1; 1620#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 1814#L745-152 assume !main_#t~switch28#1; 1813#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 1812#L745-150 assume !main_#t~switch28#1; 1811#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 1810#L745-148 assume !main_#t~switch28#1; 1809#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 1808#L745-146 assume !main_#t~switch28#1; 1807#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 1806#L745-144 assume !main_#t~switch28#1; 1805#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 1804#L745-142 assume !main_#t~switch28#1; 1803#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 1802#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 1801#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 1800#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 1799#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 1798#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 1797#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 1796#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 1795#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 1794#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1793#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1765#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1698#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 1699#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 1704#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1676#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1556#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1558#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1605#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1587#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1570#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1782#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1666#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1647#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1592#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1593#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1561#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1562#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1586#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 1752#L745-79 assume true; 1573#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1574#L745-76 assume true; 1725#L745-74 assume true; 1682#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1683#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 1718#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 1749#L745-71 assume true; 1668#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 1684#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 1685#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 1638#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 1757#L745-55 assume true; 1783#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1784#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 1738#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 1677#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 1631#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 1633#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1667#L745-9 assume true; 1635#L745-7 havoc main_~_ha_bkt~0#1; 1636#L745-6 assume true; 1706#L745-4 assume true; 1785#L745-2 havoc main_~_ha_hashv~0#1; 1621#L745-1 assume true; 1594#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 1579#L737 [2024-11-10 23:32:37,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:37,344 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 4 times [2024-11-10 23:32:37,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:37,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646812110] [2024-11-10 23:32:37,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:37,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:37,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:37,350 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:37,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:37,356 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:37,357 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:37,357 INFO L85 PathProgramCache]: Analyzing trace with hash -686540149, now seen corresponding path program 1 times [2024-11-10 23:32:37,357 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:37,357 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439978528] [2024-11-10 23:32:37,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:37,358 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:37,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:37,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:37,775 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:37,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439978528] [2024-11-10 23:32:37,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439978528] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:37,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:37,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-10 23:32:37,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953733149] [2024-11-10 23:32:37,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:37,777 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:37,777 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:37,778 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 23:32:37,778 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-10 23:32:37,778 INFO L87 Difference]: Start difference. First operand 275 states and 376 transitions. cyclomatic complexity: 105 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:38,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:38,268 INFO L93 Difference]: Finished difference Result 288 states and 395 transitions. [2024-11-10 23:32:38,268 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 288 states and 395 transitions. [2024-11-10 23:32:38,269 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 276 [2024-11-10 23:32:38,270 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 288 states to 288 states and 395 transitions. [2024-11-10 23:32:38,271 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 288 [2024-11-10 23:32:38,271 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 288 [2024-11-10 23:32:38,271 INFO L73 IsDeterministic]: Start isDeterministic. Operand 288 states and 395 transitions. [2024-11-10 23:32:38,273 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:38,273 INFO L218 hiAutomatonCegarLoop]: Abstraction has 288 states and 395 transitions. [2024-11-10 23:32:38,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states and 395 transitions. [2024-11-10 23:32:38,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 285. [2024-11-10 23:32:38,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 285 states, 281 states have (on average 1.3701067615658362) internal successors, (385), 280 states have internal predecessors, (385), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:38,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 391 transitions. [2024-11-10 23:32:38,285 INFO L240 hiAutomatonCegarLoop]: Abstraction has 285 states and 391 transitions. [2024-11-10 23:32:38,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 23:32:38,288 INFO L425 stractBuchiCegarLoop]: Abstraction has 285 states and 391 transitions. [2024-11-10 23:32:38,288 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-10 23:32:38,288 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 285 states and 391 transitions. [2024-11-10 23:32:38,289 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 273 [2024-11-10 23:32:38,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:38,289 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:38,289 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:38,290 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:38,290 INFO L745 eck$LassoCheckResult]: Stem: 2366#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2156#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2152#L737 [2024-11-10 23:32:38,291 INFO L747 eck$LassoCheckResult]: Loop: 2152#L737 assume true; 2153#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 2118#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2119#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 2175#L745 assume true;havoc main_~_ha_hashv~0#1; 2222#L745-73 assume true; 2126#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2127#L745-156 assume true; 2303#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2356#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 2193#L745-154 assume !main_#t~switch28#1; 2194#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 2344#L745-152 assume !main_#t~switch28#1; 2304#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 2299#L745-150 assume !main_#t~switch28#1; 2300#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 2291#L745-148 assume !main_#t~switch28#1; 2292#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 2307#L745-146 assume !main_#t~switch28#1; 2270#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 2271#L745-144 assume !main_#t~switch28#1; 2321#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 2306#L745-142 assume !main_#t~switch28#1; 2215#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 2216#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 2295#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 2296#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 2248#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 2170#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 2171#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 2320#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 2283#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 2200#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2201#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 2266#L745-132 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := main_~_hj_i~0#1; 2267#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2343#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 2313#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2367#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2129#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2131#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2178#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2160#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2143#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2360#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2239#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2220#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2165#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2166#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2134#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2135#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2159#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 2329#L745-79 assume true; 2146#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2147#L745-76 assume true; 2302#L745-74 assume true; 2256#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2257#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 2293#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 2326#L745-71 assume true; 2241#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 2258#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 2259#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 2211#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 2335#L745-55 assume true; 2361#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2362#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 2315#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 2251#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 2202#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 2204#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2240#L745-9 assume true; 2208#L745-7 havoc main_~_ha_bkt~0#1; 2209#L745-6 assume true; 2281#L745-4 assume true; 2363#L745-2 havoc main_~_ha_hashv~0#1; 2192#L745-1 assume true; 2167#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 2152#L737 [2024-11-10 23:32:38,291 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:38,291 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 5 times [2024-11-10 23:32:38,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:38,292 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123377619] [2024-11-10 23:32:38,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:38,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:38,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:38,302 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:38,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:38,308 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:38,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:38,308 INFO L85 PathProgramCache]: Analyzing trace with hash 1965987954, now seen corresponding path program 1 times [2024-11-10 23:32:38,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:38,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647350924] [2024-11-10 23:32:38,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:38,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:38,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:38,715 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:38,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:38,715 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647350924] [2024-11-10 23:32:38,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [647350924] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:38,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:38,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-10 23:32:38,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1303656159] [2024-11-10 23:32:38,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:38,716 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:38,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:38,717 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-10 23:32:38,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-10 23:32:38,717 INFO L87 Difference]: Start difference. First operand 285 states and 391 transitions. cyclomatic complexity: 110 Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:38,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:38,958 INFO L93 Difference]: Finished difference Result 288 states and 394 transitions. [2024-11-10 23:32:38,958 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 288 states and 394 transitions. [2024-11-10 23:32:38,959 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 276 [2024-11-10 23:32:38,961 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 288 states to 288 states and 394 transitions. [2024-11-10 23:32:38,961 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 288 [2024-11-10 23:32:38,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 288 [2024-11-10 23:32:38,962 INFO L73 IsDeterministic]: Start isDeterministic. Operand 288 states and 394 transitions. [2024-11-10 23:32:38,962 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:38,962 INFO L218 hiAutomatonCegarLoop]: Abstraction has 288 states and 394 transitions. [2024-11-10 23:32:38,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states and 394 transitions. [2024-11-10 23:32:38,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 285. [2024-11-10 23:32:38,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 285 states, 281 states have (on average 1.3665480427046264) internal successors, (384), 280 states have internal predecessors, (384), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:38,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 390 transitions. [2024-11-10 23:32:38,966 INFO L240 hiAutomatonCegarLoop]: Abstraction has 285 states and 390 transitions. [2024-11-10 23:32:38,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-10 23:32:38,967 INFO L425 stractBuchiCegarLoop]: Abstraction has 285 states and 390 transitions. [2024-11-10 23:32:38,968 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-10 23:32:38,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 285 states and 390 transitions. [2024-11-10 23:32:38,969 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 273 [2024-11-10 23:32:38,969 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:38,969 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:38,970 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:38,971 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:38,971 INFO L745 eck$LassoCheckResult]: Stem: 2947#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 2736#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 2732#L737 [2024-11-10 23:32:38,972 INFO L747 eck$LassoCheckResult]: Loop: 2732#L737 assume true; 2733#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 2698#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2699#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 2755#L745 assume true;havoc main_~_ha_hashv~0#1; 2805#L745-73 assume true; 2706#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2707#L745-156 assume true; 2978#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2977#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 2976#L745-154 assume !main_#t~switch28#1; 2975#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 2974#L745-152 assume !main_#t~switch28#1; 2973#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 2972#L745-150 assume !main_#t~switch28#1; 2971#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 2970#L745-148 assume !main_#t~switch28#1; 2969#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 2968#L745-146 assume !main_#t~switch28#1; 2967#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 2966#L745-144 assume !main_#t~switch28#1; 2904#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 2888#L745-142 assume !main_#t~switch28#1; 2793#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 2794#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 2877#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 2878#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 2827#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 2748#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 2749#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 2902#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 2903#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 2780#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2781#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2954#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2952#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2953#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 2860#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2829#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 2708#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 2709#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2711#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2758#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2740#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2723#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2940#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2817#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2799#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2745#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2746#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2714#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2715#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2739#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 2912#L745-79 assume true; 2724#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2725#L745-76 assume true; 2882#L745-74 assume true; 2835#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2836#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 2875#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 2909#L745-71 assume true; 2821#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 2837#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 2838#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 2791#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 2917#L745-55 assume true; 2941#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2942#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 2897#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 2830#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 2782#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 2784#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2820#L745-9 assume true; 2788#L745-7 havoc main_~_ha_bkt~0#1; 2789#L745-6 assume true; 2862#L745-4 assume true; 2943#L745-2 havoc main_~_ha_hashv~0#1; 2772#L745-1 assume true; 2747#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 2732#L737 [2024-11-10 23:32:38,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:38,972 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 6 times [2024-11-10 23:32:38,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:38,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427632751] [2024-11-10 23:32:38,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:38,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:38,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:38,978 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:38,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:38,988 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:38,988 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:38,988 INFO L85 PathProgramCache]: Analyzing trace with hash 663925708, now seen corresponding path program 1 times [2024-11-10 23:32:38,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:38,989 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188981215] [2024-11-10 23:32:38,989 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:38,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:39,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:39,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:39,356 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:39,356 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188981215] [2024-11-10 23:32:39,356 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188981215] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:39,356 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:39,357 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:32:39,357 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265483273] [2024-11-10 23:32:39,357 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:39,358 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:39,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:39,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:32:39,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:32:39,359 INFO L87 Difference]: Start difference. First operand 285 states and 390 transitions. cyclomatic complexity: 109 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:40,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:40,081 INFO L93 Difference]: Finished difference Result 299 states and 408 transitions. [2024-11-10 23:32:40,081 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 299 states and 408 transitions. [2024-11-10 23:32:40,082 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 287 [2024-11-10 23:32:40,084 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 299 states to 299 states and 408 transitions. [2024-11-10 23:32:40,084 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 299 [2024-11-10 23:32:40,084 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 299 [2024-11-10 23:32:40,084 INFO L73 IsDeterministic]: Start isDeterministic. Operand 299 states and 408 transitions. [2024-11-10 23:32:40,084 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:40,085 INFO L218 hiAutomatonCegarLoop]: Abstraction has 299 states and 408 transitions. [2024-11-10 23:32:40,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 299 states and 408 transitions. [2024-11-10 23:32:40,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 299 to 293. [2024-11-10 23:32:40,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 289 states have (on average 1.3633217993079585) internal successors, (394), 288 states have internal predecessors, (394), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:40,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 400 transitions. [2024-11-10 23:32:40,088 INFO L240 hiAutomatonCegarLoop]: Abstraction has 293 states and 400 transitions. [2024-11-10 23:32:40,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-10 23:32:40,092 INFO L425 stractBuchiCegarLoop]: Abstraction has 293 states and 400 transitions. [2024-11-10 23:32:40,092 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-10 23:32:40,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 293 states and 400 transitions. [2024-11-10 23:32:40,093 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 281 [2024-11-10 23:32:40,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:40,093 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:40,094 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:40,094 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:40,094 INFO L745 eck$LassoCheckResult]: Stem: 3553#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 3338#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 3334#L737 [2024-11-10 23:32:40,095 INFO L747 eck$LassoCheckResult]: Loop: 3334#L737 assume true; 3335#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 3300#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3301#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 3357#L745 assume true;havoc main_~_ha_hashv~0#1; 3407#L745-73 assume true; 3308#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3309#L745-156 assume true; 3589#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3588#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 3587#L745-154 assume !main_#t~switch28#1; 3586#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 3585#L745-152 assume !main_#t~switch28#1; 3584#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 3583#L745-150 assume !main_#t~switch28#1; 3582#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 3581#L745-148 assume !main_#t~switch28#1; 3580#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 3579#L745-146 assume !main_#t~switch28#1; 3575#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 3574#L745-144 assume !main_#t~switch28#1; 3573#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 3488#L745-142 assume !main_#t~switch28#1; 3489#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 3572#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 3478#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 3479#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 3571#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 3350#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 3351#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 3541#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 3569#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 3568#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3567#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 3566#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 3565#L745-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0; 3563#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3562#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3461#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3462#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3531#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3554#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3360#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3342#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3325#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3546#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3419#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3401#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3347#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3348#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3316#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3317#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3341#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 3513#L745-79 assume true; 3326#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3327#L745-76 assume true; 3483#L745-74 assume true; 3439#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3440#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 3476#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 3510#L745-71 assume true; 3423#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 3441#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 3442#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 3393#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 3520#L745-55 assume true; 3548#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3549#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 3498#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 3434#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 3384#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 3386#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3422#L745-9 assume true; 3390#L745-7 havoc main_~_ha_bkt~0#1; 3391#L745-6 assume true; 3464#L745-4 assume true; 3550#L745-2 havoc main_~_ha_hashv~0#1; 3376#L745-1 assume true; 3349#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 3334#L737 [2024-11-10 23:32:40,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:40,095 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 7 times [2024-11-10 23:32:40,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:40,095 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559739098] [2024-11-10 23:32:40,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:40,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:40,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:40,115 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:40,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:40,120 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:40,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:40,120 INFO L85 PathProgramCache]: Analyzing trace with hash 27263152, now seen corresponding path program 1 times [2024-11-10 23:32:40,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:40,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214692427] [2024-11-10 23:32:40,121 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:40,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:40,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:40,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:40,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:40,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214692427] [2024-11-10 23:32:40,422 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [214692427] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:40,423 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:40,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-10 23:32:40,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [759568396] [2024-11-10 23:32:40,423 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:40,423 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:40,423 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:40,424 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-10 23:32:40,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-10 23:32:40,424 INFO L87 Difference]: Start difference. First operand 293 states and 400 transitions. cyclomatic complexity: 111 Second operand has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:40,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:40,826 INFO L93 Difference]: Finished difference Result 296 states and 403 transitions. [2024-11-10 23:32:40,826 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 296 states and 403 transitions. [2024-11-10 23:32:40,828 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 284 [2024-11-10 23:32:40,829 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 296 states to 296 states and 403 transitions. [2024-11-10 23:32:40,829 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 296 [2024-11-10 23:32:40,829 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 296 [2024-11-10 23:32:40,829 INFO L73 IsDeterministic]: Start isDeterministic. Operand 296 states and 403 transitions. [2024-11-10 23:32:40,830 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:40,830 INFO L218 hiAutomatonCegarLoop]: Abstraction has 296 states and 403 transitions. [2024-11-10 23:32:40,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states and 403 transitions. [2024-11-10 23:32:40,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 296. [2024-11-10 23:32:40,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 296 states, 292 states have (on average 1.3595890410958904) internal successors, (397), 291 states have internal predecessors, (397), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:40,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 403 transitions. [2024-11-10 23:32:40,833 INFO L240 hiAutomatonCegarLoop]: Abstraction has 296 states and 403 transitions. [2024-11-10 23:32:40,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-10 23:32:40,834 INFO L425 stractBuchiCegarLoop]: Abstraction has 296 states and 403 transitions. [2024-11-10 23:32:40,834 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-10 23:32:40,834 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 296 states and 403 transitions. [2024-11-10 23:32:40,835 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 284 [2024-11-10 23:32:40,835 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:40,835 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:40,836 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:40,836 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:40,836 INFO L745 eck$LassoCheckResult]: Stem: 4148#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 3936#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 3932#L737 [2024-11-10 23:32:40,836 INFO L747 eck$LassoCheckResult]: Loop: 3932#L737 assume true; 3933#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 3895#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3896#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 3955#L745 assume true;havoc main_~_ha_hashv~0#1; 4002#L745-73 assume true; 3906#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3907#L745-156 assume true; 4082#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4136#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 3972#L745-154 assume !main_#t~switch28#1; 3973#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 4123#L745-152 assume !main_#t~switch28#1; 4083#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 4078#L745-150 assume !main_#t~switch28#1; 4079#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 4071#L745-148 assume !main_#t~switch28#1; 4072#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 4086#L745-146 assume !main_#t~switch28#1; 4050#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 4051#L745-144 assume !main_#t~switch28#1; 4101#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 4085#L745-142 assume !main_#t~switch28#1; 3995#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 3996#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 4173#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 4172#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 4171#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 3948#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 3949#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 4100#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 4063#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 3980#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3981#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 4052#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4174#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 4077#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 3970#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 3971#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 4094#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4152#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4126#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4149#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3958#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3940#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3923#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4140#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4019#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4000#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3945#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3946#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3914#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3915#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3939#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 4109#L745-79 assume true; 3926#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3927#L745-76 assume true; 4081#L745-74 assume true; 4037#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4038#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 4073#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 4106#L745-71 assume true; 4021#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 4039#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 4040#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 3991#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 4115#L745-55 assume true; 4142#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4143#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 4095#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 4032#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 3984#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 3986#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4020#L745-9 assume true; 3988#L745-7 havoc main_~_ha_bkt~0#1; 3989#L745-6 assume true; 4061#L745-4 assume true; 4144#L745-2 havoc main_~_ha_hashv~0#1; 3974#L745-1 assume true; 3947#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 3932#L737 [2024-11-10 23:32:40,836 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:40,836 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 8 times [2024-11-10 23:32:40,837 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:40,837 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774569820] [2024-11-10 23:32:40,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:40,837 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:40,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:40,841 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:40,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:40,845 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:40,845 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:40,845 INFO L85 PathProgramCache]: Analyzing trace with hash -2106057, now seen corresponding path program 1 times [2024-11-10 23:32:40,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:40,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272094164] [2024-11-10 23:32:40,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:40,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:40,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:41,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:41,463 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:41,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272094164] [2024-11-10 23:32:41,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272094164] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:41,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:41,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2024-11-10 23:32:41,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375624639] [2024-11-10 23:32:41,465 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:41,465 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:41,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:41,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 23:32:41,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2024-11-10 23:32:41,466 INFO L87 Difference]: Start difference. First operand 296 states and 403 transitions. cyclomatic complexity: 111 Second operand has 13 states, 13 states have (on average 6.153846153846154) internal successors, (80), 13 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:42,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:42,870 INFO L93 Difference]: Finished difference Result 396 states and 545 transitions. [2024-11-10 23:32:42,870 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 396 states and 545 transitions. [2024-11-10 23:32:42,872 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 384 [2024-11-10 23:32:42,873 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 396 states to 396 states and 545 transitions. [2024-11-10 23:32:42,873 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 396 [2024-11-10 23:32:42,874 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 396 [2024-11-10 23:32:42,874 INFO L73 IsDeterministic]: Start isDeterministic. Operand 396 states and 545 transitions. [2024-11-10 23:32:42,874 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:42,874 INFO L218 hiAutomatonCegarLoop]: Abstraction has 396 states and 545 transitions. [2024-11-10 23:32:42,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states and 545 transitions. [2024-11-10 23:32:42,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 302. [2024-11-10 23:32:42,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 302 states, 298 states have (on average 1.3590604026845639) internal successors, (405), 297 states have internal predecessors, (405), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:42,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 411 transitions. [2024-11-10 23:32:42,878 INFO L240 hiAutomatonCegarLoop]: Abstraction has 302 states and 411 transitions. [2024-11-10 23:32:42,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2024-11-10 23:32:42,879 INFO L425 stractBuchiCegarLoop]: Abstraction has 302 states and 411 transitions. [2024-11-10 23:32:42,879 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-10 23:32:42,879 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 302 states and 411 transitions. [2024-11-10 23:32:42,880 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 290 [2024-11-10 23:32:42,880 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:42,880 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:42,881 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:42,881 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:42,881 INFO L745 eck$LassoCheckResult]: Stem: 4856#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 4648#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 4644#L737 [2024-11-10 23:32:42,881 INFO L747 eck$LassoCheckResult]: Loop: 4644#L737 assume true; 4645#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 4607#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4608#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 4667#L745 assume true;havoc main_~_ha_hashv~0#1; 4715#L745-73 assume true; 4618#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4619#L745-156 assume true; 4896#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4895#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 4894#L745-154 assume !main_#t~switch28#1; 4893#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 4892#L745-152 assume !main_#t~switch28#1; 4891#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 4890#L745-150 assume !main_#t~switch28#1; 4889#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 4888#L745-148 assume !main_#t~switch28#1; 4887#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 4886#L745-146 assume !main_#t~switch28#1; 4885#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 4884#L745-144 assume !main_#t~switch28#1; 4883#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 4882#L745-142 assume !main_#t~switch28#1; 4881#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 4880#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 4879#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 4878#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 4877#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 4876#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 4875#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 4874#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 4873#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 4872#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4871#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 4757#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 4758#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 4906#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 4905#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4903#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4683#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4772#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4621#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4623#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4670#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4652#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4635#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4857#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4733#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4713#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4657#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4658#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4626#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4627#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4651#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 4821#L745-79 assume true; 4638#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4639#L745-76 assume true; 4793#L745-74 assume true; 4749#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4750#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 4786#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 4818#L745-71 assume true; 4735#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 4751#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 4752#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 4704#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 4826#L745-55 assume true; 4850#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4851#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 4807#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 4744#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 4697#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 4699#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4734#L745-9 assume true; 4701#L745-7 havoc main_~_ha_bkt~0#1; 4702#L745-6 assume true; 4774#L745-4 assume true; 4852#L745-2 havoc main_~_ha_hashv~0#1; 4687#L745-1 assume true; 4659#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 4644#L737 [2024-11-10 23:32:42,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:42,881 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 9 times [2024-11-10 23:32:42,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:42,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800356139] [2024-11-10 23:32:42,882 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:42,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:42,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:42,886 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:42,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:42,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:42,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:42,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1058542662, now seen corresponding path program 1 times [2024-11-10 23:32:42,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:42,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967573686] [2024-11-10 23:32:42,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:42,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:43,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:43,212 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:43,212 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967573686] [2024-11-10 23:32:43,212 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967573686] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:43,212 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:43,212 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-10 23:32:43,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1057315642] [2024-11-10 23:32:43,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:43,213 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:43,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:43,213 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 23:32:43,213 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-10 23:32:43,213 INFO L87 Difference]: Start difference. First operand 302 states and 411 transitions. cyclomatic complexity: 113 Second operand has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:44,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:44,122 INFO L93 Difference]: Finished difference Result 309 states and 420 transitions. [2024-11-10 23:32:44,122 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 309 states and 420 transitions. [2024-11-10 23:32:44,123 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 297 [2024-11-10 23:32:44,125 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 309 states to 309 states and 420 transitions. [2024-11-10 23:32:44,125 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 309 [2024-11-10 23:32:44,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 309 [2024-11-10 23:32:44,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 309 states and 420 transitions. [2024-11-10 23:32:44,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:44,126 INFO L218 hiAutomatonCegarLoop]: Abstraction has 309 states and 420 transitions. [2024-11-10 23:32:44,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states and 420 transitions. [2024-11-10 23:32:44,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 302. [2024-11-10 23:32:44,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 302 states, 298 states have (on average 1.3590604026845639) internal successors, (405), 297 states have internal predecessors, (405), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:44,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 411 transitions. [2024-11-10 23:32:44,129 INFO L240 hiAutomatonCegarLoop]: Abstraction has 302 states and 411 transitions. [2024-11-10 23:32:44,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 23:32:44,130 INFO L425 stractBuchiCegarLoop]: Abstraction has 302 states and 411 transitions. [2024-11-10 23:32:44,130 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-10 23:32:44,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 302 states and 411 transitions. [2024-11-10 23:32:44,131 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 290 [2024-11-10 23:32:44,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:44,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:44,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:44,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:44,132 INFO L745 eck$LassoCheckResult]: Stem: 5482#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 5271#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 5267#L737 [2024-11-10 23:32:44,132 INFO L747 eck$LassoCheckResult]: Loop: 5267#L737 assume true; 5268#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 5233#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5234#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 5291#L745 assume true;havoc main_~_ha_hashv~0#1; 5341#L745-73 assume true; 5241#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5242#L745-156 assume true; 5417#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5471#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 5310#L745-154 assume !main_#t~switch28#1; 5311#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 5458#L745-152 assume !main_#t~switch28#1; 5418#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 5413#L745-150 assume !main_#t~switch28#1; 5414#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 5407#L745-148 assume !main_#t~switch28#1; 5408#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 5421#L745-146 assume !main_#t~switch28#1; 5386#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 5387#L745-144 assume !main_#t~switch28#1; 5436#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 5420#L745-142 assume !main_#t~switch28#1; 5332#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 5333#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 5411#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 5412#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 5364#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 5284#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 5285#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 5435#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 5399#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 5317#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5318#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 5381#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 5382#L745-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0; 5422#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5389#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5390#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 5395#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5366#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5367#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 5461#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5485#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5294#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5484#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5258#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5483#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5354#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5336#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5281#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5282#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5249#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5250#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5274#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 5444#L745-79 assume true; 5259#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5260#L745-76 assume true; 5415#L745-74 assume true; 5373#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5374#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 5409#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 5441#L745-71 assume true; 5358#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 5375#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 5376#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 5328#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 5450#L745-55 assume true; 5476#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5477#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 5430#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 5368#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 5319#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 5321#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5357#L745-9 assume true; 5325#L745-7 havoc main_~_ha_bkt~0#1; 5326#L745-6 assume true; 5397#L745-4 assume true; 5478#L745-2 havoc main_~_ha_hashv~0#1; 5309#L745-1 assume true; 5283#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 5267#L737 [2024-11-10 23:32:44,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:44,132 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 10 times [2024-11-10 23:32:44,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:44,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501269147] [2024-11-10 23:32:44,133 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:44,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:44,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:44,137 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:44,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:44,141 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:44,141 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:44,141 INFO L85 PathProgramCache]: Analyzing trace with hash 928316617, now seen corresponding path program 1 times [2024-11-10 23:32:44,141 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:44,142 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577358592] [2024-11-10 23:32:44,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:44,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:44,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:44,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:44,351 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:44,351 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577358592] [2024-11-10 23:32:44,351 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1577358592] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:44,351 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:44,351 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:32:44,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347751563] [2024-11-10 23:32:44,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:44,352 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:44,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:44,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:32:44,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:32:44,352 INFO L87 Difference]: Start difference. First operand 302 states and 411 transitions. cyclomatic complexity: 113 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:44,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:44,894 INFO L93 Difference]: Finished difference Result 315 states and 427 transitions. [2024-11-10 23:32:44,894 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 315 states and 427 transitions. [2024-11-10 23:32:44,896 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 303 [2024-11-10 23:32:44,897 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 315 states to 315 states and 427 transitions. [2024-11-10 23:32:44,897 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 315 [2024-11-10 23:32:44,897 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 315 [2024-11-10 23:32:44,897 INFO L73 IsDeterministic]: Start isDeterministic. Operand 315 states and 427 transitions. [2024-11-10 23:32:44,898 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:44,898 INFO L218 hiAutomatonCegarLoop]: Abstraction has 315 states and 427 transitions. [2024-11-10 23:32:44,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states and 427 transitions. [2024-11-10 23:32:44,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 305. [2024-11-10 23:32:44,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 301 states have (on average 1.3588039867109634) internal successors, (409), 300 states have internal predecessors, (409), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:44,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 415 transitions. [2024-11-10 23:32:44,902 INFO L240 hiAutomatonCegarLoop]: Abstraction has 305 states and 415 transitions. [2024-11-10 23:32:44,902 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-10 23:32:44,903 INFO L425 stractBuchiCegarLoop]: Abstraction has 305 states and 415 transitions. [2024-11-10 23:32:44,903 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-10 23:32:44,903 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 305 states and 415 transitions. [2024-11-10 23:32:44,904 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 293 [2024-11-10 23:32:44,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:44,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:44,904 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:44,904 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:44,905 INFO L745 eck$LassoCheckResult]: Stem: 6107#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 5900#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 5896#L737 [2024-11-10 23:32:44,905 INFO L747 eck$LassoCheckResult]: Loop: 5896#L737 assume true; 5897#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 5862#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5863#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 5920#L745 assume true;havoc main_~_ha_hashv~0#1; 5971#L745-73 assume true; 5870#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5871#L745-156 assume true; 6163#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6162#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 6160#L745-154 assume !main_#t~switch28#1; 6158#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 6157#L745-152 assume !main_#t~switch28#1; 6156#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 6155#L745-150 assume !main_#t~switch28#1; 6154#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 6153#L745-148 assume !main_#t~switch28#1; 6152#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 6151#L745-146 assume !main_#t~switch28#1; 6150#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 6149#L745-144 assume !main_#t~switch28#1; 6148#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 6147#L745-142 assume !main_#t~switch28#1; 6146#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 6145#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 6144#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 6143#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 6142#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 6141#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 6140#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 6139#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 6138#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 6135#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6132#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6130#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6129#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6126#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6124#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6122#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6121#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6120#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6118#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6113#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6054#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5904#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5905#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6101#L745-103 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6083#L745-102 assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1; 5983#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5965#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5910#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5911#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5878#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5879#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5903#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 6072#L745-79 assume true; 5888#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5889#L745-76 assume true; 6044#L745-74 assume true; 6001#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6002#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 6037#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 6069#L745-71 assume true; 5987#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 6003#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 6004#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 5957#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 6077#L745-55 assume true; 6102#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6103#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 6058#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 5996#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 5948#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 5950#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5986#L745-9 assume true; 5954#L745-7 havoc main_~_ha_bkt~0#1; 5955#L745-6 assume true; 6025#L745-4 assume true; 6104#L745-2 havoc main_~_ha_hashv~0#1; 5940#L745-1 assume true; 5912#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 5896#L737 [2024-11-10 23:32:44,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:44,905 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 11 times [2024-11-10 23:32:44,905 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:44,905 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959315390] [2024-11-10 23:32:44,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:44,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:44,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:44,910 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:44,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:44,915 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:44,915 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:44,915 INFO L85 PathProgramCache]: Analyzing trace with hash -1391644373, now seen corresponding path program 1 times [2024-11-10 23:32:44,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:44,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303346300] [2024-11-10 23:32:44,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:44,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:45,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:45,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:45,614 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:45,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303346300] [2024-11-10 23:32:45,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303346300] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:45,614 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:45,615 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:32:45,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [529141690] [2024-11-10 23:32:45,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:45,615 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:45,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:45,615 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:32:45,615 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:32:45,616 INFO L87 Difference]: Start difference. First operand 305 states and 415 transitions. cyclomatic complexity: 114 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:46,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:46,090 INFO L93 Difference]: Finished difference Result 301 states and 409 transitions. [2024-11-10 23:32:46,090 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 301 states and 409 transitions. [2024-11-10 23:32:46,091 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 289 [2024-11-10 23:32:46,092 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 301 states to 301 states and 409 transitions. [2024-11-10 23:32:46,092 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 301 [2024-11-10 23:32:46,092 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 301 [2024-11-10 23:32:46,093 INFO L73 IsDeterministic]: Start isDeterministic. Operand 301 states and 409 transitions. [2024-11-10 23:32:46,093 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:46,093 INFO L218 hiAutomatonCegarLoop]: Abstraction has 301 states and 409 transitions. [2024-11-10 23:32:46,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states and 409 transitions. [2024-11-10 23:32:46,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 299. [2024-11-10 23:32:46,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 295 states have (on average 1.3559322033898304) internal successors, (400), 294 states have internal predecessors, (400), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:46,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 406 transitions. [2024-11-10 23:32:46,097 INFO L240 hiAutomatonCegarLoop]: Abstraction has 299 states and 406 transitions. [2024-11-10 23:32:46,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-10 23:32:46,097 INFO L425 stractBuchiCegarLoop]: Abstraction has 299 states and 406 transitions. [2024-11-10 23:32:46,097 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-10 23:32:46,097 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 299 states and 406 transitions. [2024-11-10 23:32:46,098 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 287 [2024-11-10 23:32:46,098 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:46,098 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:46,098 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:46,098 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:46,099 INFO L745 eck$LassoCheckResult]: Stem: 6731#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 6522#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 6518#L737 [2024-11-10 23:32:46,099 INFO L747 eck$LassoCheckResult]: Loop: 6518#L737 assume true; 6519#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 6481#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6482#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 6541#L745 assume true;havoc main_~_ha_hashv~0#1; 6588#L745-73 assume true; 6492#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6493#L745-156 assume true; 6779#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6778#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 6776#L745-154 assume !main_#t~switch28#1; 6775#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 6774#L745-152 assume !main_#t~switch28#1; 6772#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 6769#L745-150 assume !main_#t~switch28#1; 6768#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 6767#L745-148 assume !main_#t~switch28#1; 6765#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 6763#L745-146 assume !main_#t~switch28#1; 6762#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 6761#L745-144 assume !main_#t~switch28#1; 6685#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 6670#L745-142 assume !main_#t~switch28#1; 6581#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 6582#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 6659#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 6660#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 6614#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 6534#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 6535#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 6684#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 6647#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 6566#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6567#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6629#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6630#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6673#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 6729#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6749#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 6748#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6773#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 6771#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 6709#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6732#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6544#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6526#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6509#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6723#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6605#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6586#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6531#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6532#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6500#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6501#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6525#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 6693#L745-79 assume true; 6512#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6513#L745-76 assume true; 6665#L745-74 assume true; 6621#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6622#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 6657#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 6690#L745-71 assume true; 6607#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 6623#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 6624#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 6577#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 6699#L745-55 assume true; 6724#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6725#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 6679#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 6616#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 6570#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 6572#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6606#L745-9 assume true; 6574#L745-7 havoc main_~_ha_bkt~0#1; 6575#L745-6 assume true; 6645#L745-4 assume true; 6726#L745-2 havoc main_~_ha_hashv~0#1; 6560#L745-1 assume true; 6533#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 6518#L737 [2024-11-10 23:32:46,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:46,099 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 12 times [2024-11-10 23:32:46,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:46,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307003304] [2024-11-10 23:32:46,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:46,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:46,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:46,104 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:46,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:46,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:46,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:46,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1073081999, now seen corresponding path program 1 times [2024-11-10 23:32:46,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:46,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411425097] [2024-11-10 23:32:46,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:46,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:46,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:46,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:46,473 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:46,473 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411425097] [2024-11-10 23:32:46,473 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [411425097] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:46,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:46,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:32:46,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527295889] [2024-11-10 23:32:46,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:46,474 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:46,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:46,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:32:46,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:32:46,476 INFO L87 Difference]: Start difference. First operand 299 states and 406 transitions. cyclomatic complexity: 111 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:47,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:47,369 INFO L93 Difference]: Finished difference Result 319 states and 432 transitions. [2024-11-10 23:32:47,369 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 319 states and 432 transitions. [2024-11-10 23:32:47,370 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 307 [2024-11-10 23:32:47,371 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 319 states to 319 states and 432 transitions. [2024-11-10 23:32:47,371 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 319 [2024-11-10 23:32:47,372 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 319 [2024-11-10 23:32:47,372 INFO L73 IsDeterministic]: Start isDeterministic. Operand 319 states and 432 transitions. [2024-11-10 23:32:47,372 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:47,372 INFO L218 hiAutomatonCegarLoop]: Abstraction has 319 states and 432 transitions. [2024-11-10 23:32:47,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states and 432 transitions. [2024-11-10 23:32:47,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 299. [2024-11-10 23:32:47,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 299 states, 295 states have (on average 1.3559322033898304) internal successors, (400), 294 states have internal predecessors, (400), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:47,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 299 states to 299 states and 406 transitions. [2024-11-10 23:32:47,376 INFO L240 hiAutomatonCegarLoop]: Abstraction has 299 states and 406 transitions. [2024-11-10 23:32:47,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:32:47,376 INFO L425 stractBuchiCegarLoop]: Abstraction has 299 states and 406 transitions. [2024-11-10 23:32:47,377 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-10 23:32:47,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 299 states and 406 transitions. [2024-11-10 23:32:47,377 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 287 [2024-11-10 23:32:47,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:47,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:47,378 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:47,378 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:47,378 INFO L745 eck$LassoCheckResult]: Stem: 7366#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 7156#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 7152#L737 [2024-11-10 23:32:47,378 INFO L747 eck$LassoCheckResult]: Loop: 7152#L737 assume true; 7153#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 7115#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7116#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 7175#L745 assume true;havoc main_~_ha_hashv~0#1; 7222#L745-73 assume true; 7126#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7127#L745-156 assume true; 7300#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7353#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 7192#L745-154 assume !main_#t~switch28#1; 7193#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 7340#L745-152 assume !main_#t~switch28#1; 7301#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 7296#L745-150 assume !main_#t~switch28#1; 7297#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 7406#L745-148 assume !main_#t~switch28#1; 7405#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 7404#L745-146 assume !main_#t~switch28#1; 7403#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 7402#L745-144 assume !main_#t~switch28#1; 7319#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 7303#L745-142 assume !main_#t~switch28#1; 7215#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 7216#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 7293#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 7294#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 7248#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 7168#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 7169#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 7318#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 7281#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 7200#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7201#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 7270#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7400#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 7295#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7190#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 7191#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 7312#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7375#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 7374#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 7129#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7131#L745-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7233#L745-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise43#1 := main_~_hj_i~0#1; 7178#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7160#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7143#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7358#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7239#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7220#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7165#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7166#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7134#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7135#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7159#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 7327#L745-79 assume true; 7146#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7147#L745-76 assume true; 7299#L745-74 assume true; 7255#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7256#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 7291#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 7324#L745-71 assume true; 7241#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 7257#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 7258#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 7211#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 7332#L745-55 assume true; 7359#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7360#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 7313#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 7250#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 7204#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 7206#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7240#L745-9 assume true; 7208#L745-7 havoc main_~_ha_bkt~0#1; 7209#L745-6 assume true; 7279#L745-4 assume true; 7361#L745-2 havoc main_~_ha_hashv~0#1; 7194#L745-1 assume true; 7167#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 7152#L737 [2024-11-10 23:32:47,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:47,379 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 13 times [2024-11-10 23:32:47,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:47,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826486069] [2024-11-10 23:32:47,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:47,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:47,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:47,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:47,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:47,388 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:47,388 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:47,388 INFO L85 PathProgramCache]: Analyzing trace with hash 486908144, now seen corresponding path program 1 times [2024-11-10 23:32:47,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:47,388 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57852181] [2024-11-10 23:32:47,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:47,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:47,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:47,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:47,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:47,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57852181] [2024-11-10 23:32:47,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [57852181] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:47,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:47,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:32:47,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78495016] [2024-11-10 23:32:47,982 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:47,982 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:47,982 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:47,983 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:32:47,983 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:32:47,983 INFO L87 Difference]: Start difference. First operand 299 states and 406 transitions. cyclomatic complexity: 111 Second operand has 9 states, 9 states have (on average 9.11111111111111) internal successors, (82), 9 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:48,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:48,988 INFO L93 Difference]: Finished difference Result 310 states and 419 transitions. [2024-11-10 23:32:48,988 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 310 states and 419 transitions. [2024-11-10 23:32:48,989 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 298 [2024-11-10 23:32:48,990 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 310 states to 310 states and 419 transitions. [2024-11-10 23:32:48,990 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 310 [2024-11-10 23:32:48,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 310 [2024-11-10 23:32:48,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 310 states and 419 transitions. [2024-11-10 23:32:48,991 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:48,991 INFO L218 hiAutomatonCegarLoop]: Abstraction has 310 states and 419 transitions. [2024-11-10 23:32:48,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states and 419 transitions. [2024-11-10 23:32:48,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 302. [2024-11-10 23:32:48,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 302 states, 298 states have (on average 1.3523489932885906) internal successors, (403), 297 states have internal predecessors, (403), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:48,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 409 transitions. [2024-11-10 23:32:48,995 INFO L240 hiAutomatonCegarLoop]: Abstraction has 302 states and 409 transitions. [2024-11-10 23:32:48,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:32:48,996 INFO L425 stractBuchiCegarLoop]: Abstraction has 302 states and 409 transitions. [2024-11-10 23:32:48,996 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-10 23:32:48,996 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 302 states and 409 transitions. [2024-11-10 23:32:48,997 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 290 [2024-11-10 23:32:48,997 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:48,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:48,997 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:48,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:48,998 INFO L745 eck$LassoCheckResult]: Stem: 7999#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 7785#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 7781#L737 [2024-11-10 23:32:48,998 INFO L747 eck$LassoCheckResult]: Loop: 7781#L737 assume true; 7782#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 7747#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7748#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 7804#L745 assume true;havoc main_~_ha_hashv~0#1; 7852#L745-73 assume true; 7755#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7756#L745-156 assume true; 7931#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7985#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 7823#L745-154 assume !main_#t~switch28#1; 7824#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 7972#L745-152 assume !main_#t~switch28#1; 7932#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 7927#L745-150 assume !main_#t~switch28#1; 7928#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 7986#L745-148 assume !main_#t~switch28#1; 7935#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 7936#L745-146 assume !main_#t~switch28#1; 7998#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 8027#L745-144 assume !main_#t~switch28#1; 8026#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 8025#L745-142 assume !main_#t~switch28#1; 8024#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 8023#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 8022#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 8021#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 8020#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 7799#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 7800#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 7949#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 7912#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 7830#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7831#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7896#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7897#L745-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0; 7937#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8042#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 8040#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 8011#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8037#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 8035#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 8033#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8031#L745-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8002#L745-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise43#1 := main_~_hj_i~0#1; 7807#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7789#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7772#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7990#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7869#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7850#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7794#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7795#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7763#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7764#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7788#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 7958#L745-79 assume true; 7775#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7776#L745-76 assume true; 7930#L745-74 assume true; 7886#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7887#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 7922#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 7955#L745-71 assume true; 7871#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 7888#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 7889#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 7841#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 7964#L745-55 assume true; 7991#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7992#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 7944#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 7881#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 7832#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 7834#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7870#L745-9 assume true; 7838#L745-7 havoc main_~_ha_bkt~0#1; 7839#L745-6 assume true; 7910#L745-4 assume true; 7993#L745-2 havoc main_~_ha_hashv~0#1; 7822#L745-1 assume true; 7796#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 7781#L737 [2024-11-10 23:32:48,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:48,998 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 14 times [2024-11-10 23:32:48,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:48,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [67765426] [2024-11-10 23:32:48,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:48,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:49,003 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:49,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:49,007 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:49,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:49,008 INFO L85 PathProgramCache]: Analyzing trace with hash -518074393, now seen corresponding path program 1 times [2024-11-10 23:32:49,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:49,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [88699317] [2024-11-10 23:32:49,008 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:49,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:49,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:49,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:49,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:49,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [88699317] [2024-11-10 23:32:49,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [88699317] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:49,322 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:49,322 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-10 23:32:49,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026494155] [2024-11-10 23:32:49,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:49,323 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:49,323 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:49,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-10 23:32:49,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2024-11-10 23:32:49,323 INFO L87 Difference]: Start difference. First operand 302 states and 409 transitions. cyclomatic complexity: 111 Second operand has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:50,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:50,219 INFO L93 Difference]: Finished difference Result 318 states and 430 transitions. [2024-11-10 23:32:50,220 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 430 transitions. [2024-11-10 23:32:50,221 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 306 [2024-11-10 23:32:50,222 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 430 transitions. [2024-11-10 23:32:50,222 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2024-11-10 23:32:50,222 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2024-11-10 23:32:50,222 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 430 transitions. [2024-11-10 23:32:50,223 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:50,223 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 430 transitions. [2024-11-10 23:32:50,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 430 transitions. [2024-11-10 23:32:50,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 312. [2024-11-10 23:32:50,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 312 states, 308 states have (on average 1.3474025974025974) internal successors, (415), 307 states have internal predecessors, (415), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:50,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 421 transitions. [2024-11-10 23:32:50,226 INFO L240 hiAutomatonCegarLoop]: Abstraction has 312 states and 421 transitions. [2024-11-10 23:32:50,227 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:32:50,227 INFO L425 stractBuchiCegarLoop]: Abstraction has 312 states and 421 transitions. [2024-11-10 23:32:50,227 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-10 23:32:50,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 312 states and 421 transitions. [2024-11-10 23:32:50,228 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 300 [2024-11-10 23:32:50,228 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:50,228 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:50,228 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:50,228 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:50,228 INFO L745 eck$LassoCheckResult]: Stem: 8634#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 8423#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 8419#L737 [2024-11-10 23:32:50,229 INFO L747 eck$LassoCheckResult]: Loop: 8419#L737 assume true; 8420#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 8384#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8385#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 8442#L745 assume true;havoc main_~_ha_hashv~0#1; 8492#L745-73 assume true; 8392#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8393#L745-156 assume true; 8676#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8675#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 8674#L745-154 assume !main_#t~switch28#1; 8673#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 8672#L745-152 assume !main_#t~switch28#1; 8671#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 8670#L745-150 assume !main_#t~switch28#1; 8669#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 8668#L745-148 assume !main_#t~switch28#1; 8667#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 8666#L745-146 assume !main_#t~switch28#1; 8665#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 8664#L745-144 assume !main_#t~switch28#1; 8663#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 8662#L745-142 assume !main_#t~switch28#1; 8661#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 8660#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 8659#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 8658#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 8657#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 8656#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 8655#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 8654#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 8653#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 8652#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8650#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8649#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8648#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8632#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 8610#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8538#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 8539#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 8562#L745-125 assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := 0; 8683#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8679#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 8613#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8677#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8445#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8635#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8410#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8627#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8504#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8486#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8432#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8433#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8401#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8402#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8426#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 8597#L745-79 assume true; 8411#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8412#L745-76 assume true; 8568#L745-74 assume true; 8522#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8523#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 8560#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 8594#L745-71 assume true; 8508#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 8524#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 8525#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 8478#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 8602#L745-55 assume true; 8628#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8629#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 8583#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 8517#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 8469#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 8471#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8507#L745-9 assume true; 8475#L745-7 havoc main_~_ha_bkt~0#1; 8476#L745-6 assume true; 8548#L745-4 assume true; 8630#L745-2 havoc main_~_ha_hashv~0#1; 8459#L745-1 assume true; 8434#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 8419#L737 [2024-11-10 23:32:50,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:50,229 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 15 times [2024-11-10 23:32:50,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:50,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970346952] [2024-11-10 23:32:50,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:50,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:50,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:50,234 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:50,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:50,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:50,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:50,238 INFO L85 PathProgramCache]: Analyzing trace with hash -1123056093, now seen corresponding path program 1 times [2024-11-10 23:32:50,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:50,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668657367] [2024-11-10 23:32:50,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:50,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:50,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:50,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:50,437 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:50,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668657367] [2024-11-10 23:32:50,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [668657367] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:50,439 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:50,439 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-10 23:32:50,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570973766] [2024-11-10 23:32:50,439 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:50,439 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:50,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:50,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 23:32:50,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-10 23:32:50,440 INFO L87 Difference]: Start difference. First operand 312 states and 421 transitions. cyclomatic complexity: 113 Second operand has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:50,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:50,955 INFO L93 Difference]: Finished difference Result 317 states and 427 transitions. [2024-11-10 23:32:50,955 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 317 states and 427 transitions. [2024-11-10 23:32:50,956 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 305 [2024-11-10 23:32:50,957 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 317 states to 317 states and 427 transitions. [2024-11-10 23:32:50,957 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 317 [2024-11-10 23:32:50,958 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 317 [2024-11-10 23:32:50,958 INFO L73 IsDeterministic]: Start isDeterministic. Operand 317 states and 427 transitions. [2024-11-10 23:32:50,958 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:50,958 INFO L218 hiAutomatonCegarLoop]: Abstraction has 317 states and 427 transitions. [2024-11-10 23:32:50,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states and 427 transitions. [2024-11-10 23:32:50,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 316. [2024-11-10 23:32:50,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 312 states have (on average 1.3461538461538463) internal successors, (420), 311 states have internal predecessors, (420), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:50,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 426 transitions. [2024-11-10 23:32:50,962 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 426 transitions. [2024-11-10 23:32:50,962 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 23:32:50,962 INFO L425 stractBuchiCegarLoop]: Abstraction has 316 states and 426 transitions. [2024-11-10 23:32:50,962 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-10 23:32:50,963 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 426 transitions. [2024-11-10 23:32:50,963 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 304 [2024-11-10 23:32:50,963 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:50,963 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:50,964 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:50,964 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:50,964 INFO L745 eck$LassoCheckResult]: Stem: 9272#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 9061#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 9057#L737 [2024-11-10 23:32:50,964 INFO L747 eck$LassoCheckResult]: Loop: 9057#L737 assume true; 9058#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 9020#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9021#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 9080#L745 assume true;havoc main_~_ha_hashv~0#1; 9128#L745-73 assume true; 9031#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9032#L745-156 assume true; 9207#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9261#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 9098#L745-154 assume !main_#t~switch28#1; 9099#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 9248#L745-152 assume !main_#t~switch28#1; 9208#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 9203#L745-150 assume !main_#t~switch28#1; 9204#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 9196#L745-148 assume !main_#t~switch28#1; 9197#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 9211#L745-146 assume !main_#t~switch28#1; 9176#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 9177#L745-144 assume !main_#t~switch28#1; 9227#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 9210#L745-142 assume !main_#t~switch28#1; 9121#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 9122#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 9200#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 9201#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 9154#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 9073#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 9074#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 9226#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 9188#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 9106#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9107#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9170#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9171#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9213#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9271#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9314#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 9312#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 9310#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9308#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9306#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 9279#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9278#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 9083#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9273#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9048#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9265#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9145#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9126#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9070#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9071#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9039#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9040#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9064#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 9235#L745-79 assume true; 9051#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9052#L745-76 assume true; 9206#L745-74 assume true; 9162#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9163#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 9198#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 9232#L745-71 assume true; 9147#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 9164#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 9165#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 9117#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 9240#L745-55 assume true; 9266#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9267#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 9221#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 9157#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 9110#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 9112#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9146#L745-9 assume true; 9114#L745-7 havoc main_~_ha_bkt~0#1; 9115#L745-6 assume true; 9186#L745-4 assume true; 9268#L745-2 havoc main_~_ha_hashv~0#1; 9100#L745-1 assume true; 9072#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 9057#L737 [2024-11-10 23:32:50,965 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:50,965 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 16 times [2024-11-10 23:32:50,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:50,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172929676] [2024-11-10 23:32:50,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:50,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:50,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:50,969 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:50,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:50,974 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:50,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:50,975 INFO L85 PathProgramCache]: Analyzing trace with hash -149519649, now seen corresponding path program 1 times [2024-11-10 23:32:50,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:50,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120836152] [2024-11-10 23:32:50,975 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:50,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:51,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:51,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:51,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:51,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120836152] [2024-11-10 23:32:51,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1120836152] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:51,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:51,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-10 23:32:51,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96770596] [2024-11-10 23:32:51,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:51,446 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:51,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:51,446 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-10 23:32:51,446 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-10 23:32:51,447 INFO L87 Difference]: Start difference. First operand 316 states and 426 transitions. cyclomatic complexity: 114 Second operand has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:51,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:51,950 INFO L93 Difference]: Finished difference Result 320 states and 429 transitions. [2024-11-10 23:32:51,950 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 320 states and 429 transitions. [2024-11-10 23:32:51,952 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 308 [2024-11-10 23:32:51,954 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 320 states to 320 states and 429 transitions. [2024-11-10 23:32:51,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 320 [2024-11-10 23:32:51,955 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 320 [2024-11-10 23:32:51,955 INFO L73 IsDeterministic]: Start isDeterministic. Operand 320 states and 429 transitions. [2024-11-10 23:32:51,956 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:51,956 INFO L218 hiAutomatonCegarLoop]: Abstraction has 320 states and 429 transitions. [2024-11-10 23:32:51,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320 states and 429 transitions. [2024-11-10 23:32:51,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320 to 316. [2024-11-10 23:32:51,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 312 states have (on average 1.3429487179487178) internal successors, (419), 311 states have internal predecessors, (419), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:51,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 425 transitions. [2024-11-10 23:32:51,962 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 425 transitions. [2024-11-10 23:32:51,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-10 23:32:51,965 INFO L425 stractBuchiCegarLoop]: Abstraction has 316 states and 425 transitions. [2024-11-10 23:32:51,966 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-10 23:32:51,966 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 425 transitions. [2024-11-10 23:32:51,967 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 304 [2024-11-10 23:32:51,967 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:51,967 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:51,968 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:51,968 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:51,968 INFO L745 eck$LassoCheckResult]: Stem: 9916#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 9707#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 9703#L737 [2024-11-10 23:32:51,968 INFO L747 eck$LassoCheckResult]: Loop: 9703#L737 assume true; 9704#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 9666#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9667#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 9726#L745 assume true;havoc main_~_ha_hashv~0#1; 9774#L745-73 assume true; 9677#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9678#L745-156 assume true; 9969#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 9968#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 9967#L745-154 assume !main_#t~switch28#1; 9966#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 9965#L745-152 assume !main_#t~switch28#1; 9964#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 9963#L745-150 assume !main_#t~switch28#1; 9962#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 9961#L745-148 assume !main_#t~switch28#1; 9960#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 9959#L745-146 assume !main_#t~switch28#1; 9958#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 9957#L745-144 assume !main_#t~switch28#1; 9956#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 9955#L745-142 assume !main_#t~switch28#1; 9954#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 9953#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 9952#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 9951#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 9950#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 9949#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 9947#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 9945#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 9943#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 9941#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9938#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9936#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9933#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 9934#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 9948#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9946#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 9944#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9942#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9940#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 9937#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9935#L745-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 9920#L745-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise43#1 := main_~_hj_i~0#1; 9729#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9917#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9694#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9910#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9791#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9772#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9716#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9717#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9685#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9686#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9710#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 9881#L745-79 assume true; 9697#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9698#L745-76 assume true; 9853#L745-74 assume true; 9808#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9809#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 9844#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 9878#L745-71 assume true; 9793#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 9810#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 9811#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 9763#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 9886#L745-55 assume true; 9911#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9912#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 9867#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 9803#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 9756#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 9758#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9792#L745-9 assume true; 9760#L745-7 havoc main_~_ha_bkt~0#1; 9761#L745-6 assume true; 9832#L745-4 assume true; 9913#L745-2 havoc main_~_ha_hashv~0#1; 9746#L745-1 assume true; 9718#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 9703#L737 [2024-11-10 23:32:51,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:51,969 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 17 times [2024-11-10 23:32:51,971 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:51,971 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209653051] [2024-11-10 23:32:51,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:51,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:51,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:51,979 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:51,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:51,987 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:51,988 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:51,988 INFO L85 PathProgramCache]: Analyzing trace with hash 1863077951, now seen corresponding path program 1 times [2024-11-10 23:32:51,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:51,988 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807339909] [2024-11-10 23:32:51,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:51,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:52,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:52,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:52,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:52,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807339909] [2024-11-10 23:32:52,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [807339909] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:52,415 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:52,415 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-10 23:32:52,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [798507670] [2024-11-10 23:32:52,415 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:52,415 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:52,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:52,415 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-10 23:32:52,416 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2024-11-10 23:32:52,416 INFO L87 Difference]: Start difference. First operand 316 states and 425 transitions. cyclomatic complexity: 113 Second operand has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:53,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:53,117 INFO L93 Difference]: Finished difference Result 330 states and 444 transitions. [2024-11-10 23:32:53,117 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 330 states and 444 transitions. [2024-11-10 23:32:53,122 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 318 [2024-11-10 23:32:53,124 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 330 states to 330 states and 444 transitions. [2024-11-10 23:32:53,124 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 330 [2024-11-10 23:32:53,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 330 [2024-11-10 23:32:53,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 330 states and 444 transitions. [2024-11-10 23:32:53,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:53,125 INFO L218 hiAutomatonCegarLoop]: Abstraction has 330 states and 444 transitions. [2024-11-10 23:32:53,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states and 444 transitions. [2024-11-10 23:32:53,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 316. [2024-11-10 23:32:53,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 316 states, 312 states have (on average 1.3429487179487178) internal successors, (419), 311 states have internal predecessors, (419), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:53,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 425 transitions. [2024-11-10 23:32:53,129 INFO L240 hiAutomatonCegarLoop]: Abstraction has 316 states and 425 transitions. [2024-11-10 23:32:53,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:32:53,132 INFO L425 stractBuchiCegarLoop]: Abstraction has 316 states and 425 transitions. [2024-11-10 23:32:53,132 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-10 23:32:53,132 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 316 states and 425 transitions. [2024-11-10 23:32:53,133 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 304 [2024-11-10 23:32:53,133 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:53,134 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:53,134 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:53,134 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:53,134 INFO L745 eck$LassoCheckResult]: Stem: 10578#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 10366#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 10362#L737 [2024-11-10 23:32:53,135 INFO L747 eck$LassoCheckResult]: Loop: 10362#L737 assume true; 10363#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 10328#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10329#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 10385#L745 assume true;havoc main_~_ha_hashv~0#1; 10433#L745-73 assume true; 10336#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10337#L745-156 assume true; 10513#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10567#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 10404#L745-154 assume !main_#t~switch28#1; 10405#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 10554#L745-152 assume !main_#t~switch28#1; 10514#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 10509#L745-150 assume !main_#t~switch28#1; 10510#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 10502#L745-148 assume !main_#t~switch28#1; 10503#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 10517#L745-146 assume !main_#t~switch28#1; 10480#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 10481#L745-144 assume !main_#t~switch28#1; 10533#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 10516#L745-142 assume !main_#t~switch28#1; 10426#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 10427#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 10507#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 10508#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 10459#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 10380#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 10381#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 10532#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 10494#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 10411#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10412#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 10482#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10602#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10600#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10599#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10595#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 10594#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10593#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 10591#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 10590#L745-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := 0; 10585#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10584#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10388#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10579#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10353#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10571#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10450#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10431#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10375#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10376#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10344#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10345#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10369#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 10541#L745-79 assume true; 10354#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10355#L745-76 assume true; 10511#L745-74 assume true; 10466#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10467#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 10504#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 10538#L745-71 assume true; 10452#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 10468#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 10469#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 10422#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 10546#L745-55 assume true; 10572#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10573#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 10527#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 10461#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 10413#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 10415#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10451#L745-9 assume true; 10419#L745-7 havoc main_~_ha_bkt~0#1; 10420#L745-6 assume true; 10492#L745-4 assume true; 10574#L745-2 havoc main_~_ha_hashv~0#1; 10403#L745-1 assume true; 10377#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 10362#L737 [2024-11-10 23:32:53,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:53,135 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 18 times [2024-11-10 23:32:53,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:53,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806244170] [2024-11-10 23:32:53,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:53,135 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:53,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:53,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:53,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:53,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:53,148 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:53,148 INFO L85 PathProgramCache]: Analyzing trace with hash 1227793716, now seen corresponding path program 1 times [2024-11-10 23:32:53,148 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:53,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1460736755] [2024-11-10 23:32:53,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:53,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:53,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:53,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:53,782 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:53,782 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1460736755] [2024-11-10 23:32:53,782 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1460736755] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:53,782 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:53,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2024-11-10 23:32:53,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816482642] [2024-11-10 23:32:53,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:53,783 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:53,783 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:53,783 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 23:32:53,783 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2024-11-10 23:32:53,783 INFO L87 Difference]: Start difference. First operand 316 states and 425 transitions. cyclomatic complexity: 113 Second operand has 13 states, 13 states have (on average 6.3076923076923075) internal successors, (82), 13 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:54,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:54,838 INFO L93 Difference]: Finished difference Result 370 states and 504 transitions. [2024-11-10 23:32:54,838 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 370 states and 504 transitions. [2024-11-10 23:32:54,839 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 358 [2024-11-10 23:32:54,841 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 370 states to 370 states and 504 transitions. [2024-11-10 23:32:54,841 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 370 [2024-11-10 23:32:54,841 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 370 [2024-11-10 23:32:54,841 INFO L73 IsDeterministic]: Start isDeterministic. Operand 370 states and 504 transitions. [2024-11-10 23:32:54,842 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:54,842 INFO L218 hiAutomatonCegarLoop]: Abstraction has 370 states and 504 transitions. [2024-11-10 23:32:54,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states and 504 transitions. [2024-11-10 23:32:54,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 324. [2024-11-10 23:32:54,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 324 states, 320 states have (on average 1.34375) internal successors, (430), 319 states have internal predecessors, (430), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:54,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 436 transitions. [2024-11-10 23:32:54,845 INFO L240 hiAutomatonCegarLoop]: Abstraction has 324 states and 436 transitions. [2024-11-10 23:32:54,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-10 23:32:54,846 INFO L425 stractBuchiCegarLoop]: Abstraction has 324 states and 436 transitions. [2024-11-10 23:32:54,846 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-10 23:32:54,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 324 states and 436 transitions. [2024-11-10 23:32:54,847 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 312 [2024-11-10 23:32:54,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:54,847 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:54,847 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:54,847 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:54,847 INFO L745 eck$LassoCheckResult]: Stem: 11278#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 11068#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 11064#L737 [2024-11-10 23:32:54,848 INFO L747 eck$LassoCheckResult]: Loop: 11064#L737 assume true; 11065#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 11030#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11031#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 11087#L745 assume true;havoc main_~_ha_hashv~0#1; 11138#L745-73 assume true; 11038#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11039#L745-156 assume true; 11317#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11316#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 11315#L745-154 assume !main_#t~switch28#1; 11314#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 11313#L745-152 assume !main_#t~switch28#1; 11312#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 11311#L745-150 assume !main_#t~switch28#1; 11268#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 11203#L745-148 assume !main_#t~switch28#1; 11204#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 11218#L745-146 assume !main_#t~switch28#1; 11183#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 11184#L745-144 assume !main_#t~switch28#1; 11232#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 11217#L745-142 assume !main_#t~switch28#1; 11126#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 11127#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 11207#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 11208#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 11243#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 11299#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 11298#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 11297#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 11296#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 11295#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11293#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 11292#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11291#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11290#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 11289#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 11288#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 11287#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11286#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 11285#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 11284#L745-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := 0; 11283#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11282#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 11281#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11280#L745-109 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11073#L745-108 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1; 11055#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11279#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11150#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11132#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11077#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11078#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11046#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11047#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11071#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 11240#L745-79 assume true; 11058#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11059#L745-76 assume true; 11212#L745-74 assume true; 11168#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11169#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 11205#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 11237#L745-71 assume true; 11154#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 11170#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 11171#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 11124#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 11246#L745-55 assume true; 11272#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11273#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 11226#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 11163#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 11115#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 11117#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11153#L745-9 assume true; 11121#L745-7 havoc main_~_ha_bkt~0#1; 11122#L745-6 assume true; 11193#L745-4 assume true; 11274#L745-2 havoc main_~_ha_hashv~0#1; 11107#L745-1 assume true; 11079#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 11064#L737 [2024-11-10 23:32:54,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:54,848 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 19 times [2024-11-10 23:32:54,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:54,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2142662435] [2024-11-10 23:32:54,848 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:54,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:54,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:54,853 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:54,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:54,857 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:54,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:54,858 INFO L85 PathProgramCache]: Analyzing trace with hash 694525365, now seen corresponding path program 1 times [2024-11-10 23:32:54,858 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:54,858 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024414018] [2024-11-10 23:32:54,858 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:54,858 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:54,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:55,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:55,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:55,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024414018] [2024-11-10 23:32:55,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2024414018] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:55,427 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:55,427 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2024-11-10 23:32:55,427 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [608696128] [2024-11-10 23:32:55,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:55,427 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:55,427 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:55,427 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-10 23:32:55,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2024-11-10 23:32:55,428 INFO L87 Difference]: Start difference. First operand 324 states and 436 transitions. cyclomatic complexity: 116 Second operand has 13 states, 13 states have (on average 6.384615384615385) internal successors, (83), 13 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:56,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:56,200 INFO L93 Difference]: Finished difference Result 336 states and 451 transitions. [2024-11-10 23:32:56,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 336 states and 451 transitions. [2024-11-10 23:32:56,201 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 324 [2024-11-10 23:32:56,202 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 336 states to 336 states and 451 transitions. [2024-11-10 23:32:56,202 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 336 [2024-11-10 23:32:56,202 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 336 [2024-11-10 23:32:56,202 INFO L73 IsDeterministic]: Start isDeterministic. Operand 336 states and 451 transitions. [2024-11-10 23:32:56,203 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:56,203 INFO L218 hiAutomatonCegarLoop]: Abstraction has 336 states and 451 transitions. [2024-11-10 23:32:56,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states and 451 transitions. [2024-11-10 23:32:56,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 329. [2024-11-10 23:32:56,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 325 states have (on average 1.3446153846153845) internal successors, (437), 324 states have internal predecessors, (437), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:56,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 443 transitions. [2024-11-10 23:32:56,209 INFO L240 hiAutomatonCegarLoop]: Abstraction has 329 states and 443 transitions. [2024-11-10 23:32:56,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-10 23:32:56,210 INFO L425 stractBuchiCegarLoop]: Abstraction has 329 states and 443 transitions. [2024-11-10 23:32:56,210 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-10 23:32:56,210 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 329 states and 443 transitions. [2024-11-10 23:32:56,211 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 317 [2024-11-10 23:32:56,211 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:56,211 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:56,211 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:56,211 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:56,212 INFO L745 eck$LassoCheckResult]: Stem: 11956#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 11744#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 11740#L737 [2024-11-10 23:32:56,212 INFO L747 eck$LassoCheckResult]: Loop: 11740#L737 assume true; 11741#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 11703#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11704#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 11764#L745 assume true;havoc main_~_ha_hashv~0#1; 11812#L745-73 assume true; 11714#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11715#L745-156 assume true; 12022#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12021#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 12020#L745-154 assume !main_#t~switch28#1; 12019#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 12018#L745-152 assume !main_#t~switch28#1; 12017#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 12016#L745-150 assume !main_#t~switch28#1; 12015#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 12014#L745-148 assume !main_#t~switch28#1; 12013#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 12012#L745-146 assume !main_#t~switch28#1; 12011#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 12010#L745-144 assume !main_#t~switch28#1; 12009#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 12007#L745-142 assume !main_#t~switch28#1; 12005#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 12003#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 12001#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 11999#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 11997#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 11995#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 11993#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 11991#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 11989#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 11988#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11986#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11985#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 11984#L745-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0; 11931#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11932#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 12025#L745-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1; 12024#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12023#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 11975#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 11974#L745-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 11973#L745-118 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 11972#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11971#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 11767#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11961#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 11731#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11957#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11829#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11810#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11754#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11755#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11722#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11723#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11747#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 11918#L745-79 assume true; 11734#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11735#L745-76 assume true; 11890#L745-74 assume true; 11845#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11846#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 11882#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 11915#L745-71 assume true; 11831#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 11847#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 11848#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 11801#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 11923#L745-55 assume true; 11951#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11952#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 11904#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 11840#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 11794#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 11796#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11830#L745-9 assume true; 11798#L745-7 havoc main_~_ha_bkt~0#1; 11799#L745-6 assume true; 11870#L745-4 assume true; 11953#L745-2 havoc main_~_ha_hashv~0#1; 11784#L745-1 assume true; 11756#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 11740#L737 [2024-11-10 23:32:56,212 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:56,212 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 20 times [2024-11-10 23:32:56,212 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:56,212 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182181899] [2024-11-10 23:32:56,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:56,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:56,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:56,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:56,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:56,221 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:56,222 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:56,222 INFO L85 PathProgramCache]: Analyzing trace with hash 674272525, now seen corresponding path program 1 times [2024-11-10 23:32:56,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:56,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410018028] [2024-11-10 23:32:56,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:56,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:56,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:56,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:56,579 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:56,579 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410018028] [2024-11-10 23:32:56,579 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1410018028] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:56,579 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:56,579 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-10 23:32:56,579 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1879522636] [2024-11-10 23:32:56,579 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:56,579 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:56,580 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:56,580 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-10 23:32:56,580 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-10 23:32:56,580 INFO L87 Difference]: Start difference. First operand 329 states and 443 transitions. cyclomatic complexity: 118 Second operand has 10 states, 10 states have (on average 8.3) internal successors, (83), 10 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:32:57,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:32:57,388 INFO L93 Difference]: Finished difference Result 341 states and 460 transitions. [2024-11-10 23:32:57,388 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 341 states and 460 transitions. [2024-11-10 23:32:57,389 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 329 [2024-11-10 23:32:57,390 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 341 states to 341 states and 460 transitions. [2024-11-10 23:32:57,390 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 341 [2024-11-10 23:32:57,391 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 341 [2024-11-10 23:32:57,391 INFO L73 IsDeterministic]: Start isDeterministic. Operand 341 states and 460 transitions. [2024-11-10 23:32:57,391 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:32:57,391 INFO L218 hiAutomatonCegarLoop]: Abstraction has 341 states and 460 transitions. [2024-11-10 23:32:57,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states and 460 transitions. [2024-11-10 23:32:57,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 333. [2024-11-10 23:32:57,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 333 states, 329 states have (on average 1.343465045592705) internal successors, (442), 328 states have internal predecessors, (442), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:32:57,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 448 transitions. [2024-11-10 23:32:57,395 INFO L240 hiAutomatonCegarLoop]: Abstraction has 333 states and 448 transitions. [2024-11-10 23:32:57,395 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:32:57,395 INFO L425 stractBuchiCegarLoop]: Abstraction has 333 states and 448 transitions. [2024-11-10 23:32:57,395 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-10 23:32:57,395 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 333 states and 448 transitions. [2024-11-10 23:32:57,396 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 321 [2024-11-10 23:32:57,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:32:57,396 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:32:57,396 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:32:57,397 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:32:57,397 INFO L745 eck$LassoCheckResult]: Stem: 12643#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 12427#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 12423#L737 [2024-11-10 23:32:57,397 INFO L747 eck$LassoCheckResult]: Loop: 12423#L737 assume true; 12424#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 12389#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12390#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 12446#L745 assume true;havoc main_~_ha_hashv~0#1; 12496#L745-73 assume true; 12397#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12398#L745-156 assume true; 12691#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12690#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 12689#L745-154 assume !main_#t~switch28#1; 12688#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 12687#L745-152 assume !main_#t~switch28#1; 12686#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 12685#L745-150 assume !main_#t~switch28#1; 12684#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 12683#L745-148 assume !main_#t~switch28#1; 12682#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 12681#L745-146 assume !main_#t~switch28#1; 12680#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 12679#L745-144 assume !main_#t~switch28#1; 12678#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 12677#L745-142 assume !main_#t~switch28#1; 12676#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 12675#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 12674#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 12673#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 12672#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 12671#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 12670#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 12669#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 12668#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 12667#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12666#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 12665#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12664#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 12663#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 12662#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 12661#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 12660#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12659#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 12658#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 12656#L745-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 12657#L745-118 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 12695#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12693#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 12449#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12648#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 12414#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12644#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 12513#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12492#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 12436#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12437#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 12405#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12406#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 12430#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 12605#L745-79 assume true; 12415#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 12416#L745-76 assume true; 12575#L745-74 assume true; 12529#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12530#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 12568#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 12602#L745-71 assume true; 12515#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 12531#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 12532#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 12483#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 12610#L745-55 assume true; 12638#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12639#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 12591#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 12524#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 12474#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 12476#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 12514#L745-9 assume true; 12480#L745-7 havoc main_~_ha_bkt~0#1; 12481#L745-6 assume true; 12556#L745-4 assume true; 12640#L745-2 havoc main_~_ha_hashv~0#1; 12464#L745-1 assume true; 12438#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 12423#L737 [2024-11-10 23:32:57,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:57,397 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 21 times [2024-11-10 23:32:57,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:57,398 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602781969] [2024-11-10 23:32:57,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:57,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:57,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:57,402 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:32:57,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:32:57,406 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:32:57,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:32:57,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1763960100, now seen corresponding path program 1 times [2024-11-10 23:32:57,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:32:57,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846159311] [2024-11-10 23:32:57,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:32:57,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:32:57,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:32:58,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:32:58,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:32:58,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846159311] [2024-11-10 23:32:58,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846159311] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:32:58,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:32:58,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2024-11-10 23:32:58,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263561712] [2024-11-10 23:32:58,203 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:32:58,203 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:32:58,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:32:58,204 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-10 23:32:58,204 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2024-11-10 23:32:58,204 INFO L87 Difference]: Start difference. First operand 333 states and 448 transitions. cyclomatic complexity: 119 Second operand has 18 states, 18 states have (on average 4.611111111111111) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:00,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:00,025 INFO L93 Difference]: Finished difference Result 447 states and 611 transitions. [2024-11-10 23:33:00,025 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 447 states and 611 transitions. [2024-11-10 23:33:00,026 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 435 [2024-11-10 23:33:00,028 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 447 states to 447 states and 611 transitions. [2024-11-10 23:33:00,028 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 447 [2024-11-10 23:33:00,029 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 447 [2024-11-10 23:33:00,029 INFO L73 IsDeterministic]: Start isDeterministic. Operand 447 states and 611 transitions. [2024-11-10 23:33:00,029 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:00,029 INFO L218 hiAutomatonCegarLoop]: Abstraction has 447 states and 611 transitions. [2024-11-10 23:33:00,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 447 states and 611 transitions. [2024-11-10 23:33:00,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 346. [2024-11-10 23:33:00,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 346 states, 342 states have (on average 1.345029239766082) internal successors, (460), 341 states have internal predecessors, (460), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:00,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 466 transitions. [2024-11-10 23:33:00,033 INFO L240 hiAutomatonCegarLoop]: Abstraction has 346 states and 466 transitions. [2024-11-10 23:33:00,034 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-10 23:33:00,034 INFO L425 stractBuchiCegarLoop]: Abstraction has 346 states and 466 transitions. [2024-11-10 23:33:00,034 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-11-10 23:33:00,034 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 346 states and 466 transitions. [2024-11-10 23:33:00,035 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 334 [2024-11-10 23:33:00,035 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:00,035 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:00,035 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:00,035 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:00,036 INFO L745 eck$LassoCheckResult]: Stem: 13452#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 13235#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 13231#L737 [2024-11-10 23:33:00,036 INFO L747 eck$LassoCheckResult]: Loop: 13231#L737 assume true; 13232#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 13195#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13196#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 13254#L745 assume true;havoc main_~_ha_hashv~0#1; 13303#L745-73 assume true; 13206#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 13207#L745-156 assume true; 13504#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 13503#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 13502#L745-154 assume !main_#t~switch28#1; 13501#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 13500#L745-152 assume !main_#t~switch28#1; 13499#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 13498#L745-150 assume !main_#t~switch28#1; 13497#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 13496#L745-148 assume !main_#t~switch28#1; 13495#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 13494#L745-146 assume !main_#t~switch28#1; 13493#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 13492#L745-144 assume !main_#t~switch28#1; 13491#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 13386#L745-142 assume !main_#t~switch28#1; 13296#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 13297#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 13376#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 13377#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 13484#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 13483#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 13482#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 13481#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 13480#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 13479#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13477#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 13476#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13475#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 13474#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13473#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13472#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 13471#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13470#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 13468#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 13466#L745-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := 0; 13467#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13513#L745-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 13507#L745-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise43#1 := main_~_hj_i~0#1; 13258#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13490#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 13222#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13485#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 13321#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13301#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 13244#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13245#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 13213#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13214#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 13255#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 13411#L745-79 assume true; 13225#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 13226#L745-76 assume true; 13381#L745-74 assume true; 13338#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 13339#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 13374#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 13408#L745-71 assume true; 13323#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 13340#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 13341#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 13292#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 13418#L745-55 assume true; 13446#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 13447#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 13396#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 13333#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 13285#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 13287#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 13322#L745-9 assume true; 13289#L745-7 havoc main_~_ha_bkt~0#1; 13290#L745-6 assume true; 13362#L745-4 assume true; 13448#L745-2 havoc main_~_ha_hashv~0#1; 13275#L745-1 assume true; 13246#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 13231#L737 [2024-11-10 23:33:00,036 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:00,036 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 22 times [2024-11-10 23:33:00,037 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:00,037 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370588710] [2024-11-10 23:33:00,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:00,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:00,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:00,041 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:00,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:00,046 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:00,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:00,046 INFO L85 PathProgramCache]: Analyzing trace with hash 175781084, now seen corresponding path program 1 times [2024-11-10 23:33:00,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:00,047 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558024740] [2024-11-10 23:33:00,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:00,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:00,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:00,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:33:00,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:33:00,414 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558024740] [2024-11-10 23:33:00,414 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1558024740] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:33:00,414 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:33:00,414 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-10 23:33:00,414 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1260124491] [2024-11-10 23:33:00,414 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:33:00,415 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:33:00,415 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:33:00,415 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-10 23:33:00,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2024-11-10 23:33:00,415 INFO L87 Difference]: Start difference. First operand 346 states and 466 transitions. cyclomatic complexity: 124 Second operand has 8 states, 8 states have (on average 10.375) internal successors, (83), 8 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:12,781 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.01s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-10 23:33:12,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:12,881 INFO L93 Difference]: Finished difference Result 444 states and 604 transitions. [2024-11-10 23:33:12,881 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 444 states and 604 transitions. [2024-11-10 23:33:12,882 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 432 [2024-11-10 23:33:12,883 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 444 states to 444 states and 604 transitions. [2024-11-10 23:33:12,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 444 [2024-11-10 23:33:12,884 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 444 [2024-11-10 23:33:12,884 INFO L73 IsDeterministic]: Start isDeterministic. Operand 444 states and 604 transitions. [2024-11-10 23:33:12,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:12,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 444 states and 604 transitions. [2024-11-10 23:33:12,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 444 states and 604 transitions. [2024-11-10 23:33:12,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 444 to 350. [2024-11-10 23:33:12,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 350 states, 346 states have (on average 1.346820809248555) internal successors, (466), 345 states have internal predecessors, (466), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:12,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 472 transitions. [2024-11-10 23:33:12,888 INFO L240 hiAutomatonCegarLoop]: Abstraction has 350 states and 472 transitions. [2024-11-10 23:33:12,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-10 23:33:12,889 INFO L425 stractBuchiCegarLoop]: Abstraction has 350 states and 472 transitions. [2024-11-10 23:33:12,889 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-11-10 23:33:12,889 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 350 states and 472 transitions. [2024-11-10 23:33:12,890 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 338 [2024-11-10 23:33:12,890 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:12,890 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:12,890 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:12,890 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:12,890 INFO L745 eck$LassoCheckResult]: Stem: 14263#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 14039#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 14035#L737 [2024-11-10 23:33:12,890 INFO L747 eck$LassoCheckResult]: Loop: 14035#L737 assume true; 14036#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 13998#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13999#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 14058#L745 assume true;havoc main_~_ha_hashv~0#1; 14107#L745-73 assume true; 14009#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 14010#L745-156 assume true; 14189#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 14246#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 14320#L745-154 assume !main_#t~switch28#1; 14319#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 14318#L745-152 assume !main_#t~switch28#1; 14190#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 14191#L745-150 assume !main_#t~switch28#1; 14317#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 14179#L745-148 assume !main_#t~switch28#1; 14180#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 14316#L745-146 assume !main_#t~switch28#1; 14156#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 14157#L745-144 assume !main_#t~switch28#1; 14302#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 14301#L745-142 assume !main_#t~switch28#1; 14300#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 14299#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 14298#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 14297#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 14296#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 14295#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 14294#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 14293#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 14292#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 14291#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14290#L745-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 14289#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14288#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 14287#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 14286#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 14285#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 14284#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14283#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 14281#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 14279#L745-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := 0; 14280#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14330#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 14329#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14328#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 14260#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14261#L745-103 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 14271#L745-102 assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise45#1 := main_~_ha_hashv~0#1; 14125#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14105#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 14048#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14049#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 14017#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14018#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 14059#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 14219#L745-79 assume true; 14029#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 14030#L745-76 assume true; 14188#L745-74 assume true; 14141#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 14142#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 14181#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 14216#L745-71 assume true; 14127#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 14143#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 14144#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 14096#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 14225#L745-55 assume true; 14252#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 14253#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 14205#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 14136#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 14089#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 14091#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 14126#L745-9 assume true; 14093#L745-7 havoc main_~_ha_bkt~0#1; 14094#L745-6 assume true; 14169#L745-4 assume true; 14254#L745-2 havoc main_~_ha_hashv~0#1; 14079#L745-1 assume true; 14050#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 14035#L737 [2024-11-10 23:33:12,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:12,891 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 23 times [2024-11-10 23:33:12,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:12,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379035535] [2024-11-10 23:33:12,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:12,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:12,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:12,896 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:12,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:12,900 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:12,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:12,901 INFO L85 PathProgramCache]: Analyzing trace with hash -1919457074, now seen corresponding path program 1 times [2024-11-10 23:33:12,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:12,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704200606] [2024-11-10 23:33:12,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:12,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:13,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:13,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:33:13,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:33:13,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [704200606] [2024-11-10 23:33:13,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [704200606] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:33:13,581 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:33:13,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2024-11-10 23:33:13,582 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1599219698] [2024-11-10 23:33:13,582 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:33:13,582 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:33:13,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:33:13,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-10 23:33:13,582 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2024-11-10 23:33:13,582 INFO L87 Difference]: Start difference. First operand 350 states and 472 transitions. cyclomatic complexity: 126 Second operand has 17 states, 17 states have (on average 4.882352941176471) internal successors, (83), 17 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:14,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:14,834 INFO L93 Difference]: Finished difference Result 370 states and 500 transitions. [2024-11-10 23:33:14,834 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 370 states and 500 transitions. [2024-11-10 23:33:14,835 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 358 [2024-11-10 23:33:14,837 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 370 states to 370 states and 500 transitions. [2024-11-10 23:33:14,837 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 370 [2024-11-10 23:33:14,837 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 370 [2024-11-10 23:33:14,838 INFO L73 IsDeterministic]: Start isDeterministic. Operand 370 states and 500 transitions. [2024-11-10 23:33:14,838 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:14,838 INFO L218 hiAutomatonCegarLoop]: Abstraction has 370 states and 500 transitions. [2024-11-10 23:33:14,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states and 500 transitions. [2024-11-10 23:33:14,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 357. [2024-11-10 23:33:14,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 357 states, 353 states have (on average 1.3456090651558075) internal successors, (475), 352 states have internal predecessors, (475), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:14,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 481 transitions. [2024-11-10 23:33:14,845 INFO L240 hiAutomatonCegarLoop]: Abstraction has 357 states and 481 transitions. [2024-11-10 23:33:14,846 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-10 23:33:14,846 INFO L425 stractBuchiCegarLoop]: Abstraction has 357 states and 481 transitions. [2024-11-10 23:33:14,846 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-11-10 23:33:14,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 357 states and 481 transitions. [2024-11-10 23:33:14,847 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 345 [2024-11-10 23:33:14,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:14,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:14,848 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:14,848 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:14,848 INFO L745 eck$LassoCheckResult]: Stem: 14999#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 14779#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 14775#L737 [2024-11-10 23:33:14,851 INFO L747 eck$LassoCheckResult]: Loop: 14775#L737 assume true; 14776#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 14738#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 14739#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 14797#L745 assume true;havoc main_~_ha_hashv~0#1; 14846#L745-73 assume true; 14749#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 14750#L745-156 assume true; 14928#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 14986#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 14816#L745-154 assume !main_#t~switch28#1; 14817#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 14972#L745-152 assume !main_#t~switch28#1; 14929#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 14924#L745-150 assume !main_#t~switch28#1; 14925#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 14918#L745-148 assume !main_#t~switch28#1; 14919#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 14932#L745-146 assume !main_#t~switch28#1; 14898#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 14899#L745-144 assume !main_#t~switch28#1; 14948#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 14931#L745-142 assume !main_#t~switch28#1; 14839#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 14840#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 14992#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 15077#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 15076#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 15075#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 15074#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 15073#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 15072#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 15071#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15057#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 15056#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 15054#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 15053#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 15052#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15050#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 15048#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 15049#L745-125 assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := 0; 14906#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14875#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 14876#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 15019#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15015#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 14801#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15005#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 14766#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15003#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 14865#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15002#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 14938#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15001#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 14849#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15000#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 14798#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 14956#L745-79 assume true; 14769#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 14770#L745-76 assume true; 14927#L745-74 assume true; 14882#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 14883#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 14920#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 14953#L745-71 assume true; 14867#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 14884#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 14885#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 14835#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 14962#L745-55 assume true; 14993#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 14994#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 14941#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 14877#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 14828#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 14830#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 14866#L745-9 assume true; 14832#L745-7 havoc main_~_ha_bkt~0#1; 14833#L745-6 assume true; 14908#L745-4 assume true; 14995#L745-2 havoc main_~_ha_hashv~0#1; 14818#L745-1 assume true; 14789#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 14775#L737 [2024-11-10 23:33:14,852 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:14,852 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 24 times [2024-11-10 23:33:14,852 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:14,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869455983] [2024-11-10 23:33:14,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:14,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:14,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:14,859 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:14,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:14,865 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:14,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:14,865 INFO L85 PathProgramCache]: Analyzing trace with hash 16833332, now seen corresponding path program 1 times [2024-11-10 23:33:14,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:14,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932317612] [2024-11-10 23:33:14,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:14,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:14,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:15,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:33:15,138 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:33:15,138 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932317612] [2024-11-10 23:33:15,138 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932317612] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:33:15,138 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:33:15,138 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-10 23:33:15,138 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201527075] [2024-11-10 23:33:15,138 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:33:15,138 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:33:15,138 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:33:15,139 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-10 23:33:15,139 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2024-11-10 23:33:15,139 INFO L87 Difference]: Start difference. First operand 357 states and 481 transitions. cyclomatic complexity: 128 Second operand has 9 states, 9 states have (on average 9.222222222222221) internal successors, (83), 9 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:15,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:15,877 INFO L93 Difference]: Finished difference Result 371 states and 499 transitions. [2024-11-10 23:33:15,877 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 371 states and 499 transitions. [2024-11-10 23:33:15,879 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 359 [2024-11-10 23:33:15,881 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 371 states to 371 states and 499 transitions. [2024-11-10 23:33:15,881 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 371 [2024-11-10 23:33:15,881 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 371 [2024-11-10 23:33:15,881 INFO L73 IsDeterministic]: Start isDeterministic. Operand 371 states and 499 transitions. [2024-11-10 23:33:15,882 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:15,882 INFO L218 hiAutomatonCegarLoop]: Abstraction has 371 states and 499 transitions. [2024-11-10 23:33:15,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states and 499 transitions. [2024-11-10 23:33:15,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 360. [2024-11-10 23:33:15,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 360 states, 356 states have (on average 1.345505617977528) internal successors, (479), 355 states have internal predecessors, (479), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:15,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 485 transitions. [2024-11-10 23:33:15,888 INFO L240 hiAutomatonCegarLoop]: Abstraction has 360 states and 485 transitions. [2024-11-10 23:33:15,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:33:15,889 INFO L425 stractBuchiCegarLoop]: Abstraction has 360 states and 485 transitions. [2024-11-10 23:33:15,889 INFO L332 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2024-11-10 23:33:15,889 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 360 states and 485 transitions. [2024-11-10 23:33:15,890 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 348 [2024-11-10 23:33:15,890 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:15,890 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:15,891 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:15,891 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:15,891 INFO L745 eck$LassoCheckResult]: Stem: 15747#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 15523#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 15519#L737 [2024-11-10 23:33:15,891 INFO L747 eck$LassoCheckResult]: Loop: 15519#L737 assume true; 15520#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 15485#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 15486#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 15542#L745 assume true;havoc main_~_ha_hashv~0#1; 15594#L745-73 assume true; 15493#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 15494#L745-156 assume true; 15671#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 15733#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 15562#L745-154 assume !main_#t~switch28#1; 15563#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 15719#L745-152 assume !main_#t~switch28#1; 15672#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 15667#L745-150 assume !main_#t~switch28#1; 15668#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 15659#L745-148 assume !main_#t~switch28#1; 15660#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 15675#L745-146 assume !main_#t~switch28#1; 15639#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 15640#L745-144 assume !main_#t~switch28#1; 15695#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 15674#L745-142 assume !main_#t~switch28#1; 15584#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 15585#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 15665#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 15666#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 15617#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 15535#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 15536#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 15694#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 15651#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 15569#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15570#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 15633#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 15634#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 15677#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 15743#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15782#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 15780#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15779#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 15775#L745-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1; 15497#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15498#L745-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 15603#L745-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise43#1 := main_~_hj_i~0#1; 15683#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15684#L745-109 assume !(0 == main_~_hj_j~0#1 % 4294967296); 15754#L745-108 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise44#1 := main_~_hj_j~0#1; 15510#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15751#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 15607#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15750#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 15681#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15749#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 15592#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15748#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 15543#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 15703#L745-79 assume true; 15511#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 15512#L745-76 assume true; 15669#L745-74 assume true; 15625#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 15626#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 15661#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 15700#L745-71 assume true; 15611#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 15627#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 15628#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 15580#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 15710#L745-55 assume true; 15739#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 15740#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 15688#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 15620#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 15571#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 15573#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 15610#L745-9 assume true; 15577#L745-7 havoc main_~_ha_bkt~0#1; 15578#L745-6 assume true; 15649#L745-4 assume true; 15741#L745-2 havoc main_~_ha_hashv~0#1; 15561#L745-1 assume true; 15534#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 15519#L737 [2024-11-10 23:33:15,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:15,891 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 25 times [2024-11-10 23:33:15,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:15,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717111789] [2024-11-10 23:33:15,892 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:15,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:15,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:15,897 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:15,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:15,901 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:15,902 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:15,902 INFO L85 PathProgramCache]: Analyzing trace with hash -1086499830, now seen corresponding path program 1 times [2024-11-10 23:33:15,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:15,902 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683275207] [2024-11-10 23:33:15,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:15,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:15,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:16,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:33:16,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:33:16,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1683275207] [2024-11-10 23:33:16,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1683275207] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:33:16,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:33:16,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2024-11-10 23:33:16,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1987296563] [2024-11-10 23:33:16,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:33:16,165 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:33:16,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:33:16,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-11-10 23:33:16,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2024-11-10 23:33:16,165 INFO L87 Difference]: Start difference. First operand 360 states and 485 transitions. cyclomatic complexity: 129 Second operand has 11 states, 11 states have (on average 7.545454545454546) internal successors, (83), 11 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:16,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:16,943 INFO L93 Difference]: Finished difference Result 374 states and 503 transitions. [2024-11-10 23:33:16,943 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 374 states and 503 transitions. [2024-11-10 23:33:16,945 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 362 [2024-11-10 23:33:16,946 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 374 states to 374 states and 503 transitions. [2024-11-10 23:33:16,946 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 374 [2024-11-10 23:33:16,946 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 374 [2024-11-10 23:33:16,946 INFO L73 IsDeterministic]: Start isDeterministic. Operand 374 states and 503 transitions. [2024-11-10 23:33:16,947 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:16,947 INFO L218 hiAutomatonCegarLoop]: Abstraction has 374 states and 503 transitions. [2024-11-10 23:33:16,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 374 states and 503 transitions. [2024-11-10 23:33:16,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 374 to 363. [2024-11-10 23:33:16,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 363 states, 359 states have (on average 1.3426183844011141) internal successors, (482), 358 states have internal predecessors, (482), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:16,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 488 transitions. [2024-11-10 23:33:16,951 INFO L240 hiAutomatonCegarLoop]: Abstraction has 363 states and 488 transitions. [2024-11-10 23:33:16,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:33:16,955 INFO L425 stractBuchiCegarLoop]: Abstraction has 363 states and 488 transitions. [2024-11-10 23:33:16,955 INFO L332 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2024-11-10 23:33:16,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 363 states and 488 transitions. [2024-11-10 23:33:16,956 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 351 [2024-11-10 23:33:16,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:16,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:16,956 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:16,956 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:16,956 INFO L745 eck$LassoCheckResult]: Stem: 16488#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 16271#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 16267#L737 [2024-11-10 23:33:16,957 INFO L747 eck$LassoCheckResult]: Loop: 16267#L737 assume true; 16268#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 16233#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 16234#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 16289#L745 assume true;havoc main_~_ha_hashv~0#1; 16342#L745-73 assume true; 16241#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 16242#L745-156 assume true; 16548#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 16547#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 16546#L745-154 assume !main_#t~switch28#1; 16545#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 16544#L745-152 assume !main_#t~switch28#1; 16543#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 16542#L745-150 assume !main_#t~switch28#1; 16541#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 16540#L745-148 assume !main_#t~switch28#1; 16539#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 16538#L745-146 assume !main_#t~switch28#1; 16537#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 16536#L745-144 assume !main_#t~switch28#1; 16535#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 16534#L745-142 assume !main_#t~switch28#1; 16533#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 16532#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 16531#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 16530#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 16529#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 16528#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 16527#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 16526#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 16525#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 16524#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16523#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 16380#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 16381#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 16555#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 16580#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16578#L745-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 16576#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16574#L745-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 16571#L745-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 16569#L745-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 16568#L745-118 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 16566#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16564#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 16293#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16553#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 16258#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16549#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 16356#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16491#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 16430#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16490#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 16340#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16489#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 16290#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 16449#L745-79 assume true; 16261#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 16262#L745-76 assume true; 16417#L745-74 assume true; 16372#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 16373#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 16409#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 16446#L745-71 assume true; 16358#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 16374#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 16375#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 16327#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 16454#L745-55 assume true; 16481#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 16482#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 16434#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 16367#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 16320#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 16322#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 16357#L745-9 assume true; 16324#L745-7 havoc main_~_ha_bkt~0#1; 16325#L745-6 assume true; 16397#L745-4 assume true; 16483#L745-2 havoc main_~_ha_hashv~0#1; 16310#L745-1 assume true; 16281#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 16267#L737 [2024-11-10 23:33:16,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:16,957 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 26 times [2024-11-10 23:33:16,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:16,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [384358590] [2024-11-10 23:33:16,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:16,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:16,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:16,964 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:16,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:16,972 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:16,973 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:16,973 INFO L85 PathProgramCache]: Analyzing trace with hash 1475551157, now seen corresponding path program 1 times [2024-11-10 23:33:16,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:16,973 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861562305] [2024-11-10 23:33:16,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:16,973 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:17,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:17,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-10 23:33:17,749 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-10 23:33:17,749 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861562305] [2024-11-10 23:33:17,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1861562305] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-10 23:33:17,749 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-10 23:33:17,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-10 23:33:17,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1077796312] [2024-11-10 23:33:17,749 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-10 23:33:17,750 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-10 23:33:17,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-10 23:33:17,750 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-10 23:33:17,750 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-10 23:33:17,750 INFO L87 Difference]: Start difference. First operand 363 states and 488 transitions. cyclomatic complexity: 129 Second operand has 10 states, 10 states have (on average 8.3) internal successors, (83), 10 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-10 23:33:21,511 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.00s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-10 23:33:21,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-10 23:33:21,976 INFO L93 Difference]: Finished difference Result 376 states and 504 transitions. [2024-11-10 23:33:21,976 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 376 states and 504 transitions. [2024-11-10 23:33:21,978 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 364 [2024-11-10 23:33:21,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 376 states to 376 states and 504 transitions. [2024-11-10 23:33:21,979 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 376 [2024-11-10 23:33:21,980 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 376 [2024-11-10 23:33:21,980 INFO L73 IsDeterministic]: Start isDeterministic. Operand 376 states and 504 transitions. [2024-11-10 23:33:21,984 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-10 23:33:21,984 INFO L218 hiAutomatonCegarLoop]: Abstraction has 376 states and 504 transitions. [2024-11-10 23:33:21,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states and 504 transitions. [2024-11-10 23:33:21,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 364. [2024-11-10 23:33:21,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 364 states, 360 states have (on average 1.3416666666666666) internal successors, (483), 359 states have internal predecessors, (483), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-10 23:33:21,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 489 transitions. [2024-11-10 23:33:21,993 INFO L240 hiAutomatonCegarLoop]: Abstraction has 364 states and 489 transitions. [2024-11-10 23:33:21,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-10 23:33:21,994 INFO L425 stractBuchiCegarLoop]: Abstraction has 364 states and 489 transitions. [2024-11-10 23:33:21,994 INFO L332 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2024-11-10 23:33:21,994 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 364 states and 489 transitions. [2024-11-10 23:33:21,995 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 352 [2024-11-10 23:33:21,995 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-10 23:33:21,998 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-10 23:33:21,998 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-10 23:33:21,998 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-10 23:33:21,999 INFO L745 eck$LassoCheckResult]: Stem: 17252#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2); 17033#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0; 17029#L737 [2024-11-10 23:33:21,999 INFO L747 eck$LassoCheckResult]: Loop: 17029#L737 assume true; 17030#L737-2 assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 16995#L739 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 16996#L742 call write~int#1(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#1(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#1(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1; 17051#L745 assume true;havoc main_~_ha_hashv~0#1; 17099#L745-73 assume true; 17003#L745-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 17004#L745-156 assume true; 17334#L745-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 17333#L745-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1; 17332#L745-154 assume !main_#t~switch28#1; 17329#L745-153 main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1; 17327#L745-152 assume !main_#t~switch28#1; 17325#L745-151 main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1; 17174#L745-150 assume !main_#t~switch28#1; 17175#L745-149 main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1; 17168#L745-148 assume !main_#t~switch28#1; 17169#L745-147 main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1; 17184#L745-146 assume !main_#t~switch28#1; 17146#L745-145 main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1; 17147#L745-144 assume !main_#t~switch28#1; 17203#L745-143 main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1; 17183#L745-142 assume !main_#t~switch28#1; 17092#L745-141 main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1; 17093#L745-140 assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296); 17172#L745-139 main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1; 17173#L745-138 assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296); 17126#L745-137 main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1; 17046#L745-136 assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296); 17047#L745-135 main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1; 17202#L745-134 assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296); 17160#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1; 17077#L745-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17078#L745-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 17141#L745-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 17142#L745-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 17186#L745-130 havoc main_#t~bitwise40#1;assume main_#t~bitwise40#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 17248#L745-128 main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17330#L745-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 17331#L745-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 17345#L745-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 17282#L745-124 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 17279#L745-122 main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17274#L745-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 17271#L745-116 main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17269#L745-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 17055#L745-110 main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17258#L745-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 17020#L745-104 main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17256#L745-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32; 17117#L745-98 main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17255#L745-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 17192#L745-92 main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17254#L745-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 17102#L745-86 main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17253#L745-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 17052#L745-80 main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1; 17211#L745-79 assume true; 17021#L745-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 17022#L745-76 assume true; 17176#L745-74 assume true; 17133#L745-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 17134#L745-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset; 17170#L745-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#1(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#1(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset; 17208#L745-71 assume true; 17119#L745-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#1(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#1(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1; 17135#L745-54 assume true;call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#1(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4); 17136#L745-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0; 17088#L745-56 main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1; 17217#L745-55 assume true; 17244#L745-8 assume true;call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#1(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 17245#L745-53 assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset; 17196#L745-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296; 17128#L745-51 assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#1(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296; 17079#L745-50 assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1; 17081#L745-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 17118#L745-9 assume true; 17085#L745-7 havoc main_~_ha_bkt~0#1; 17086#L745-6 assume true; 17158#L745-4 assume true; 17246#L745-2 havoc main_~_ha_hashv~0#1; 17069#L745-1 assume true; 17043#L737-1 main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1; 17029#L737 [2024-11-10 23:33:21,999 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:21,999 INFO L85 PathProgramCache]: Analyzing trace with hash 14752, now seen corresponding path program 27 times [2024-11-10 23:33:21,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:21,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1750009362] [2024-11-10 23:33:21,999 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:21,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:22,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:22,009 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-10 23:33:22,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-10 23:33:22,016 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-10 23:33:22,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-10 23:33:22,022 INFO L85 PathProgramCache]: Analyzing trace with hash 550891652, now seen corresponding path program 1 times [2024-11-10 23:33:22,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-10 23:33:22,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903821309] [2024-11-10 23:33:22,022 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-10 23:33:22,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-10 23:33:22,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-10 23:33:34,684 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 32 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-10 23:33:46,717 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 39 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-10 23:33:52,005 WARN L286 SmtUtils]: Spent 5.29s on a formula simplification that was a NOOP. DAG size: 26 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2024-11-10 23:34:04,041 WARN L286 SmtUtils]: Spent 12.04s on a formula simplification that was a NOOP. DAG size: 10 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)