./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8be7027f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.perfect-tracechecks-8be7027-m [2024-11-12 20:57:19,237 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-12 20:57:19,307 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-12 20:57:19,313 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-12 20:57:19,313 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-12 20:57:19,336 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-12 20:57:19,336 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-12 20:57:19,336 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-12 20:57:19,337 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-12 20:57:19,337 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-12 20:57:19,337 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-12 20:57:19,337 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-12 20:57:19,338 INFO L153 SettingsManager]: * Use SBE=true [2024-11-12 20:57:19,338 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-12 20:57:19,339 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-12 20:57:19,339 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-12 20:57:19,339 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-12 20:57:19,340 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-12 20:57:19,340 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-12 20:57:19,340 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-12 20:57:19,340 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-12 20:57:19,344 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-12 20:57:19,344 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-12 20:57:19,344 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-12 20:57:19,344 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-12 20:57:19,344 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-12 20:57:19,345 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-12 20:57:19,345 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-12 20:57:19,346 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-12 20:57:19,346 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-12 20:57:19,346 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-12 20:57:19,346 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2024-11-12 20:57:19,536 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-12 20:57:19,551 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-12 20:57:19,554 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-12 20:57:19,554 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-12 20:57:19,555 INFO L274 PluginConnector]: CDTParser initialized [2024-11-12 20:57:19,556 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-12 20:57:20,778 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-12 20:57:20,952 INFO L384 CDTParser]: Found 1 translation units. [2024-11-12 20:57:20,952 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-12 20:57:20,962 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4a331cf13/e8d75e34a2b04468b0e683acc6f61d15/FLAG8c0841392 [2024-11-12 20:57:20,978 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4a331cf13/e8d75e34a2b04468b0e683acc6f61d15 [2024-11-12 20:57:20,981 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-12 20:57:20,982 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-12 20:57:20,985 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-12 20:57:20,985 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-12 20:57:20,989 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-12 20:57:20,989 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 08:57:20" (1/1) ... [2024-11-12 20:57:20,991 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@63b325ae and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:20, skipping insertion in model container [2024-11-12 20:57:20,992 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 08:57:20" (1/1) ... [2024-11-12 20:57:21,027 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-12 20:57:21,277 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-12 20:57:21,287 INFO L200 MainTranslator]: Completed pre-run [2024-11-12 20:57:21,326 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-12 20:57:21,381 INFO L204 MainTranslator]: Completed translation [2024-11-12 20:57:21,383 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21 WrapperNode [2024-11-12 20:57:21,384 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-12 20:57:21,385 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-12 20:57:21,385 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-12 20:57:21,385 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-12 20:57:21,402 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,415 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,431 INFO L138 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33 [2024-11-12 20:57:21,432 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-12 20:57:21,433 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-12 20:57:21,433 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-12 20:57:21,433 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-12 20:57:21,440 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,440 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,443 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,452 INFO L175 MemorySlicer]: Split 7 memory accesses to 2 slices as follows [4, 3]. 57 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 3 writes are split as follows [2, 1]. [2024-11-12 20:57:21,452 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,452 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,455 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,456 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,457 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,458 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,462 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-12 20:57:21,463 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-12 20:57:21,463 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-12 20:57:21,463 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-12 20:57:21,464 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (1/1) ... [2024-11-12 20:57:21,468 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-12 20:57:21,476 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:21,495 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-12 20:57:21,496 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-12 20:57:21,532 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-12 20:57:21,533 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-12 20:57:21,533 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-12 20:57:21,609 INFO L238 CfgBuilder]: Building ICFG [2024-11-12 20:57:21,611 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-12 20:57:21,690 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-11-12 20:57:21,690 INFO L287 CfgBuilder]: Performing block encoding [2024-11-12 20:57:21,698 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-12 20:57:21,698 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-12 20:57:21,699 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 08:57:21 BoogieIcfgContainer [2024-11-12 20:57:21,699 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-12 20:57:21,699 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-12 20:57:21,699 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-12 20:57:21,702 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-12 20:57:21,703 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 20:57:21,703 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.11 08:57:20" (1/3) ... [2024-11-12 20:57:21,703 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@14b39a15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 08:57:21, skipping insertion in model container [2024-11-12 20:57:21,703 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 20:57:21,703 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 08:57:21" (2/3) ... [2024-11-12 20:57:21,704 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@14b39a15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 08:57:21, skipping insertion in model container [2024-11-12 20:57:21,704 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 20:57:21,704 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 08:57:21" (3/3) ... [2024-11-12 20:57:21,705 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-12 20:57:21,747 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2024-11-12 20:57:21,747 INFO L302 stractBuchiCegarLoop]: Hoare is None [2024-11-12 20:57:21,747 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-12 20:57:21,747 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-12 20:57:21,747 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-12 20:57:21,748 INFO L306 stractBuchiCegarLoop]: Difference is false [2024-11-12 20:57:21,748 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-12 20:57:21,748 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-12 20:57:21,751 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:21,765 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-12 20:57:21,765 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:21,765 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:21,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:21,769 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-12 20:57:21,769 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-12 20:57:21,770 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:21,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-12 20:57:21,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:21,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:21,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:21,772 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-12 20:57:21,777 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:21,777 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !true;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:21,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:21,782 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-12 20:57:21,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:21,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650053378] [2024-11-12 20:57:21,789 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:21,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:21,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:21,890 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:21,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:21,918 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:21,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:21,920 INFO L85 PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times [2024-11-12 20:57:21,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:21,920 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659460771] [2024-11-12 20:57:21,920 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:21,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:21,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:21,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:21,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659460771] [2024-11-12 20:57:21,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659460771] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:21,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1826041207] [2024-11-12 20:57:21,973 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:21,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:21,974 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:21,976 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:21,977 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-12 20:57:22,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:22,040 INFO L256 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-12 20:57:22,041 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:57:22,045 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:57:22,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1826041207] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:57:22,049 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:57:22,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-12 20:57:22,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156183338] [2024-11-12 20:57:22,052 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:22,056 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:22,057 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:22,087 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-12 20:57:22,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-12 20:57:22,090 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:22,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:22,095 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-11-12 20:57:22,096 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-11-12 20:57:22,097 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-12 20:57:22,100 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2024-11-12 20:57:22,102 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-12 20:57:22,102 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-11-12 20:57:22,102 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2024-11-12 20:57:22,102 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:22,103 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-12 20:57:22,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2024-11-12 20:57:22,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2024-11-12 20:57:22,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:22,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2024-11-12 20:57:22,123 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-12 20:57:22,124 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-12 20:57:22,127 INFO L426 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-12 20:57:22,128 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-12 20:57:22,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2024-11-12 20:57:22,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-12 20:57:22,130 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:22,130 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:22,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:22,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-12 20:57:22,130 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:22,130 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:22,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:22,131 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2024-11-12 20:57:22,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:22,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [838033604] [2024-11-12 20:57:22,131 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:22,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:22,151 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:22,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:22,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:22,164 INFO L85 PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times [2024-11-12 20:57:22,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:22,164 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154800142] [2024-11-12 20:57:22,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:22,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:22,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:22,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154800142] [2024-11-12 20:57:22,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154800142] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:22,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1326449435] [2024-11-12 20:57:22,316 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:22,316 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:22,338 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:22,340 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-12 20:57:22,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:22,387 INFO L256 TraceCheckSpWp]: Trace formula consists of 32 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-12 20:57:22,388 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:57:22,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-12 20:57:22,448 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-12 20:57:22,466 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:57:22,490 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1326449435] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:57:22,490 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:57:22,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-12 20:57:22,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [502092090] [2024-11-12 20:57:22,490 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:22,490 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:22,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:22,491 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-12 20:57:22,491 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2024-11-12 20:57:22,494 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 8 states, 8 states have (on average 1.375) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:22,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:22,542 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-11-12 20:57:22,542 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-11-12 20:57:22,542 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2024-11-12 20:57:22,543 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 12 transitions. [2024-11-12 20:57:22,543 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2024-11-12 20:57:22,543 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2024-11-12 20:57:22,543 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 12 transitions. [2024-11-12 20:57:22,543 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:22,543 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2024-11-12 20:57:22,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 12 transitions. [2024-11-12 20:57:22,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2024-11-12 20:57:22,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 10 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:22,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 12 transitions. [2024-11-12 20:57:22,544 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions. [2024-11-12 20:57:22,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-12 20:57:22,546 INFO L426 stractBuchiCegarLoop]: Abstraction has 11 states and 12 transitions. [2024-11-12 20:57:22,546 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-12 20:57:22,546 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 12 transitions. [2024-11-12 20:57:22,546 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 9 [2024-11-12 20:57:22,546 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:22,546 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:22,547 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:22,547 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 2, 1, 1, 1, 1] [2024-11-12 20:57:22,547 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:22,547 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:22,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:22,548 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2024-11-12 20:57:22,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:22,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418552501] [2024-11-12 20:57:22,548 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:22,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:22,562 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:22,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:22,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:22,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:22,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1970998361, now seen corresponding path program 1 times [2024-11-12 20:57:22,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:22,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393282022] [2024-11-12 20:57:22,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:22,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:22,854 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:22,854 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393282022] [2024-11-12 20:57:22,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [393282022] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:22,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [422575383] [2024-11-12 20:57:22,855 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:22,855 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:22,856 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:22,857 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:22,859 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-12 20:57:22,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:22,908 INFO L256 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-12 20:57:22,911 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:57:22,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-12 20:57:22,943 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:22,958 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:22,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-12 20:57:22,972 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:57:23,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [422575383] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:57:23,042 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:57:23,042 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 13 [2024-11-12 20:57:23,042 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1397369570] [2024-11-12 20:57:23,042 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:23,043 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:23,043 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:23,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-12 20:57:23,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=94, Unknown=0, NotChecked=0, Total=156 [2024-11-12 20:57:23,044 INFO L87 Difference]: Start difference. First operand 11 states and 12 transitions. cyclomatic complexity: 2 Second operand has 13 states, 13 states have (on average 1.6153846153846154) internal successors, (21), 13 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:23,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:23,124 INFO L93 Difference]: Finished difference Result 19 states and 20 transitions. [2024-11-12 20:57:23,124 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 20 transitions. [2024-11-12 20:57:23,125 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2024-11-12 20:57:23,125 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 20 transitions. [2024-11-12 20:57:23,125 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2024-11-12 20:57:23,125 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2024-11-12 20:57:23,125 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 20 transitions. [2024-11-12 20:57:23,125 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:23,125 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 20 transitions. [2024-11-12 20:57:23,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 20 transitions. [2024-11-12 20:57:23,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2024-11-12 20:57:23,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:23,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions. [2024-11-12 20:57:23,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 20 transitions. [2024-11-12 20:57:23,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-12 20:57:23,129 INFO L426 stractBuchiCegarLoop]: Abstraction has 19 states and 20 transitions. [2024-11-12 20:57:23,129 INFO L333 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-12 20:57:23,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions. [2024-11-12 20:57:23,129 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 17 [2024-11-12 20:57:23,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:23,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:23,130 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:23,130 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [7, 6, 1, 1, 1, 1] [2024-11-12 20:57:23,130 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:23,130 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:23,130 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:23,130 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2024-11-12 20:57:23,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:23,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1037007301] [2024-11-12 20:57:23,130 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:23,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:23,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:23,137 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:23,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:23,144 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:23,145 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:23,145 INFO L85 PathProgramCache]: Analyzing trace with hash -1109814765, now seen corresponding path program 2 times [2024-11-12 20:57:23,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:23,145 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108165976] [2024-11-12 20:57:23,145 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:23,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:23,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:23,666 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:23,666 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108165976] [2024-11-12 20:57:23,666 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [108165976] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:23,667 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [923601688] [2024-11-12 20:57:23,667 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-12 20:57:23,667 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:23,667 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:23,670 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:23,671 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-12 20:57:23,721 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:23,721 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:23,721 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2024-11-12 20:57:23,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799811298] [2024-11-12 20:57:23,722 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:23,722 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:23,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:23,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-11-12 20:57:23,723 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=142, Unknown=0, NotChecked=0, Total=240 [2024-11-12 20:57:23,723 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 2 Second operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 16 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:23,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:23,777 INFO L93 Difference]: Finished difference Result 21 states and 22 transitions. [2024-11-12 20:57:23,777 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 22 transitions. [2024-11-12 20:57:23,780 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 19 [2024-11-12 20:57:23,781 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 21 states and 22 transitions. [2024-11-12 20:57:23,781 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-11-12 20:57:23,781 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-11-12 20:57:23,781 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 22 transitions. [2024-11-12 20:57:23,781 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:23,781 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 22 transitions. [2024-11-12 20:57:23,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 22 transitions. [2024-11-12 20:57:23,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2024-11-12 20:57:23,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.0476190476190477) internal successors, (22), 20 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:23,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 22 transitions. [2024-11-12 20:57:23,784 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 22 transitions. [2024-11-12 20:57:23,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-12 20:57:23,786 INFO L426 stractBuchiCegarLoop]: Abstraction has 21 states and 22 transitions. [2024-11-12 20:57:23,786 INFO L333 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-12 20:57:23,787 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 22 transitions. [2024-11-12 20:57:23,787 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 19 [2024-11-12 20:57:23,787 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:23,789 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:23,789 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:23,789 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [8, 7, 1, 1, 1, 1] [2024-11-12 20:57:23,789 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:23,789 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:23,790 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:23,790 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2024-11-12 20:57:23,790 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:23,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017962788] [2024-11-12 20:57:23,790 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:23,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:23,798 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:23,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:23,802 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:23,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:23,803 INFO L85 PathProgramCache]: Analyzing trace with hash -1380048178, now seen corresponding path program 3 times [2024-11-12 20:57:23,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:23,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028824302] [2024-11-12 20:57:23,804 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:23,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:23,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:24,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:24,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2028824302] [2024-11-12 20:57:24,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2028824302] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:24,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1540062659] [2024-11-12 20:57:24,294 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-12 20:57:24,295 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:24,295 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:24,297 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:24,299 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-12 20:57:24,342 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:24,342 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:24,342 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2024-11-12 20:57:24,342 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1436415679] [2024-11-12 20:57:24,342 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:24,343 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:24,343 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:24,343 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2024-11-12 20:57:24,343 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=182, Unknown=0, NotChecked=0, Total=306 [2024-11-12 20:57:24,343 INFO L87 Difference]: Start difference. First operand 21 states and 22 transitions. cyclomatic complexity: 2 Second operand has 18 states, 18 states have (on average 1.0555555555555556) internal successors, (19), 18 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:24,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:24,385 INFO L93 Difference]: Finished difference Result 23 states and 24 transitions. [2024-11-12 20:57:24,385 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 24 transitions. [2024-11-12 20:57:24,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2024-11-12 20:57:24,386 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 23 states and 24 transitions. [2024-11-12 20:57:24,386 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-12 20:57:24,386 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-12 20:57:24,386 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 24 transitions. [2024-11-12 20:57:24,386 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:24,386 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 24 transitions. [2024-11-12 20:57:24,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 24 transitions. [2024-11-12 20:57:24,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2024-11-12 20:57:24,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 22 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:24,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 24 transitions. [2024-11-12 20:57:24,387 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 24 transitions. [2024-11-12 20:57:24,389 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-12 20:57:24,389 INFO L426 stractBuchiCegarLoop]: Abstraction has 23 states and 24 transitions. [2024-11-12 20:57:24,389 INFO L333 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-12 20:57:24,389 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 24 transitions. [2024-11-12 20:57:24,389 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 21 [2024-11-12 20:57:24,389 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:24,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:24,390 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:24,390 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 8, 1, 1, 1, 1] [2024-11-12 20:57:24,390 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:24,390 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:24,390 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:24,390 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2024-11-12 20:57:24,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:24,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [714124095] [2024-11-12 20:57:24,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:24,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:24,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:24,395 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:24,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:24,398 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:24,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:24,399 INFO L85 PathProgramCache]: Analyzing trace with hash 918646985, now seen corresponding path program 4 times [2024-11-12 20:57:24,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:24,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967506809] [2024-11-12 20:57:24,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:24,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:24,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:24,850 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:24,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967506809] [2024-11-12 20:57:24,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967506809] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:24,851 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [585814656] [2024-11-12 20:57:24,851 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-12 20:57:24,851 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:24,851 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:24,853 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:24,854 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-12 20:57:24,891 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:24,891 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:24,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2024-11-12 20:57:24,892 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032528617] [2024-11-12 20:57:24,892 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:24,892 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:24,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:24,894 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-11-12 20:57:24,894 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=227, Unknown=0, NotChecked=0, Total=380 [2024-11-12 20:57:24,894 INFO L87 Difference]: Start difference. First operand 23 states and 24 transitions. cyclomatic complexity: 2 Second operand has 20 states, 20 states have (on average 1.05) internal successors, (21), 20 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:24,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:24,942 INFO L93 Difference]: Finished difference Result 25 states and 26 transitions. [2024-11-12 20:57:24,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 26 transitions. [2024-11-12 20:57:24,943 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 [2024-11-12 20:57:24,943 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 26 transitions. [2024-11-12 20:57:24,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2024-11-12 20:57:24,943 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-12 20:57:24,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 26 transitions. [2024-11-12 20:57:24,944 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:24,944 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 26 transitions. [2024-11-12 20:57:24,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 26 transitions. [2024-11-12 20:57:24,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-12 20:57:24,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.04) internal successors, (26), 24 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:24,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 26 transitions. [2024-11-12 20:57:24,945 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 26 transitions. [2024-11-12 20:57:24,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-12 20:57:24,946 INFO L426 stractBuchiCegarLoop]: Abstraction has 25 states and 26 transitions. [2024-11-12 20:57:24,946 INFO L333 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-12 20:57:24,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 26 transitions. [2024-11-12 20:57:24,946 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 23 [2024-11-12 20:57:24,946 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:24,946 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:24,947 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:24,947 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 9, 1, 1, 1, 1] [2024-11-12 20:57:24,947 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:24,947 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:24,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:24,947 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2024-11-12 20:57:24,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:24,948 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985577286] [2024-11-12 20:57:24,948 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:24,948 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:24,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:24,951 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:24,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:24,953 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:24,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:24,953 INFO L85 PathProgramCache]: Analyzing trace with hash -1943458812, now seen corresponding path program 5 times [2024-11-12 20:57:24,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:24,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638282505] [2024-11-12 20:57:24,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:24,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:24,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:25,456 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:25,456 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638282505] [2024-11-12 20:57:25,457 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [638282505] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:25,457 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1132447781] [2024-11-12 20:57:25,457 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-12 20:57:25,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:25,457 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:25,459 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:25,460 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-12 20:57:25,502 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:25,502 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:25,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2024-11-12 20:57:25,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212951353] [2024-11-12 20:57:25,502 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:25,503 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:25,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:25,503 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-12 20:57:25,503 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=277, Unknown=0, NotChecked=0, Total=462 [2024-11-12 20:57:25,504 INFO L87 Difference]: Start difference. First operand 25 states and 26 transitions. cyclomatic complexity: 2 Second operand has 22 states, 22 states have (on average 1.0454545454545454) internal successors, (23), 22 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:25,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:25,554 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-11-12 20:57:25,554 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-11-12 20:57:25,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-12 20:57:25,555 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-11-12 20:57:25,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2024-11-12 20:57:25,555 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2024-11-12 20:57:25,555 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-11-12 20:57:25,555 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:25,555 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-12 20:57:25,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-11-12 20:57:25,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2024-11-12 20:57:25,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:25,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-11-12 20:57:25,556 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-12 20:57:25,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-12 20:57:25,557 INFO L426 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-12 20:57:25,557 INFO L333 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-12 20:57:25,558 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-11-12 20:57:25,558 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-12 20:57:25,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:25,558 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:25,558 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:25,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2024-11-12 20:57:25,558 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:25,559 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:25,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:25,559 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2024-11-12 20:57:25,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:25,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1000064576] [2024-11-12 20:57:25,559 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:25,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:25,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:25,562 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:25,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:25,564 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:25,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:25,565 INFO L85 PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 6 times [2024-11-12 20:57:25,565 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:25,565 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [622887277] [2024-11-12 20:57:25,565 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:25,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:25,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:26,124 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:26,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [622887277] [2024-11-12 20:57:26,124 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [622887277] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:26,124 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [361670305] [2024-11-12 20:57:26,125 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-12 20:57:26,125 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:26,125 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:26,127 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:26,128 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-12 20:57:26,172 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:26,172 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:26,172 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2024-11-12 20:57:26,172 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [81657842] [2024-11-12 20:57:26,172 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:26,172 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:26,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:26,173 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2024-11-12 20:57:26,173 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=332, Unknown=0, NotChecked=0, Total=552 [2024-11-12 20:57:26,173 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 24 states, 24 states have (on average 1.0416666666666667) internal successors, (25), 24 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:26,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:26,223 INFO L93 Difference]: Finished difference Result 29 states and 30 transitions. [2024-11-12 20:57:26,223 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 30 transitions. [2024-11-12 20:57:26,223 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 27 [2024-11-12 20:57:26,224 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 29 states and 30 transitions. [2024-11-12 20:57:26,224 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2024-11-12 20:57:26,224 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2024-11-12 20:57:26,224 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 30 transitions. [2024-11-12 20:57:26,224 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:26,224 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 30 transitions. [2024-11-12 20:57:26,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 30 transitions. [2024-11-12 20:57:26,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2024-11-12 20:57:26,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 28 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:26,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2024-11-12 20:57:26,228 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 30 transitions. [2024-11-12 20:57:26,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-12 20:57:26,229 INFO L426 stractBuchiCegarLoop]: Abstraction has 29 states and 30 transitions. [2024-11-12 20:57:26,229 INFO L333 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-12 20:57:26,229 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 30 transitions. [2024-11-12 20:57:26,230 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 27 [2024-11-12 20:57:26,230 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:26,230 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:26,230 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:26,230 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [12, 11, 1, 1, 1, 1] [2024-11-12 20:57:26,230 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:26,230 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:26,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:26,230 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2024-11-12 20:57:26,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:26,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515084432] [2024-11-12 20:57:26,231 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:26,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:26,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:26,234 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:26,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:26,236 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:26,236 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:26,236 INFO L85 PathProgramCache]: Analyzing trace with hash -1092572614, now seen corresponding path program 7 times [2024-11-12 20:57:26,236 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:26,236 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [272682026] [2024-11-12 20:57:26,236 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:26,236 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:26,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:26,849 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:26,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [272682026] [2024-11-12 20:57:26,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [272682026] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:26,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1526943687] [2024-11-12 20:57:26,849 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-12 20:57:26,849 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:26,849 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:26,851 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:26,852 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-12 20:57:26,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:26,918 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 38 conjuncts are in the unsatisfiable core [2024-11-12 20:57:26,922 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:57:26,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-12 20:57:26,937 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,963 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,972 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,986 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:26,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:27,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:27,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:27,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:27,033 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-12 20:57:27,038 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:57:27,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1526943687] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:57:27,318 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:57:27,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 15, 15] total 39 [2024-11-12 20:57:27,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [309912690] [2024-11-12 20:57:27,318 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:27,318 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:27,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:27,318 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2024-11-12 20:57:27,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=638, Invalid=844, Unknown=0, NotChecked=0, Total=1482 [2024-11-12 20:57:27,321 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. cyclomatic complexity: 2 Second operand has 39 states, 39 states have (on average 1.8974358974358974) internal successors, (74), 39 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:27,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:27,659 INFO L93 Difference]: Finished difference Result 55 states and 56 transitions. [2024-11-12 20:57:27,659 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 56 transitions. [2024-11-12 20:57:27,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2024-11-12 20:57:27,661 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 56 transitions. [2024-11-12 20:57:27,661 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 55 [2024-11-12 20:57:27,661 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 55 [2024-11-12 20:57:27,661 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 56 transitions. [2024-11-12 20:57:27,661 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:27,661 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 56 transitions. [2024-11-12 20:57:27,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 56 transitions. [2024-11-12 20:57:27,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2024-11-12 20:57:27,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.018181818181818) internal successors, (56), 54 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:27,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 56 transitions. [2024-11-12 20:57:27,664 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 56 transitions. [2024-11-12 20:57:27,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2024-11-12 20:57:27,665 INFO L426 stractBuchiCegarLoop]: Abstraction has 55 states and 56 transitions. [2024-11-12 20:57:27,665 INFO L333 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-12 20:57:27,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 56 transitions. [2024-11-12 20:57:27,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 53 [2024-11-12 20:57:27,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:27,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:27,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:27,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [25, 24, 1, 1, 1, 1] [2024-11-12 20:57:27,667 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:27,667 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:27,667 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:27,668 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2024-11-12 20:57:27,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:27,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89448357] [2024-11-12 20:57:27,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:27,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:27,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:27,675 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:27,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:27,678 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:27,679 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:27,679 INFO L85 PathProgramCache]: Analyzing trace with hash -444867975, now seen corresponding path program 8 times [2024-11-12 20:57:27,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:27,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709976154] [2024-11-12 20:57:27,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:27,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:27,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:29,982 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:29,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709976154] [2024-11-12 20:57:29,982 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709976154] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:29,982 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2054646705] [2024-11-12 20:57:29,982 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-12 20:57:29,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:29,982 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:29,984 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:29,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-12 20:57:30,038 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:30,038 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:30,038 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [52] total 52 [2024-11-12 20:57:30,038 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1544461410] [2024-11-12 20:57:30,038 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:30,039 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:30,039 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:30,039 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2024-11-12 20:57:30,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1025, Invalid=1627, Unknown=0, NotChecked=0, Total=2652 [2024-11-12 20:57:30,040 INFO L87 Difference]: Start difference. First operand 55 states and 56 transitions. cyclomatic complexity: 2 Second operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 52 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:30,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:30,144 INFO L93 Difference]: Finished difference Result 57 states and 58 transitions. [2024-11-12 20:57:30,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 58 transitions. [2024-11-12 20:57:30,144 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-12 20:57:30,145 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 58 transitions. [2024-11-12 20:57:30,145 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-12 20:57:30,145 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2024-11-12 20:57:30,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 58 transitions. [2024-11-12 20:57:30,145 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:30,145 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 58 transitions. [2024-11-12 20:57:30,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 58 transitions. [2024-11-12 20:57:30,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2024-11-12 20:57:30,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 1.0175438596491229) internal successors, (58), 56 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:30,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2024-11-12 20:57:30,147 INFO L240 hiAutomatonCegarLoop]: Abstraction has 57 states and 58 transitions. [2024-11-12 20:57:30,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-11-12 20:57:30,148 INFO L426 stractBuchiCegarLoop]: Abstraction has 57 states and 58 transitions. [2024-11-12 20:57:30,148 INFO L333 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-12 20:57:30,148 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 58 transitions. [2024-11-12 20:57:30,148 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 55 [2024-11-12 20:57:30,148 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:30,148 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:30,149 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:30,149 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [26, 25, 1, 1, 1, 1] [2024-11-12 20:57:30,149 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:30,149 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:30,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:30,150 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 11 times [2024-11-12 20:57:30,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:30,150 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [575167975] [2024-11-12 20:57:30,150 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:30,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:30,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:30,154 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:30,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:30,157 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:30,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:30,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1978657204, now seen corresponding path program 9 times [2024-11-12 20:57:30,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:30,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436773632] [2024-11-12 20:57:30,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:30,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:30,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:32,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:32,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436773632] [2024-11-12 20:57:32,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [436773632] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:32,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1760870281] [2024-11-12 20:57:32,275 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-12 20:57:32,275 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:32,275 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:32,276 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:32,277 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-12 20:57:32,337 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:32,337 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:32,337 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [54] total 54 [2024-11-12 20:57:32,337 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1871410793] [2024-11-12 20:57:32,337 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:32,337 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:32,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:32,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2024-11-12 20:57:32,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1105, Invalid=1757, Unknown=0, NotChecked=0, Total=2862 [2024-11-12 20:57:32,339 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. cyclomatic complexity: 2 Second operand has 54 states, 54 states have (on average 1.0185185185185186) internal successors, (55), 54 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:32,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:32,455 INFO L93 Difference]: Finished difference Result 59 states and 60 transitions. [2024-11-12 20:57:32,455 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 60 transitions. [2024-11-12 20:57:32,455 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 57 [2024-11-12 20:57:32,455 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 59 states and 60 transitions. [2024-11-12 20:57:32,455 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59 [2024-11-12 20:57:32,455 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 59 [2024-11-12 20:57:32,455 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 60 transitions. [2024-11-12 20:57:32,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:32,456 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59 states and 60 transitions. [2024-11-12 20:57:32,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 60 transitions. [2024-11-12 20:57:32,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2024-11-12 20:57:32,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 59 states have (on average 1.0169491525423728) internal successors, (60), 58 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:32,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 60 transitions. [2024-11-12 20:57:32,458 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59 states and 60 transitions. [2024-11-12 20:57:32,460 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2024-11-12 20:57:32,460 INFO L426 stractBuchiCegarLoop]: Abstraction has 59 states and 60 transitions. [2024-11-12 20:57:32,460 INFO L333 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-12 20:57:32,460 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 60 transitions. [2024-11-12 20:57:32,461 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 57 [2024-11-12 20:57:32,461 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:32,461 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:32,461 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:32,461 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [27, 26, 1, 1, 1, 1] [2024-11-12 20:57:32,462 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:32,462 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:32,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:32,463 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 12 times [2024-11-12 20:57:32,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:32,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621376700] [2024-11-12 20:57:32,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:32,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:32,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:32,466 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:32,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:32,468 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:32,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:32,468 INFO L85 PathProgramCache]: Analyzing trace with hash -1180887505, now seen corresponding path program 10 times [2024-11-12 20:57:32,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:32,468 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917718245] [2024-11-12 20:57:32,468 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:32,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:32,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:34,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:34,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [917718245] [2024-11-12 20:57:34,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [917718245] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:34,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1273443932] [2024-11-12 20:57:34,429 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-12 20:57:34,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:34,429 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:34,430 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:34,431 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-12 20:57:34,494 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:34,494 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:34,494 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [56] total 56 [2024-11-12 20:57:34,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966841184] [2024-11-12 20:57:34,495 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:34,495 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:34,495 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:34,496 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2024-11-12 20:57:34,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1188, Invalid=1892, Unknown=0, NotChecked=0, Total=3080 [2024-11-12 20:57:34,497 INFO L87 Difference]: Start difference. First operand 59 states and 60 transitions. cyclomatic complexity: 2 Second operand has 56 states, 56 states have (on average 1.0178571428571428) internal successors, (57), 56 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:34,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:34,612 INFO L93 Difference]: Finished difference Result 61 states and 62 transitions. [2024-11-12 20:57:34,612 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 62 transitions. [2024-11-12 20:57:34,614 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-12 20:57:34,615 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 61 states and 62 transitions. [2024-11-12 20:57:34,615 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 61 [2024-11-12 20:57:34,615 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 61 [2024-11-12 20:57:34,615 INFO L73 IsDeterministic]: Start isDeterministic. Operand 61 states and 62 transitions. [2024-11-12 20:57:34,615 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:34,615 INFO L218 hiAutomatonCegarLoop]: Abstraction has 61 states and 62 transitions. [2024-11-12 20:57:34,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states and 62 transitions. [2024-11-12 20:57:34,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2024-11-12 20:57:34,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 61 states, 61 states have (on average 1.0163934426229508) internal successors, (62), 60 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:34,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 62 transitions. [2024-11-12 20:57:34,620 INFO L240 hiAutomatonCegarLoop]: Abstraction has 61 states and 62 transitions. [2024-11-12 20:57:34,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2024-11-12 20:57:34,621 INFO L426 stractBuchiCegarLoop]: Abstraction has 61 states and 62 transitions. [2024-11-12 20:57:34,621 INFO L333 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-12 20:57:34,621 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 62 transitions. [2024-11-12 20:57:34,622 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 59 [2024-11-12 20:57:34,622 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:34,622 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:34,622 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:34,622 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [28, 27, 1, 1, 1, 1] [2024-11-12 20:57:34,622 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:34,622 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:34,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:34,624 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 13 times [2024-11-12 20:57:34,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:34,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [583319657] [2024-11-12 20:57:34,625 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:34,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:34,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:34,629 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:34,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:34,633 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:34,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:34,633 INFO L85 PathProgramCache]: Analyzing trace with hash -961474582, now seen corresponding path program 11 times [2024-11-12 20:57:34,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:34,634 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956631990] [2024-11-12 20:57:34,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:34,634 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:34,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:36,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:36,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956631990] [2024-11-12 20:57:36,763 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [956631990] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:36,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1511471997] [2024-11-12 20:57:36,763 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-12 20:57:36,765 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:36,765 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:36,767 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:36,768 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-12 20:57:36,851 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:36,852 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:36,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [58] total 58 [2024-11-12 20:57:36,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159366861] [2024-11-12 20:57:36,852 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:36,852 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:36,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:36,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2024-11-12 20:57:36,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1274, Invalid=2032, Unknown=0, NotChecked=0, Total=3306 [2024-11-12 20:57:36,854 INFO L87 Difference]: Start difference. First operand 61 states and 62 transitions. cyclomatic complexity: 2 Second operand has 58 states, 58 states have (on average 1.0172413793103448) internal successors, (59), 58 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:36,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:36,956 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2024-11-12 20:57:36,956 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2024-11-12 20:57:36,956 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2024-11-12 20:57:36,957 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 63 states and 64 transitions. [2024-11-12 20:57:36,957 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 63 [2024-11-12 20:57:36,957 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2024-11-12 20:57:36,957 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 64 transitions. [2024-11-12 20:57:36,957 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:36,957 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 64 transitions. [2024-11-12 20:57:36,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 64 transitions. [2024-11-12 20:57:36,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2024-11-12 20:57:36,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 63 states have (on average 1.0158730158730158) internal successors, (64), 62 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:36,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 64 transitions. [2024-11-12 20:57:36,959 INFO L240 hiAutomatonCegarLoop]: Abstraction has 63 states and 64 transitions. [2024-11-12 20:57:36,959 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2024-11-12 20:57:36,960 INFO L426 stractBuchiCegarLoop]: Abstraction has 63 states and 64 transitions. [2024-11-12 20:57:36,960 INFO L333 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-12 20:57:36,960 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 64 transitions. [2024-11-12 20:57:36,960 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 61 [2024-11-12 20:57:36,960 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:36,960 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:36,961 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:36,961 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [29, 28, 1, 1, 1, 1] [2024-11-12 20:57:36,961 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:36,961 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:36,961 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:36,962 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 14 times [2024-11-12 20:57:36,962 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:36,962 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900636314] [2024-11-12 20:57:36,962 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:36,962 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:36,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:36,965 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:36,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:36,967 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:36,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:36,967 INFO L85 PathProgramCache]: Analyzing trace with hash -559053083, now seen corresponding path program 12 times [2024-11-12 20:57:36,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:36,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014344683] [2024-11-12 20:57:36,967 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:36,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:36,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:39,071 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:39,071 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014344683] [2024-11-12 20:57:39,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1014344683] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:39,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [166632278] [2024-11-12 20:57:39,072 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-12 20:57:39,072 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:39,072 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:39,074 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:39,075 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-12 20:57:39,139 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:39,140 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:39,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [60] total 60 [2024-11-12 20:57:39,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152814225] [2024-11-12 20:57:39,140 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:39,140 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:39,140 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:39,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2024-11-12 20:57:39,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1363, Invalid=2177, Unknown=0, NotChecked=0, Total=3540 [2024-11-12 20:57:39,142 INFO L87 Difference]: Start difference. First operand 63 states and 64 transitions. cyclomatic complexity: 2 Second operand has 60 states, 60 states have (on average 1.0166666666666666) internal successors, (61), 60 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:39,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:39,246 INFO L93 Difference]: Finished difference Result 65 states and 66 transitions. [2024-11-12 20:57:39,246 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 66 transitions. [2024-11-12 20:57:39,246 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 63 [2024-11-12 20:57:39,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 65 states and 66 transitions. [2024-11-12 20:57:39,247 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2024-11-12 20:57:39,247 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2024-11-12 20:57:39,247 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 66 transitions. [2024-11-12 20:57:39,247 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:39,247 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 66 transitions. [2024-11-12 20:57:39,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 66 transitions. [2024-11-12 20:57:39,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2024-11-12 20:57:39,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.0153846153846153) internal successors, (66), 64 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:39,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 66 transitions. [2024-11-12 20:57:39,250 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 66 transitions. [2024-11-12 20:57:39,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2024-11-12 20:57:39,252 INFO L426 stractBuchiCegarLoop]: Abstraction has 65 states and 66 transitions. [2024-11-12 20:57:39,252 INFO L333 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-12 20:57:39,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 66 transitions. [2024-11-12 20:57:39,252 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 63 [2024-11-12 20:57:39,252 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:39,252 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:39,253 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:39,253 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [30, 29, 1, 1, 1, 1] [2024-11-12 20:57:39,253 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:39,253 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:39,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:39,253 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 15 times [2024-11-12 20:57:39,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:39,254 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637467790] [2024-11-12 20:57:39,254 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:39,254 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:39,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:39,257 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:39,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:39,259 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:39,260 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:39,260 INFO L85 PathProgramCache]: Analyzing trace with hash -379049184, now seen corresponding path program 13 times [2024-11-12 20:57:39,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:39,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222248058] [2024-11-12 20:57:39,260 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:39,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:39,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:41,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:41,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222248058] [2024-11-12 20:57:41,530 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [222248058] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:41,530 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [233276326] [2024-11-12 20:57:41,530 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-12 20:57:41,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:41,530 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:41,532 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:41,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-12 20:57:41,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:41,647 INFO L256 TraceCheckSpWp]: Trace formula consists of 467 conjuncts, 92 conjuncts are in the unsatisfiable core [2024-11-12 20:57:41,662 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:57:41,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-12 20:57:41,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,690 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,700 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,707 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,750 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,763 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,789 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,807 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,816 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,824 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,838 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,846 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,868 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,874 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,902 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,925 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:57:41,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-12 20:57:41,930 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:57:42,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [233276326] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:57:42,900 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:57:42,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 33, 33] total 93 [2024-11-12 20:57:42,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327328604] [2024-11-12 20:57:42,900 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:42,901 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:42,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:42,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2024-11-12 20:57:42,904 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3752, Invalid=4804, Unknown=0, NotChecked=0, Total=8556 [2024-11-12 20:57:42,904 INFO L87 Difference]: Start difference. First operand 65 states and 66 transitions. cyclomatic complexity: 2 Second operand has 93 states, 93 states have (on average 1.956989247311828) internal successors, (182), 93 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:43,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:43,875 INFO L93 Difference]: Finished difference Result 127 states and 128 transitions. [2024-11-12 20:57:43,875 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 127 states and 128 transitions. [2024-11-12 20:57:43,876 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 125 [2024-11-12 20:57:43,876 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 127 states to 127 states and 128 transitions. [2024-11-12 20:57:43,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2024-11-12 20:57:43,876 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2024-11-12 20:57:43,876 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 128 transitions. [2024-11-12 20:57:43,877 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:43,877 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 128 transitions. [2024-11-12 20:57:43,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 128 transitions. [2024-11-12 20:57:43,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2024-11-12 20:57:43,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.0078740157480315) internal successors, (128), 126 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:43,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2024-11-12 20:57:43,881 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 128 transitions. [2024-11-12 20:57:43,882 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 122 states. [2024-11-12 20:57:43,883 INFO L426 stractBuchiCegarLoop]: Abstraction has 127 states and 128 transitions. [2024-11-12 20:57:43,883 INFO L333 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-12 20:57:43,883 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 128 transitions. [2024-11-12 20:57:43,883 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 125 [2024-11-12 20:57:43,883 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:43,883 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:43,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:43,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [61, 60, 1, 1, 1, 1] [2024-11-12 20:57:43,884 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:43,884 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:43,884 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:43,885 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 16 times [2024-11-12 20:57:43,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:43,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692691561] [2024-11-12 20:57:43,885 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:43,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:43,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:43,888 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:43,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:43,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:43,891 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:43,891 INFO L85 PathProgramCache]: Analyzing trace with hash 1775286853, now seen corresponding path program 14 times [2024-11-12 20:57:43,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:43,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689149027] [2024-11-12 20:57:43,891 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:43,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:43,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:57:53,168 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:57:53,168 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689149027] [2024-11-12 20:57:53,169 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1689149027] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:57:53,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [514809893] [2024-11-12 20:57:53,169 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-12 20:57:53,169 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:57:53,169 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:57:53,170 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:57:53,171 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-12 20:57:53,262 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:57:53,262 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:57:53,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [124] total 124 [2024-11-12 20:57:53,262 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2091523401] [2024-11-12 20:57:53,262 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:57:53,263 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:57:53,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:57:53,264 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 124 interpolants. [2024-11-12 20:57:53,268 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5795, Invalid=9457, Unknown=0, NotChecked=0, Total=15252 [2024-11-12 20:57:53,268 INFO L87 Difference]: Start difference. First operand 127 states and 128 transitions. cyclomatic complexity: 2 Second operand has 124 states, 124 states have (on average 1.0080645161290323) internal successors, (125), 124 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:53,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:57:53,543 INFO L93 Difference]: Finished difference Result 129 states and 130 transitions. [2024-11-12 20:57:53,543 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 129 states and 130 transitions. [2024-11-12 20:57:53,544 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 127 [2024-11-12 20:57:53,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 129 states to 129 states and 130 transitions. [2024-11-12 20:57:53,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 129 [2024-11-12 20:57:53,545 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 129 [2024-11-12 20:57:53,545 INFO L73 IsDeterministic]: Start isDeterministic. Operand 129 states and 130 transitions. [2024-11-12 20:57:53,545 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:57:53,545 INFO L218 hiAutomatonCegarLoop]: Abstraction has 129 states and 130 transitions. [2024-11-12 20:57:53,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states and 130 transitions. [2024-11-12 20:57:53,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2024-11-12 20:57:53,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 129 states have (on average 1.0077519379844961) internal successors, (130), 128 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:57:53,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 130 transitions. [2024-11-12 20:57:53,549 INFO L240 hiAutomatonCegarLoop]: Abstraction has 129 states and 130 transitions. [2024-11-12 20:57:53,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 124 states. [2024-11-12 20:57:53,553 INFO L426 stractBuchiCegarLoop]: Abstraction has 129 states and 130 transitions. [2024-11-12 20:57:53,553 INFO L333 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-12 20:57:53,553 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 129 states and 130 transitions. [2024-11-12 20:57:53,553 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 127 [2024-11-12 20:57:53,553 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:57:53,553 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:57:53,555 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:57:53,555 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [62, 61, 1, 1, 1, 1] [2024-11-12 20:57:53,556 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:57:53,556 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:57:53,556 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:53,556 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 17 times [2024-11-12 20:57:53,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:53,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [449154974] [2024-11-12 20:57:53,556 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:53,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:53,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:53,560 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:57:53,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:57:53,563 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:57:53,563 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:57:53,563 INFO L85 PathProgramCache]: Analyzing trace with hash 948700800, now seen corresponding path program 15 times [2024-11-12 20:57:53,563 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:57:53,563 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832247880] [2024-11-12 20:57:53,564 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:57:53,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:57:53,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:03,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:58:03,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832247880] [2024-11-12 20:58:03,014 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832247880] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:58:03,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1785326763] [2024-11-12 20:58:03,014 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-12 20:58:03,014 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:58:03,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:58:03,016 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:58:03,016 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-12 20:58:03,123 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:58:03,123 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:58:03,123 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [126] total 126 [2024-11-12 20:58:03,123 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739316498] [2024-11-12 20:58:03,124 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:58:03,124 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:58:03,124 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:58:03,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 126 interpolants. [2024-11-12 20:58:03,130 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5983, Invalid=9767, Unknown=0, NotChecked=0, Total=15750 [2024-11-12 20:58:03,130 INFO L87 Difference]: Start difference. First operand 129 states and 130 transitions. cyclomatic complexity: 2 Second operand has 126 states, 126 states have (on average 1.007936507936508) internal successors, (127), 126 states have internal predecessors, (127), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:03,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:58:03,403 INFO L93 Difference]: Finished difference Result 131 states and 132 transitions. [2024-11-12 20:58:03,403 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 132 transitions. [2024-11-12 20:58:03,404 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 129 [2024-11-12 20:58:03,405 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 131 states and 132 transitions. [2024-11-12 20:58:03,405 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 131 [2024-11-12 20:58:03,405 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 131 [2024-11-12 20:58:03,405 INFO L73 IsDeterministic]: Start isDeterministic. Operand 131 states and 132 transitions. [2024-11-12 20:58:03,405 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:58:03,405 INFO L218 hiAutomatonCegarLoop]: Abstraction has 131 states and 132 transitions. [2024-11-12 20:58:03,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states and 132 transitions. [2024-11-12 20:58:03,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2024-11-12 20:58:03,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 131 states have (on average 1.0076335877862594) internal successors, (132), 130 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:03,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 132 transitions. [2024-11-12 20:58:03,408 INFO L240 hiAutomatonCegarLoop]: Abstraction has 131 states and 132 transitions. [2024-11-12 20:58:03,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2024-11-12 20:58:03,411 INFO L426 stractBuchiCegarLoop]: Abstraction has 131 states and 132 transitions. [2024-11-12 20:58:03,411 INFO L333 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-12 20:58:03,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 131 states and 132 transitions. [2024-11-12 20:58:03,412 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 129 [2024-11-12 20:58:03,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:58:03,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:58:03,412 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:58:03,412 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [63, 62, 1, 1, 1, 1] [2024-11-12 20:58:03,412 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:58:03,413 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:58:03,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:03,413 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 18 times [2024-11-12 20:58:03,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:03,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155919048] [2024-11-12 20:58:03,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:03,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:03,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:03,417 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:58:03,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:03,420 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:58:03,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:03,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1168453627, now seen corresponding path program 16 times [2024-11-12 20:58:03,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:03,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733278994] [2024-11-12 20:58:03,420 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:03,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:03,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:13,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:58:13,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733278994] [2024-11-12 20:58:13,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1733278994] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:58:13,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1430480595] [2024-11-12 20:58:13,049 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-12 20:58:13,049 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:58:13,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:58:13,050 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:58:13,051 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-12 20:58:13,170 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:58:13,171 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:58:13,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [128] total 128 [2024-11-12 20:58:13,171 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [858936601] [2024-11-12 20:58:13,171 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:58:13,171 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:58:13,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:58:13,173 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2024-11-12 20:58:13,175 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6174, Invalid=10082, Unknown=0, NotChecked=0, Total=16256 [2024-11-12 20:58:13,176 INFO L87 Difference]: Start difference. First operand 131 states and 132 transitions. cyclomatic complexity: 2 Second operand has 128 states, 128 states have (on average 1.0078125) internal successors, (129), 128 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:13,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:58:13,511 INFO L93 Difference]: Finished difference Result 133 states and 134 transitions. [2024-11-12 20:58:13,511 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 133 states and 134 transitions. [2024-11-12 20:58:13,512 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 131 [2024-11-12 20:58:13,512 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 133 states to 133 states and 134 transitions. [2024-11-12 20:58:13,512 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 133 [2024-11-12 20:58:13,512 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 133 [2024-11-12 20:58:13,512 INFO L73 IsDeterministic]: Start isDeterministic. Operand 133 states and 134 transitions. [2024-11-12 20:58:13,513 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:58:13,513 INFO L218 hiAutomatonCegarLoop]: Abstraction has 133 states and 134 transitions. [2024-11-12 20:58:13,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states and 134 transitions. [2024-11-12 20:58:13,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2024-11-12 20:58:13,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 133 states have (on average 1.0075187969924813) internal successors, (134), 132 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:13,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 134 transitions. [2024-11-12 20:58:13,519 INFO L240 hiAutomatonCegarLoop]: Abstraction has 133 states and 134 transitions. [2024-11-12 20:58:13,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2024-11-12 20:58:13,520 INFO L426 stractBuchiCegarLoop]: Abstraction has 133 states and 134 transitions. [2024-11-12 20:58:13,520 INFO L333 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-12 20:58:13,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 133 states and 134 transitions. [2024-11-12 20:58:13,521 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 131 [2024-11-12 20:58:13,521 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:58:13,521 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:58:13,522 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:58:13,522 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [64, 63, 1, 1, 1, 1] [2024-11-12 20:58:13,522 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:58:13,522 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:58:13,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:13,522 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 19 times [2024-11-12 20:58:13,522 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:13,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873341666] [2024-11-12 20:58:13,523 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:13,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:13,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:13,527 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:58:13,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:13,530 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:58:13,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:13,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1897522870, now seen corresponding path program 17 times [2024-11-12 20:58:13,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:13,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [174476301] [2024-11-12 20:58:13,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:13,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:13,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:23,377 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:58:23,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [174476301] [2024-11-12 20:58:23,377 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [174476301] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:58:23,377 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2010239145] [2024-11-12 20:58:23,377 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-12 20:58:23,377 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:58:23,377 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:58:23,379 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:58:23,381 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-11-12 20:58:23,502 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:58:23,502 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:58:23,502 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [130] total 130 [2024-11-12 20:58:23,502 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899378156] [2024-11-12 20:58:23,502 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:58:23,502 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:58:23,502 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:58:23,504 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 130 interpolants. [2024-11-12 20:58:23,505 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6368, Invalid=10402, Unknown=0, NotChecked=0, Total=16770 [2024-11-12 20:58:23,505 INFO L87 Difference]: Start difference. First operand 133 states and 134 transitions. cyclomatic complexity: 2 Second operand has 130 states, 130 states have (on average 1.0076923076923077) internal successors, (131), 130 states have internal predecessors, (131), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:23,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:58:23,784 INFO L93 Difference]: Finished difference Result 135 states and 136 transitions. [2024-11-12 20:58:23,784 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 136 transitions. [2024-11-12 20:58:23,785 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 133 [2024-11-12 20:58:23,785 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 136 transitions. [2024-11-12 20:58:23,785 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 135 [2024-11-12 20:58:23,786 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 135 [2024-11-12 20:58:23,786 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 136 transitions. [2024-11-12 20:58:23,786 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:58:23,786 INFO L218 hiAutomatonCegarLoop]: Abstraction has 135 states and 136 transitions. [2024-11-12 20:58:23,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 136 transitions. [2024-11-12 20:58:23,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2024-11-12 20:58:23,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 135 states have (on average 1.0074074074074073) internal successors, (136), 134 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:23,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 136 transitions. [2024-11-12 20:58:23,788 INFO L240 hiAutomatonCegarLoop]: Abstraction has 135 states and 136 transitions. [2024-11-12 20:58:23,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 130 states. [2024-11-12 20:58:23,790 INFO L426 stractBuchiCegarLoop]: Abstraction has 135 states and 136 transitions. [2024-11-12 20:58:23,790 INFO L333 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-12 20:58:23,790 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 135 states and 136 transitions. [2024-11-12 20:58:23,790 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 133 [2024-11-12 20:58:23,790 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:58:23,790 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:58:23,791 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:58:23,791 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [65, 64, 1, 1, 1, 1] [2024-11-12 20:58:23,791 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:58:23,791 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:58:23,791 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:23,792 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 20 times [2024-11-12 20:58:23,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:23,792 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319200230] [2024-11-12 20:58:23,792 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:23,792 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:23,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:23,796 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:58:23,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:23,799 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:58:23,799 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:23,799 INFO L85 PathProgramCache]: Analyzing trace with hash -1841571151, now seen corresponding path program 18 times [2024-11-12 20:58:23,799 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:23,800 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210468897] [2024-11-12 20:58:23,800 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:23,800 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:23,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:33,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:58:33,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210468897] [2024-11-12 20:58:33,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [210468897] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:58:33,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1707373273] [2024-11-12 20:58:33,955 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-12 20:58:33,955 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:58:33,955 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:58:33,957 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:58:33,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-11-12 20:58:34,079 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-12 20:58:34,080 INFO L185 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2024-11-12 20:58:34,080 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [132] total 132 [2024-11-12 20:58:34,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1912735737] [2024-11-12 20:58:34,080 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2024-11-12 20:58:34,080 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:58:34,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:58:34,082 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 132 interpolants. [2024-11-12 20:58:34,083 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6565, Invalid=10727, Unknown=0, NotChecked=0, Total=17292 [2024-11-12 20:58:34,084 INFO L87 Difference]: Start difference. First operand 135 states and 136 transitions. cyclomatic complexity: 2 Second operand has 132 states, 132 states have (on average 1.0075757575757576) internal successors, (133), 132 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:34,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 20:58:34,380 INFO L93 Difference]: Finished difference Result 137 states and 138 transitions. [2024-11-12 20:58:34,380 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 137 states and 138 transitions. [2024-11-12 20:58:34,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 135 [2024-11-12 20:58:34,381 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 137 states to 137 states and 138 transitions. [2024-11-12 20:58:34,381 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 137 [2024-11-12 20:58:34,381 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 137 [2024-11-12 20:58:34,381 INFO L73 IsDeterministic]: Start isDeterministic. Operand 137 states and 138 transitions. [2024-11-12 20:58:34,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 20:58:34,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 137 states and 138 transitions. [2024-11-12 20:58:34,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states and 138 transitions. [2024-11-12 20:58:34,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2024-11-12 20:58:34,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 137 states have (on average 1.0072992700729928) internal successors, (138), 136 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 20:58:34,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 138 transitions. [2024-11-12 20:58:34,383 INFO L240 hiAutomatonCegarLoop]: Abstraction has 137 states and 138 transitions. [2024-11-12 20:58:34,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 132 states. [2024-11-12 20:58:34,384 INFO L426 stractBuchiCegarLoop]: Abstraction has 137 states and 138 transitions. [2024-11-12 20:58:34,384 INFO L333 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-12 20:58:34,384 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 137 states and 138 transitions. [2024-11-12 20:58:34,384 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 135 [2024-11-12 20:58:34,384 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 20:58:34,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 20:58:34,385 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 20:58:34,385 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [66, 65, 1, 1, 1, 1] [2024-11-12 20:58:34,385 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;" [2024-11-12 20:58:34,385 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);" "assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1;" "call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);" "assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;" "call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1;" [2024-11-12 20:58:34,385 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:34,385 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 21 times [2024-11-12 20:58:34,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:34,386 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1726063429] [2024-11-12 20:58:34,386 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:34,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:34,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:34,390 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 20:58:34,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 20:58:34,393 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 20:58:34,393 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 20:58:34,393 INFO L85 PathProgramCache]: Analyzing trace with hash -223298580, now seen corresponding path program 19 times [2024-11-12 20:58:34,393 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 20:58:34,393 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108883462] [2024-11-12 20:58:34,393 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 20:58:34,393 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 20:58:34,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:45,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 20:58:45,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108883462] [2024-11-12 20:58:45,007 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [108883462] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 20:58:45,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1947203230] [2024-11-12 20:58:45,007 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-12 20:58:45,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 20:58:45,007 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 20:58:45,008 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 20:58:45,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-11-12 20:58:45,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 20:58:45,237 INFO L256 TraceCheckSpWp]: Trace formula consists of 1007 conjuncts, 200 conjuncts are in the unsatisfiable core [2024-11-12 20:58:45,257 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 20:58:45,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2024-11-12 20:58:45,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,329 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,343 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,357 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,376 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,383 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,402 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,408 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,415 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,423 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,431 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,443 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,457 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,463 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,479 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,484 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,490 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,500 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,506 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,512 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,521 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,540 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,545 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,557 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,562 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,572 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,581 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,589 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,595 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,601 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,607 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,619 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,625 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,649 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,662 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,674 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,680 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,699 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,705 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,712 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,728 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2024-11-12 20:58:45,731 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2024-11-12 20:58:45,733 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 20:58:49,646 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1947203230] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 20:58:49,646 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 20:58:49,646 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [134, 69, 69] total 202 [2024-11-12 20:58:49,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [759070969] [2024-11-12 20:58:49,646 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 20:58:49,647 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 20:58:49,647 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 20:58:49,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 202 interpolants. [2024-11-12 20:58:49,652 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17891, Invalid=22711, Unknown=0, NotChecked=0, Total=40602 [2024-11-12 20:58:49,653 INFO L87 Difference]: Start difference. First operand 137 states and 138 transitions. cyclomatic complexity: 2 Second operand has 202 states, 202 states have (on average 1.9752475247524752) internal successors, (399), 202 states have internal predecessors, (399), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)