./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 8be7027f Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 --- Real Ultimate output --- This is Ultimate 0.2.5-wip.dk.perfect-tracechecks-8be7027-m [2024-11-12 22:08:06,265 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-12 22:08:06,320 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-12 22:08:06,325 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-12 22:08:06,325 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-12 22:08:06,354 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-12 22:08:06,354 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-12 22:08:06,355 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-12 22:08:06,355 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-12 22:08:06,358 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-12 22:08:06,359 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-12 22:08:06,359 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-12 22:08:06,359 INFO L153 SettingsManager]: * Use SBE=true [2024-11-12 22:08:06,359 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-12 22:08:06,360 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-12 22:08:06,360 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-12 22:08:06,361 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-12 22:08:06,361 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-12 22:08:06,361 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-12 22:08:06,362 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-12 22:08:06,362 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-12 22:08:06,362 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-12 22:08:06,363 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-12 22:08:06,363 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-12 22:08:06,364 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-12 22:08:06,364 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-12 22:08:06,364 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-12 22:08:06,364 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-12 22:08:06,364 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-12 22:08:06,365 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-12 22:08:06,365 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-12 22:08:06,365 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-12 22:08:06,365 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-12 22:08:06,366 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-12 22:08:06,366 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-12 22:08:06,367 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-12 22:08:06,367 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-12 22:08:06,367 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-12 22:08:06,367 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-12 22:08:06,368 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 112ef0f8366461020cac5f2ac7dec2d7e41f31b24e653cd7734885d2bb23b087 [2024-11-12 22:08:06,575 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-12 22:08:06,604 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-12 22:08:06,606 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-12 22:08:06,611 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-12 22:08:06,611 INFO L274 PluginConnector]: CDTParser initialized [2024-11-12 22:08:06,612 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2024-11-12 22:08:07,890 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-12 22:08:08,116 INFO L384 CDTParser]: Found 1 translation units. [2024-11-12 22:08:08,118 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_OAT_nondet_test1-2.i [2024-11-12 22:08:08,139 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3857005ba/79c4291dc22f4ae3b38b358975c4e453/FLAGfab8adf95 [2024-11-12 22:08:08,161 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/3857005ba/79c4291dc22f4ae3b38b358975c4e453 [2024-11-12 22:08:08,164 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-12 22:08:08,165 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-12 22:08:08,168 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-12 22:08:08,168 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-12 22:08:08,173 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-12 22:08:08,173 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,174 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@108196b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08, skipping insertion in model container [2024-11-12 22:08:08,174 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,222 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-12 22:08:08,640 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-12 22:08:08,648 INFO L200 MainTranslator]: Completed pre-run [2024-11-12 22:08:08,735 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-12 22:08:08,765 INFO L204 MainTranslator]: Completed translation [2024-11-12 22:08:08,766 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08 WrapperNode [2024-11-12 22:08:08,766 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-12 22:08:08,767 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-12 22:08:08,767 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-12 22:08:08,767 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-12 22:08:08,771 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,794 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,838 INFO L138 Inliner]: procedures = 176, calls = 221, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 965 [2024-11-12 22:08:08,839 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-12 22:08:08,839 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-12 22:08:08,839 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-12 22:08:08,840 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-12 22:08:08,849 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,849 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,863 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,911 INFO L175 MemorySlicer]: Split 206 memory accesses to 2 slices as follows [204, 2]. 99 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [0, 2]. The 50 writes are split as follows [50, 0]. [2024-11-12 22:08:08,915 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,915 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,945 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,954 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,961 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,964 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,979 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-12 22:08:08,979 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-12 22:08:08,981 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-12 22:08:08,981 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-12 22:08:08,982 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (1/1) ... [2024-11-12 22:08:08,986 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-12 22:08:08,995 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:09,009 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-12 22:08:09,024 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-12 22:08:09,061 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-12 22:08:09,061 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-12 22:08:09,061 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-12 22:08:09,061 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-12 22:08:09,061 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2024-11-12 22:08:09,062 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2024-11-12 22:08:09,062 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2024-11-12 22:08:09,062 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2024-11-12 22:08:09,063 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-12 22:08:09,063 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-12 22:08:09,064 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-12 22:08:09,064 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-12 22:08:09,064 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-12 22:08:09,227 INFO L238 CfgBuilder]: Building ICFG [2024-11-12 22:08:09,229 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-12 22:08:09,231 WARN L781 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-12 22:08:09,272 WARN L781 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2024-11-12 22:08:10,169 INFO L? ?]: Removed 220 outVars from TransFormulas that were not future-live. [2024-11-12 22:08:10,169 INFO L287 CfgBuilder]: Performing block encoding [2024-11-12 22:08:10,180 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-12 22:08:10,180 INFO L316 CfgBuilder]: Removed 40 assume(true) statements. [2024-11-12 22:08:10,184 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 10:08:10 BoogieIcfgContainer [2024-11-12 22:08:10,184 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-12 22:08:10,185 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-12 22:08:10,185 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-12 22:08:10,188 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-12 22:08:10,191 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 22:08:10,191 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 12.11 10:08:08" (1/3) ... [2024-11-12 22:08:10,192 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3958562b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 10:08:10, skipping insertion in model container [2024-11-12 22:08:10,192 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 22:08:10,192 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.11 10:08:08" (2/3) ... [2024-11-12 22:08:10,192 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3958562b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 12.11 10:08:10, skipping insertion in model container [2024-11-12 22:08:10,192 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-12 22:08:10,193 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.11 10:08:10" (3/3) ... [2024-11-12 22:08:10,193 INFO L332 chiAutomizerObserver]: Analyzing ICFG uthash_OAT_nondet_test1-2.i [2024-11-12 22:08:10,234 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2024-11-12 22:08:10,234 INFO L302 stractBuchiCegarLoop]: Hoare is None [2024-11-12 22:08:10,234 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-12 22:08:10,235 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-12 22:08:10,235 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-12 22:08:10,235 INFO L306 stractBuchiCegarLoop]: Difference is false [2024-11-12 22:08:10,235 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-12 22:08:10,235 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-12 22:08:10,238 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 247 states, 242 states have (on average 1.603305785123967) internal successors, (388), 242 states have internal predecessors, (388), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:10,265 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 229 [2024-11-12 22:08:10,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:10,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:10,274 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:10,274 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-12 22:08:10,274 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-12 22:08:10,275 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 247 states, 242 states have (on average 1.603305785123967) internal successors, (388), 242 states have internal predecessors, (388), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:10,285 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 229 [2024-11-12 22:08:10,285 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:10,285 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:10,286 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:10,286 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-12 22:08:10,292 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:10,292 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "assume !true;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:10,296 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:10,296 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 1 times [2024-11-12 22:08:10,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:10,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1683319103] [2024-11-12 22:08:10,302 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:10,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:10,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:10,425 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:10,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:10,460 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:10,462 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:10,462 INFO L85 PathProgramCache]: Analyzing trace with hash 55528703, now seen corresponding path program 1 times [2024-11-12 22:08:10,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:10,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605461084] [2024-11-12 22:08:10,462 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:10,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:10,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:10,523 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:10,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605461084] [2024-11-12 22:08:10,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605461084] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:10,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [947688606] [2024-11-12 22:08:10,525 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:10,525 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:10,525 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:10,527 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:10,543 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-12 22:08:10,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:10,653 INFO L256 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 1 conjuncts are in the unsatisfiable core [2024-11-12 22:08:10,653 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:10,658 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:10,660 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [947688606] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:10,660 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:10,660 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2 [2024-11-12 22:08:10,661 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835946171] [2024-11-12 22:08:10,662 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:10,668 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:10,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:10,697 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-12 22:08:10,698 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-12 22:08:10,700 INFO L87 Difference]: Start difference. First operand has 247 states, 242 states have (on average 1.603305785123967) internal successors, (388), 242 states have internal predecessors, (388), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 2.5) internal successors, (5), 2 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:10,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:10,784 INFO L93 Difference]: Finished difference Result 246 states and 347 transitions. [2024-11-12 22:08:10,786 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 347 transitions. [2024-11-12 22:08:10,790 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 229 [2024-11-12 22:08:10,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 241 states and 342 transitions. [2024-11-12 22:08:10,799 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 241 [2024-11-12 22:08:10,800 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 241 [2024-11-12 22:08:10,801 INFO L73 IsDeterministic]: Start isDeterministic. Operand 241 states and 342 transitions. [2024-11-12 22:08:10,803 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:10,803 INFO L218 hiAutomatonCegarLoop]: Abstraction has 241 states and 342 transitions. [2024-11-12 22:08:10,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states and 342 transitions. [2024-11-12 22:08:10,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 241. [2024-11-12 22:08:10,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 241 states, 237 states have (on average 1.4177215189873418) internal successors, (336), 236 states have internal predecessors, (336), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:10,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 342 transitions. [2024-11-12 22:08:10,842 INFO L240 hiAutomatonCegarLoop]: Abstraction has 241 states and 342 transitions. [2024-11-12 22:08:10,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-12 22:08:10,846 INFO L426 stractBuchiCegarLoop]: Abstraction has 241 states and 342 transitions. [2024-11-12 22:08:10,846 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-12 22:08:10,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 241 states and 342 transitions. [2024-11-12 22:08:10,849 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 229 [2024-11-12 22:08:10,852 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:10,853 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:10,854 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:10,854 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:10,855 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:10,856 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem29#1 := read~int#0(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem29#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem30#1 := read~int#0(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem30#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem31#1 := read~int#0(main_~_hj_key~0#1.base, 8 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 256 * (main_#t~mem31#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem32#1 := read~int#0(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem32#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem33#1 := read~int#0(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem33#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem34#1 := read~int#0(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem34#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem35#1 := read~int#0(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem35#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem35#1 % 256 % 4294967296 else main_#t~mem35#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:10,861 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:10,861 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 2 times [2024-11-12 22:08:10,861 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:10,861 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667519425] [2024-11-12 22:08:10,861 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:10,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:10,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:10,878 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:10,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:10,906 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:10,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:10,906 INFO L85 PathProgramCache]: Analyzing trace with hash 685033399, now seen corresponding path program 1 times [2024-11-12 22:08:10,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:10,907 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118869146] [2024-11-12 22:08:10,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:10,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:10,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:11,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:11,320 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118869146] [2024-11-12 22:08:11,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1118869146] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:11,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2048952713] [2024-11-12 22:08:11,321 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:11,321 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:11,321 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:11,324 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:11,325 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-12 22:08:11,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:11,640 INFO L256 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-12 22:08:11,643 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:11,668 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:11,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2048952713] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:11,701 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:11,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 3, 3] total 5 [2024-11-12 22:08:11,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695312055] [2024-11-12 22:08:11,702 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:11,702 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:11,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:11,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-12 22:08:11,706 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-12 22:08:11,707 INFO L87 Difference]: Start difference. First operand 241 states and 342 transitions. cyclomatic complexity: 105 Second operand has 5 states, 5 states have (on average 18.6) internal successors, (93), 5 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:11,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:11,817 INFO L93 Difference]: Finished difference Result 247 states and 341 transitions. [2024-11-12 22:08:11,817 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 247 states and 341 transitions. [2024-11-12 22:08:11,818 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 235 [2024-11-12 22:08:11,820 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 247 states to 247 states and 341 transitions. [2024-11-12 22:08:11,820 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 247 [2024-11-12 22:08:11,821 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 247 [2024-11-12 22:08:11,821 INFO L73 IsDeterministic]: Start isDeterministic. Operand 247 states and 341 transitions. [2024-11-12 22:08:11,822 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:11,822 INFO L218 hiAutomatonCegarLoop]: Abstraction has 247 states and 341 transitions. [2024-11-12 22:08:11,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states and 341 transitions. [2024-11-12 22:08:11,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 247. [2024-11-12 22:08:11,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 247 states, 243 states have (on average 1.3786008230452675) internal successors, (335), 242 states have internal predecessors, (335), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:11,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 341 transitions. [2024-11-12 22:08:11,829 INFO L240 hiAutomatonCegarLoop]: Abstraction has 247 states and 341 transitions. [2024-11-12 22:08:11,830 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-12 22:08:11,830 INFO L426 stractBuchiCegarLoop]: Abstraction has 247 states and 341 transitions. [2024-11-12 22:08:11,830 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-12 22:08:11,830 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 247 states and 341 transitions. [2024-11-12 22:08:11,831 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 235 [2024-11-12 22:08:11,848 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:11,848 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:11,850 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:11,850 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:11,850 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:11,850 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:11,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:11,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 3 times [2024-11-12 22:08:11,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:11,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467292617] [2024-11-12 22:08:11,852 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:11,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:11,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:11,857 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:11,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:11,863 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:11,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:11,864 INFO L85 PathProgramCache]: Analyzing trace with hash 2091379651, now seen corresponding path program 1 times [2024-11-12 22:08:11,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:11,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505239953] [2024-11-12 22:08:11,864 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:11,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:12,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:12,371 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:12,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505239953] [2024-11-12 22:08:12,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505239953] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:12,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [756491950] [2024-11-12 22:08:12,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:12,372 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:12,373 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:12,374 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:12,378 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-12 22:08:12,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:12,813 INFO L256 TraceCheckSpWp]: Trace formula consists of 495 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-12 22:08:12,817 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:13,019 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:13,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [756491950] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:13,337 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:13,338 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8, 7] total 17 [2024-11-12 22:08:13,338 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769259315] [2024-11-12 22:08:13,338 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:13,338 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:13,338 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:13,339 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-12 22:08:13,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=217, Unknown=0, NotChecked=0, Total=272 [2024-11-12 22:08:13,345 INFO L87 Difference]: Start difference. First operand 247 states and 341 transitions. cyclomatic complexity: 98 Second operand has 17 states, 17 states have (on average 8.058823529411764) internal successors, (137), 17 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:15,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:15,339 INFO L93 Difference]: Finished difference Result 427 states and 589 transitions. [2024-11-12 22:08:15,340 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 427 states and 589 transitions. [2024-11-12 22:08:15,341 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 415 [2024-11-12 22:08:15,344 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 427 states to 427 states and 589 transitions. [2024-11-12 22:08:15,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 427 [2024-11-12 22:08:15,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 427 [2024-11-12 22:08:15,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 427 states and 589 transitions. [2024-11-12 22:08:15,346 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:15,346 INFO L218 hiAutomatonCegarLoop]: Abstraction has 427 states and 589 transitions. [2024-11-12 22:08:15,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states and 589 transitions. [2024-11-12 22:08:15,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 288. [2024-11-12 22:08:15,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 288 states, 284 states have (on average 1.3485915492957747) internal successors, (383), 283 states have internal predecessors, (383), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:15,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 389 transitions. [2024-11-12 22:08:15,363 INFO L240 hiAutomatonCegarLoop]: Abstraction has 288 states and 389 transitions. [2024-11-12 22:08:15,364 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2024-11-12 22:08:15,364 INFO L426 stractBuchiCegarLoop]: Abstraction has 288 states and 389 transitions. [2024-11-12 22:08:15,364 INFO L333 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-12 22:08:15,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 288 states and 389 transitions. [2024-11-12 22:08:15,365 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 276 [2024-11-12 22:08:15,369 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:15,369 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:15,370 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:15,370 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:15,370 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:15,370 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:15,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:15,371 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 4 times [2024-11-12 22:08:15,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:15,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383124765] [2024-11-12 22:08:15,371 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:15,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:15,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:15,380 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:15,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:15,387 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:15,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:15,388 INFO L85 PathProgramCache]: Analyzing trace with hash 1513787027, now seen corresponding path program 1 times [2024-11-12 22:08:15,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:15,388 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809626189] [2024-11-12 22:08:15,388 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:15,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:15,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:15,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:15,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809626189] [2024-11-12 22:08:15,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1809626189] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:15,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2077115239] [2024-11-12 22:08:15,554 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:15,554 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:15,554 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:15,556 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:15,557 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-12 22:08:15,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:15,727 INFO L256 TraceCheckSpWp]: Trace formula consists of 490 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-12 22:08:15,729 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:15,763 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:15,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2077115239] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:15,799 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:15,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 5, 5] total 9 [2024-11-12 22:08:15,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2142039981] [2024-11-12 22:08:15,799 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:15,800 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:15,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:15,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-12 22:08:15,801 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-12 22:08:15,801 INFO L87 Difference]: Start difference. First operand 288 states and 389 transitions. cyclomatic complexity: 105 Second operand has 9 states, 9 states have (on average 13.0) internal successors, (117), 9 states have internal predecessors, (117), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:15,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:15,872 INFO L93 Difference]: Finished difference Result 201 states and 263 transitions. [2024-11-12 22:08:15,872 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 201 states and 263 transitions. [2024-11-12 22:08:15,873 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 189 [2024-11-12 22:08:15,875 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 201 states to 201 states and 263 transitions. [2024-11-12 22:08:15,875 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 201 [2024-11-12 22:08:15,876 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 201 [2024-11-12 22:08:15,876 INFO L73 IsDeterministic]: Start isDeterministic. Operand 201 states and 263 transitions. [2024-11-12 22:08:15,876 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:15,877 INFO L218 hiAutomatonCegarLoop]: Abstraction has 201 states and 263 transitions. [2024-11-12 22:08:15,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states and 263 transitions. [2024-11-12 22:08:15,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 201. [2024-11-12 22:08:15,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 201 states, 197 states have (on average 1.3045685279187818) internal successors, (257), 196 states have internal predecessors, (257), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:15,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 263 transitions. [2024-11-12 22:08:15,884 INFO L240 hiAutomatonCegarLoop]: Abstraction has 201 states and 263 transitions. [2024-11-12 22:08:15,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-12 22:08:15,889 INFO L426 stractBuchiCegarLoop]: Abstraction has 201 states and 263 transitions. [2024-11-12 22:08:15,889 INFO L333 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-12 22:08:15,889 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 201 states and 263 transitions. [2024-11-12 22:08:15,889 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 189 [2024-11-12 22:08:15,889 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:15,890 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:15,890 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:15,890 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:15,890 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:15,891 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:15,892 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:15,892 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 5 times [2024-11-12 22:08:15,892 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:15,892 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81546364] [2024-11-12 22:08:15,892 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:15,892 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:15,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:15,898 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:15,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:15,904 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:15,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:15,908 INFO L85 PathProgramCache]: Analyzing trace with hash 1705387969, now seen corresponding path program 1 times [2024-11-12 22:08:15,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:15,909 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66245007] [2024-11-12 22:08:15,909 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:15,909 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:15,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:16,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:16,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66245007] [2024-11-12 22:08:16,225 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [66245007] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:16,225 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1529426625] [2024-11-12 22:08:16,225 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:16,225 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:16,225 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:16,230 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:16,234 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-12 22:08:16,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:16,533 INFO L256 TraceCheckSpWp]: Trace formula consists of 498 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-12 22:08:16,538 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:16,776 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:16,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1529426625] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:16,912 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:16,912 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 17 [2024-11-12 22:08:16,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1456444722] [2024-11-12 22:08:16,912 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:16,912 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:16,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:16,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-12 22:08:16,913 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2024-11-12 22:08:16,913 INFO L87 Difference]: Start difference. First operand 201 states and 263 transitions. cyclomatic complexity: 66 Second operand has 17 states, 17 states have (on average 8.588235294117647) internal successors, (146), 17 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:17,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:17,713 INFO L93 Difference]: Finished difference Result 266 states and 351 transitions. [2024-11-12 22:08:17,713 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 266 states and 351 transitions. [2024-11-12 22:08:17,714 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 254 [2024-11-12 22:08:17,715 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 266 states to 266 states and 351 transitions. [2024-11-12 22:08:17,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 266 [2024-11-12 22:08:17,716 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 266 [2024-11-12 22:08:17,716 INFO L73 IsDeterministic]: Start isDeterministic. Operand 266 states and 351 transitions. [2024-11-12 22:08:17,716 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:17,716 INFO L218 hiAutomatonCegarLoop]: Abstraction has 266 states and 351 transitions. [2024-11-12 22:08:17,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states and 351 transitions. [2024-11-12 22:08:17,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 203. [2024-11-12 22:08:17,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 203 states, 199 states have (on average 1.3015075376884422) internal successors, (259), 198 states have internal predecessors, (259), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:17,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 265 transitions. [2024-11-12 22:08:17,719 INFO L240 hiAutomatonCegarLoop]: Abstraction has 203 states and 265 transitions. [2024-11-12 22:08:17,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-12 22:08:17,720 INFO L426 stractBuchiCegarLoop]: Abstraction has 203 states and 265 transitions. [2024-11-12 22:08:17,720 INFO L333 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-12 22:08:17,720 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 203 states and 265 transitions. [2024-11-12 22:08:17,721 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 191 [2024-11-12 22:08:17,721 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:17,721 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:17,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:17,721 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:17,721 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:17,722 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise41#1 := 256 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:17,722 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:17,722 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 6 times [2024-11-12 22:08:17,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:17,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134452590] [2024-11-12 22:08:17,722 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:17,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:17,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:17,727 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:17,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:17,731 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:17,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:17,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1473112277, now seen corresponding path program 1 times [2024-11-12 22:08:17,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:17,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229477873] [2024-11-12 22:08:17,731 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:17,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:17,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:18,010 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:18,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229477873] [2024-11-12 22:08:18,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [229477873] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:18,011 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [959560958] [2024-11-12 22:08:18,011 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:18,011 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:18,011 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:18,014 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:18,016 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-12 22:08:18,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:18,224 INFO L256 TraceCheckSpWp]: Trace formula consists of 498 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-12 22:08:18,228 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:18,337 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:08:18,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [959560958] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:08:18,423 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:08:18,423 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 14 [2024-11-12 22:08:18,423 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1359950037] [2024-11-12 22:08:18,423 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:08:18,424 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:08:18,424 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:08:18,424 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-12 22:08:18,424 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=132, Unknown=0, NotChecked=0, Total=182 [2024-11-12 22:08:18,424 INFO L87 Difference]: Start difference. First operand 203 states and 265 transitions. cyclomatic complexity: 66 Second operand has 14 states, 14 states have (on average 10.0) internal successors, (140), 14 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:08:18,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:08:18,929 INFO L93 Difference]: Finished difference Result 221 states and 289 transitions. [2024-11-12 22:08:18,930 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 221 states and 289 transitions. [2024-11-12 22:08:18,931 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 209 [2024-11-12 22:08:18,932 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 221 states to 221 states and 289 transitions. [2024-11-12 22:08:18,932 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 221 [2024-11-12 22:08:18,932 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 221 [2024-11-12 22:08:18,933 INFO L73 IsDeterministic]: Start isDeterministic. Operand 221 states and 289 transitions. [2024-11-12 22:08:18,933 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:08:18,933 INFO L218 hiAutomatonCegarLoop]: Abstraction has 221 states and 289 transitions. [2024-11-12 22:08:18,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states and 289 transitions. [2024-11-12 22:08:18,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 206. [2024-11-12 22:08:18,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 202 states have (on average 1.297029702970297) internal successors, (262), 201 states have internal predecessors, (262), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:08:18,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 268 transitions. [2024-11-12 22:08:18,937 INFO L240 hiAutomatonCegarLoop]: Abstraction has 206 states and 268 transitions. [2024-11-12 22:08:18,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-12 22:08:18,937 INFO L426 stractBuchiCegarLoop]: Abstraction has 206 states and 268 transitions. [2024-11-12 22:08:18,938 INFO L333 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-12 22:08:18,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 206 states and 268 transitions. [2024-11-12 22:08:18,938 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 194 [2024-11-12 22:08:18,938 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:08:18,938 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:08:18,939 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:08:18,939 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:08:18,939 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:08:18,939 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise40#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1 % 4294967296 / 8192;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:08:18,940 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:18,940 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 7 times [2024-11-12 22:08:18,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:18,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1380298012] [2024-11-12 22:08:18,940 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:18,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:18,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:18,945 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:08:18,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:08:18,949 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:08:18,950 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:08:18,950 INFO L85 PathProgramCache]: Analyzing trace with hash 497679225, now seen corresponding path program 1 times [2024-11-12 22:08:18,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:08:18,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250748959] [2024-11-12 22:08:18,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:18,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:08:19,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:19,716 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:08:19,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250748959] [2024-11-12 22:08:19,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1250748959] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:08:19,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [720144364] [2024-11-12 22:08:19,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:08:19,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:08:19,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:08:19,720 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:08:19,721 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-12 22:08:21,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:08:21,922 INFO L256 TraceCheckSpWp]: Trace formula consists of 495 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-12 22:08:21,924 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:08:22,660 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:09:11,752 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [720144364] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:09:11,752 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:09:11,752 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 9, 9] total 22 [2024-11-12 22:09:11,752 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276105954] [2024-11-12 22:09:11,752 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:09:11,753 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:09:11,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:09:11,754 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-12 22:09:11,754 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=391, Unknown=4, NotChecked=0, Total=462 [2024-11-12 22:09:11,755 INFO L87 Difference]: Start difference. First operand 206 states and 268 transitions. cyclomatic complexity: 66 Second operand has 22 states, 22 states have (on average 5.545454545454546) internal successors, (122), 22 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-12 22:09:25,039 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.57s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-12 22:09:27,044 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.71s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2024-11-12 22:09:38,539 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.55s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-12 22:09:40,964 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 2.23s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [0] [2024-11-12 22:09:46,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-12 22:09:46,440 INFO L93 Difference]: Finished difference Result 320 states and 425 transitions. [2024-11-12 22:09:46,440 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 320 states and 425 transitions. [2024-11-12 22:09:46,441 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 308 [2024-11-12 22:09:46,443 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 320 states to 320 states and 425 transitions. [2024-11-12 22:09:46,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 320 [2024-11-12 22:09:46,443 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 320 [2024-11-12 22:09:46,443 INFO L73 IsDeterministic]: Start isDeterministic. Operand 320 states and 425 transitions. [2024-11-12 22:09:46,443 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-12 22:09:46,443 INFO L218 hiAutomatonCegarLoop]: Abstraction has 320 states and 425 transitions. [2024-11-12 22:09:46,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320 states and 425 transitions. [2024-11-12 22:09:46,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320 to 217. [2024-11-12 22:09:46,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 217 states, 213 states have (on average 1.300469483568075) internal successors, (277), 212 states have internal predecessors, (277), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-12 22:09:46,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 283 transitions. [2024-11-12 22:09:46,476 INFO L240 hiAutomatonCegarLoop]: Abstraction has 217 states and 283 transitions. [2024-11-12 22:09:46,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-12 22:09:46,477 INFO L426 stractBuchiCegarLoop]: Abstraction has 217 states and 283 transitions. [2024-11-12 22:09:46,477 INFO L333 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-12 22:09:46,478 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 217 states and 283 transitions. [2024-11-12 22:09:46,478 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 205 [2024-11-12 22:09:46,478 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-12 22:09:46,478 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-12 22:09:46,479 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-12 22:09:46,480 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-12 22:09:46,480 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#1(48, 1, 0, 1);call write~init~int#1(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~nondet5#1, main_#t~mem6#1, main_#t~mem8#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~bitwise19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~switch28#1, main_#t~mem29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~bitwise40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc49#1.base, main_#t~malloc49#1.offset, main_#t~mem50#1.base, main_#t~mem50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~memset~res52#1.base, main_#t~memset~res52#1.offset, main_#t~mem53#1.base, main_#t~mem53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~malloc58#1.base, main_#t~malloc58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~memset~res65#1.base, main_#t~memset~res65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1, main_#t~post76#1, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1, main_#t~bitwise79#1, main_#t~mem80#1.base, main_#t~mem80#1.offset, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~post83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem88#1, main_#t~mem87#1, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1, main_#t~short91#1, main_#t~mem92#1.base, main_#t~mem92#1.offset, main_#t~mem93#1, main_#t~malloc94#1.base, main_#t~malloc94#1.offset, main_#t~mem95#1.base, main_#t~mem95#1.offset, main_#t~mem96#1, main_#t~memset~res97#1.base, main_#t~memset~res97#1.offset, main_#t~mem98#1.base, main_#t~mem98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem102#1, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem101#1, main_#t~bitwise103#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem107#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem106#1, main_#t~bitwise108#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1, main_#t~mem112#1.base, main_#t~mem112#1.offset, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem118#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1, main_#t~bitwise119#1, main_#t~mem120#1, main_#t~pre121#1, main_#t~mem122#1.base, main_#t~mem122#1.offset, main_#t~mem123#1, main_#t~mem124#1.base, main_#t~mem124#1.offset, main_#t~mem125#1, main_#t~post126#1, main_#t~mem130#1, main_#t~mem128#1, main_#t~mem127#1.base, main_#t~mem127#1.offset, main_#t~mem129#1, main_#t~mem131#1, main_#t~post132#1, main_#t~mem133#1.base, main_#t~mem133#1.offset, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1, main_#t~post143#1, main_#t~mem144#1.base, main_#t~mem144#1.offset, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem149#1, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem148#1, main_#t~ite152#1, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem151#1, main_#t~mem153#1.base, main_#t~mem153#1.offset, main_#t~mem154#1, main_#t~mem155#1.base, main_#t~mem155#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~post156#1, main_#t~mem157#1, main_#t~mem158#1.base, main_#t~mem158#1.offset, main_#t~ite160#1.base, main_#t~ite160#1.offset, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_#t~mem161#1.base, main_#t~mem161#1.offset, main_#t~mem162#1.base, main_#t~mem162#1.offset, main_#t~short163#1, main_#t~mem164#1.base, main_#t~mem164#1.offset, main_#t~mem165#1.base, main_#t~mem165#1.offset, main_#t~mem166#1.base, main_#t~mem166#1.offset, main_#t~mem167#1.base, main_#t~mem167#1.offset, main_#t~mem168#1.base, main_#t~mem168#1.offset, main_#t~mem169#1.base, main_#t~mem169#1.offset, main_#t~mem170#1.base, main_#t~mem170#1.offset, main_#t~mem171#1.base, main_#t~mem171#1.offset, main_#t~mem172#1, main_#t~mem173#1.base, main_#t~mem173#1.offset, main_#t~mem174#1.base, main_#t~mem174#1.offset, main_#t~mem175#1.base, main_#t~mem175#1.offset, main_#t~mem176#1, main_#t~mem177#1.base, main_#t~mem177#1.offset, main_#t~mem178#1.base, main_#t~mem178#1.offset, main_#t~mem179#1.base, main_#t~mem179#1.offset, main_#t~mem180#1.base, main_#t~mem180#1.offset, main_#t~mem181#1.base, main_#t~mem181#1.offset, main_#t~mem182#1, main_#t~mem183#1.base, main_#t~mem183#1.offset, main_#t~mem186#1, main_#t~mem184#1.base, main_#t~mem184#1.offset, main_#t~mem185#1, main_#t~bitwise187#1, main_#t~mem188#1.base, main_#t~mem188#1.offset, main_#t~mem189#1.base, main_#t~mem189#1.offset, main_#t~mem190#1, main_#t~post191#1, main_#t~mem192#1.base, main_#t~mem192#1.offset, main_#t~mem193#1.base, main_#t~mem193#1.offset, main_#t~mem194#1.base, main_#t~mem194#1.offset, main_#t~mem195#1.base, main_#t~mem195#1.offset, main_#t~mem196#1.base, main_#t~mem196#1.offset, main_#t~mem197#1.base, main_#t~mem197#1.offset, main_#t~mem198#1.base, main_#t~mem198#1.offset, main_#t~mem199#1.base, main_#t~mem199#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem200#1.base, main_#t~mem200#1.offset, main_#t~mem201#1, main_#t~post202#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite204#1.base, main_#t~ite204#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~sum~0#1, main_~temp~0#1.base, main_~temp~0#1.offset;havoc main_~i~0#1;havoc main_~user~0#1.base, main_~user~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~sum~0#1 := 0;main_~i~0#1 := 0;" [2024-11-12 22:09:46,480 INFO L749 eck$LassoCheckResult]: Loop: "assume !!(main_~i~0#1 < 10);call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call write~int#0(main_~i~0#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call write~int#0(main_#t~nondet5#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~nondet5#1;call main_#t~mem6#1 := read~int#0(main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);main_~sum~0#1 := main_~sum~0#1 + main_#t~mem6#1;havoc main_#t~mem6#1;" "havoc main_~_ha_hashv~0#1;" "goto;" "havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4;" "assume !(main_~_hj_k~0#1 % 4294967296 >= 12);" "main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch28#1 := 11 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 10 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 9 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 8 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 7 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 6 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 5 == main_~_hj_k~0#1;" "assume !main_#t~switch28#1;" "main_#t~switch28#1 := main_#t~switch28#1 || 4 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem36#1 := read~int#0(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem36#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 3 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem37#1 := read~int#0(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem37#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 2 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem38#1 := read~int#0(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem38#1 % 256 % 4294967296);" "main_#t~switch28#1 := main_#t~switch28#1 || 1 == main_~_hj_k~0#1;" "assume main_#t~switch28#1;call main_#t~mem39#1 := read~int#0(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem39#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem39#1 % 256 % 4294967296 else main_#t~mem39#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~switch28#1;havoc main_#t~mem29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;" "main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume !(0 == main_~_hj_i~0#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise40#1 := 0;" "main_~_hj_i~0#1 := main_#t~bitwise40#1;havoc main_#t~bitwise40#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume !(0 == main_~_hj_j~0#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise41#1 := main_~_hj_j~0#1;" "main_~_hj_j~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume !(0 == main_~_ha_hashv~0#1 % 4294967296);" "assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise42#1 := main_~_ha_hashv~0#1;" "main_~_ha_hashv~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096;" "main_~_hj_i~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise44#1 := 65536 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1 % 4294967296 / 32;" "main_~_ha_hashv~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1;" "assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1 % 4294967296 / 8;" "main_~_hj_i~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1;" "assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise47#1 := 1024 * (main_~_hj_i~0#1 % 4294967296);" "main_~_hj_j~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1;" "assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise48#1 := main_~_hj_j~0#1 % 4294967296 / 32768;" "main_~_ha_hashv~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;" "goto;" "havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset;" "goto;" "goto;" "call write~int#0(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#0(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4);" "assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem66#1.base, main_#t~mem66#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem66#1.base, main_#t~mem66#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem66#1.base, main_#t~mem66#1.offset;" "call write~$Pointer$#0(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#0(main_#t~mem67#1.base, 16 + main_#t~mem67#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem70#1 := read~int#0(main_#t~mem69#1.base, 20 + main_#t~mem69#1.offset, 4);call write~$Pointer$#0(main_#t~mem68#1.base, main_#t~mem68#1.offset - main_#t~mem70#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset;havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1;call main_#t~mem71#1.base, main_#t~mem71#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#0(main_#t~mem71#1.base, 16 + main_#t~mem71#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem72#1.base, 8 + main_#t~mem72#1.offset, 4);havoc main_#t~mem71#1.base, main_#t~mem71#1.offset;havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem73#1.base, 16 + main_#t~mem73#1.offset, 4);havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem75#1 := read~int#0(main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);main_#t~post76#1 := main_#t~mem75#1;call write~int#0(1 + main_#t~post76#1, main_#t~mem74#1.base, 12 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset;havoc main_#t~mem75#1;havoc main_#t~post76#1;" "call main_#t~mem77#1.base, main_#t~mem77#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem78#1 := read~int#0(main_#t~mem77#1.base, 4 + main_#t~mem77#1.offset, 4);" "assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem78#1 - 1) % 4294967296;main_#t~bitwise79#1 := 0;" "main_~_ha_bkt~0#1 := main_#t~bitwise79#1;havoc main_#t~mem77#1.base, main_#t~mem77#1.offset;havoc main_#t~mem78#1;havoc main_#t~bitwise79#1;" "goto;" "call main_#t~mem80#1.base, main_#t~mem80#1.offset := read~$Pointer$#0(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#0(main_#t~mem80#1.base, main_#t~mem80#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem81#1.base, main_#t~mem81#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem80#1.base, main_#t~mem80#1.offset;havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;call main_#t~mem82#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post83#1 := main_#t~mem82#1;call write~int#0(1 + main_#t~post83#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem82#1;havoc main_#t~post83#1;call main_#t~mem84#1.base, main_#t~mem84#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_#t~mem84#1.base, main_#t~mem84#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem84#1.base, main_#t~mem84#1.offset;call write~$Pointer$#0(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);" "assume main_#t~mem85#1.base != 0 || main_#t~mem85#1.offset != 0;havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#0(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem86#1.base, 12 + main_#t~mem86#1.offset, 4);havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;" "call write~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#0(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem87#1 := read~int#0(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short91#1 := main_#t~mem88#1 % 4294967296 >= 10 * (1 + main_#t~mem87#1) % 4294967296;" "assume main_#t~short91#1;call main_#t~mem89#1.base, main_#t~mem89#1.offset := read~$Pointer$#0(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem90#1 := read~int#0(main_#t~mem89#1.base, 36 + main_#t~mem89#1.offset, 4);main_#t~short91#1 := 0 == main_#t~mem90#1 % 4294967296;" "assume !main_#t~short91#1;havoc main_#t~mem88#1;havoc main_#t~mem87#1;havoc main_#t~mem89#1.base, main_#t~mem89#1.offset;havoc main_#t~mem90#1;havoc main_#t~short91#1;" "havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset;" "goto;" "havoc main_~_ha_bkt~0#1;" "goto;" "goto;" "havoc main_~_ha_hashv~0#1;" "goto;" "main_#t~post156#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post156#1;havoc main_#t~post156#1;" [2024-11-12 22:09:46,481 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:09:46,481 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 8 times [2024-11-12 22:09:46,481 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:09:46,481 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922842331] [2024-11-12 22:09:46,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:09:46,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:09:46,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:09:46,488 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-12 22:09:46,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-12 22:09:46,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-12 22:09:46,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-12 22:09:46,496 INFO L85 PathProgramCache]: Analyzing trace with hash -716878670, now seen corresponding path program 1 times [2024-11-12 22:09:46,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-12 22:09:46,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132643240] [2024-11-12 22:09:46,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:09:46,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-12 22:09:46,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:09:46,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-12 22:09:46,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132643240] [2024-11-12 22:09:46,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132643240] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-12 22:09:46,817 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1845623015] [2024-11-12 22:09:46,817 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-12 22:09:46,817 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-12 22:09:46,817 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-12 22:09:46,821 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-12 22:09:46,826 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-12 22:09:47,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-12 22:09:47,033 INFO L256 TraceCheckSpWp]: Trace formula consists of 499 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-11-12 22:09:47,034 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-12 22:09:47,121 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-12 22:09:47,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1845623015] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-12 22:09:47,332 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-12 22:09:47,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17 [2024-11-12 22:09:47,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662141546] [2024-11-12 22:09:47,333 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-12 22:09:47,333 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-12 22:09:47,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-12 22:09:47,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-12 22:09:47,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2024-11-12 22:09:47,334 INFO L87 Difference]: Start difference. First operand 217 states and 283 transitions. cyclomatic complexity: 70 Second operand has 17 states, 17 states have (on average 6.9411764705882355) internal successors, (118), 17 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)