./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 14:51:11,758 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 14:51:11,845 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-13 14:51:11,851 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 14:51:11,852 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 14:51:11,883 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 14:51:11,884 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 14:51:11,884 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 14:51:11,885 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 14:51:11,885 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 14:51:11,886 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 14:51:11,887 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 14:51:11,887 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 14:51:11,887 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-13 14:51:11,888 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-13 14:51:11,888 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-13 14:51:11,888 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-13 14:51:11,888 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-13 14:51:11,889 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 14:51:11,889 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-13 14:51:11,890 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 14:51:11,891 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 14:51:11,891 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 14:51:11,891 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 14:51:11,892 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-13 14:51:11,892 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-13 14:51:11,892 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 09dc663f7f76eee13b6af61297831e3fbddcb16c16389bf8d94f2d27048733d0 [2024-11-13 14:51:12,239 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 14:51:12,249 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 14:51:12,252 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 14:51:12,253 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 14:51:12,254 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 14:51:12,255 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/array-industry-pattern/array_mul_init.i Unable to find full path for "g++" [2024-11-13 14:51:14,255 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 14:51:14,571 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 14:51:14,572 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/sv-benchmarks/c/array-industry-pattern/array_mul_init.i [2024-11-13 14:51:14,582 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/data/0747c44ca/fd1bba7207b24ad2ac0ce9a914e56837/FLAGa37a2edfb [2024-11-13 14:51:14,606 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/data/0747c44ca/fd1bba7207b24ad2ac0ce9a914e56837 [2024-11-13 14:51:14,609 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 14:51:14,612 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 14:51:14,615 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 14:51:14,616 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 14:51:14,620 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 14:51:14,622 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,623 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@54b28b4f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14, skipping insertion in model container [2024-11-13 14:51:14,623 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,645 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 14:51:14,855 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 14:51:14,869 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 14:51:14,897 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 14:51:14,919 INFO L204 MainTranslator]: Completed translation [2024-11-13 14:51:14,921 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14 WrapperNode [2024-11-13 14:51:14,921 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 14:51:14,923 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 14:51:14,923 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 14:51:14,923 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 14:51:14,931 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,941 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,972 INFO L138 Inliner]: procedures = 16, calls = 21, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 70 [2024-11-13 14:51:14,973 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 14:51:14,974 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 14:51:14,975 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 14:51:14,975 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 14:51:14,987 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,988 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:14,989 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,012 INFO L175 MemorySlicer]: Split 11 memory accesses to 3 slices as follows [2, 4, 5]. 45 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 4 writes are split as follows [0, 2, 2]. [2024-11-13 14:51:15,015 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,016 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,026 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,033 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,036 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,041 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,043 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 14:51:15,048 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 14:51:15,048 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 14:51:15,048 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 14:51:15,050 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (1/1) ... [2024-11-13 14:51:15,060 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:15,077 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:15,092 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:15,100 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-13 14:51:15,134 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 14:51:15,134 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-13 14:51:15,134 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-13 14:51:15,134 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2024-11-13 14:51:15,134 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 14:51:15,135 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-13 14:51:15,135 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-13 14:51:15,136 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2024-11-13 14:51:15,136 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-13 14:51:15,260 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 14:51:15,263 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 14:51:15,445 INFO L? ?]: Removed 15 outVars from TransFormulas that were not future-live. [2024-11-13 14:51:15,445 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 14:51:15,456 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 14:51:15,456 INFO L316 CfgBuilder]: Removed 3 assume(true) statements. [2024-11-13 14:51:15,457 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 02:51:15 BoogieIcfgContainer [2024-11-13 14:51:15,457 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 14:51:15,458 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-13 14:51:15,458 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-13 14:51:15,464 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-13 14:51:15,465 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-13 14:51:15,465 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 13.11 02:51:14" (1/3) ... [2024-11-13 14:51:15,466 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@757a6dcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 02:51:15, skipping insertion in model container [2024-11-13 14:51:15,466 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-13 14:51:15,467 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 02:51:14" (2/3) ... [2024-11-13 14:51:15,467 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@757a6dcf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 13.11 02:51:15, skipping insertion in model container [2024-11-13 14:51:15,467 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-13 14:51:15,467 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 02:51:15" (3/3) ... [2024-11-13 14:51:15,469 INFO L333 chiAutomizerObserver]: Analyzing ICFG array_mul_init.i [2024-11-13 14:51:15,538 INFO L299 stractBuchiCegarLoop]: Interprodecural is true [2024-11-13 14:51:15,539 INFO L300 stractBuchiCegarLoop]: Hoare is None [2024-11-13 14:51:15,539 INFO L301 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-13 14:51:15,539 INFO L302 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-13 14:51:15,539 INFO L303 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-13 14:51:15,539 INFO L304 stractBuchiCegarLoop]: Difference is false [2024-11-13 14:51:15,539 INFO L305 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-13 14:51:15,539 INFO L309 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-13 14:51:15,547 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 19 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:15,565 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 12 [2024-11-13 14:51:15,565 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:15,565 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:15,571 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-13 14:51:15,571 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-13 14:51:15,571 INFO L331 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-13 14:51:15,571 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 19 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:15,574 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 12 [2024-11-13 14:51:15,574 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:15,574 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:15,575 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-13 14:51:15,575 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2024-11-13 14:51:15,583 INFO L745 eck$LassoCheckResult]: Stem: 16#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 9#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 17#L21-2true [2024-11-13 14:51:15,583 INFO L747 eck$LassoCheckResult]: Loop: 17#L21-2true assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 17#L21-2true [2024-11-13 14:51:15,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:15,596 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-13 14:51:15,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:15,606 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1616291249] [2024-11-13 14:51:15,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:15,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:15,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,709 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:15,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,746 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:15,750 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:15,750 INFO L85 PathProgramCache]: Analyzing trace with hash 41, now seen corresponding path program 1 times [2024-11-13 14:51:15,750 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:15,750 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29673947] [2024-11-13 14:51:15,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:15,750 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:15,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,771 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:15,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,786 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:15,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:15,792 INFO L85 PathProgramCache]: Analyzing trace with hash 29863, now seen corresponding path program 1 times [2024-11-13 14:51:15,792 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:15,793 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [249632843] [2024-11-13 14:51:15,793 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:15,793 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:15,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,844 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:15,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:15,877 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:16,457 INFO L204 LassoAnalysis]: Preferences: [2024-11-13 14:51:16,459 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-13 14:51:16,459 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-13 14:51:16,459 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-13 14:51:16,460 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-13 14:51:16,461 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:16,461 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-13 14:51:16,461 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-13 14:51:16,461 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_mul_init.i_Iteration1_Lasso [2024-11-13 14:51:16,461 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-13 14:51:16,462 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-13 14:51:16,481 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,835 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,849 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,852 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,855 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,858 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,861 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,864 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,867 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,873 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,876 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,879 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,883 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:16,885 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-13 14:51:17,211 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-13 14:51:17,214 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-13 14:51:17,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,216 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,219 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,221 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-13 14:51:17,222 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,237 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,238 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,238 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,238 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,247 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,247 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,254 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,273 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-11-13 14:51:17,274 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,274 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,277 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,279 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-13 14:51:17,280 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,294 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,294 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,294 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,295 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,298 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,299 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,307 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,325 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-11-13 14:51:17,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,326 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,328 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-13 14:51:17,359 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,373 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,374 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,383 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,383 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,389 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,409 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2024-11-13 14:51:17,409 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,409 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,411 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,413 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-13 14:51:17,413 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,425 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,425 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,425 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,425 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,430 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,431 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,440 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,459 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-13 14:51:17,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,459 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,461 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,463 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-13 14:51:17,464 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,479 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,479 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,479 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,479 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,486 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,486 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,491 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,508 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-13 14:51:17,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,511 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,513 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,514 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-13 14:51:17,518 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,533 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,533 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-13 14:51:17,533 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,533 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,533 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,534 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-13 14:51:17,534 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-13 14:51:17,537 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,555 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-13 14:51:17,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,555 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,558 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,560 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-13 14:51:17,561 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,575 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,576 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,576 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,576 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,580 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,580 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,586 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,604 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2024-11-13 14:51:17,604 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,604 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,606 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,608 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-13 14:51:17,609 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,623 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,623 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,624 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,624 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,626 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,626 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,631 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,651 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2024-11-13 14:51:17,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,651 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,654 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,657 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,658 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-13 14:51:17,671 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,672 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-13 14:51:17,672 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,672 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,672 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,672 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-13 14:51:17,673 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-13 14:51:17,675 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-13 14:51:17,691 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2024-11-13 14:51:17,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,692 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,694 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,695 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-13 14:51:17,695 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-13 14:51:17,707 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-13 14:51:17,707 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-13 14:51:17,707 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-13 14:51:17,707 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-13 14:51:17,717 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-13 14:51:17,718 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-13 14:51:17,735 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-13 14:51:17,781 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2024-11-13 14:51:17,788 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 15 variables to zero. [2024-11-13 14:51:17,790 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-13 14:51:17,790 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:17,794 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-13 14:51:17,796 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-13 14:51:17,797 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-13 14:51:17,819 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-13 14:51:17,819 INFO L474 LassoAnalysis]: Proved termination. [2024-11-13 14:51:17,820 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 199999*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2024-11-13 14:51:17,841 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-13 14:51:17,901 INFO L156 tatePredicateManager]: 8 out of 8 supporting invariants were superfluous and have been removed [2024-11-13 14:51:17,911 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-13 14:51:17,912 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-13 14:51:17,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:17,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:17,980 INFO L255 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-13 14:51:17,981 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:18,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:18,015 INFO L255 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-13 14:51:18,016 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:18,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 14:51:18,064 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2024-11-13 14:51:18,067 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 19 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:18,117 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.5263157894736843) internal successors, (29), 19 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 38 states and 56 transitions. Complement of second has 4 states. [2024-11-13 14:51:18,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-13 14:51:18,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:18,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 28 transitions. [2024-11-13 14:51:18,137 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 2 letters. Loop has 1 letters. [2024-11-13 14:51:18,137 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-13 14:51:18,138 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 3 letters. Loop has 1 letters. [2024-11-13 14:51:18,138 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-13 14:51:18,138 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 28 transitions. Stem has 2 letters. Loop has 2 letters. [2024-11-13 14:51:18,138 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-13 14:51:18,139 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 56 transitions. [2024-11-13 14:51:18,144 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2024-11-13 14:51:18,150 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 17 states and 25 transitions. [2024-11-13 14:51:18,151 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-13 14:51:18,151 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2024-11-13 14:51:18,152 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17 states and 25 transitions. [2024-11-13 14:51:18,153 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:18,153 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17 states and 25 transitions. [2024-11-13 14:51:18,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17 states and 25 transitions. [2024-11-13 14:51:18,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17 to 17. [2024-11-13 14:51:18,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.4705882352941178) internal successors, (25), 16 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:18,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 25 transitions. [2024-11-13 14:51:18,179 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 25 transitions. [2024-11-13 14:51:18,179 INFO L424 stractBuchiCegarLoop]: Abstraction has 17 states and 25 transitions. [2024-11-13 14:51:18,179 INFO L331 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-13 14:51:18,180 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 25 transitions. [2024-11-13 14:51:18,180 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 11 [2024-11-13 14:51:18,180 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:18,180 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:18,181 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-13 14:51:18,181 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:18,181 INFO L745 eck$LassoCheckResult]: Stem: 134#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 127#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 128#L21-2 assume !(main_~i~0#1 < 100000); 123#L21-3 main_~i~0#1 := 0; 124#L26-2 [2024-11-13 14:51:18,181 INFO L747 eck$LassoCheckResult]: Loop: 124#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 133#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 126#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 124#L26-2 [2024-11-13 14:51:18,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:18,182 INFO L85 PathProgramCache]: Analyzing trace with hash 925705, now seen corresponding path program 1 times [2024-11-13 14:51:18,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:18,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691981751] [2024-11-13 14:51:18,182 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:18,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:18,257 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 14:51:18,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:18,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691981751] [2024-11-13 14:51:18,263 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1691981751] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 14:51:18,263 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 14:51:18,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-13 14:51:18,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1253305060] [2024-11-13 14:51:18,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 14:51:18,269 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:18,272 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:18,272 INFO L85 PathProgramCache]: Analyzing trace with hash 51737, now seen corresponding path program 1 times [2024-11-13 14:51:18,274 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:18,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812668241] [2024-11-13 14:51:18,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:18,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:18,292 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [22039261] [2024-11-13 14:51:18,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,293 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:18,293 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:18,295 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:18,297 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-13 14:51:18,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:18,370 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:18,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:18,383 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:18,586 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:18,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-13 14:51:18,589 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-13 14:51:18,590 INFO L87 Difference]: Start difference. First operand 17 states and 25 transitions. cyclomatic complexity: 11 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:18,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:18,650 INFO L93 Difference]: Finished difference Result 26 states and 32 transitions. [2024-11-13 14:51:18,651 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 32 transitions. [2024-11-13 14:51:18,652 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:18,652 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 22 states and 28 transitions. [2024-11-13 14:51:18,654 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21 [2024-11-13 14:51:18,656 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21 [2024-11-13 14:51:18,656 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 28 transitions. [2024-11-13 14:51:18,656 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:18,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 28 transitions. [2024-11-13 14:51:18,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 28 transitions. [2024-11-13 14:51:18,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 15. [2024-11-13 14:51:18,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.2666666666666666) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:18,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 19 transitions. [2024-11-13 14:51:18,660 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 19 transitions. [2024-11-13 14:51:18,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-13 14:51:18,661 INFO L424 stractBuchiCegarLoop]: Abstraction has 15 states and 19 transitions. [2024-11-13 14:51:18,662 INFO L331 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-13 14:51:18,662 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 19 transitions. [2024-11-13 14:51:18,662 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:18,665 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:18,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:18,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-13 14:51:18,666 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:18,666 INFO L745 eck$LassoCheckResult]: Stem: 180#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 176#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 177#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 181#L21-2 assume !(main_~i~0#1 < 100000); 170#L21-3 main_~i~0#1 := 0; 171#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 179#L28 [2024-11-13 14:51:18,667 INFO L747 eck$LassoCheckResult]: Loop: 179#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 174#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 175#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 179#L28 [2024-11-13 14:51:18,667 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:18,667 INFO L85 PathProgramCache]: Analyzing trace with hash 889656777, now seen corresponding path program 1 times [2024-11-13 14:51:18,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:18,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1471890825] [2024-11-13 14:51:18,667 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:18,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:18,780 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 14:51:18,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:18,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1471890825] [2024-11-13 14:51:18,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1471890825] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:18,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1515938179] [2024-11-13 14:51:18,781 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:18,781 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:18,789 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:18,793 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-13 14:51:18,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:18,855 INFO L255 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-13 14:51:18,856 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:18,873 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 14:51:18,874 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 14:51:18,905 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-13 14:51:18,905 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1515938179] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 14:51:18,905 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 14:51:18,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-13 14:51:18,906 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [897603818] [2024-11-13 14:51:18,906 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 14:51:18,906 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:18,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:18,906 INFO L85 PathProgramCache]: Analyzing trace with hash 54737, now seen corresponding path program 2 times [2024-11-13 14:51:18,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:18,907 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585134529] [2024-11-13 14:51:18,907 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:18,907 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:18,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:18,927 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [398955016] [2024-11-13 14:51:18,927 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 14:51:18,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:18,927 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:18,932 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:18,934 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-13 14:51:18,994 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-13 14:51:18,994 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-13 14:51:18,995 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:19,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:19,009 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:19,145 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-11-13 14:51:19,202 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:19,202 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 14:51:19,203 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-11-13 14:51:19,203 INFO L87 Difference]: Start difference. First operand 15 states and 19 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 1.5714285714285714) internal successors, (11), 7 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:19,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:19,338 INFO L93 Difference]: Finished difference Result 43 states and 53 transitions. [2024-11-13 14:51:19,338 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 53 transitions. [2024-11-13 14:51:19,339 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:19,340 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 43 states and 53 transitions. [2024-11-13 14:51:19,340 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39 [2024-11-13 14:51:19,340 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39 [2024-11-13 14:51:19,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 53 transitions. [2024-11-13 14:51:19,345 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:19,345 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 53 transitions. [2024-11-13 14:51:19,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 53 transitions. [2024-11-13 14:51:19,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 27. [2024-11-13 14:51:19,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2592592592592593) internal successors, (34), 26 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:19,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 34 transitions. [2024-11-13 14:51:19,348 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 34 transitions. [2024-11-13 14:51:19,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 14:51:19,351 INFO L424 stractBuchiCegarLoop]: Abstraction has 27 states and 34 transitions. [2024-11-13 14:51:19,351 INFO L331 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-13 14:51:19,351 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 34 transitions. [2024-11-13 14:51:19,352 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:19,352 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:19,352 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:19,353 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 1, 1, 1, 1] [2024-11-13 14:51:19,353 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:19,353 INFO L745 eck$LassoCheckResult]: Stem: 279#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 274#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 275#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 280#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 281#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 284#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 283#L21-2 assume !(main_~i~0#1 < 100000); 268#L21-3 main_~i~0#1 := 0; 269#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 278#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 272#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 273#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 277#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 292#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 291#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 290#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 289#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 288#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 286#L28 [2024-11-13 14:51:19,353 INFO L747 eck$LassoCheckResult]: Loop: 286#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 287#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 285#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 286#L28 [2024-11-13 14:51:19,353 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:19,353 INFO L85 PathProgramCache]: Analyzing trace with hash 1755482087, now seen corresponding path program 1 times [2024-11-13 14:51:19,353 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:19,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [794815037] [2024-11-13 14:51:19,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:19,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:19,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:19,633 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 14:51:19,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:19,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [794815037] [2024-11-13 14:51:19,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [794815037] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:19,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1642745135] [2024-11-13 14:51:19,634 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:19,635 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:19,635 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:19,638 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:19,640 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-13 14:51:19,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:19,754 INFO L255 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-13 14:51:19,756 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:19,794 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 14:51:19,794 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 14:51:19,904 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 14:51:19,904 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1642745135] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 14:51:19,904 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 14:51:19,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-13 14:51:19,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058580852] [2024-11-13 14:51:19,905 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 14:51:19,905 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:19,905 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:19,906 INFO L85 PathProgramCache]: Analyzing trace with hash 54737, now seen corresponding path program 3 times [2024-11-13 14:51:19,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:19,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564894797] [2024-11-13 14:51:19,906 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:19,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:19,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:19,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [853313849] [2024-11-13 14:51:19,919 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 14:51:19,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:19,919 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:19,924 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:19,926 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-13 14:51:19,993 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-11-13 14:51:19,994 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-13 14:51:19,994 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:20,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:20,013 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:20,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:20,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-13 14:51:20,174 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-11-13 14:51:20,175 INFO L87 Difference]: Start difference. First operand 27 states and 34 transitions. cyclomatic complexity: 10 Second operand has 13 states, 13 states have (on average 1.4615384615384615) internal successors, (19), 13 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:20,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:20,402 INFO L93 Difference]: Finished difference Result 97 states and 119 transitions. [2024-11-13 14:51:20,402 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 119 transitions. [2024-11-13 14:51:20,404 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:20,405 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 97 states and 119 transitions. [2024-11-13 14:51:20,405 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 87 [2024-11-13 14:51:20,407 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 87 [2024-11-13 14:51:20,409 INFO L73 IsDeterministic]: Start isDeterministic. Operand 97 states and 119 transitions. [2024-11-13 14:51:20,410 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:20,410 INFO L218 hiAutomatonCegarLoop]: Abstraction has 97 states and 119 transitions. [2024-11-13 14:51:20,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states and 119 transitions. [2024-11-13 14:51:20,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 51. [2024-11-13 14:51:20,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.2549019607843137) internal successors, (64), 50 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:20,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 64 transitions. [2024-11-13 14:51:20,420 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 64 transitions. [2024-11-13 14:51:20,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-13 14:51:20,421 INFO L424 stractBuchiCegarLoop]: Abstraction has 51 states and 64 transitions. [2024-11-13 14:51:20,421 INFO L331 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-13 14:51:20,421 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 64 transitions. [2024-11-13 14:51:20,423 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:20,423 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:20,423 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:20,424 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 9, 9, 1, 1, 1, 1] [2024-11-13 14:51:20,424 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:20,424 INFO L745 eck$LassoCheckResult]: Stem: 522#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 516#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 517#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 523#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 524#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 540#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 538#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 536#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 534#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 532#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 531#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 529#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 526#L21-2 assume !(main_~i~0#1 < 100000); 508#L21-3 main_~i~0#1 := 0; 509#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 519#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 514#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 515#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 520#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 521#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 558#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 557#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 556#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 555#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 554#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 553#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 552#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 551#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 550#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 549#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 548#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 547#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 546#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 545#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 544#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 543#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 542#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 541#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 539#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 537#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 535#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 533#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 528#L28 [2024-11-13 14:51:20,428 INFO L747 eck$LassoCheckResult]: Loop: 528#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 530#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 527#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 528#L28 [2024-11-13 14:51:20,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:20,429 INFO L85 PathProgramCache]: Analyzing trace with hash -782207961, now seen corresponding path program 2 times [2024-11-13 14:51:20,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:20,429 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702762905] [2024-11-13 14:51:20,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:20,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:20,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:20,988 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-11-13 14:51:20,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:20,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702762905] [2024-11-13 14:51:20,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1702762905] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:20,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [145871630] [2024-11-13 14:51:20,990 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 14:51:20,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:20,990 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:20,994 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:20,999 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-13 14:51:21,166 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 14:51:21,166 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 14:51:21,168 INFO L255 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-13 14:51:21,171 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:21,238 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-11-13 14:51:21,241 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 14:51:21,529 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2024-11-13 14:51:21,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [145871630] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 14:51:21,529 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 14:51:21,530 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-11-13 14:51:21,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264773011] [2024-11-13 14:51:21,530 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 14:51:21,530 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:21,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:21,530 INFO L85 PathProgramCache]: Analyzing trace with hash 54737, now seen corresponding path program 4 times [2024-11-13 14:51:21,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:21,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305306194] [2024-11-13 14:51:21,531 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:21,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:21,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:21,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1433340643] [2024-11-13 14:51:21,538 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-13 14:51:21,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:21,538 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:21,540 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:21,542 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2024-11-13 14:51:21,595 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-13 14:51:21,595 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-13 14:51:21,595 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:21,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:21,605 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:21,767 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:21,768 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-13 14:51:21,768 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-11-13 14:51:21,769 INFO L87 Difference]: Start difference. First operand 51 states and 64 transitions. cyclomatic complexity: 16 Second operand has 25 states, 25 states have (on average 1.24) internal successors, (31), 25 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:22,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:22,319 INFO L93 Difference]: Finished difference Result 205 states and 251 transitions. [2024-11-13 14:51:22,319 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 205 states and 251 transitions. [2024-11-13 14:51:22,322 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:22,324 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 205 states to 205 states and 251 transitions. [2024-11-13 14:51:22,324 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 183 [2024-11-13 14:51:22,325 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 183 [2024-11-13 14:51:22,325 INFO L73 IsDeterministic]: Start isDeterministic. Operand 205 states and 251 transitions. [2024-11-13 14:51:22,326 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:22,326 INFO L218 hiAutomatonCegarLoop]: Abstraction has 205 states and 251 transitions. [2024-11-13 14:51:22,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states and 251 transitions. [2024-11-13 14:51:22,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 99. [2024-11-13 14:51:22,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.2525252525252526) internal successors, (124), 98 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:22,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 124 transitions. [2024-11-13 14:51:22,333 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 124 transitions. [2024-11-13 14:51:22,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-13 14:51:22,335 INFO L424 stractBuchiCegarLoop]: Abstraction has 99 states and 124 transitions. [2024-11-13 14:51:22,335 INFO L331 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-13 14:51:22,335 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 124 transitions. [2024-11-13 14:51:22,336 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:22,336 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:22,336 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:22,339 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 21, 21, 1, 1, 1, 1] [2024-11-13 14:51:22,339 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:22,339 INFO L745 eck$LassoCheckResult]: Stem: 1052#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 1046#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 1047#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1053#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1054#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1092#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1090#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1088#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1086#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1084#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1082#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1080#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1078#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1076#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1074#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1072#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1070#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1068#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1066#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1064#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1063#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1061#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1058#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1057#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 1056#L21-2 assume !(main_~i~0#1 < 100000); 1040#L21-3 main_~i~0#1 := 0; 1041#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1049#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1044#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1045#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1050#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1051#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1136#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1135#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1134#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1133#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1132#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1131#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1130#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1129#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1128#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1127#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1126#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1125#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1124#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1123#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1122#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1121#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1120#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1119#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1118#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1117#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1116#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1115#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1114#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1113#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1112#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1111#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1110#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1109#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1108#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1107#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1106#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1105#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1104#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1103#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1102#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1101#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1100#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1099#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1098#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1097#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1096#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1095#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1094#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1093#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1091#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1089#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1087#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1085#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1083#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1081#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1079#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1077#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1075#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1073#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1071#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1069#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 1067#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1065#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1060#L28 [2024-11-13 14:51:22,340 INFO L747 eck$LassoCheckResult]: Loop: 1060#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 1062#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1059#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 1060#L28 [2024-11-13 14:51:22,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:22,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1430723751, now seen corresponding path program 3 times [2024-11-13 14:51:22,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:22,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640144798] [2024-11-13 14:51:22,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:22,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:22,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:23,638 INFO L134 CoverageAnalysis]: Checked inductivity of 904 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-11-13 14:51:23,638 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:23,638 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640144798] [2024-11-13 14:51:23,638 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1640144798] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:23,639 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490611308] [2024-11-13 14:51:23,639 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 14:51:23,639 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:23,639 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:23,642 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:23,645 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2024-11-13 14:51:28,596 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2024-11-13 14:51:28,596 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 14:51:28,603 INFO L255 TraceCheckSpWp]: Trace formula consists of 518 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-13 14:51:28,608 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:28,720 INFO L134 CoverageAnalysis]: Checked inductivity of 904 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-11-13 14:51:28,720 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 14:51:29,762 INFO L134 CoverageAnalysis]: Checked inductivity of 904 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 651 trivial. 0 not checked. [2024-11-13 14:51:29,762 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1490611308] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 14:51:29,762 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 14:51:29,762 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 49 [2024-11-13 14:51:29,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [26087785] [2024-11-13 14:51:29,762 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 14:51:29,763 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:29,763 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:29,763 INFO L85 PathProgramCache]: Analyzing trace with hash 54737, now seen corresponding path program 5 times [2024-11-13 14:51:29,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:29,764 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506083000] [2024-11-13 14:51:29,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:29,764 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:29,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:29,773 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1528899501] [2024-11-13 14:51:29,773 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-13 14:51:29,773 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:29,773 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:29,776 INFO L229 MonitoredProcess]: Starting monitored process 21 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:29,780 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2024-11-13 14:51:29,847 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-13 14:51:29,847 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-13 14:51:29,847 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:29,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:29,856 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:29,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:29,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2024-11-13 14:51:29,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2024-11-13 14:51:29,993 INFO L87 Difference]: Start difference. First operand 99 states and 124 transitions. cyclomatic complexity: 28 Second operand has 49 states, 49 states have (on average 1.1224489795918366) internal successors, (55), 49 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:31,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:31,251 INFO L93 Difference]: Finished difference Result 421 states and 515 transitions. [2024-11-13 14:51:31,251 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 421 states and 515 transitions. [2024-11-13 14:51:31,258 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:31,261 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 421 states to 421 states and 515 transitions. [2024-11-13 14:51:31,262 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 375 [2024-11-13 14:51:31,262 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 375 [2024-11-13 14:51:31,262 INFO L73 IsDeterministic]: Start isDeterministic. Operand 421 states and 515 transitions. [2024-11-13 14:51:31,264 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:31,264 INFO L218 hiAutomatonCegarLoop]: Abstraction has 421 states and 515 transitions. [2024-11-13 14:51:31,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states and 515 transitions. [2024-11-13 14:51:31,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 195. [2024-11-13 14:51:31,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.2512820512820513) internal successors, (244), 194 states have internal predecessors, (244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:31,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 244 transitions. [2024-11-13 14:51:31,288 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 244 transitions. [2024-11-13 14:51:31,289 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-11-13 14:51:31,290 INFO L424 stractBuchiCegarLoop]: Abstraction has 195 states and 244 transitions. [2024-11-13 14:51:31,290 INFO L331 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-13 14:51:31,290 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 244 transitions. [2024-11-13 14:51:31,291 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:31,292 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:31,292 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:31,296 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 45, 45, 1, 1, 1, 1] [2024-11-13 14:51:31,296 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:31,297 INFO L745 eck$LassoCheckResult]: Stem: 2158#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 2152#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 2153#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2159#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2160#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2246#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2244#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2242#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2240#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2238#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2236#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2234#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2232#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2230#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2228#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2226#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2224#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2222#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2220#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2218#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2216#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2214#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2212#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2210#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2208#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2206#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2204#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2202#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2200#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2198#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2196#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2194#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2192#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2190#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2188#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2186#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2184#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2182#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2180#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2178#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2176#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2174#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2172#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2170#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2169#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2167#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2164#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2163#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 2162#L21-2 assume !(main_~i~0#1 < 100000); 2146#L21-3 main_~i~0#1 := 0; 2147#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2155#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2150#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2151#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2156#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2157#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2338#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2337#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2336#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2335#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2334#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2333#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2332#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2331#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2330#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2329#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2328#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2327#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2326#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2325#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2324#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2323#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2322#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2321#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2320#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2319#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2318#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2317#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2316#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2315#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2314#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2313#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2312#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2311#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2310#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2309#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2308#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2307#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2306#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2305#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2304#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2303#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2302#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2301#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2300#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2299#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2298#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2297#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2296#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2295#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2294#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2293#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2292#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2291#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2290#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2289#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2288#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2287#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2286#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2285#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2284#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2283#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2282#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2281#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2280#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2279#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2278#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2277#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2276#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2275#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2274#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2273#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2272#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2271#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2270#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2269#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2268#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2267#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2266#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2265#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2264#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2263#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2262#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2261#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2260#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2259#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2258#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2257#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2256#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2255#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2254#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2253#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2252#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2251#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2250#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2249#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2248#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2247#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2245#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2243#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2241#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2239#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2237#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2235#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2233#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2231#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2229#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2227#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2225#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2223#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2221#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2219#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2217#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2215#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2213#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2211#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2209#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2207#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2205#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2203#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2201#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2199#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2197#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2195#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2193#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2191#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2189#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2187#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2185#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2183#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2181#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2179#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2177#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2175#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 2173#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2171#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2166#L28 [2024-11-13 14:51:31,297 INFO L747 eck$LassoCheckResult]: Loop: 2166#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 2168#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2165#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 2166#L28 [2024-11-13 14:51:31,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:31,298 INFO L85 PathProgramCache]: Analyzing trace with hash 531606951, now seen corresponding path program 4 times [2024-11-13 14:51:31,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:31,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270224556] [2024-11-13 14:51:31,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:31,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:31,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:35,360 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-11-13 14:51:35,360 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:35,360 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270224556] [2024-11-13 14:51:35,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270224556] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:35,361 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [424761976] [2024-11-13 14:51:35,361 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-13 14:51:35,361 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:35,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:35,364 INFO L229 MonitoredProcess]: Starting monitored process 22 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:35,369 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2024-11-13 14:51:35,768 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-13 14:51:35,768 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 14:51:35,773 INFO L255 TraceCheckSpWp]: Trace formula consists of 1144 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-11-13 14:51:35,779 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 14:51:35,953 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-11-13 14:51:35,953 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 14:51:39,667 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 3015 trivial. 0 not checked. [2024-11-13 14:51:39,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [424761976] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 14:51:39,668 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 14:51:39,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 97 [2024-11-13 14:51:39,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [644348703] [2024-11-13 14:51:39,668 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 14:51:39,669 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-13 14:51:39,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:39,669 INFO L85 PathProgramCache]: Analyzing trace with hash 54737, now seen corresponding path program 6 times [2024-11-13 14:51:39,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:39,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905373489] [2024-11-13 14:51:39,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:39,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:39,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 14:51:39,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [443774989] [2024-11-13 14:51:39,679 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-13 14:51:39,679 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:39,680 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:39,682 INFO L229 MonitoredProcess]: Starting monitored process 23 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:39,684 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2024-11-13 14:51:39,764 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2024-11-13 14:51:39,764 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-13 14:51:39,764 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 14:51:39,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 14:51:39,772 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 14:51:39,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 14:51:39,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2024-11-13 14:51:39,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4656, Invalid=4656, Unknown=0, NotChecked=0, Total=9312 [2024-11-13 14:51:39,930 INFO L87 Difference]: Start difference. First operand 195 states and 244 transitions. cyclomatic complexity: 52 Second operand has 97 states, 97 states have (on average 1.0618556701030928) internal successors, (103), 97 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:44,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 14:51:44,802 INFO L93 Difference]: Finished difference Result 853 states and 1043 transitions. [2024-11-13 14:51:44,802 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 853 states and 1043 transitions. [2024-11-13 14:51:44,814 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:44,822 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 853 states to 853 states and 1043 transitions. [2024-11-13 14:51:44,822 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 759 [2024-11-13 14:51:44,823 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 759 [2024-11-13 14:51:44,823 INFO L73 IsDeterministic]: Start isDeterministic. Operand 853 states and 1043 transitions. [2024-11-13 14:51:44,828 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-13 14:51:44,829 INFO L218 hiAutomatonCegarLoop]: Abstraction has 853 states and 1043 transitions. [2024-11-13 14:51:44,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 853 states and 1043 transitions. [2024-11-13 14:51:44,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 853 to 387. [2024-11-13 14:51:44,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 387 states, 387 states have (on average 1.2506459948320414) internal successors, (484), 386 states have internal predecessors, (484), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-13 14:51:44,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 387 states to 387 states and 484 transitions. [2024-11-13 14:51:44,851 INFO L240 hiAutomatonCegarLoop]: Abstraction has 387 states and 484 transitions. [2024-11-13 14:51:44,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-11-13 14:51:44,857 INFO L424 stractBuchiCegarLoop]: Abstraction has 387 states and 484 transitions. [2024-11-13 14:51:44,857 INFO L331 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-13 14:51:44,857 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 387 states and 484 transitions. [2024-11-13 14:51:44,862 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2024-11-13 14:51:44,862 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-13 14:51:44,862 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-13 14:51:44,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 93, 93, 1, 1, 1, 1] [2024-11-13 14:51:44,869 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-13 14:51:44,870 INFO L745 eck$LassoCheckResult]: Stem: 4416#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2); 4410#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~post1#1, main_#t~nondet2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem9#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~short10#1, main_#t~post11#1, main_~#a~0#1.base, main_~#a~0#1.offset, main_~#b~0#1.base, main_~#b~0#1.offset, main_~k~0#1, main_~i~0#1;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(400000);call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(400000);havoc main_~k~0#1;havoc main_~i~0#1;main_~i~0#1 := 0; 4411#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4417#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4418#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4600#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4598#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4596#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4594#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4592#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4590#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4588#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4586#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4584#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4582#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4580#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4578#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4576#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4574#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4572#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4570#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4568#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4566#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4564#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4562#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4560#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4558#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4556#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4554#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4552#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4550#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4548#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4546#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4544#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4542#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4540#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4538#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4536#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4534#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4532#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4530#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4528#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4526#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4524#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4522#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4520#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4518#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4516#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4514#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4512#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4510#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4508#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4506#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4504#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4502#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4500#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4498#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4496#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4494#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4492#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4490#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4488#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4486#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4484#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4482#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4480#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4478#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4476#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4474#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4472#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4470#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4468#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4466#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4464#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4462#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4460#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4458#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4456#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4454#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4452#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4450#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4448#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4446#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4444#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4442#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4440#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4438#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4436#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4434#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4432#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4430#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4428#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4427#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4425#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4422#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4421#L21-2 assume !!(main_~i~0#1 < 100000);call write~int#2(main_~i~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~i~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4);main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1; 4420#L21-2 assume !(main_~i~0#1 < 100000); 4404#L21-3 main_~i~0#1 := 0; 4405#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4413#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4408#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4409#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4414#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4415#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4788#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4787#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4786#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4785#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4784#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4783#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4782#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4781#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4780#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4779#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4778#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4777#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4776#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4775#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4774#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4773#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4772#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4771#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4770#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4769#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4768#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4767#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4766#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4765#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4764#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4763#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4762#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4761#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4760#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4759#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4758#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4757#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4756#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4755#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4754#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4753#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4752#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4751#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4750#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4749#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4748#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4747#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4746#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4745#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4744#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4743#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4742#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4741#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4740#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4739#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4738#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4737#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4736#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4735#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4734#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4733#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4732#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4731#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4730#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4729#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4728#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4727#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4726#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4725#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4724#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4723#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4722#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4721#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4720#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4719#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4718#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4717#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4716#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4715#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4714#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4713#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4712#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4711#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4710#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4709#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4708#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4707#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4706#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4705#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4704#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4703#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4702#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4701#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4700#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4699#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4698#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4697#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4696#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4695#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4694#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4693#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4692#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4691#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4690#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4689#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4688#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4687#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4686#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4685#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4684#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4683#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4682#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4681#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4680#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4679#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4678#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4677#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4676#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4675#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4674#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4673#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4672#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4671#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4670#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4669#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4668#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4667#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4666#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4665#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4664#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4663#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4662#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4661#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4660#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4659#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4658#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4657#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4656#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4655#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4654#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4653#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4652#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4651#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4650#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4649#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4648#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4647#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4646#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4645#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4644#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4643#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4642#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4641#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4640#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4639#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4638#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4637#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4636#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4635#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4634#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4633#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4632#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4631#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4630#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4629#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4628#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4627#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4626#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4625#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4624#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4623#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4622#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4621#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4620#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4619#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4618#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4617#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4616#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4615#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4614#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4613#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4612#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4611#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4610#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4609#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4608#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4607#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4606#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4605#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4604#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4603#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4602#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4601#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4599#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4597#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4595#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4593#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4591#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4589#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4587#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4585#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4583#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4581#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4579#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4577#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4575#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4573#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4571#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4569#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4567#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4565#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4563#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4561#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4559#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4557#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4555#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4553#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4551#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4549#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4547#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4545#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4543#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4541#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4539#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4537#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4535#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4533#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4531#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4529#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4527#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4525#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4523#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4521#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4519#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4517#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4515#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4513#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4511#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4509#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4507#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4505#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4503#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4501#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4499#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4497#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4495#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4493#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4491#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4489#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4487#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4485#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4483#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4481#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4479#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4477#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4475#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4473#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4471#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4469#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4467#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4465#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4463#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4461#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4459#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4457#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4455#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4453#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4451#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4449#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4447#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4445#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4443#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4441#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4439#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4437#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4435#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4433#L28 assume !(0 != main_#t~nondet2#1);havoc main_#t~nondet2#1; 4431#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4429#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4424#L28 [2024-11-13 14:51:44,870 INFO L747 eck$LassoCheckResult]: Loop: 4424#L28 assume 0 != main_#t~nondet2#1;havoc main_#t~nondet2#1;havoc main_#t~nondet3#1;main_~k~0#1 := main_#t~nondet3#1;havoc main_#t~nondet3#1;call write~int#2(main_~k~0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);call write~int#1(main_~k~0#1 * main_~k~0#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~0#1, 4); 4426#L28-2 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 4423#L26-2 assume !!(main_~i~0#1 < 100000);havoc main_#t~nondet2#1; 4424#L28 [2024-11-13 14:51:44,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 14:51:44,871 INFO L85 PathProgramCache]: Analyzing trace with hash 1047383975, now seen corresponding path program 5 times [2024-11-13 14:51:44,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 14:51:44,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811731419] [2024-11-13 14:51:44,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 14:51:44,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 14:51:45,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 14:51:55,040 INFO L134 CoverageAnalysis]: Checked inductivity of 17392 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 12927 trivial. 0 not checked. [2024-11-13 14:51:55,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 14:51:55,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811731419] [2024-11-13 14:51:55,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [811731419] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 14:51:55,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [548076927] [2024-11-13 14:51:55,040 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-13 14:51:55,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 14:51:55,040 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 14:51:55,042 INFO L229 MonitoredProcess]: Starting monitored process 24 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 14:51:55,044 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_56ac44fb-c4bb-46dd-b93b-0190d45f71a5/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process