./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 16:23:07,698 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 16:23:07,785 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-13 16:23:07,791 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 16:23:07,792 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 16:23:07,824 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 16:23:07,825 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 16:23:07,825 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 16:23:07,825 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 16:23:07,826 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 16:23:07,826 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 16:23:07,827 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 16:23:07,827 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 16:23:07,827 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 16:23:07,828 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 16:23:07,828 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 16:23:07,828 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 16:23:07,828 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 16:23:07,829 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 16:23:07,829 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 16:23:07,830 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 16:23:07,830 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 16:23:07,830 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 16:23:07,830 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 16:23:07,831 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 16:23:07,831 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 16:23:07,831 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 16:23:07,831 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-13 16:23:07,831 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-13 16:23:07,831 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 16:23:07,832 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 16:23:07,832 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 16:23:07,832 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 16:23:07,832 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa [2024-11-13 16:23:08,183 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 16:23:08,199 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 16:23:08,201 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 16:23:08,204 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 16:23:08,204 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 16:23:08,207 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c Unable to find full path for "g++" [2024-11-13 16:23:10,555 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 16:23:10,938 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 16:23:10,939 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-13 16:23:10,950 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/f1f6d1344/ad41d9de39dd40afb235a29df39ae488/FLAG8498b2d63 [2024-11-13 16:23:10,966 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/f1f6d1344/ad41d9de39dd40afb235a29df39ae488 [2024-11-13 16:23:10,969 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 16:23:10,971 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 16:23:10,973 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 16:23:10,973 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 16:23:10,980 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 16:23:10,981 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 04:23:10" (1/1) ... [2024-11-13 16:23:10,982 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@589be95f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:10, skipping insertion in model container [2024-11-13 16:23:10,983 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 04:23:10" (1/1) ... [2024-11-13 16:23:11,024 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 16:23:11,192 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-13 16:23:11,439 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 16:23:11,452 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 16:23:11,465 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-13 16:23:11,672 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 16:23:11,691 INFO L204 MainTranslator]: Completed translation [2024-11-13 16:23:11,692 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11 WrapperNode [2024-11-13 16:23:11,692 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 16:23:11,693 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 16:23:11,694 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 16:23:11,694 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 16:23:11,702 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:11,748 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:11,983 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-13 16:23:11,984 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 16:23:11,985 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 16:23:11,985 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 16:23:11,985 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 16:23:11,998 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:11,999 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,038 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,119 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 16:23:12,119 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,119 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,191 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,212 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,236 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,250 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,328 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 16:23:12,330 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 16:23:12,330 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 16:23:12,330 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 16:23:12,332 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (1/1) ... [2024-11-13 16:23:12,343 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 16:23:12,361 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:23:12,379 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 16:23:12,384 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 16:23:12,418 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 16:23:12,419 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 16:23:12,419 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 16:23:12,419 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-13 16:23:12,419 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 16:23:12,419 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 16:23:12,769 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 16:23:12,771 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 16:23:15,478 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-13 16:23:15,478 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 16:23:15,514 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 16:23:15,515 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 16:23:15,515 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 04:23:15 BoogieIcfgContainer [2024-11-13 16:23:15,515 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 16:23:15,518 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 16:23:15,519 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 16:23:15,524 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 16:23:15,525 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 04:23:10" (1/3) ... [2024-11-13 16:23:15,525 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c697fe8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 04:23:15, skipping insertion in model container [2024-11-13 16:23:15,526 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:23:11" (2/3) ... [2024-11-13 16:23:15,526 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c697fe8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 04:23:15, skipping insertion in model container [2024-11-13 16:23:15,526 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 04:23:15" (3/3) ... [2024-11-13 16:23:15,529 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-13 16:23:15,550 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 16:23:15,552 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 16:23:15,661 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 16:23:15,679 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@614f5a1b, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 16:23:15,679 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 16:23:15,689 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:15,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 16:23:15,706 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:15,708 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:15,708 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:15,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:15,714 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-13 16:23:15,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:15,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475444621] [2024-11-13 16:23:15,725 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:15,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:15,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:16,320 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:16,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:16,339 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:16,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:16,344 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:16,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:16,364 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:16,367 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:16,367 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475444621] [2024-11-13 16:23:16,368 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475444621] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:16,368 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:16,368 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-13 16:23:16,370 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094800093] [2024-11-13 16:23:16,375 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:16,382 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-13 16:23:16,384 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:16,412 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-13 16:23:16,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 16:23:16,417 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:16,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:16,508 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-13 16:23:16,511 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-13 16:23:16,513 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-13 16:23:16,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:16,530 INFO L225 Difference]: With dead ends: 711 [2024-11-13 16:23:16,531 INFO L226 Difference]: Without dead ends: 389 [2024-11-13 16:23:16,539 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 16:23:16,544 INFO L432 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:16,545 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:23:16,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-13 16:23:16,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-13 16:23:16,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:16,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-13 16:23:16,655 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-13 16:23:16,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:16,658 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-13 16:23:16,658 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:16,659 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-13 16:23:16,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 16:23:16,668 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:16,669 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:16,669 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-13 16:23:16,672 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:16,672 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:16,673 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-13 16:23:16,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:16,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1971149117] [2024-11-13 16:23:16,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:16,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:17,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:18,259 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:18,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:18,268 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:18,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:18,272 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:18,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:18,279 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:18,279 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:18,279 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1971149117] [2024-11-13 16:23:18,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1971149117] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:18,279 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:18,280 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:18,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726417339] [2024-11-13 16:23:18,281 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:18,282 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:18,283 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:18,283 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:18,284 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:18,285 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:18,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:18,384 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-13 16:23:18,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:18,388 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-13 16:23:18,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:18,395 INFO L225 Difference]: With dead ends: 393 [2024-11-13 16:23:18,395 INFO L226 Difference]: Without dead ends: 391 [2024-11-13 16:23:18,396 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:18,397 INFO L432 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:18,397 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:23:18,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-13 16:23:18,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-13 16:23:18,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:18,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-13 16:23:18,438 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-13 16:23:18,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:18,440 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-13 16:23:18,440 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:18,441 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-13 16:23:18,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-13 16:23:18,447 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:18,447 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:18,447 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-13 16:23:18,447 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:18,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:18,448 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-13 16:23:18,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:18,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886773933] [2024-11-13 16:23:18,448 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:18,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:18,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:19,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:19,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:19,288 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:19,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:19,295 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:19,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:19,309 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:19,310 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:19,310 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886773933] [2024-11-13 16:23:19,310 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [886773933] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:19,310 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:19,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:19,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995077645] [2024-11-13 16:23:19,311 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:19,311 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:19,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:19,312 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:19,312 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:19,312 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:20,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:20,070 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-13 16:23:20,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:23:20,072 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-13 16:23:20,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:20,076 INFO L225 Difference]: With dead ends: 971 [2024-11-13 16:23:20,077 INFO L226 Difference]: Without dead ends: 391 [2024-11-13 16:23:20,080 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-13 16:23:20,081 INFO L432 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:20,084 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 16:23:20,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-13 16:23:20,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-13 16:23:20,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:20,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-13 16:23:20,129 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-13 16:23:20,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:20,130 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-13 16:23:20,130 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:20,130 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-13 16:23:20,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-13 16:23:20,136 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:20,136 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:20,136 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-13 16:23:20,137 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:20,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:20,138 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-13 16:23:20,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:20,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640234484] [2024-11-13 16:23:20,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:20,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:20,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:20,836 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:20,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:20,839 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:20,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:20,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:20,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:20,848 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:20,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:20,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640234484] [2024-11-13 16:23:20,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1640234484] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:20,849 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:20,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:20,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010126973] [2024-11-13 16:23:20,849 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:20,850 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:20,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:20,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:20,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:20,853 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:20,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:20,921 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-13 16:23:20,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:20,922 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-13 16:23:20,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:20,926 INFO L225 Difference]: With dead ends: 714 [2024-11-13 16:23:20,926 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:20,927 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:20,931 INFO L432 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:20,931 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:23:20,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:20,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:20,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:20,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-13 16:23:20,958 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-13 16:23:20,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:20,958 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-13 16:23:20,961 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:20,961 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-13 16:23:20,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-13 16:23:20,963 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:20,963 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:20,964 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-13 16:23:20,964 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:20,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:20,965 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-13 16:23:20,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:20,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664426408] [2024-11-13 16:23:20,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:20,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:21,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:21,687 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:21,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:21,698 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:21,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:21,705 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:21,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:21,713 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:21,714 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:21,714 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664426408] [2024-11-13 16:23:21,714 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [664426408] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:21,714 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:21,714 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:21,715 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364237062] [2024-11-13 16:23:21,715 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:21,715 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:21,716 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:21,716 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:21,717 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:21,717 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:21,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:21,839 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-13 16:23:21,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:21,840 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-13 16:23:21,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:21,843 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:21,843 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:21,844 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:21,845 INFO L432 NwaCegarLoop]: 554 mSDtfsCounter, 487 mSDsluCounter, 556 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 487 SdHoareTripleChecker+Valid, 1110 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:21,847 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [487 Valid, 1110 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:21,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:21,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:21,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:21,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-13 16:23:21,868 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 120 [2024-11-13 16:23:21,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:21,869 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-13 16:23:21,870 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:21,870 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-13 16:23:21,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-13 16:23:21,872 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:21,873 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:21,876 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-13 16:23:21,876 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:21,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:21,877 INFO L85 PathProgramCache]: Analyzing trace with hash -1008433679, now seen corresponding path program 1 times [2024-11-13 16:23:21,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:21,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078959831] [2024-11-13 16:23:21,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:21,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:22,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:22,410 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:22,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:22,415 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:22,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:22,421 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:22,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:22,426 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:22,426 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:22,426 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078959831] [2024-11-13 16:23:22,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078959831] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:22,426 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:22,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:22,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427416998] [2024-11-13 16:23:22,427 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:22,427 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:22,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:22,428 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:22,428 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:22,429 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:22,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:22,545 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-13 16:23:22,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:22,546 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-13 16:23:22,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:22,550 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:22,551 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:22,552 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:22,553 INFO L432 NwaCegarLoop]: 554 mSDtfsCounter, 1041 mSDsluCounter, 556 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1044 SdHoareTripleChecker+Valid, 1110 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:22,556 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1044 Valid, 1110 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:22,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:22,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:22,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:22,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-13 16:23:22,585 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-13 16:23:22,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:22,587 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-13 16:23:22,588 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:22,588 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-13 16:23:22,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-13 16:23:22,590 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:22,590 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:22,590 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-13 16:23:22,590 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:22,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:22,591 INFO L85 PathProgramCache]: Analyzing trace with hash 830697491, now seen corresponding path program 1 times [2024-11-13 16:23:22,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:22,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [906671108] [2024-11-13 16:23:22,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:22,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:22,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:23,532 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:23,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:23,544 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:23,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:23,550 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:23,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:23,559 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:23,559 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:23,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [906671108] [2024-11-13 16:23:23,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [906671108] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:23,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:23,560 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:23,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1941185917] [2024-11-13 16:23:23,560 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:23,560 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:23,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:23,561 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:23,561 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:23,562 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:23,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:23,761 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-13 16:23:23,762 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:23,762 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-13 16:23:23,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:23,765 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:23,765 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:23,767 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:23,771 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 478 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 478 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:23,771 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [478 Valid, 1064 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:23,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:23,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:23,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:23,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-13 16:23:23,803 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-13 16:23:23,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:23,803 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-13 16:23:23,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:23,804 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-13 16:23:23,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-13 16:23:23,805 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:23,806 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:23,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-13 16:23:23,806 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:23,807 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:23,807 INFO L85 PathProgramCache]: Analyzing trace with hash 1226913834, now seen corresponding path program 1 times [2024-11-13 16:23:23,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:23,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [717540568] [2024-11-13 16:23:23,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:23,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:23,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:24,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:24,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:24,335 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:24,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:24,339 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:24,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:24,344 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:24,345 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:24,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [717540568] [2024-11-13 16:23:24,345 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [717540568] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:24,345 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:24,345 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:24,345 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1777831921] [2024-11-13 16:23:24,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:24,346 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:24,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:24,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:24,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:24,347 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:24,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:24,539 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions. [2024-11-13 16:23:24,540 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:24,540 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-13 16:23:24,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:24,543 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:24,543 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:24,544 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:24,545 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 560 mSDsluCounter, 540 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 563 SdHoareTripleChecker+Valid, 1071 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:24,546 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [563 Valid, 1071 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:24,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:24,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:24,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4664948453608246) internal successors, (569), 388 states have internal predecessors, (569), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:24,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 575 transitions. [2024-11-13 16:23:24,564 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 575 transitions. Word has length 124 [2024-11-13 16:23:24,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:24,564 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 575 transitions. [2024-11-13 16:23:24,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:24,565 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 575 transitions. [2024-11-13 16:23:24,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2024-11-13 16:23:24,566 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:24,567 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:24,567 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-13 16:23:24,567 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:24,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:24,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1835076396, now seen corresponding path program 1 times [2024-11-13 16:23:24,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:24,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103114309] [2024-11-13 16:23:24,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:24,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:24,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,072 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:25,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,078 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:25,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,082 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:25,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,087 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:25,087 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:25,087 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103114309] [2024-11-13 16:23:25,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1103114309] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:25,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:25,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:25,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2054183391] [2024-11-13 16:23:25,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:25,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:25,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:25,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:25,089 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:25,090 INFO L87 Difference]: Start difference. First operand 393 states and 575 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:25,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:25,275 INFO L93 Difference]: Finished difference Result 716 states and 1046 transitions. [2024-11-13 16:23:25,276 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:25,276 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125 [2024-11-13 16:23:25,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:25,279 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:25,279 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:25,280 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:25,281 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 1024 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1027 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:25,281 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1027 Valid, 1064 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:25,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:25,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:25,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:25,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions. [2024-11-13 16:23:25,298 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 125 [2024-11-13 16:23:25,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:25,299 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions. [2024-11-13 16:23:25,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:25,299 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions. [2024-11-13 16:23:25,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-13 16:23:25,301 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:25,301 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:25,301 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-13 16:23:25,301 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:25,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:25,302 INFO L85 PathProgramCache]: Analyzing trace with hash 130738915, now seen corresponding path program 1 times [2024-11-13 16:23:25,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:25,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945017007] [2024-11-13 16:23:25,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:25,302 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:25,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,783 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:25,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,790 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:25,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:25,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:25,800 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:25,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:25,801 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945017007] [2024-11-13 16:23:25,801 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [945017007] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:25,801 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:25,801 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:25,801 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [343732653] [2024-11-13 16:23:25,801 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:25,802 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:25,802 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:25,803 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:25,803 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:25,803 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:25,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:25,994 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-13 16:23:25,994 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:25,994 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126 [2024-11-13 16:23:25,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:25,997 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:25,997 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:25,998 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:25,999 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 1016 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1019 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:26,000 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1019 Valid, 1064 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:26,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:26,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:26,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:26,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions. [2024-11-13 16:23:26,017 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126 [2024-11-13 16:23:26,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:26,017 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions. [2024-11-13 16:23:26,018 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:26,018 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions. [2024-11-13 16:23:26,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-13 16:23:26,020 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:26,020 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:26,020 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-13 16:23:26,021 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:26,024 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:26,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1413439803, now seen corresponding path program 1 times [2024-11-13 16:23:26,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:26,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672245858] [2024-11-13 16:23:26,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:26,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:26,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:26,690 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:26,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:26,696 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 16:23:26,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:26,699 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 16:23:26,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:26,703 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:26,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:26,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672245858] [2024-11-13 16:23:26,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1672245858] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:26,703 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:26,704 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:26,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [223018777] [2024-11-13 16:23:26,704 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:26,704 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:26,704 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:26,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:26,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:26,705 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:26,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:26,822 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions. [2024-11-13 16:23:26,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:26,823 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 127 [2024-11-13 16:23:26,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:26,825 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:26,825 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:26,826 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:26,827 INFO L432 NwaCegarLoop]: 553 mSDtfsCounter, 518 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:26,827 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1108 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:26,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:26,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:26,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:26,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions. [2024-11-13 16:23:26,845 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127 [2024-11-13 16:23:26,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:26,845 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions. [2024-11-13 16:23:26,845 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:26,845 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions. [2024-11-13 16:23:26,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-13 16:23:26,847 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:26,847 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:26,848 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-13 16:23:26,848 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:26,848 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:26,848 INFO L85 PathProgramCache]: Analyzing trace with hash -12372935, now seen corresponding path program 1 times [2024-11-13 16:23:26,848 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:26,848 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147172906] [2024-11-13 16:23:26,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:26,849 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:27,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:27,711 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:27,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:27,720 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 16:23:27,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:27,730 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 16:23:27,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:27,740 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:27,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:27,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147172906] [2024-11-13 16:23:27,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147172906] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:27,740 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:27,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:27,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [733076378] [2024-11-13 16:23:27,741 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:27,741 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:27,741 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:27,742 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:27,742 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:27,742 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:27,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:27,938 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions. [2024-11-13 16:23:27,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:27,939 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-13 16:23:27,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:27,941 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:27,941 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:27,944 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:27,944 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:27,945 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:27,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:27,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:27,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:27,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2024-11-13 16:23:27,964 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128 [2024-11-13 16:23:27,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:27,965 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions. [2024-11-13 16:23:27,965 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:27,966 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions. [2024-11-13 16:23:27,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-13 16:23:27,968 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:27,968 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:27,968 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-13 16:23:27,969 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:27,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:27,970 INFO L85 PathProgramCache]: Analyzing trace with hash -1411160021, now seen corresponding path program 1 times [2024-11-13 16:23:27,970 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:27,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809584686] [2024-11-13 16:23:27,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:27,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:28,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:28,730 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:28,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:28,736 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 16:23:28,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:28,745 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 16:23:28,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:28,756 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:28,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:28,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809584686] [2024-11-13 16:23:28,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1809584686] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:28,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:28,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:28,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607692443] [2024-11-13 16:23:28,758 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:28,759 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:28,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:28,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:28,759 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:28,760 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:28,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:28,998 INFO L93 Difference]: Finished difference Result 716 states and 1038 transitions. [2024-11-13 16:23:28,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:28,999 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-13 16:23:29,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:29,002 INFO L225 Difference]: With dead ends: 716 [2024-11-13 16:23:29,002 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 16:23:29,003 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:29,004 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 469 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 469 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:29,004 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [469 Valid, 1069 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 16:23:29,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 16:23:29,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 16:23:29,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:29,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-13 16:23:29,025 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129 [2024-11-13 16:23:29,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:29,026 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-13 16:23:29,026 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:29,026 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-13 16:23:29,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-13 16:23:29,028 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:29,028 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:29,028 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-13 16:23:29,028 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:29,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:29,029 INFO L85 PathProgramCache]: Analyzing trace with hash -970409222, now seen corresponding path program 1 times [2024-11-13 16:23:29,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:29,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482382970] [2024-11-13 16:23:29,029 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:29,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:29,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:30,043 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:30,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:30,046 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 16:23:30,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:30,052 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 16:23:30,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:30,057 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:30,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:30,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482382970] [2024-11-13 16:23:30,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1482382970] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:30,058 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:30,058 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:30,058 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1423119944] [2024-11-13 16:23:30,058 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:30,058 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:30,058 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:30,059 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:30,059 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:30,059 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:30,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:30,442 INFO L93 Difference]: Finished difference Result 722 states and 1044 transitions. [2024-11-13 16:23:30,443 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 16:23:30,443 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-13 16:23:30,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:30,446 INFO L225 Difference]: With dead ends: 722 [2024-11-13 16:23:30,447 INFO L226 Difference]: Without dead ends: 397 [2024-11-13 16:23:30,448 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:30,449 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 2 mSDsluCounter, 1527 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2087 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:30,449 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2087 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 16:23:30,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2024-11-13 16:23:30,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 395. [2024-11-13 16:23:30,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4512820512820512) internal successors, (566), 390 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:30,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 572 transitions. [2024-11-13 16:23:30,471 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 572 transitions. Word has length 130 [2024-11-13 16:23:30,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:30,471 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 572 transitions. [2024-11-13 16:23:30,472 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:30,473 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 572 transitions. [2024-11-13 16:23:30,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-13 16:23:30,474 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:30,474 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:30,475 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-13 16:23:30,475 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:30,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:30,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1963964559, now seen corresponding path program 1 times [2024-11-13 16:23:30,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:30,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839502387] [2024-11-13 16:23:30,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:30,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:30,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,161 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:31,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,167 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 16:23:31,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,172 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 16:23:31,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,178 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:31,179 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:31,179 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839502387] [2024-11-13 16:23:31,179 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [839502387] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:31,179 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:31,179 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:31,179 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61333005] [2024-11-13 16:23:31,179 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:31,180 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:31,180 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:31,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:31,180 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:31,181 INFO L87 Difference]: Start difference. First operand 395 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:31,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:31,403 INFO L93 Difference]: Finished difference Result 720 states and 1040 transitions. [2024-11-13 16:23:31,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:31,404 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131 [2024-11-13 16:23:31,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:31,407 INFO L225 Difference]: With dead ends: 720 [2024-11-13 16:23:31,407 INFO L226 Difference]: Without dead ends: 395 [2024-11-13 16:23:31,407 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:31,408 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 467 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 467 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:31,408 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [467 Valid, 1069 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 16:23:31,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2024-11-13 16:23:31,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2024-11-13 16:23:31,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4487179487179487) internal successors, (565), 390 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:31,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 571 transitions. [2024-11-13 16:23:31,431 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 571 transitions. Word has length 131 [2024-11-13 16:23:31,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:31,432 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 571 transitions. [2024-11-13 16:23:31,432 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:31,432 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 571 transitions. [2024-11-13 16:23:31,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-13 16:23:31,434 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:31,434 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:31,434 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-13 16:23:31,435 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:31,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:31,435 INFO L85 PathProgramCache]: Analyzing trace with hash -1513937355, now seen corresponding path program 1 times [2024-11-13 16:23:31,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:31,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744743800] [2024-11-13 16:23:31,436 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:31,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:31,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:31,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,879 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 16:23:31,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,882 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 16:23:31,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:31,888 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:31,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:31,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744743800] [2024-11-13 16:23:31,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744743800] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:31,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:31,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:31,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807965330] [2024-11-13 16:23:31,889 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:31,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:31,890 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:31,891 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:31,891 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:31,891 INFO L87 Difference]: Start difference. First operand 395 states and 571 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:32,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:32,011 INFO L93 Difference]: Finished difference Result 720 states and 1038 transitions. [2024-11-13 16:23:32,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:32,012 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132 [2024-11-13 16:23:32,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:32,014 INFO L225 Difference]: With dead ends: 720 [2024-11-13 16:23:32,015 INFO L226 Difference]: Without dead ends: 395 [2024-11-13 16:23:32,015 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:32,016 INFO L432 NwaCegarLoop]: 550 mSDtfsCounter, 513 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:32,016 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1102 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:32,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2024-11-13 16:23:32,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2024-11-13 16:23:32,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 390 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:32,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 570 transitions. [2024-11-13 16:23:32,035 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 570 transitions. Word has length 132 [2024-11-13 16:23:32,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:32,036 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 570 transitions. [2024-11-13 16:23:32,036 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 16:23:32,036 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 570 transitions. [2024-11-13 16:23:32,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-13 16:23:32,038 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:32,038 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:32,038 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-13 16:23:32,039 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:32,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:32,039 INFO L85 PathProgramCache]: Analyzing trace with hash -946071650, now seen corresponding path program 1 times [2024-11-13 16:23:32,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:32,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125113673] [2024-11-13 16:23:32,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:32,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:32,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:33,010 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:33,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:33,012 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 16:23:33,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:33,016 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 16:23:33,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:33,018 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:33,020 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:33,021 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125113673] [2024-11-13 16:23:33,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125113673] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:33,021 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:33,021 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:33,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833357246] [2024-11-13 16:23:33,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:33,022 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:33,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:33,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:33,024 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:33,025 INFO L87 Difference]: Start difference. First operand 395 states and 570 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:33,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:33,108 INFO L93 Difference]: Finished difference Result 766 states and 1093 transitions. [2024-11-13 16:23:33,108 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 16:23:33,109 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-13 16:23:33,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:33,111 INFO L225 Difference]: With dead ends: 766 [2024-11-13 16:23:33,112 INFO L226 Difference]: Without dead ends: 441 [2024-11-13 16:23:33,112 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:33,113 INFO L432 NwaCegarLoop]: 558 mSDtfsCounter, 19 mSDsluCounter, 1665 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:33,114 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 2223 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:33,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2024-11-13 16:23:33,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439. [2024-11-13 16:23:33,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4216589861751152) internal successors, (617), 434 states have internal predecessors, (617), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:33,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 623 transitions. [2024-11-13 16:23:33,136 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 623 transitions. Word has length 133 [2024-11-13 16:23:33,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:33,136 INFO L471 AbstractCegarLoop]: Abstraction has 439 states and 623 transitions. [2024-11-13 16:23:33,136 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:33,136 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 623 transitions. [2024-11-13 16:23:33,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-13 16:23:33,138 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:33,139 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:33,139 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-13 16:23:33,140 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:33,140 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:33,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1645437340, now seen corresponding path program 1 times [2024-11-13 16:23:33,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:33,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729442159] [2024-11-13 16:23:33,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:33,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:33,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:34,082 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 16:23:34,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:34,086 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 16:23:34,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:34,089 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 16:23:34,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:34,093 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:34,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:34,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729442159] [2024-11-13 16:23:34,094 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729442159] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:34,094 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:34,094 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 16:23:34,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177681271] [2024-11-13 16:23:34,095 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:34,095 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 16:23:34,095 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:34,096 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 16:23:34,096 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:23:34,096 INFO L87 Difference]: Start difference. First operand 439 states and 623 transitions. Second operand has 7 states, 7 states have (on average 17.428571428571427) internal successors, (122), 7 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:34,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:34,584 INFO L93 Difference]: Finished difference Result 886 states and 1253 transitions. [2024-11-13 16:23:34,585 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 16:23:34,585 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 17.428571428571427) internal successors, (122), 7 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-13 16:23:34,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:34,587 INFO L225 Difference]: With dead ends: 886 [2024-11-13 16:23:34,587 INFO L226 Difference]: Without dead ends: 443 [2024-11-13 16:23:34,588 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-13 16:23:34,589 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 646 mSDsluCounter, 2022 mSDsCounter, 0 mSdLazyCounter, 256 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 649 SdHoareTripleChecker+Valid, 2562 SdHoareTripleChecker+Invalid, 265 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 256 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:34,589 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [649 Valid, 2562 Invalid, 265 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 256 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 16:23:34,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 443 states. [2024-11-13 16:23:34,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 443 to 441. [2024-11-13 16:23:34,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 441 states, 436 states have (on average 1.4174311926605505) internal successors, (618), 436 states have internal predecessors, (618), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:23:34,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 624 transitions. [2024-11-13 16:23:34,605 INFO L78 Accepts]: Start accepts. Automaton has 441 states and 624 transitions. Word has length 134 [2024-11-13 16:23:34,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:34,605 INFO L471 AbstractCegarLoop]: Abstraction has 441 states and 624 transitions. [2024-11-13 16:23:34,605 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 17.428571428571427) internal successors, (122), 7 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:34,606 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 624 transitions. [2024-11-13 16:23:34,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-11-13 16:23:34,607 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:34,607 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:34,607 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-13 16:23:34,607 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:34,608 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:34,608 INFO L85 PathProgramCache]: Analyzing trace with hash -885091725, now seen corresponding path program 1 times [2024-11-13 16:23:34,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:34,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433247005] [2024-11-13 16:23:34,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:34,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:34,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:35,662 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:35,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:35,666 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:35,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:35,670 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:35,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:35,675 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:23:35,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:35,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433247005] [2024-11-13 16:23:35,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1433247005] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:35,675 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:35,675 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:23:35,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864457605] [2024-11-13 16:23:35,676 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:35,676 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:23:35,676 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:35,677 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:23:35,677 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:35,677 INFO L87 Difference]: Start difference. First operand 441 states and 624 transitions. Second operand has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:35,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:35,866 INFO L93 Difference]: Finished difference Result 980 states and 1367 transitions. [2024-11-13 16:23:35,866 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:23:35,867 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 135 [2024-11-13 16:23:35,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:35,870 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:35,870 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:35,871 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:23:35,872 INFO L432 NwaCegarLoop]: 551 mSDtfsCounter, 857 mSDsluCounter, 1647 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 860 SdHoareTripleChecker+Valid, 2198 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:35,872 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [860 Valid, 2198 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:35,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:35,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:35,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3876871880199668) internal successors, (834), 601 states have internal predecessors, (834), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:35,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 846 transitions. [2024-11-13 16:23:35,902 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 846 transitions. Word has length 135 [2024-11-13 16:23:35,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:35,903 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 846 transitions. [2024-11-13 16:23:35,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:23:35,903 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 846 transitions. [2024-11-13 16:23:35,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-13 16:23:35,909 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:35,909 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:35,909 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-13 16:23:35,909 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:35,910 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:35,910 INFO L85 PathProgramCache]: Analyzing trace with hash 1773776762, now seen corresponding path program 1 times [2024-11-13 16:23:35,910 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:35,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210106732] [2024-11-13 16:23:35,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:35,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:36,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,861 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:36,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,864 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:36,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,867 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:36,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 233 [2024-11-13 16:23:36,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,878 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 16:23:36,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,881 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261 [2024-11-13 16:23:36,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:36,884 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:36,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:36,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210106732] [2024-11-13 16:23:36,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [210106732] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:36,885 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:36,885 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:36,885 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1623385813] [2024-11-13 16:23:36,886 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:36,886 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:36,886 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:36,887 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:36,888 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:36,888 INFO L87 Difference]: Start difference. First operand 609 states and 846 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:37,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:37,051 INFO L93 Difference]: Finished difference Result 980 states and 1366 transitions. [2024-11-13 16:23:37,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:37,052 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-13 16:23:37,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:37,055 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:37,055 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:37,056 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:37,057 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 514 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 517 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:37,057 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [517 Valid, 1065 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:37,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:37,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:37,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3860232945091515) internal successors, (833), 601 states have internal predecessors, (833), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:37,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 845 transitions. [2024-11-13 16:23:37,085 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 845 transitions. Word has length 324 [2024-11-13 16:23:37,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:37,086 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 845 transitions. [2024-11-13 16:23:37,086 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:37,086 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 845 transitions. [2024-11-13 16:23:37,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-13 16:23:37,092 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:37,093 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:37,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-13 16:23:37,093 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:37,094 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:37,094 INFO L85 PathProgramCache]: Analyzing trace with hash -430837626, now seen corresponding path program 1 times [2024-11-13 16:23:37,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:37,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248615348] [2024-11-13 16:23:37,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:37,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:37,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,115 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:38,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,120 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:38,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,127 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:38,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,130 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 234 [2024-11-13 16:23:38,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,134 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250 [2024-11-13 16:23:38,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,137 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262 [2024-11-13 16:23:38,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:38,141 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:38,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:38,141 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248615348] [2024-11-13 16:23:38,142 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248615348] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:38,142 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:38,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:38,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [33012483] [2024-11-13 16:23:38,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:38,144 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:38,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:38,145 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:38,145 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:38,146 INFO L87 Difference]: Start difference. First operand 609 states and 845 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:38,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:38,308 INFO L93 Difference]: Finished difference Result 980 states and 1364 transitions. [2024-11-13 16:23:38,309 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:38,309 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-13 16:23:38,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:38,313 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:38,314 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:38,314 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:38,316 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 506 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 509 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:38,316 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [509 Valid, 1065 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:38,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:38,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:38,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3843594009983362) internal successors, (832), 601 states have internal predecessors, (832), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:38,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 844 transitions. [2024-11-13 16:23:38,346 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 844 transitions. Word has length 325 [2024-11-13 16:23:38,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:38,346 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 844 transitions. [2024-11-13 16:23:38,347 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:38,347 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 844 transitions. [2024-11-13 16:23:38,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-13 16:23:38,352 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:38,353 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:38,353 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-13 16:23:38,353 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:38,354 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:38,354 INFO L85 PathProgramCache]: Analyzing trace with hash 64689519, now seen corresponding path program 1 times [2024-11-13 16:23:38,354 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:38,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894182839] [2024-11-13 16:23:38,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:38,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:38,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,268 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:39,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,273 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:39,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,276 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:39,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 235 [2024-11-13 16:23:39,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,282 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251 [2024-11-13 16:23:39,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,285 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263 [2024-11-13 16:23:39,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:39,288 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:39,289 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:39,289 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894182839] [2024-11-13 16:23:39,289 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1894182839] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:39,289 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:39,289 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:39,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767794369] [2024-11-13 16:23:39,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:39,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:39,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:39,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:39,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:39,292 INFO L87 Difference]: Start difference. First operand 609 states and 844 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:39,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:39,446 INFO L93 Difference]: Finished difference Result 980 states and 1362 transitions. [2024-11-13 16:23:39,447 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:39,447 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-13 16:23:39,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:39,453 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:39,453 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:39,454 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:39,457 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 904 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 907 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:39,457 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [907 Valid, 1058 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:39,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:39,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:39,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.382695507487521) internal successors, (831), 601 states have internal predecessors, (831), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:39,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 843 transitions. [2024-11-13 16:23:39,487 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 843 transitions. Word has length 326 [2024-11-13 16:23:39,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:39,488 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 843 transitions. [2024-11-13 16:23:39,489 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:39,489 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 843 transitions. [2024-11-13 16:23:39,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-13 16:23:39,495 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:39,495 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:39,495 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-13 16:23:39,495 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:39,496 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:39,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1440379429, now seen corresponding path program 1 times [2024-11-13 16:23:39,496 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:39,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461882701] [2024-11-13 16:23:39,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:39,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:39,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,340 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:40,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,343 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:40,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,346 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:40,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,349 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 236 [2024-11-13 16:23:40,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,351 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252 [2024-11-13 16:23:40,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,355 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264 [2024-11-13 16:23:40,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:40,359 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:40,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:40,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461882701] [2024-11-13 16:23:40,360 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1461882701] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:40,360 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:40,360 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:40,361 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [683200261] [2024-11-13 16:23:40,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:40,362 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:40,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:40,363 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:40,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:40,365 INFO L87 Difference]: Start difference. First operand 609 states and 843 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:40,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:40,510 INFO L93 Difference]: Finished difference Result 980 states and 1360 transitions. [2024-11-13 16:23:40,510 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:40,511 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-13 16:23:40,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:40,514 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:40,514 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:40,515 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:40,516 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 888 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 891 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:40,516 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [891 Valid, 1058 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:40,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:40,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:40,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3810316139767056) internal successors, (830), 601 states have internal predecessors, (830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:40,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 842 transitions. [2024-11-13 16:23:40,542 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 842 transitions. Word has length 327 [2024-11-13 16:23:40,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:40,543 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 842 transitions. [2024-11-13 16:23:40,543 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:40,543 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 842 transitions. [2024-11-13 16:23:40,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-13 16:23:40,549 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:40,549 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:40,549 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-13 16:23:40,549 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:40,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:40,550 INFO L85 PathProgramCache]: Analyzing trace with hash -833179932, now seen corresponding path program 1 times [2024-11-13 16:23:40,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:40,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529561894] [2024-11-13 16:23:40,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:40,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:40,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,499 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:41,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,504 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:41,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,507 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:41,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,511 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 237 [2024-11-13 16:23:41,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,516 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 16:23:41,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,519 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265 [2024-11-13 16:23:41,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:41,523 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:41,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:41,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529561894] [2024-11-13 16:23:41,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529561894] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:41,524 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:41,524 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:41,525 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807921224] [2024-11-13 16:23:41,525 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:41,526 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:41,527 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:41,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:41,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:41,528 INFO L87 Difference]: Start difference. First operand 609 states and 842 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:41,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:41,667 INFO L93 Difference]: Finished difference Result 980 states and 1358 transitions. [2024-11-13 16:23:41,667 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:41,667 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-13 16:23:41,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:41,671 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:41,671 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:41,672 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:41,672 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 865 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 868 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:41,673 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [868 Valid, 1082 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:41,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:41,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:41,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3793677204658903) internal successors, (829), 601 states have internal predecessors, (829), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:41,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 841 transitions. [2024-11-13 16:23:41,709 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 841 transitions. Word has length 328 [2024-11-13 16:23:41,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:41,710 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 841 transitions. [2024-11-13 16:23:41,710 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:41,710 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 841 transitions. [2024-11-13 16:23:41,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-13 16:23:41,718 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:41,718 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:41,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-13 16:23:41,721 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:41,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:41,721 INFO L85 PathProgramCache]: Analyzing trace with hash 16225968, now seen corresponding path program 1 times [2024-11-13 16:23:41,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:41,722 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086541032] [2024-11-13 16:23:41,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:41,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:42,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,831 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:42,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,834 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:42,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,838 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:42,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 238 [2024-11-13 16:23:42,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 16:23:42,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,845 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266 [2024-11-13 16:23:42,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:42,848 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:42,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:42,848 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086541032] [2024-11-13 16:23:42,848 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086541032] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:42,848 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:42,848 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:42,848 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1570367317] [2024-11-13 16:23:42,848 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:42,849 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:42,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:42,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:42,851 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:42,851 INFO L87 Difference]: Start difference. First operand 609 states and 841 transitions. Second operand has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:42,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:42,966 INFO L93 Difference]: Finished difference Result 980 states and 1356 transitions. [2024-11-13 16:23:42,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:42,971 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-13 16:23:42,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:42,974 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:42,977 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:42,978 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:42,978 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 467 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 470 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:42,978 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [470 Valid, 1089 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:42,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:42,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:43,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.377703826955075) internal successors, (828), 601 states have internal predecessors, (828), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:43,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 840 transitions. [2024-11-13 16:23:43,004 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 840 transitions. Word has length 329 [2024-11-13 16:23:43,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:43,005 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 840 transitions. [2024-11-13 16:23:43,005 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:43,005 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 840 transitions. [2024-11-13 16:23:43,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-13 16:23:43,011 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:43,011 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:43,011 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-13 16:23:43,012 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:43,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:43,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1724038105, now seen corresponding path program 1 times [2024-11-13 16:23:43,012 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:43,012 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175465515] [2024-11-13 16:23:43,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:43,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:43,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,900 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:43,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:43,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,909 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:43,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,914 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 239 [2024-11-13 16:23:43,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,916 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 16:23:43,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,918 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267 [2024-11-13 16:23:43,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:43,922 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:43,922 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:43,923 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175465515] [2024-11-13 16:23:43,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1175465515] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:43,923 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:43,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:43,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1265422007] [2024-11-13 16:23:43,923 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:43,924 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:43,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:43,926 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:43,926 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:43,926 INFO L87 Difference]: Start difference. First operand 609 states and 840 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:44,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:44,418 INFO L93 Difference]: Finished difference Result 980 states and 1354 transitions. [2024-11-13 16:23:44,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:44,418 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-13 16:23:44,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:44,425 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:44,425 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:44,426 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:44,427 INFO L432 NwaCegarLoop]: 400 mSDtfsCounter, 415 mSDsluCounter, 409 mSDsCounter, 0 mSdLazyCounter, 314 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 809 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 314 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:44,427 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 809 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 314 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 16:23:44,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:44,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:44,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3760399334442597) internal successors, (827), 601 states have internal predecessors, (827), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:44,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 839 transitions. [2024-11-13 16:23:44,458 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 839 transitions. Word has length 330 [2024-11-13 16:23:44,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:44,458 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 839 transitions. [2024-11-13 16:23:44,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:44,459 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 839 transitions. [2024-11-13 16:23:44,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-13 16:23:44,465 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:44,465 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:44,466 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-13 16:23:44,468 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:44,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:44,468 INFO L85 PathProgramCache]: Analyzing trace with hash 1585990405, now seen corresponding path program 1 times [2024-11-13 16:23:44,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:44,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71244017] [2024-11-13 16:23:44,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:44,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:45,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,246 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:46,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,250 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:46,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,256 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:46,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,260 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240 [2024-11-13 16:23:46,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,262 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 16:23:46,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,264 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268 [2024-11-13 16:23:46,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:46,267 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:46,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:46,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [71244017] [2024-11-13 16:23:46,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [71244017] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:46,268 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:46,269 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:23:46,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997720393] [2024-11-13 16:23:46,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:46,270 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:23:46,270 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:46,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:23:46,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:23:46,271 INFO L87 Difference]: Start difference. First operand 609 states and 839 transitions. Second operand has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:46,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:46,372 INFO L93 Difference]: Finished difference Result 980 states and 1352 transitions. [2024-11-13 16:23:46,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:46,373 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-13 16:23:46,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:46,377 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:46,377 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:46,378 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:46,379 INFO L432 NwaCegarLoop]: 539 mSDtfsCounter, 381 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 381 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:46,380 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [381 Valid, 1080 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:46,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:46,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:46,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3743760399334441) internal successors, (826), 601 states have internal predecessors, (826), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:46,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 838 transitions. [2024-11-13 16:23:46,412 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 838 transitions. Word has length 331 [2024-11-13 16:23:46,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:46,413 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 838 transitions. [2024-11-13 16:23:46,413 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:46,414 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 838 transitions. [2024-11-13 16:23:46,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-13 16:23:46,420 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:46,421 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:46,422 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-13 16:23:46,422 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:46,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:46,422 INFO L85 PathProgramCache]: Analyzing trace with hash 1718975755, now seen corresponding path program 1 times [2024-11-13 16:23:46,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:46,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21620720] [2024-11-13 16:23:46,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:46,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:47,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,159 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:48,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,165 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:48,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,172 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:48,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,178 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 241 [2024-11-13 16:23:48,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,182 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 16:23:48,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,185 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269 [2024-11-13 16:23:48,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:48,191 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:48,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:48,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [21620720] [2024-11-13 16:23:48,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [21620720] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:48,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:48,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:48,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584333061] [2024-11-13 16:23:48,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:48,193 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:48,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:48,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:48,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:48,195 INFO L87 Difference]: Start difference. First operand 609 states and 838 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:48,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:48,397 INFO L93 Difference]: Finished difference Result 980 states and 1350 transitions. [2024-11-13 16:23:48,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:48,398 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-13 16:23:48,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:48,401 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:48,402 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:48,403 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:48,403 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 454 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 454 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:48,404 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [454 Valid, 1057 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:48,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:48,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:48,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3727121464226288) internal successors, (825), 601 states have internal predecessors, (825), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:48,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 837 transitions. [2024-11-13 16:23:48,438 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 837 transitions. Word has length 332 [2024-11-13 16:23:48,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:48,439 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 837 transitions. [2024-11-13 16:23:48,439 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:48,439 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 837 transitions. [2024-11-13 16:23:48,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-13 16:23:48,447 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:48,448 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:48,448 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-13 16:23:48,448 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:48,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:48,449 INFO L85 PathProgramCache]: Analyzing trace with hash 1913081349, now seen corresponding path program 1 times [2024-11-13 16:23:48,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:48,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937594548] [2024-11-13 16:23:48,449 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:48,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:49,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,018 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:50,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,023 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:50,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,028 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:50,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,032 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 242 [2024-11-13 16:23:50,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,034 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258 [2024-11-13 16:23:50,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,036 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270 [2024-11-13 16:23:50,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:50,040 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:50,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:50,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937594548] [2024-11-13 16:23:50,041 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1937594548] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:50,041 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:50,041 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:50,041 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1186488338] [2024-11-13 16:23:50,041 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:50,042 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:50,042 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:50,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:50,044 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:50,044 INFO L87 Difference]: Start difference. First operand 609 states and 837 transitions. Second operand has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:50,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:50,214 INFO L93 Difference]: Finished difference Result 980 states and 1348 transitions. [2024-11-13 16:23:50,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:50,215 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-13 16:23:50,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:50,219 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:50,219 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:50,220 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:50,221 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 453 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 453 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:50,225 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [453 Valid, 1057 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:50,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:50,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:50,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3710482529118135) internal successors, (824), 601 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:50,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 836 transitions. [2024-11-13 16:23:50,250 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 836 transitions. Word has length 333 [2024-11-13 16:23:50,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:50,251 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 836 transitions. [2024-11-13 16:23:50,251 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:50,251 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 836 transitions. [2024-11-13 16:23:50,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2024-11-13 16:23:50,254 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:50,255 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:50,255 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-13 16:23:50,255 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:50,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:50,256 INFO L85 PathProgramCache]: Analyzing trace with hash -898887142, now seen corresponding path program 1 times [2024-11-13 16:23:50,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:50,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108224336] [2024-11-13 16:23:50,256 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:50,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:50,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,727 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:51,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,732 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:51,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,736 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:51,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,740 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 243 [2024-11-13 16:23:51,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,742 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259 [2024-11-13 16:23:51,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,744 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 16:23:51,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:51,748 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:51,748 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:51,748 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108224336] [2024-11-13 16:23:51,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2108224336] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:51,749 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:51,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:23:51,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963939515] [2024-11-13 16:23:51,749 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:51,750 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:23:51,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:51,751 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:23:51,751 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:23:51,752 INFO L87 Difference]: Start difference. First operand 609 states and 836 transitions. Second operand has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:51,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:51,920 INFO L93 Difference]: Finished difference Result 980 states and 1346 transitions. [2024-11-13 16:23:51,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:23:51,921 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334 [2024-11-13 16:23:51,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:51,925 INFO L225 Difference]: With dead ends: 980 [2024-11-13 16:23:51,925 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 16:23:51,926 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:51,928 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 841 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 841 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:51,928 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [841 Valid, 1050 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:23:51,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 16:23:51,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 16:23:51,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3693843594009982) internal successors, (823), 601 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:23:51,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 835 transitions. [2024-11-13 16:23:51,956 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 835 transitions. Word has length 334 [2024-11-13 16:23:51,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:51,957 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 835 transitions. [2024-11-13 16:23:51,957 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:51,958 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 835 transitions. [2024-11-13 16:23:51,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-13 16:23:51,961 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:51,962 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:51,962 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-13 16:23:51,962 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:51,963 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:51,963 INFO L85 PathProgramCache]: Analyzing trace with hash -543443530, now seen corresponding path program 1 times [2024-11-13 16:23:51,963 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:51,963 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737864095] [2024-11-13 16:23:51,963 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:51,963 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:53,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,857 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:53,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,861 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:53,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,865 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:53,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,868 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244 [2024-11-13 16:23:53,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,871 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260 [2024-11-13 16:23:53,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 16:23:53,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:53,876 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:53,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:53,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737864095] [2024-11-13 16:23:53,878 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [737864095] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:53,878 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:53,878 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:23:53,878 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243399563] [2024-11-13 16:23:53,878 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:53,879 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:23:53,879 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:53,880 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:23:53,881 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:53,881 INFO L87 Difference]: Start difference. First operand 609 states and 835 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:54,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:54,496 INFO L93 Difference]: Finished difference Result 1429 states and 1965 transitions. [2024-11-13 16:23:54,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:23:54,497 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-13 16:23:54,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:54,502 INFO L225 Difference]: With dead ends: 1429 [2024-11-13 16:23:54,502 INFO L226 Difference]: Without dead ends: 1058 [2024-11-13 16:23:54,503 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:23:54,504 INFO L432 NwaCegarLoop]: 457 mSDtfsCounter, 591 mSDsluCounter, 1511 mSDsCounter, 0 mSdLazyCounter, 451 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 594 SdHoareTripleChecker+Valid, 1968 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 451 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:54,507 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [594 Valid, 1968 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 451 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 16:23:54,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2024-11-13 16:23:54,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 936. [2024-11-13 16:23:54,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 936 states, 925 states have (on average 1.3654054054054054) internal successors, (1263), 925 states have internal predecessors, (1263), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 16:23:54,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1281 transitions. [2024-11-13 16:23:54,546 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1281 transitions. Word has length 335 [2024-11-13 16:23:54,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:54,546 INFO L471 AbstractCegarLoop]: Abstraction has 936 states and 1281 transitions. [2024-11-13 16:23:54,547 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:54,547 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1281 transitions. [2024-11-13 16:23:54,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-13 16:23:54,551 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:54,551 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:54,551 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-13 16:23:54,552 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:54,552 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:54,552 INFO L85 PathProgramCache]: Analyzing trace with hash 1268661504, now seen corresponding path program 1 times [2024-11-13 16:23:54,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:54,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434387843] [2024-11-13 16:23:54,553 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:54,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:55,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,945 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:23:56,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,948 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:23:56,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,954 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:23:56,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,961 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 245 [2024-11-13 16:23:56,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,963 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261 [2024-11-13 16:23:56,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,966 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 16:23:56,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:23:56,968 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:23:56,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:23:56,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434387843] [2024-11-13 16:23:56,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [434387843] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:23:56,969 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:23:56,969 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:23:56,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635263986] [2024-11-13 16:23:56,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:23:56,970 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:23:56,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:23:56,972 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:23:56,972 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:23:56,973 INFO L87 Difference]: Start difference. First operand 936 states and 1281 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:57,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:23:57,789 INFO L93 Difference]: Finished difference Result 1330 states and 1824 transitions. [2024-11-13 16:23:57,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:23:57,790 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-13 16:23:57,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:23:57,794 INFO L225 Difference]: With dead ends: 1330 [2024-11-13 16:23:57,794 INFO L226 Difference]: Without dead ends: 959 [2024-11-13 16:23:57,796 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:23:57,796 INFO L432 NwaCegarLoop]: 397 mSDtfsCounter, 1010 mSDsluCounter, 1168 mSDsCounter, 0 mSdLazyCounter, 635 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1013 SdHoareTripleChecker+Valid, 1565 SdHoareTripleChecker+Invalid, 635 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 635 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-13 16:23:57,797 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1013 Valid, 1565 Invalid, 635 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 635 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-13 16:23:57,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2024-11-13 16:23:57,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 937. [2024-11-13 16:23:57,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 937 states, 926 states have (on average 1.3650107991360692) internal successors, (1264), 926 states have internal predecessors, (1264), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 16:23:57,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 937 states to 937 states and 1282 transitions. [2024-11-13 16:23:57,837 INFO L78 Accepts]: Start accepts. Automaton has 937 states and 1282 transitions. Word has length 336 [2024-11-13 16:23:57,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:23:57,838 INFO L471 AbstractCegarLoop]: Abstraction has 937 states and 1282 transitions. [2024-11-13 16:23:57,838 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:23:57,838 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 1282 transitions. [2024-11-13 16:23:57,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-13 16:23:57,842 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:23:57,842 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:23:57,843 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-13 16:23:57,843 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:23:57,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:23:57,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1769560103, now seen corresponding path program 1 times [2024-11-13 16:23:57,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:23:57,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905336310] [2024-11-13 16:23:57,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:23:57,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:23:58,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,273 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:00,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,278 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 16:24:00,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,282 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 16:24:00,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,287 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 245 [2024-11-13 16:24:00,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,289 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261 [2024-11-13 16:24:00,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,291 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 16:24:00,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:00,293 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 113 trivial. 0 not checked. [2024-11-13 16:24:00,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:00,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905336310] [2024-11-13 16:24:00,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1905336310] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:00,294 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:00,294 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 16:24:00,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977555987] [2024-11-13 16:24:00,294 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:00,295 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 16:24:00,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:00,296 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 16:24:00,296 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-13 16:24:00,297 INFO L87 Difference]: Start difference. First operand 937 states and 1282 transitions. Second operand has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:02,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:02,103 INFO L93 Difference]: Finished difference Result 2112 states and 2883 transitions. [2024-11-13 16:24:02,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 16:24:02,104 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-13 16:24:02,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:02,109 INFO L225 Difference]: With dead ends: 2112 [2024-11-13 16:24:02,109 INFO L226 Difference]: Without dead ends: 1625 [2024-11-13 16:24:02,110 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:24:02,111 INFO L432 NwaCegarLoop]: 938 mSDtfsCounter, 1350 mSDsluCounter, 3043 mSDsCounter, 0 mSdLazyCounter, 1750 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1356 SdHoareTripleChecker+Valid, 3981 SdHoareTripleChecker+Invalid, 1751 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1750 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:02,111 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1356 Valid, 3981 Invalid, 1751 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1750 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2024-11-13 16:24:02,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1625 states. [2024-11-13 16:24:02,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1625 to 1006. [2024-11-13 16:24:02,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1006 states, 992 states have (on average 1.3669354838709677) internal successors, (1356), 992 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:02,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1380 transitions. [2024-11-13 16:24:02,160 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1380 transitions. Word has length 336 [2024-11-13 16:24:02,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:02,160 INFO L471 AbstractCegarLoop]: Abstraction has 1006 states and 1380 transitions. [2024-11-13 16:24:02,160 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.375) internal successors, (259), 8 states have internal predecessors, (259), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:02,161 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1380 transitions. [2024-11-13 16:24:02,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-13 16:24:02,164 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:02,165 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:02,165 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-13 16:24:02,165 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:02,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:02,166 INFO L85 PathProgramCache]: Analyzing trace with hash -1598035847, now seen corresponding path program 1 times [2024-11-13 16:24:02,166 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:02,166 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [255031725] [2024-11-13 16:24:02,166 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:02,166 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:03,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,638 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:24:04,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,642 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:24:04,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,644 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:24:04,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,646 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 246 [2024-11-13 16:24:04,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,648 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262 [2024-11-13 16:24:04,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,650 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 16:24:04,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:04,653 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-13 16:24:04,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:04,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [255031725] [2024-11-13 16:24:04,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [255031725] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:04,653 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:04,653 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:24:04,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607498785] [2024-11-13 16:24:04,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:04,654 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:24:04,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:04,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:24:04,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:24:04,656 INFO L87 Difference]: Start difference. First operand 1006 states and 1380 transitions. Second operand has 5 states, 5 states have (on average 55.4) internal successors, (277), 5 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:05,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:05,181 INFO L93 Difference]: Finished difference Result 1672 states and 2269 transitions. [2024-11-13 16:24:05,181 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 16:24:05,182 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 55.4) internal successors, (277), 5 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-13 16:24:05,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:05,186 INFO L225 Difference]: With dead ends: 1672 [2024-11-13 16:24:05,186 INFO L226 Difference]: Without dead ends: 1018 [2024-11-13 16:24:05,188 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:24:05,189 INFO L432 NwaCegarLoop]: 403 mSDtfsCounter, 468 mSDsluCounter, 792 mSDsCounter, 0 mSdLazyCounter, 460 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 468 SdHoareTripleChecker+Valid, 1195 SdHoareTripleChecker+Invalid, 460 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 460 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:05,189 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [468 Valid, 1195 Invalid, 460 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 460 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 16:24:05,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states. [2024-11-13 16:24:05,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 1012. [2024-11-13 16:24:05,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3647294589178356) internal successors, (1362), 998 states have internal predecessors, (1362), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:05,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1386 transitions. [2024-11-13 16:24:05,226 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1386 transitions. Word has length 337 [2024-11-13 16:24:05,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:05,227 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1386 transitions. [2024-11-13 16:24:05,227 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 55.4) internal successors, (277), 5 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:05,228 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1386 transitions. [2024-11-13 16:24:05,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2024-11-13 16:24:05,231 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:05,232 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:05,232 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-13 16:24:05,232 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:05,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:05,233 INFO L85 PathProgramCache]: Analyzing trace with hash 1040159943, now seen corresponding path program 1 times [2024-11-13 16:24:05,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:05,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915906023] [2024-11-13 16:24:05,233 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:05,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:06,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,714 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:24:06,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,718 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:24:06,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,724 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:24:06,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,728 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 246 [2024-11-13 16:24:06,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,731 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262 [2024-11-13 16:24:06,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,733 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 16:24:06,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:06,736 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 48 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-13 16:24:06,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:06,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915906023] [2024-11-13 16:24:06,737 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915906023] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:06,737 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:06,737 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 16:24:06,737 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1508064555] [2024-11-13 16:24:06,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:06,738 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:24:06,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:06,739 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:24:06,739 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:24:06,740 INFO L87 Difference]: Start difference. First operand 1012 states and 1386 transitions. Second operand has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:07,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:07,169 INFO L93 Difference]: Finished difference Result 1668 states and 2259 transitions. [2024-11-13 16:24:07,170 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:24:07,170 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 337 [2024-11-13 16:24:07,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:07,172 INFO L225 Difference]: With dead ends: 1668 [2024-11-13 16:24:07,172 INFO L226 Difference]: Without dead ends: 1012 [2024-11-13 16:24:07,173 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2024-11-13 16:24:07,173 INFO L432 NwaCegarLoop]: 404 mSDtfsCounter, 503 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 299 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 503 SdHoareTripleChecker+Valid, 800 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 299 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:07,174 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [503 Valid, 800 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 299 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 16:24:07,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1012 states. [2024-11-13 16:24:07,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1012 to 1012. [2024-11-13 16:24:07,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3587174348697395) internal successors, (1356), 998 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:07,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1380 transitions. [2024-11-13 16:24:07,211 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1380 transitions. Word has length 337 [2024-11-13 16:24:07,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:07,211 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1380 transitions. [2024-11-13 16:24:07,211 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 69.25) internal successors, (277), 4 states have internal predecessors, (277), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:07,212 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1380 transitions. [2024-11-13 16:24:07,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-13 16:24:07,216 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:07,217 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:07,218 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-13 16:24:07,218 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:07,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:07,219 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-13 16:24:07,219 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:07,219 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613553018] [2024-11-13 16:24:07,219 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:07,219 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:08,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,243 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:24:09,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,247 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:24:09,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,252 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:24:09,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,256 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 247 [2024-11-13 16:24:09,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,259 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263 [2024-11-13 16:24:09,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,262 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 16:24:09,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:09,265 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-13 16:24:09,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:09,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613553018] [2024-11-13 16:24:09,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613553018] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:09,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:09,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 16:24:09,266 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1583562657] [2024-11-13 16:24:09,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:09,267 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 16:24:09,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:09,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 16:24:09,270 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-13 16:24:09,271 INFO L87 Difference]: Start difference. First operand 1012 states and 1380 transitions. Second operand has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:10,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:10,396 INFO L93 Difference]: Finished difference Result 2518 states and 3403 transitions. [2024-11-13 16:24:10,396 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 16:24:10,397 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339 [2024-11-13 16:24:10,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:10,403 INFO L225 Difference]: With dead ends: 2518 [2024-11-13 16:24:10,404 INFO L226 Difference]: Without dead ends: 1878 [2024-11-13 16:24:10,405 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 16:24:10,406 INFO L432 NwaCegarLoop]: 416 mSDtfsCounter, 1288 mSDsluCounter, 1993 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1291 SdHoareTripleChecker+Valid, 2409 SdHoareTripleChecker+Invalid, 970 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:10,406 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1291 Valid, 2409 Invalid, 970 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2024-11-13 16:24:10,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2024-11-13 16:24:10,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1870. [2024-11-13 16:24:10,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1870 states, 1844 states have (on average 1.3503253796095445) internal successors, (2490), 1844 states have internal predecessors, (2490), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-13 16:24:10,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1870 states to 1870 states and 2538 transitions. [2024-11-13 16:24:10,488 INFO L78 Accepts]: Start accepts. Automaton has 1870 states and 2538 transitions. Word has length 339 [2024-11-13 16:24:10,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:10,489 INFO L471 AbstractCegarLoop]: Abstraction has 1870 states and 2538 transitions. [2024-11-13 16:24:10,489 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:10,489 INFO L276 IsEmpty]: Start isEmpty. Operand 1870 states and 2538 transitions. [2024-11-13 16:24:10,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-13 16:24:10,497 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:10,497 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:10,498 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-13 16:24:10,498 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:10,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:10,498 INFO L85 PathProgramCache]: Analyzing trace with hash -2002348361, now seen corresponding path program 1 times [2024-11-13 16:24:10,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:10,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431852133] [2024-11-13 16:24:10,499 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:10,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:11,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,248 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 16:24:12,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,251 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 16:24:12,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,255 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 16:24:12,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,258 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248 [2024-11-13 16:24:12,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,260 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264 [2024-11-13 16:24:12,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,262 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 16:24:12,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:12,265 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 79 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-13 16:24:12,265 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:12,265 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431852133] [2024-11-13 16:24:12,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1431852133] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:24:12,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1207815364] [2024-11-13 16:24:12,266 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:12,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:12,269 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:24:12,273 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:24:12,275 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 16:24:13,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:13,726 INFO L255 TraceCheckSpWp]: Trace formula consists of 2047 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-13 16:24:13,756 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:24:14,210 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2024-11-13 16:24:14,212 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:24:14,212 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1207815364] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:14,212 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:24:14,213 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [6] total 7 [2024-11-13 16:24:14,213 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371547304] [2024-11-13 16:24:14,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:14,214 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:24:14,214 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:14,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:24:14,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:24:14,215 INFO L87 Difference]: Start difference. First operand 1870 states and 2538 transitions. Second operand has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:14,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:14,630 INFO L93 Difference]: Finished difference Result 2599 states and 3514 transitions. [2024-11-13 16:24:14,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:24:14,630 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 341 [2024-11-13 16:24:14,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:14,634 INFO L225 Difference]: With dead ends: 2599 [2024-11-13 16:24:14,634 INFO L226 Difference]: Without dead ends: 1010 [2024-11-13 16:24:14,636 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 356 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-13 16:24:14,637 INFO L432 NwaCegarLoop]: 396 mSDtfsCounter, 458 mSDsluCounter, 398 mSDsCounter, 0 mSdLazyCounter, 309 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 458 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 309 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 309 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:14,637 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [458 Valid, 794 Invalid, 309 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 309 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 16:24:14,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1010 states. [2024-11-13 16:24:14,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1010 to 1010. [2024-11-13 16:24:14,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1010 states, 996 states have (on average 1.3534136546184738) internal successors, (1348), 996 states have internal predecessors, (1348), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:14,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1010 states to 1010 states and 1372 transitions. [2024-11-13 16:24:14,670 INFO L78 Accepts]: Start accepts. Automaton has 1010 states and 1372 transitions. Word has length 341 [2024-11-13 16:24:14,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:14,670 INFO L471 AbstractCegarLoop]: Abstraction has 1010 states and 1372 transitions. [2024-11-13 16:24:14,671 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 71.5) internal successors, (286), 4 states have internal predecessors, (286), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:14,671 INFO L276 IsEmpty]: Start isEmpty. Operand 1010 states and 1372 transitions. [2024-11-13 16:24:14,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-13 16:24:14,675 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:14,675 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:14,708 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 16:24:14,879 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2024-11-13 16:24:14,880 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:14,880 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:14,880 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-13 16:24:14,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:14,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810927620] [2024-11-13 16:24:14,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:14,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:15,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:16,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,341 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 16:24:16,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,344 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 16:24:16,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,346 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 16:24:16,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,348 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265 [2024-11-13 16:24:16,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,351 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 277 [2024-11-13 16:24:16,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:16,354 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 126 trivial. 0 not checked. [2024-11-13 16:24:16,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:16,355 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810927620] [2024-11-13 16:24:16,355 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1810927620] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:16,355 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:16,355 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 16:24:16,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906258948] [2024-11-13 16:24:16,356 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:16,356 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 16:24:16,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:16,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 16:24:16,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:24:16,358 INFO L87 Difference]: Start difference. First operand 1010 states and 1372 transitions. Second operand has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 16:24:17,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:17,019 INFO L93 Difference]: Finished difference Result 1839 states and 2488 transitions. [2024-11-13 16:24:17,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:24:17,020 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 341 [2024-11-13 16:24:17,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:17,024 INFO L225 Difference]: With dead ends: 1839 [2024-11-13 16:24:17,024 INFO L226 Difference]: Without dead ends: 1026 [2024-11-13 16:24:17,025 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-13 16:24:17,026 INFO L432 NwaCegarLoop]: 390 mSDtfsCounter, 536 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 642 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 538 SdHoareTripleChecker+Valid, 1560 SdHoareTripleChecker+Invalid, 644 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 642 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:17,026 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [538 Valid, 1560 Invalid, 644 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 642 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 16:24:17,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1026 states. [2024-11-13 16:24:17,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1026 to 1018. [2024-11-13 16:24:17,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1018 states, 1004 states have (on average 1.346613545816733) internal successors, (1352), 1004 states have internal predecessors, (1352), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:17,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1018 states to 1018 states and 1376 transitions. [2024-11-13 16:24:17,072 INFO L78 Accepts]: Start accepts. Automaton has 1018 states and 1376 transitions. Word has length 341 [2024-11-13 16:24:17,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:17,072 INFO L471 AbstractCegarLoop]: Abstraction has 1018 states and 1376 transitions. [2024-11-13 16:24:17,072 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 36.142857142857146) internal successors, (253), 7 states have internal predecessors, (253), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 16:24:17,073 INFO L276 IsEmpty]: Start isEmpty. Operand 1018 states and 1376 transitions. [2024-11-13 16:24:17,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344 [2024-11-13 16:24:17,078 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:17,079 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:17,079 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-11-13 16:24:17,079 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:17,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:17,080 INFO L85 PathProgramCache]: Analyzing trace with hash 425632909, now seen corresponding path program 1 times [2024-11-13 16:24:17,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:17,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023436449] [2024-11-13 16:24:17,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:17,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:18,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,819 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:18,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,822 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2024-11-13 16:24:18,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,826 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2024-11-13 16:24:18,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,829 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250 [2024-11-13 16:24:18,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,831 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267 [2024-11-13 16:24:18,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,833 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 279 [2024-11-13 16:24:18,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:18,836 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-13 16:24:18,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:18,836 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023436449] [2024-11-13 16:24:18,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1023436449] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:18,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:18,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 16:24:18,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877847908] [2024-11-13 16:24:18,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:18,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 16:24:18,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:18,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 16:24:18,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-13 16:24:18,839 INFO L87 Difference]: Start difference. First operand 1018 states and 1376 transitions. Second operand has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:19,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:19,375 INFO L93 Difference]: Finished difference Result 1901 states and 2563 transitions. [2024-11-13 16:24:19,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 16:24:19,376 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 343 [2024-11-13 16:24:19,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:19,379 INFO L225 Difference]: With dead ends: 1901 [2024-11-13 16:24:19,379 INFO L226 Difference]: Without dead ends: 1026 [2024-11-13 16:24:19,380 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:24:19,380 INFO L432 NwaCegarLoop]: 565 mSDtfsCounter, 536 mSDsluCounter, 2488 mSDsCounter, 0 mSdLazyCounter, 509 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 538 SdHoareTripleChecker+Valid, 3053 SdHoareTripleChecker+Invalid, 509 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 509 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:19,381 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [538 Valid, 3053 Invalid, 509 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 509 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 16:24:19,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1026 states. [2024-11-13 16:24:19,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1026 to 1022. [2024-11-13 16:24:19,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1022 states, 1008 states have (on average 1.3452380952380953) internal successors, (1356), 1008 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:19,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1380 transitions. [2024-11-13 16:24:19,411 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1380 transitions. Word has length 343 [2024-11-13 16:24:19,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:19,412 INFO L471 AbstractCegarLoop]: Abstraction has 1022 states and 1380 transitions. [2024-11-13 16:24:19,412 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.75) internal successors, (286), 8 states have internal predecessors, (286), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:19,412 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1380 transitions. [2024-11-13 16:24:19,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-13 16:24:19,416 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:19,417 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:19,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-11-13 16:24:19,417 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:19,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:19,418 INFO L85 PathProgramCache]: Analyzing trace with hash -119240141, now seen corresponding path program 1 times [2024-11-13 16:24:19,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:19,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824854501] [2024-11-13 16:24:19,418 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:19,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:20,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,919 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:21,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,921 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:21,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,923 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 16:24:21,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,924 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251 [2024-11-13 16:24:21,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,926 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269 [2024-11-13 16:24:21,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,927 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 281 [2024-11-13 16:24:21,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:21,930 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:24:21,930 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:21,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824854501] [2024-11-13 16:24:21,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [824854501] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:24:21,930 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1754072333] [2024-11-13 16:24:21,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:21,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:21,931 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:24:21,934 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:24:21,938 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-13 16:24:23,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:23,465 INFO L255 TraceCheckSpWp]: Trace formula consists of 2055 conjuncts, 33 conjuncts are in the unsatisfiable core [2024-11-13 16:24:23,477 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:24:24,676 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-13 16:24:24,676 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:24:26,462 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 78 proven. 3 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2024-11-13 16:24:26,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1754072333] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 16:24:26,462 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 16:24:26,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 10] total 26 [2024-11-13 16:24:26,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336558756] [2024-11-13 16:24:26,463 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 16:24:26,464 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-13 16:24:26,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:26,466 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-13 16:24:26,466 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2024-11-13 16:24:26,466 INFO L87 Difference]: Start difference. First operand 1022 states and 1380 transitions. Second operand has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-13 16:24:28,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:28,742 INFO L93 Difference]: Finished difference Result 1820 states and 2445 transitions. [2024-11-13 16:24:28,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-13 16:24:28,743 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 345 [2024-11-13 16:24:28,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:28,747 INFO L225 Difference]: With dead ends: 1820 [2024-11-13 16:24:28,747 INFO L226 Difference]: Without dead ends: 1046 [2024-11-13 16:24:28,748 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 735 GetRequests, 689 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=367, Invalid=1889, Unknown=0, NotChecked=0, Total=2256 [2024-11-13 16:24:28,749 INFO L432 NwaCegarLoop]: 483 mSDtfsCounter, 1088 mSDsluCounter, 6694 mSDsCounter, 0 mSdLazyCounter, 3433 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1088 SdHoareTripleChecker+Valid, 7177 SdHoareTripleChecker+Invalid, 3437 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 3433 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:28,749 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1088 Valid, 7177 Invalid, 3437 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 3433 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-11-13 16:24:28,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1046 states. [2024-11-13 16:24:28,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1046 to 1035. [2024-11-13 16:24:28,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 1021 states have (on average 1.3379040156709108) internal successors, (1366), 1021 states have internal predecessors, (1366), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:28,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1390 transitions. [2024-11-13 16:24:28,776 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1390 transitions. Word has length 345 [2024-11-13 16:24:28,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:28,776 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1390 transitions. [2024-11-13 16:24:28,777 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 33.0) internal successors, (858), 26 states have internal predecessors, (858), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-13 16:24:28,777 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1390 transitions. [2024-11-13 16:24:28,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-13 16:24:28,780 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:28,780 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:28,809 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-13 16:24:28,981 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2024-11-13 16:24:28,981 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:28,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:28,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1308830486, now seen corresponding path program 1 times [2024-11-13 16:24:28,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:28,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [60097260] [2024-11-13 16:24:28,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:28,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:29,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,817 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:29,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,819 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:29,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,820 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:29,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,826 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 16:24:29,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,833 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 16:24:29,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,835 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 16:24:29,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:29,837 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-13 16:24:29,837 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:29,837 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [60097260] [2024-11-13 16:24:29,837 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [60097260] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:29,837 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:29,837 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:24:29,837 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2027589874] [2024-11-13 16:24:29,837 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:29,838 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:24:29,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:29,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:24:29,839 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:24:29,839 INFO L87 Difference]: Start difference. First operand 1035 states and 1390 transitions. Second operand has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:24:29,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:29,892 INFO L93 Difference]: Finished difference Result 1707 states and 2297 transitions. [2024-11-13 16:24:29,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 16:24:29,893 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 349 [2024-11-13 16:24:29,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:29,897 INFO L225 Difference]: With dead ends: 1707 [2024-11-13 16:24:29,897 INFO L226 Difference]: Without dead ends: 1089 [2024-11-13 16:24:29,898 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:24:29,899 INFO L432 NwaCegarLoop]: 544 mSDtfsCounter, 16 mSDsluCounter, 1620 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2164 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:29,899 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2164 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:24:29,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2024-11-13 16:24:29,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1089. [2024-11-13 16:24:29,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1075 states have (on average 1.3432558139534885) internal successors, (1444), 1075 states have internal predecessors, (1444), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:24:29,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1468 transitions. [2024-11-13 16:24:29,925 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 1468 transitions. Word has length 349 [2024-11-13 16:24:29,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:29,925 INFO L471 AbstractCegarLoop]: Abstraction has 1089 states and 1468 transitions. [2024-11-13 16:24:29,925 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:24:29,925 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 1468 transitions. [2024-11-13 16:24:29,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-13 16:24:29,928 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:29,928 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:29,929 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-13 16:24:29,929 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:29,929 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:29,929 INFO L85 PathProgramCache]: Analyzing trace with hash 765704138, now seen corresponding path program 1 times [2024-11-13 16:24:29,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:29,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129732478] [2024-11-13 16:24:29,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:29,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:30,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,372 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:32,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,375 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:32,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,378 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:32,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,382 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 16:24:32,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,383 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 16:24:32,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,385 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 16:24:32,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:32,387 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-13 16:24:32,388 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:32,388 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129732478] [2024-11-13 16:24:32,388 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1129732478] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:32,388 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:32,388 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-13 16:24:32,388 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1072667294] [2024-11-13 16:24:32,388 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:32,389 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-13 16:24:32,389 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:32,390 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-13 16:24:32,390 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:24:32,390 INFO L87 Difference]: Start difference. First operand 1089 states and 1468 transitions. Second operand has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:33,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:33,719 INFO L93 Difference]: Finished difference Result 2624 states and 3500 transitions. [2024-11-13 16:24:33,719 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 16:24:33,719 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 350 [2024-11-13 16:24:33,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:33,723 INFO L225 Difference]: With dead ends: 2624 [2024-11-13 16:24:33,723 INFO L226 Difference]: Without dead ends: 1876 [2024-11-13 16:24:33,724 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-13 16:24:33,724 INFO L432 NwaCegarLoop]: 605 mSDtfsCounter, 1332 mSDsluCounter, 2761 mSDsCounter, 0 mSdLazyCounter, 1555 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1333 SdHoareTripleChecker+Valid, 3366 SdHoareTripleChecker+Invalid, 1560 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 1555 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:33,725 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1333 Valid, 3366 Invalid, 1560 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 1555 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-13 16:24:33,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1876 states. [2024-11-13 16:24:33,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1876 to 1235. [2024-11-13 16:24:33,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1235 states, 1217 states have (on average 1.3459326211996714) internal successors, (1638), 1217 states have internal predecessors, (1638), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 16:24:33,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1235 states to 1235 states and 1670 transitions. [2024-11-13 16:24:33,781 INFO L78 Accepts]: Start accepts. Automaton has 1235 states and 1670 transitions. Word has length 350 [2024-11-13 16:24:33,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:33,781 INFO L471 AbstractCegarLoop]: Abstraction has 1235 states and 1670 transitions. [2024-11-13 16:24:33,782 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.22222222222222) internal successors, (281), 9 states have internal predecessors, (281), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:33,782 INFO L276 IsEmpty]: Start isEmpty. Operand 1235 states and 1670 transitions. [2024-11-13 16:24:33,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-13 16:24:33,785 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:33,785 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:33,785 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-11-13 16:24:33,785 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:33,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:33,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1673972598, now seen corresponding path program 1 times [2024-11-13 16:24:33,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:33,786 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703862196] [2024-11-13 16:24:33,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:33,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:35,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,043 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:41,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,046 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:41,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,048 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:41,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,051 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 16:24:41,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,055 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 16:24:41,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,059 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 16:24:41,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:41,065 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 50 proven. 40 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:24:41,065 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:41,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703862196] [2024-11-13 16:24:41,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [703862196] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:24:41,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [981315435] [2024-11-13 16:24:41,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:41,066 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:41,066 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:24:41,068 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:24:41,078 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 16:24:42,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:42,733 INFO L255 TraceCheckSpWp]: Trace formula consists of 2064 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-13 16:24:42,742 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:24:43,087 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-13 16:24:43,087 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:24:43,087 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [981315435] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:43,087 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:24:43,087 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [18] total 24 [2024-11-13 16:24:43,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957378881] [2024-11-13 16:24:43,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:43,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 16:24:43,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:43,089 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 16:24:43,089 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=489, Unknown=0, NotChecked=0, Total=552 [2024-11-13 16:24:43,089 INFO L87 Difference]: Start difference. First operand 1235 states and 1670 transitions. Second operand has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:43,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:43,804 INFO L93 Difference]: Finished difference Result 2723 states and 3688 transitions. [2024-11-13 16:24:43,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 16:24:43,804 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-13 16:24:43,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:43,808 INFO L225 Difference]: With dead ends: 2723 [2024-11-13 16:24:43,808 INFO L226 Difference]: Without dead ends: 2140 [2024-11-13 16:24:43,809 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 357 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 138 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2024-11-13 16:24:43,810 INFO L432 NwaCegarLoop]: 395 mSDtfsCounter, 928 mSDsluCounter, 1965 mSDsCounter, 0 mSdLazyCounter, 936 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 934 SdHoareTripleChecker+Valid, 2360 SdHoareTripleChecker+Invalid, 936 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 936 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:43,810 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [934 Valid, 2360 Invalid, 936 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 936 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 16:24:43,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2140 states. [2024-11-13 16:24:43,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2140 to 1794. [2024-11-13 16:24:43,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1794 states, 1764 states have (on average 1.3310657596371882) internal successors, (2348), 1764 states have internal predecessors, (2348), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 16:24:43,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1794 states to 1794 states and 2404 transitions. [2024-11-13 16:24:43,862 INFO L78 Accepts]: Start accepts. Automaton has 1794 states and 2404 transitions. Word has length 350 [2024-11-13 16:24:43,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:43,863 INFO L471 AbstractCegarLoop]: Abstraction has 1794 states and 2404 transitions. [2024-11-13 16:24:43,863 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:43,863 INFO L276 IsEmpty]: Start isEmpty. Operand 1794 states and 2404 transitions. [2024-11-13 16:24:43,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 16:24:43,867 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:43,868 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:43,900 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-13 16:24:44,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:44,069 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:44,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:44,069 INFO L85 PathProgramCache]: Analyzing trace with hash -1847452847, now seen corresponding path program 1 times [2024-11-13 16:24:44,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:44,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549633551] [2024-11-13 16:24:44,069 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:44,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:46,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,827 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:47,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,829 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:47,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,834 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:47,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,839 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 16:24:47,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 16:24:47,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,842 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 16:24:47,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:47,845 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 110 trivial. 0 not checked. [2024-11-13 16:24:47,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:47,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549633551] [2024-11-13 16:24:47,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549633551] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:47,845 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:47,845 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2024-11-13 16:24:47,845 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323126646] [2024-11-13 16:24:47,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:47,847 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-13 16:24:47,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:47,848 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-13 16:24:47,849 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-11-13 16:24:47,850 INFO L87 Difference]: Start difference. First operand 1794 states and 2404 transitions. Second operand has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:48,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:48,679 INFO L93 Difference]: Finished difference Result 3250 states and 4342 transitions. [2024-11-13 16:24:48,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-13 16:24:48,680 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-13 16:24:48,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:48,684 INFO L225 Difference]: With dead ends: 3250 [2024-11-13 16:24:48,684 INFO L226 Difference]: Without dead ends: 2408 [2024-11-13 16:24:48,686 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2024-11-13 16:24:48,686 INFO L432 NwaCegarLoop]: 823 mSDtfsCounter, 1696 mSDsluCounter, 6644 mSDsCounter, 0 mSdLazyCounter, 608 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1701 SdHoareTripleChecker+Valid, 7467 SdHoareTripleChecker+Invalid, 613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 608 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:48,686 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1701 Valid, 7467 Invalid, 613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 608 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 16:24:48,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2408 states. [2024-11-13 16:24:48,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2408 to 1936. [2024-11-13 16:24:48,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1936 states, 1900 states have (on average 1.3294736842105264) internal successors, (2526), 1900 states have internal predecessors, (2526), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-13 16:24:48,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1936 states to 1936 states and 2594 transitions. [2024-11-13 16:24:48,724 INFO L78 Accepts]: Start accepts. Automaton has 1936 states and 2594 transitions. Word has length 351 [2024-11-13 16:24:48,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:48,724 INFO L471 AbstractCegarLoop]: Abstraction has 1936 states and 2594 transitions. [2024-11-13 16:24:48,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 23.25) internal successors, (279), 12 states have internal predecessors, (279), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:24:48,724 INFO L276 IsEmpty]: Start isEmpty. Operand 1936 states and 2594 transitions. [2024-11-13 16:24:48,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 16:24:48,728 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:48,729 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:48,729 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-11-13 16:24:48,729 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:48,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:48,729 INFO L85 PathProgramCache]: Analyzing trace with hash -261377807, now seen corresponding path program 1 times [2024-11-13 16:24:48,730 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:48,730 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [619903121] [2024-11-13 16:24:48,730 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:48,730 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:50,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,085 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:54,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,088 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:54,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,090 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:54,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,095 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 16:24:54,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,100 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 16:24:54,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,103 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 16:24:54,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:54,107 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:24:54,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:54,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [619903121] [2024-11-13 16:24:54,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [619903121] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:24:54,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1469125237] [2024-11-13 16:24:54,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:54,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:54,108 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:24:54,109 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:24:54,110 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-13 16:24:55,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:55,767 INFO L255 TraceCheckSpWp]: Trace formula consists of 2067 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 16:24:55,773 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:24:55,868 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-13 16:24:55,868 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:24:55,868 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1469125237] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:55,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:24:55,868 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-11-13 16:24:55,868 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1179871167] [2024-11-13 16:24:55,868 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:55,869 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:24:55,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:55,870 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:24:55,870 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=406, Unknown=0, NotChecked=0, Total=462 [2024-11-13 16:24:55,870 INFO L87 Difference]: Start difference. First operand 1936 states and 2594 transitions. Second operand has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 16:24:55,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:55,955 INFO L93 Difference]: Finished difference Result 3495 states and 4673 transitions. [2024-11-13 16:24:55,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:24:55,955 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 351 [2024-11-13 16:24:55,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:55,960 INFO L225 Difference]: With dead ends: 3495 [2024-11-13 16:24:55,960 INFO L226 Difference]: Without dead ends: 1936 [2024-11-13 16:24:55,963 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 380 GetRequests, 360 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=56, Invalid=406, Unknown=0, NotChecked=0, Total=462 [2024-11-13 16:24:55,963 INFO L432 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:55,963 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:24:55,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1936 states. [2024-11-13 16:24:56,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1936 to 1936. [2024-11-13 16:24:56,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1936 states, 1900 states have (on average 1.3247368421052632) internal successors, (2517), 1900 states have internal predecessors, (2517), 34 states have call successors, (34), 1 states have call predecessors, (34), 1 states have return successors, (34), 34 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-13 16:24:56,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1936 states to 1936 states and 2585 transitions. [2024-11-13 16:24:56,063 INFO L78 Accepts]: Start accepts. Automaton has 1936 states and 2585 transitions. Word has length 351 [2024-11-13 16:24:56,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:56,063 INFO L471 AbstractCegarLoop]: Abstraction has 1936 states and 2585 transitions. [2024-11-13 16:24:56,063 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 54.0) internal successors, (270), 6 states have internal predecessors, (270), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 16:24:56,063 INFO L276 IsEmpty]: Start isEmpty. Operand 1936 states and 2585 transitions. [2024-11-13 16:24:56,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 16:24:56,070 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:56,070 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:56,100 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-13 16:24:56,271 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:24:56,271 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:56,271 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:56,272 INFO L85 PathProgramCache]: Analyzing trace with hash -176775888, now seen corresponding path program 1 times [2024-11-13 16:24:56,272 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:56,272 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308181794] [2024-11-13 16:24:56,272 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:56,272 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:57,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,777 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2024-11-13 16:24:57,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,781 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:24:57,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,783 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 16:24:57,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,785 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 16:24:57,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,786 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 16:24:57,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,787 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 16:24:57,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:57,789 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:24:57,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:57,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308181794] [2024-11-13 16:24:57,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1308181794] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:57,789 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:57,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:24:57,789 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853187245] [2024-11-13 16:24:57,789 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:57,790 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:24:57,790 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:57,790 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:24:57,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:24:57,791 INFO L87 Difference]: Start difference. First operand 1936 states and 2585 transitions. Second operand has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:58,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:58,462 INFO L93 Difference]: Finished difference Result 2541 states and 3414 transitions. [2024-11-13 16:24:58,462 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:24:58,463 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 351 [2024-11-13 16:24:58,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:58,467 INFO L225 Difference]: With dead ends: 2541 [2024-11-13 16:24:58,468 INFO L226 Difference]: Without dead ends: 2099 [2024-11-13 16:24:58,469 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:24:58,469 INFO L432 NwaCegarLoop]: 395 mSDtfsCounter, 946 mSDsluCounter, 1135 mSDsCounter, 0 mSdLazyCounter, 606 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 949 SdHoareTripleChecker+Valid, 1530 SdHoareTripleChecker+Invalid, 609 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 606 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:58,469 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [949 Valid, 1530 Invalid, 609 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 606 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 16:24:58,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2099 states. [2024-11-13 16:24:58,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2099 to 1521. [2024-11-13 16:24:58,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1521 states, 1491 states have (on average 1.3340040241448692) internal successors, (1989), 1491 states have internal predecessors, (1989), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 16:24:58,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1521 states to 1521 states and 2045 transitions. [2024-11-13 16:24:58,512 INFO L78 Accepts]: Start accepts. Automaton has 1521 states and 2045 transitions. Word has length 351 [2024-11-13 16:24:58,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:58,512 INFO L471 AbstractCegarLoop]: Abstraction has 1521 states and 2045 transitions. [2024-11-13 16:24:58,512 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.0) internal successors, (324), 6 states have internal predecessors, (324), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:58,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1521 states and 2045 transitions. [2024-11-13 16:24:58,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-13 16:24:58,516 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:58,516 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:58,516 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-11-13 16:24:58,516 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:58,517 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:58,517 INFO L85 PathProgramCache]: Analyzing trace with hash -1461397040, now seen corresponding path program 1 times [2024-11-13 16:24:58,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:58,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549406183] [2024-11-13 16:24:58,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:58,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:24:58,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,179 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:24:59,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,181 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 16:24:59,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,183 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 16:24:59,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,184 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 16:24:59,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,186 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 16:24:59,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2024-11-13 16:24:59,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:24:59,189 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-13 16:24:59,189 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:24:59,190 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1549406183] [2024-11-13 16:24:59,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1549406183] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:24:59,190 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:24:59,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:24:59,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [328661907] [2024-11-13 16:24:59,190 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:24:59,190 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:24:59,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:24:59,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:24:59,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:24:59,191 INFO L87 Difference]: Start difference. First operand 1521 states and 2045 transitions. Second operand has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:59,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:24:59,690 INFO L93 Difference]: Finished difference Result 2379 states and 3188 transitions. [2024-11-13 16:24:59,691 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:24:59,691 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 352 [2024-11-13 16:24:59,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:24:59,694 INFO L225 Difference]: With dead ends: 2379 [2024-11-13 16:24:59,694 INFO L226 Difference]: Without dead ends: 1569 [2024-11-13 16:24:59,695 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:24:59,695 INFO L432 NwaCegarLoop]: 399 mSDtfsCounter, 504 mSDsluCounter, 1184 mSDsCounter, 0 mSdLazyCounter, 622 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 504 SdHoareTripleChecker+Valid, 1583 SdHoareTripleChecker+Invalid, 623 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 622 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 16:24:59,695 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [504 Valid, 1583 Invalid, 623 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 622 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 16:24:59,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1569 states. [2024-11-13 16:24:59,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1569 to 1545. [2024-11-13 16:24:59,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1515 states have (on average 1.3287128712871288) internal successors, (2013), 1515 states have internal predecessors, (2013), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 16:24:59,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2069 transitions. [2024-11-13 16:24:59,729 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2069 transitions. Word has length 352 [2024-11-13 16:24:59,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:24:59,729 INFO L471 AbstractCegarLoop]: Abstraction has 1545 states and 2069 transitions. [2024-11-13 16:24:59,729 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:24:59,729 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2069 transitions. [2024-11-13 16:24:59,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 353 [2024-11-13 16:24:59,733 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:24:59,733 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:24:59,734 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-13 16:24:59,734 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:24:59,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:24:59,734 INFO L85 PathProgramCache]: Analyzing trace with hash 1095260226, now seen corresponding path program 1 times [2024-11-13 16:24:59,734 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:24:59,734 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419372439] [2024-11-13 16:24:59,735 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:24:59,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:01,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,619 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:03,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,621 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:03,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,622 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 16:25:03,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,625 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 16:25:03,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,626 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 16:25:03,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,628 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2024-11-13 16:25:03,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:03,631 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:03,631 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:03,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419372439] [2024-11-13 16:25:03,631 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1419372439] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:25:03,631 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [803099919] [2024-11-13 16:25:03,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:03,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:03,632 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:25:03,634 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:25:03,635 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 16:25:05,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:05,708 INFO L255 TraceCheckSpWp]: Trace formula consists of 2070 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 16:25:05,713 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:25:05,794 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2024-11-13 16:25:05,794 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:25:05,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [803099919] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:25:05,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:25:05,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-13 16:25:05,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1093549640] [2024-11-13 16:25:05,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:25:05,795 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:25:05,795 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:05,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:25:05,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-13 16:25:05,796 INFO L87 Difference]: Start difference. First operand 1545 states and 2069 transitions. Second operand has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:05,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:05,867 INFO L93 Difference]: Finished difference Result 2559 states and 3422 transitions. [2024-11-13 16:25:05,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:25:05,867 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 352 [2024-11-13 16:25:05,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:05,870 INFO L225 Difference]: With dead ends: 2559 [2024-11-13 16:25:05,870 INFO L226 Difference]: Without dead ends: 1545 [2024-11-13 16:25:05,871 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 377 GetRequests, 361 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2024-11-13 16:25:05,872 INFO L432 NwaCegarLoop]: 543 mSDtfsCounter, 0 mSDsluCounter, 2153 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2696 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:05,872 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2696 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:25:05,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1545 states. [2024-11-13 16:25:05,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1545 to 1545. [2024-11-13 16:25:05,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1545 states, 1515 states have (on average 1.3194719471947194) internal successors, (1999), 1515 states have internal predecessors, (1999), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 16:25:05,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1545 states to 1545 states and 2055 transitions. [2024-11-13 16:25:05,899 INFO L78 Accepts]: Start accepts. Automaton has 1545 states and 2055 transitions. Word has length 352 [2024-11-13 16:25:05,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:05,899 INFO L471 AbstractCegarLoop]: Abstraction has 1545 states and 2055 transitions. [2024-11-13 16:25:05,899 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 56.0) internal successors, (280), 6 states have internal predecessors, (280), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:05,899 INFO L276 IsEmpty]: Start isEmpty. Operand 1545 states and 2055 transitions. [2024-11-13 16:25:05,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-13 16:25:05,902 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:05,902 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:05,923 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-13 16:25:06,103 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2024-11-13 16:25:06,103 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:06,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:06,103 INFO L85 PathProgramCache]: Analyzing trace with hash -2111060302, now seen corresponding path program 1 times [2024-11-13 16:25:06,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:06,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105822622] [2024-11-13 16:25:06,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:06,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:06,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,062 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:08,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,064 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:08,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,067 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 16:25:08,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,069 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 16:25:08,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,070 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 16:25:08,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,071 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 16:25:08,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:08,072 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:08,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:08,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105822622] [2024-11-13 16:25:08,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105822622] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:25:08,073 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:25:08,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-13 16:25:08,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23133905] [2024-11-13 16:25:08,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:25:08,073 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-13 16:25:08,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:08,074 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-13 16:25:08,074 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:25:08,074 INFO L87 Difference]: Start difference. First operand 1545 states and 2055 transitions. Second operand has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:09,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:09,449 INFO L93 Difference]: Finished difference Result 2744 states and 3642 transitions. [2024-11-13 16:25:09,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-13 16:25:09,450 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 354 [2024-11-13 16:25:09,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:09,455 INFO L225 Difference]: With dead ends: 2744 [2024-11-13 16:25:09,455 INFO L226 Difference]: Without dead ends: 2187 [2024-11-13 16:25:09,457 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2024-11-13 16:25:09,457 INFO L432 NwaCegarLoop]: 589 mSDtfsCounter, 1337 mSDsluCounter, 2686 mSDsCounter, 0 mSdLazyCounter, 1461 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1338 SdHoareTripleChecker+Valid, 3275 SdHoareTripleChecker+Invalid, 1467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 1461 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:09,457 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1338 Valid, 3275 Invalid, 1467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 1461 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-13 16:25:09,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2187 states. [2024-11-13 16:25:09,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2187 to 1939. [2024-11-13 16:25:09,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1939 states, 1909 states have (on average 1.3053954950235727) internal successors, (2492), 1909 states have internal predecessors, (2492), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 16:25:09,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1939 states to 1939 states and 2548 transitions. [2024-11-13 16:25:09,510 INFO L78 Accepts]: Start accepts. Automaton has 1939 states and 2548 transitions. Word has length 354 [2024-11-13 16:25:09,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:09,511 INFO L471 AbstractCegarLoop]: Abstraction has 1939 states and 2548 transitions. [2024-11-13 16:25:09,511 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 36.333333333333336) internal successors, (327), 9 states have internal predecessors, (327), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:09,511 INFO L276 IsEmpty]: Start isEmpty. Operand 1939 states and 2548 transitions. [2024-11-13 16:25:09,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-13 16:25:09,515 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:09,515 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:09,515 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-13 16:25:09,516 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:09,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:09,516 INFO L85 PathProgramCache]: Analyzing trace with hash 1200514099, now seen corresponding path program 1 times [2024-11-13 16:25:09,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:09,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [189784098] [2024-11-13 16:25:09,516 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:09,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:11,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,773 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:14,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,775 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:14,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,777 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:25:14,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,779 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 16:25:14,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,781 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 16:25:14,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,783 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 16:25:14,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:14,785 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 50 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-13 16:25:14,785 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:14,785 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [189784098] [2024-11-13 16:25:14,785 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [189784098] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:25:14,785 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1677768143] [2024-11-13 16:25:14,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:14,786 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:14,786 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:25:14,787 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:25:14,788 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-13 16:25:17,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:17,212 INFO L255 TraceCheckSpWp]: Trace formula consists of 2076 conjuncts, 55 conjuncts are in the unsatisfiable core [2024-11-13 16:25:17,222 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:25:18,347 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 120 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 16:25:18,347 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:25:20,468 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 82 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:20,468 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1677768143] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 16:25:20,468 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 16:25:20,468 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 10, 12] total 35 [2024-11-13 16:25:20,468 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089959746] [2024-11-13 16:25:20,468 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 16:25:20,469 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2024-11-13 16:25:20,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:20,469 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-13 16:25:20,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=1061, Unknown=0, NotChecked=0, Total=1190 [2024-11-13 16:25:20,470 INFO L87 Difference]: Start difference. First operand 1939 states and 2548 transitions. Second operand has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-13 16:25:29,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:29,228 INFO L93 Difference]: Finished difference Result 8926 states and 11626 transitions. [2024-11-13 16:25:29,228 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2024-11-13 16:25:29,229 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 354 [2024-11-13 16:25:29,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:29,241 INFO L225 Difference]: With dead ends: 8926 [2024-11-13 16:25:29,242 INFO L226 Difference]: Without dead ends: 7610 [2024-11-13 16:25:29,246 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 803 GetRequests, 703 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2626 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=1322, Invalid=8980, Unknown=0, NotChecked=0, Total=10302 [2024-11-13 16:25:29,247 INFO L432 NwaCegarLoop]: 799 mSDtfsCounter, 3932 mSDsluCounter, 16951 mSDsCounter, 0 mSdLazyCounter, 11131 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3935 SdHoareTripleChecker+Valid, 17750 SdHoareTripleChecker+Invalid, 11152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 11131 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.3s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:29,247 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3935 Valid, 17750 Invalid, 11152 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [21 Valid, 11131 Invalid, 0 Unknown, 0 Unchecked, 6.3s Time] [2024-11-13 16:25:29,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7610 states. [2024-11-13 16:25:29,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7610 to 3834. [2024-11-13 16:25:29,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3834 states, 3767 states have (on average 1.293071409609769) internal successors, (4871), 3767 states have internal predecessors, (4871), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-13 16:25:29,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3834 states to 3834 states and 5001 transitions. [2024-11-13 16:25:29,373 INFO L78 Accepts]: Start accepts. Automaton has 3834 states and 5001 transitions. Word has length 354 [2024-11-13 16:25:29,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:29,373 INFO L471 AbstractCegarLoop]: Abstraction has 3834 states and 5001 transitions. [2024-11-13 16:25:29,374 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 23.857142857142858) internal successors, (835), 35 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-13 16:25:29,374 INFO L276 IsEmpty]: Start isEmpty. Operand 3834 states and 5001 transitions. [2024-11-13 16:25:29,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-13 16:25:29,381 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:29,382 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:29,416 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-13 16:25:29,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2024-11-13 16:25:29,582 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:29,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:29,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1341234832, now seen corresponding path program 1 times [2024-11-13 16:25:29,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:29,583 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [146507997] [2024-11-13 16:25:29,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:29,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:30,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,693 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:32,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,695 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:32,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,697 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:25:32,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,698 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 16:25:32,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,699 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 16:25:32,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,701 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289 [2024-11-13 16:25:32,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:32,705 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:32,706 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:32,706 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [146507997] [2024-11-13 16:25:32,706 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [146507997] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:25:32,706 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1014662973] [2024-11-13 16:25:32,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:32,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:32,706 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:25:32,710 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:25:32,712 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 16:25:34,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:34,916 INFO L255 TraceCheckSpWp]: Trace formula consists of 2079 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 16:25:34,925 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:25:35,017 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-13 16:25:35,018 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:25:35,018 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1014662973] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:25:35,018 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:25:35,018 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [13] total 17 [2024-11-13 16:25:35,018 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1372542508] [2024-11-13 16:25:35,018 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:25:35,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:25:35,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:35,021 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:25:35,021 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-13 16:25:35,021 INFO L87 Difference]: Start difference. First operand 3834 states and 5001 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:35,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:35,157 INFO L93 Difference]: Finished difference Result 7425 states and 9661 transitions. [2024-11-13 16:25:35,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:25:35,158 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-13 16:25:35,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:35,167 INFO L225 Difference]: With dead ends: 7425 [2024-11-13 16:25:35,167 INFO L226 Difference]: Without dead ends: 3834 [2024-11-13 16:25:35,171 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 382 GetRequests, 365 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=236, Unknown=0, NotChecked=0, Total=272 [2024-11-13 16:25:35,172 INFO L432 NwaCegarLoop]: 542 mSDtfsCounter, 0 mSDsluCounter, 2149 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2691 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:35,172 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2691 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:25:35,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3834 states. [2024-11-13 16:25:35,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3834 to 3834. [2024-11-13 16:25:35,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3834 states, 3767 states have (on average 1.290151314043005) internal successors, (4860), 3767 states have internal predecessors, (4860), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-13 16:25:35,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3834 states to 3834 states and 4990 transitions. [2024-11-13 16:25:35,333 INFO L78 Accepts]: Start accepts. Automaton has 3834 states and 4990 transitions. Word has length 355 [2024-11-13 16:25:35,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:35,334 INFO L471 AbstractCegarLoop]: Abstraction has 3834 states and 4990 transitions. [2024-11-13 16:25:35,334 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:25:35,334 INFO L276 IsEmpty]: Start isEmpty. Operand 3834 states and 4990 transitions. [2024-11-13 16:25:35,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 16:25:35,341 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:35,342 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:35,375 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-13 16:25:35,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:35,542 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:35,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:35,543 INFO L85 PathProgramCache]: Analyzing trace with hash -752288331, now seen corresponding path program 1 times [2024-11-13 16:25:35,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:35,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555273143] [2024-11-13 16:25:35,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:35,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:36,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,412 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:38,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,414 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:38,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,416 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:25:38,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,417 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 16:25:38,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,418 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 16:25:38,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,420 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290 [2024-11-13 16:25:38,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:38,422 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 2 proven. 87 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:38,422 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:38,422 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1555273143] [2024-11-13 16:25:38,423 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1555273143] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:25:38,423 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [106000289] [2024-11-13 16:25:38,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:38,423 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:38,423 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:25:38,425 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:25:38,426 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-13 16:25:41,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:41,444 INFO L255 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 97 conjuncts are in the unsatisfiable core [2024-11-13 16:25:41,457 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:25:44,581 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 118 proven. 7 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 16:25:44,581 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:25:48,480 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 83 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:48,480 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [106000289] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 16:25:48,481 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 16:25:48,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 19, 12] total 40 [2024-11-13 16:25:48,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1255620336] [2024-11-13 16:25:48,481 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 16:25:48,482 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 40 states [2024-11-13 16:25:48,483 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:48,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2024-11-13 16:25:48,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=265, Invalid=1295, Unknown=0, NotChecked=0, Total=1560 [2024-11-13 16:25:48,485 INFO L87 Difference]: Start difference. First operand 3834 states and 4990 transitions. Second operand has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-13 16:25:55,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:55,368 INFO L93 Difference]: Finished difference Result 19225 states and 24795 transitions. [2024-11-13 16:25:55,368 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2024-11-13 16:25:55,369 INFO L78 Accepts]: Start accepts. Automaton has has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 356 [2024-11-13 16:25:55,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:55,392 INFO L225 Difference]: With dead ends: 19225 [2024-11-13 16:25:55,392 INFO L226 Difference]: Without dead ends: 15640 [2024-11-13 16:25:55,401 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 788 GetRequests, 698 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2076 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1137, Invalid=6873, Unknown=0, NotChecked=0, Total=8010 [2024-11-13 16:25:55,403 INFO L432 NwaCegarLoop]: 416 mSDtfsCounter, 3870 mSDsluCounter, 10326 mSDsCounter, 0 mSdLazyCounter, 7577 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3870 SdHoareTripleChecker+Valid, 10742 SdHoareTripleChecker+Invalid, 7604 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 7577 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.8s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:55,403 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3870 Valid, 10742 Invalid, 7604 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [27 Valid, 7577 Invalid, 0 Unknown, 0 Unchecked, 4.8s Time] [2024-11-13 16:25:55,413 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15640 states. [2024-11-13 16:25:55,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15640 to 3832. [2024-11-13 16:25:55,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3832 states, 3765 states have (on average 1.2895086321381142) internal successors, (4855), 3765 states have internal predecessors, (4855), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-13 16:25:55,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3832 states to 3832 states and 4985 transitions. [2024-11-13 16:25:55,626 INFO L78 Accepts]: Start accepts. Automaton has 3832 states and 4985 transitions. Word has length 356 [2024-11-13 16:25:55,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:55,627 INFO L471 AbstractCegarLoop]: Abstraction has 3832 states and 4985 transitions. [2024-11-13 16:25:55,627 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 40 states, 40 states have (on average 23.55) internal successors, (942), 40 states have internal predecessors, (942), 6 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-13 16:25:55,628 INFO L276 IsEmpty]: Start isEmpty. Operand 3832 states and 4985 transitions. [2024-11-13 16:25:55,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 16:25:55,635 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:55,635 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:55,668 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-13 16:25:55,836 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:25:55,836 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:55,836 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:55,836 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-13 16:25:55,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:55,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250430650] [2024-11-13 16:25:55,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:55,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:56,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,474 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:56,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,475 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:56,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,476 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:25:56,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,478 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 16:25:56,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,479 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 16:25:56,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,480 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290 [2024-11-13 16:25:56,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:56,481 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 53 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-13 16:25:56,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:56,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250430650] [2024-11-13 16:25:56,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [250430650] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:25:56,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:25:56,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 16:25:56,482 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653741365] [2024-11-13 16:25:56,482 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:25:56,482 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 16:25:56,482 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:56,483 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 16:25:56,483 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:25:56,483 INFO L87 Difference]: Start difference. First operand 3832 states and 4985 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:25:56,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:56,575 INFO L93 Difference]: Finished difference Result 6479 states and 8420 transitions. [2024-11-13 16:25:56,575 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:25:56,575 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 356 [2024-11-13 16:25:56,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:56,582 INFO L225 Difference]: With dead ends: 6479 [2024-11-13 16:25:56,582 INFO L226 Difference]: Without dead ends: 3856 [2024-11-13 16:25:56,585 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 16:25:56,586 INFO L432 NwaCegarLoop]: 541 mSDtfsCounter, 0 mSDsluCounter, 1072 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1613 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:56,586 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1613 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:25:56,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3856 states. [2024-11-13 16:25:56,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3856 to 3856. [2024-11-13 16:25:56,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3856 states, 3789 states have (on average 1.2855634732119292) internal successors, (4871), 3789 states have internal predecessors, (4871), 65 states have call successors, (65), 1 states have call predecessors, (65), 1 states have return successors, (65), 65 states have call predecessors, (65), 65 states have call successors, (65) [2024-11-13 16:25:56,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3856 states to 3856 states and 5001 transitions. [2024-11-13 16:25:56,721 INFO L78 Accepts]: Start accepts. Automaton has 3856 states and 5001 transitions. Word has length 356 [2024-11-13 16:25:56,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:56,721 INFO L471 AbstractCegarLoop]: Abstraction has 3856 states and 5001 transitions. [2024-11-13 16:25:56,721 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:25:56,721 INFO L276 IsEmpty]: Start isEmpty. Operand 3856 states and 5001 transitions. [2024-11-13 16:25:56,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-13 16:25:56,728 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:56,728 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:56,728 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-13 16:25:56,728 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:56,729 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:56,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1171553710, now seen corresponding path program 1 times [2024-11-13 16:25:56,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:56,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097174380] [2024-11-13 16:25:56,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:56,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:57,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,808 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:25:57,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,809 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:25:57,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,811 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:25:57,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,812 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 16:25:57,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,813 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 16:25:57,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,814 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290 [2024-11-13 16:25:57,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:25:57,816 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:25:57,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:25:57,816 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097174380] [2024-11-13 16:25:57,816 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2097174380] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:25:57,816 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 16:25:57,816 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 16:25:57,816 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817338971] [2024-11-13 16:25:57,816 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:25:57,817 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 16:25:57,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:25:57,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 16:25:57,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 16:25:57,818 INFO L87 Difference]: Start difference. First operand 3856 states and 5001 transitions. Second operand has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:25:57,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:25:57,963 INFO L93 Difference]: Finished difference Result 6244 states and 8144 transitions. [2024-11-13 16:25:57,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 16:25:57,963 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 357 [2024-11-13 16:25:57,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:25:57,971 INFO L225 Difference]: With dead ends: 6244 [2024-11-13 16:25:57,971 INFO L226 Difference]: Without dead ends: 4899 [2024-11-13 16:25:57,974 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-13 16:25:57,974 INFO L432 NwaCegarLoop]: 922 mSDtfsCounter, 370 mSDsluCounter, 3293 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 4215 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 16:25:57,974 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 4215 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 16:25:57,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4899 states. [2024-11-13 16:25:58,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4899 to 4062. [2024-11-13 16:25:58,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4062 states, 3986 states have (on average 1.2852483692925238) internal successors, (5123), 3986 states have internal predecessors, (5123), 74 states have call successors, (74), 1 states have call predecessors, (74), 1 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-13 16:25:58,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4062 states to 4062 states and 5271 transitions. [2024-11-13 16:25:58,164 INFO L78 Accepts]: Start accepts. Automaton has 4062 states and 5271 transitions. Word has length 357 [2024-11-13 16:25:58,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:25:58,165 INFO L471 AbstractCegarLoop]: Abstraction has 4062 states and 5271 transitions. [2024-11-13 16:25:58,165 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 55.0) internal successors, (330), 6 states have internal predecessors, (330), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 16:25:58,165 INFO L276 IsEmpty]: Start isEmpty. Operand 4062 states and 5271 transitions. [2024-11-13 16:25:58,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-13 16:25:58,173 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:25:58,174 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:25:58,174 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-11-13 16:25:58,174 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:25:58,174 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:25:58,174 INFO L85 PathProgramCache]: Analyzing trace with hash -1148173526, now seen corresponding path program 1 times [2024-11-13 16:25:58,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:25:58,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065244117] [2024-11-13 16:25:58,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:25:58,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:25:59,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,372 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 16:26:01,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,374 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 16:26:01,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,376 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 16:26:01,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,378 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 16:26:01,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,380 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 16:26:01,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,382 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290 [2024-11-13 16:26:01,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:01,385 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:26:01,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 16:26:01,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065244117] [2024-11-13 16:26:01,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1065244117] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:26:01,385 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [27557044] [2024-11-13 16:26:01,386 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:01,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:26:01,386 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:26:01,388 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:26:01,390 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-13 16:26:03,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:03,773 INFO L255 TraceCheckSpWp]: Trace formula consists of 2083 conjuncts, 76 conjuncts are in the unsatisfiable core [2024-11-13 16:26:03,784 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:07,237 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 2 proven. 88 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 16:26:07,237 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:26:14,537 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 34 proven. 54 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-13 16:26:14,537 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [27557044] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 16:26:14,537 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 16:26:14,537 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 19, 13] total 37 [2024-11-13 16:26:14,538 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2017406312] [2024-11-13 16:26:14,538 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 16:26:14,538 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-11-13 16:26:14,538 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 16:26:14,539 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-11-13 16:26:14,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=1140, Unknown=0, NotChecked=0, Total=1332 [2024-11-13 16:26:14,540 INFO L87 Difference]: Start difference. First operand 4062 states and 5271 transitions. Second operand has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-11-13 16:26:18,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:26:18,983 INFO L93 Difference]: Finished difference Result 10487 states and 13558 transitions. [2024-11-13 16:26:18,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2024-11-13 16:26:18,984 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) Word has length 357 [2024-11-13 16:26:18,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:26:18,992 INFO L225 Difference]: With dead ends: 10487 [2024-11-13 16:26:18,992 INFO L226 Difference]: Without dead ends: 8924 [2024-11-13 16:26:18,996 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 762 GetRequests, 701 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 849 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=541, Invalid=3241, Unknown=0, NotChecked=0, Total=3782 [2024-11-13 16:26:18,996 INFO L432 NwaCegarLoop]: 432 mSDtfsCounter, 2891 mSDsluCounter, 7737 mSDsCounter, 0 mSdLazyCounter, 5373 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2894 SdHoareTripleChecker+Valid, 8169 SdHoareTripleChecker+Invalid, 5390 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 5373 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.3s IncrementalHoareTripleChecker+Time [2024-11-13 16:26:18,996 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2894 Valid, 8169 Invalid, 5390 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 5373 Invalid, 0 Unknown, 0 Unchecked, 3.3s Time] [2024-11-13 16:26:19,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8924 states. [2024-11-13 16:26:19,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8924 to 4054. [2024-11-13 16:26:19,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4054 states, 3978 states have (on average 1.2838109602815486) internal successors, (5107), 3978 states have internal predecessors, (5107), 74 states have call successors, (74), 1 states have call predecessors, (74), 1 states have return successors, (74), 74 states have call predecessors, (74), 74 states have call successors, (74) [2024-11-13 16:26:19,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4054 states to 4054 states and 5255 transitions. [2024-11-13 16:26:19,163 INFO L78 Accepts]: Start accepts. Automaton has 4054 states and 5255 transitions. Word has length 357 [2024-11-13 16:26:19,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:26:19,164 INFO L471 AbstractCegarLoop]: Abstraction has 4054 states and 5255 transitions. [2024-11-13 16:26:19,164 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 22.675675675675677) internal successors, (839), 37 states have internal predecessors, (839), 5 states have call successors, (15), 1 states have call predecessors, (15), 1 states have return successors, (15), 5 states have call predecessors, (15), 5 states have call successors, (15) [2024-11-13 16:26:19,164 INFO L276 IsEmpty]: Start isEmpty. Operand 4054 states and 5255 transitions. [2024-11-13 16:26:19,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-13 16:26:19,171 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:26:19,171 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:26:19,204 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-13 16:26:19,372 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2024-11-13 16:26:19,372 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:26:19,372 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:26:19,372 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-13 16:26:19,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 16:26:19,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492452105] [2024-11-13 16:26:19,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:19,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 16:26:21,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 16:26:21,894 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 16:26:24,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 16:26:24,406 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 16:26:24,406 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-13 16:26:24,407 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-13 16:26:24,408 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-11-13 16:26:24,411 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:26:24,704 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-13 16:26:24,709 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.11 04:26:24 BoogieIcfgContainer [2024-11-13 16:26:24,710 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-13 16:26:24,710 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-13 16:26:24,710 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-13 16:26:24,711 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-13 16:26:24,712 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 04:23:15" (3/4) ... [2024-11-13 16:26:24,715 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-13 16:26:24,715 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-13 16:26:24,718 INFO L158 Benchmark]: Toolchain (without parser) took 193746.14ms. Allocated memory was 142.6MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 118.1MB in the beginning and 1.9GB in the end (delta: -1.8GB). Peak memory consumption was 373.4MB. Max. memory is 16.1GB. [2024-11-13 16:26:24,718 INFO L158 Benchmark]: CDTParser took 1.20ms. Allocated memory is still 167.8MB. Free memory is still 104.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 16:26:24,718 INFO L158 Benchmark]: CACSL2BoogieTranslator took 720.27ms. Allocated memory is still 142.6MB. Free memory was 118.1MB in the beginning and 89.5MB in the end (delta: 28.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-13 16:26:24,718 INFO L158 Benchmark]: Boogie Procedure Inliner took 290.88ms. Allocated memory is still 142.6MB. Free memory was 89.5MB in the beginning and 61.1MB in the end (delta: 28.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-13 16:26:24,719 INFO L158 Benchmark]: Boogie Preprocessor took 343.48ms. Allocated memory is still 142.6MB. Free memory was 61.1MB in the beginning and 98.8MB in the end (delta: -37.8MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. [2024-11-13 16:26:24,719 INFO L158 Benchmark]: RCFGBuilder took 3185.43ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 61.0MB in the end (delta: 37.8MB). Peak memory consumption was 68.9MB. Max. memory is 16.1GB. [2024-11-13 16:26:24,719 INFO L158 Benchmark]: TraceAbstraction took 189191.23ms. Allocated memory was 142.6MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 60.1MB in the beginning and 1.9GB in the end (delta: -1.9GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2024-11-13 16:26:24,719 INFO L158 Benchmark]: Witness Printer took 5.23ms. Allocated memory is still 2.3GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 204.1kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 16:26:24,720 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.20ms. Allocated memory is still 167.8MB. Free memory is still 104.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 720.27ms. Allocated memory is still 142.6MB. Free memory was 118.1MB in the beginning and 89.5MB in the end (delta: 28.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 290.88ms. Allocated memory is still 142.6MB. Free memory was 89.5MB in the beginning and 61.1MB in the end (delta: 28.5MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 343.48ms. Allocated memory is still 142.6MB. Free memory was 61.1MB in the beginning and 98.8MB in the end (delta: -37.8MB). Peak memory consumption was 39.1MB. Max. memory is 16.1GB. * RCFGBuilder took 3185.43ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 61.0MB in the end (delta: 37.8MB). Peak memory consumption was 68.9MB. Max. memory is 16.1GB. * TraceAbstraction took 189191.23ms. Allocated memory was 142.6MB in the beginning and 2.3GB in the end (delta: 2.2GB). Free memory was 60.1MB in the beginning and 1.9GB in the end (delta: -1.9GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. * Witness Printer took 5.23ms. Allocated memory is still 2.3GB. Free memory was 1.9GB in the beginning and 1.9GB in the end (delta: 204.1kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 126, overapproximation of bitwiseOr at line 290, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 210, overapproximation of bitwiseAnd at line 234, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 515, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 299, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 228. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 32); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (32 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_uint() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_uint() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_uint() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_uint() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_uint() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_uint() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_uint() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_uint() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_uint() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_uint() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_uint() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uint() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uint() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=4294967295, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_uint() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_uint() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 188.8s, OverallIterations: 56, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 42.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 42079 SdHoareTripleChecker+Valid, 31.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 41998 mSDsluCounter, 134952 SdHoareTripleChecker+Invalid, 26.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 105422 mSDsCounter, 156 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 41881 IncrementalHoareTripleChecker+Invalid, 42037 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 156 mSolverCounterUnsat, 29530 mSDtfsCounter, 41881 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 5750 GetRequests, 5149 SyntacticMatches, 6 SemanticMatches, 595 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6354 ImplicationChecksByTransitivity, 11.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4062occurred in iteration=54, InterpolantAutomatonStates: 450, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.7s AutomataMinimizationTime, 55 MinimizatonAttempts, 24406 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.5s SsaConstructionTime, 38.7s SatisfiabilityAnalysisTime, 83.2s InterpolantComputationTime, 18212 NumberOfCodeBlocks, 18212 NumberOfCodeBlocksAsserted, 65 NumberOfCheckSat, 19199 ConstructedInterpolants, 0 QuantifiedInterpolants, 108620 SizeOfPredicates, 33 NumberOfNonLiveVariables, 18623 ConjunctsInSsa, 321 ConjunctsInUnsatCore, 68 InterpolantComputations, 51 PerfectInterpolantSequences, 6710/7434 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-13 16:26:24,784 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 16:26:27,722 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 16:26:27,864 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-13 16:26:27,872 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 16:26:27,874 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 16:26:27,930 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 16:26:27,934 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 16:26:27,935 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 16:26:27,935 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 16:26:27,935 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 16:26:27,935 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 16:26:27,935 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 16:26:27,936 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 16:26:27,936 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 16:26:27,936 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 16:26:27,936 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 16:26:27,937 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 16:26:27,938 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 16:26:27,938 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 16:26:27,938 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 16:26:27,939 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5bfb987fcec0e4e87ab47a565086b76b03edc9a60525cd8ee77a0c461c0fdaaa [2024-11-13 16:26:28,331 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 16:26:28,341 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 16:26:28,344 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 16:26:28,347 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 16:26:28,347 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 16:26:28,349 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c Unable to find full path for "g++" [2024-11-13 16:26:30,447 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 16:26:30,851 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 16:26:30,851 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-13 16:26:30,870 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/09f4c285d/600745a35e774d2b8a2b1591212da5af/FLAG12ed46406 [2024-11-13 16:26:30,899 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/data/09f4c285d/600745a35e774d2b8a2b1591212da5af [2024-11-13 16:26:30,904 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 16:26:30,906 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 16:26:30,909 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 16:26:30,910 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 16:26:30,916 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 16:26:30,918 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 04:26:30" (1/1) ... [2024-11-13 16:26:30,921 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@b1a7848 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:30, skipping insertion in model container [2024-11-13 16:26:30,921 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 04:26:30" (1/1) ... [2024-11-13 16:26:30,971 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 16:26:31,191 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-13 16:26:31,402 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 16:26:31,429 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 16:26:31,442 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c[1279,1292] [2024-11-13 16:26:31,537 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 16:26:31,559 INFO L204 MainTranslator]: Completed translation [2024-11-13 16:26:31,559 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31 WrapperNode [2024-11-13 16:26:31,560 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 16:26:31,561 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 16:26:31,561 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 16:26:31,561 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 16:26:31,568 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,585 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,662 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-13 16:26:31,663 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 16:26:31,663 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 16:26:31,663 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 16:26:31,663 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 16:26:31,685 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,685 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,704 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,745 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 16:26:31,745 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,745 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,773 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,780 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,786 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,793 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,805 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 16:26:31,809 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 16:26:31,809 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 16:26:31,809 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 16:26:31,810 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (1/1) ... [2024-11-13 16:26:31,827 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 16:26:31,844 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:26:31,858 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 16:26:31,866 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 16:26:31,896 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 16:26:31,897 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-13 16:26:31,897 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 16:26:31,898 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 16:26:31,899 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 16:26:31,899 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 16:26:32,203 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 16:26:32,205 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 16:26:32,996 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-13 16:26:32,996 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 16:26:33,007 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 16:26:33,007 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 16:26:33,008 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 04:26:33 BoogieIcfgContainer [2024-11-13 16:26:33,008 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 16:26:33,010 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 16:26:33,010 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 16:26:33,020 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 16:26:33,021 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 04:26:30" (1/3) ... [2024-11-13 16:26:33,021 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fc4b6a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 04:26:33, skipping insertion in model container [2024-11-13 16:26:33,021 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 04:26:31" (2/3) ... [2024-11-13 16:26:33,022 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fc4b6a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 04:26:33, skipping insertion in model container [2024-11-13 16:26:33,022 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 04:26:33" (3/3) ... [2024-11-13 16:26:33,024 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c [2024-11-13 16:26:33,042 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 16:26:33,045 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w32_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 16:26:33,112 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 16:26:33,133 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5f0bb356, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 16:26:33,134 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 16:26:33,139 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 16:26:33,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-13 16:26:33,149 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:26:33,149 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 16:26:33,150 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:26:33,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:26:33,157 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-13 16:26:33,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 16:26:33,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [970702434] [2024-11-13 16:26:33,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:33,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:26:33,176 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:26:33,179 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:26:33,181 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 16:26:33,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:33,679 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-13 16:26:33,692 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:34,134 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-13 16:26:34,134 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:26:34,404 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 16:26:34,404 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [970702434] [2024-11-13 16:26:34,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [970702434] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:26:34,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1429512516] [2024-11-13 16:26:34,405 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:34,405 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:34,406 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 16:26:34,408 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 16:26:34,412 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-13 16:26:35,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:35,039 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 16:26:35,051 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:35,202 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 16:26:35,203 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 16:26:35,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1429512516] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 16:26:35,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 16:26:35,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-13 16:26:35,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043366842] [2024-11-13 16:26:35,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 16:26:35,212 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 16:26:35,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 16:26:35,240 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 16:26:35,241 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:26:35,243 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:26:35,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:26:35,385 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-13 16:26:35,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 16:26:35,389 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-13 16:26:35,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:26:35,396 INFO L225 Difference]: With dead ends: 43 [2024-11-13 16:26:35,396 INFO L226 Difference]: Without dead ends: 25 [2024-11-13 16:26:35,400 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 16:26:35,406 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:26:35,407 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 16:26:35,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-13 16:26:35,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-13 16:26:35,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 16:26:35,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-13 16:26:35,463 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-13 16:26:35,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:26:35,464 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-13 16:26:35,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 16:26:35,465 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-13 16:26:35,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-13 16:26:35,469 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:26:35,469 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-13 16:26:35,495 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 16:26:35,673 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-11-13 16:26:35,870 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:35,870 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:26:35,871 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:26:35,871 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-13 16:26:35,872 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 16:26:35,872 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [771700720] [2024-11-13 16:26:35,872 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:35,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:26:35,875 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:26:35,876 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:26:35,877 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 16:26:36,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:36,369 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-13 16:26:36,386 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:37,143 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 16:26:37,143 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:26:37,369 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 16:26:37,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [771700720] [2024-11-13 16:26:37,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [771700720] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:26:37,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [768931129] [2024-11-13 16:26:37,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 16:26:37,369 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:37,370 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 16:26:37,372 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 16:26:37,375 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-13 16:26:38,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 16:26:38,396 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-13 16:26:38,415 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:38,845 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 16:26:38,846 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:26:39,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [768931129] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:26:39,010 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 16:26:39,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-13 16:26:39,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1469252554] [2024-11-13 16:26:39,011 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 16:26:39,012 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 16:26:39,012 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 16:26:39,013 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 16:26:39,013 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-13 16:26:39,013 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:26:39,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:26:39,507 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-13 16:26:39,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 16:26:39,508 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-13 16:26:39,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:26:39,510 INFO L225 Difference]: With dead ends: 36 [2024-11-13 16:26:39,510 INFO L226 Difference]: Without dead ends: 34 [2024-11-13 16:26:39,512 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-13 16:26:39,513 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 16:26:39,513 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 16:26:39,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-13 16:26:39,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-13 16:26:39,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 16:26:39,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-13 16:26:39,536 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-13 16:26:39,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:26:39,537 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-13 16:26:39,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 16:26:39,537 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-13 16:26:39,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-13 16:26:39,541 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:26:39,541 INFO L215 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-13 16:26:39,567 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-13 16:26:39,754 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-13 16:26:39,951 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:39,951 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:26:39,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:26:39,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-13 16:26:39,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 16:26:39,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1207817548] [2024-11-13 16:26:39,954 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 16:26:39,954 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:26:39,954 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:26:39,956 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:26:39,957 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 16:26:40,574 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 16:26:40,575 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 16:26:40,583 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-13 16:26:40,602 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:26:46,008 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 16:26:46,009 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:26:51,878 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|)) (.cse15 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse7 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (.cse12 (or (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8))) .cse15)) (.cse14 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse13 (not .cse15))) (let ((.cse6 (and .cse12 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse14)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse13))) (.cse8 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 32))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|)))) (.cse1 (and .cse12 (or .cse13 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse14)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|))))))))))) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 32))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (.cse5 (not .cse7)) (.cse0 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (not .cse0) (let ((.cse4 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32)))))) (let ((.cse3 (not .cse4))) (and (or .cse1 (and (or .cse2 .cse3) (or .cse4 .cse5))) (or .cse6 (and (or .cse4 .cse7) (or .cse8 .cse3))))))) (or (let ((.cse10 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse11 (not .cse10))) (and (or .cse6 (and (or .cse10 .cse7) (or .cse11 .cse8))) (or .cse1 (and (or .cse11 .cse2) (or .cse10 .cse5)))))) .cse0))))) is different from false [2024-11-13 16:26:52,101 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 16:26:52,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1207817548] [2024-11-13 16:26:52,102 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1207817548] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:26:52,102 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [120521637] [2024-11-13 16:26:52,103 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 16:26:52,103 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 16:26:52,104 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 16:26:52,106 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 16:26:52,112 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-13 16:26:53,332 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 16:26:53,333 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 16:26:53,365 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-13 16:26:53,407 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:27:06,803 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 16:27:06,803 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:27:13,736 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse6 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~state_55~0#1| |c_ULTIMATE.start_main_~mask_SORT_3~0#1|))) (.cse13 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_21|)))))))))))))) (.cse12 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|))) (let ((.cse5 (and .cse13 (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))))))) (.cse2 (not .cse6)) (.cse3 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 32))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|))))) (.cse7 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 32))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|)))) (.cse8 (and (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse12)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))) (_ bv0 8))) .cse13)) (.cse0 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (and (or (not .cse0) (let ((.cse1 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32)))))) (let ((.cse4 (not .cse1))) (and (or (and (or .cse1 .cse2) (or .cse3 .cse4)) .cse5) (or (and (or .cse1 .cse6) (or .cse7 .cse4)) .cse8))))) (or (let ((.cse10 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse11 (not .cse10))) (and (or .cse5 (and (or .cse10 .cse2) (or .cse11 .cse3))) (or (and (or .cse10 .cse6) (or .cse11 .cse7)) .cse8)))) .cse0))))) is different from false [2024-11-13 16:27:14,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [120521637] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:27:14,701 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 16:27:14,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-11-13 16:27:14,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1353855686] [2024-11-13 16:27:14,701 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 16:27:14,702 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-13 16:27:14,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 16:27:14,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-13 16:27:14,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=203, Unknown=3, NotChecked=58, Total=306 [2024-11-13 16:27:14,704 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-13 16:27:40,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 16:27:40,353 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-11-13 16:27:40,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-13 16:27:40,354 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) Word has length 65 [2024-11-13 16:27:40,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 16:27:40,355 INFO L225 Difference]: With dead ends: 46 [2024-11-13 16:27:40,355 INFO L226 Difference]: Without dead ends: 44 [2024-11-13 16:27:40,356 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 39.4s TimeCoverageRelationStatistics Valid=111, Invalid=541, Unknown=6, NotChecked=98, Total=756 [2024-11-13 16:27:40,356 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 16 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 179 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.1s IncrementalHoareTripleChecker+Time [2024-11-13 16:27:40,357 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 76 Invalid, 179 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 168 Invalid, 0 Unknown, 0 Unchecked, 3.1s Time] [2024-11-13 16:27:40,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2024-11-13 16:27:40,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2024-11-13 16:27:40,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 16:27:40,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2024-11-13 16:27:40,376 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2024-11-13 16:27:40,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 16:27:40,377 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2024-11-13 16:27:40,377 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-13 16:27:40,377 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2024-11-13 16:27:40,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-11-13 16:27:40,379 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 16:27:40,379 INFO L215 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-11-13 16:27:40,387 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-13 16:27:40,597 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-13 16:27:40,780 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:27:40,780 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 16:27:40,780 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 16:27:40,781 INFO L85 PathProgramCache]: Analyzing trace with hash -1616345373, now seen corresponding path program 3 times [2024-11-13 16:27:40,782 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 16:27:40,782 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [774618639] [2024-11-13 16:27:40,782 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 16:27:40,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 16:27:40,782 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 16:27:40,786 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 16:27:40,787 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 16:27:41,796 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-13 16:27:41,797 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 16:27:41,808 INFO L255 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 224 conjuncts are in the unsatisfiable core [2024-11-13 16:27:41,843 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:29:37,318 WARN L286 SmtUtils]: Spent 8.95s on a formula simplification. DAG size of input: 358 DAG size of output: 354 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:29:52,678 WARN L286 SmtUtils]: Spent 6.51s on a formula simplification that was a NOOP. DAG size: 364 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:30:07,650 WARN L286 SmtUtils]: Spent 6.10s on a formula simplification that was a NOOP. DAG size: 357 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:30:54,487 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 111 refuted. 0 times theorem prover too weak. 159 trivial. 0 not checked. [2024-11-13 16:30:54,487 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 16:31:39,385 WARN L286 SmtUtils]: Spent 20.11s on a formula simplification. DAG size of input: 283 DAG size of output: 254 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:31:49,849 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 16:31:49,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [774618639] [2024-11-13 16:31:49,850 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [774618639] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 16:31:49,850 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [740412203] [2024-11-13 16:31:49,850 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 16:31:49,850 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 16:31:49,850 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 16:31:49,854 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 16:31:49,857 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_2a6c54e0-e1bc-484b-b705-d977aff3e557/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (9)] Waiting until timeout for monitored process [2024-11-13 16:31:51,603 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-13 16:31:51,603 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 16:31:51,653 INFO L255 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 241 conjuncts are in the unsatisfiable core [2024-11-13 16:31:51,690 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 16:34:07,852 WARN L286 SmtUtils]: Spent 8.49s on a formula simplification that was a NOOP. DAG size: 394 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:34:28,197 WARN L286 SmtUtils]: Spent 8.16s on a formula simplification that was a NOOP. DAG size: 412 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 16:34:46,599 WARN L286 SmtUtils]: Spent 7.53s on a formula simplification that was a NOOP. DAG size: 405 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)