./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 13:14:52,553 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 13:14:52,624 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-13 13:14:52,629 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 13:14:52,629 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 13:14:52,650 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 13:14:52,651 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 13:14:52,651 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 13:14:52,651 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 13:14:52,651 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 13:14:52,651 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 13:14:52,652 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 13:14:52,652 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 13:14:52,652 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 13:14:52,652 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 13:14:52,652 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 13:14:52,652 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 13:14:52,652 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 13:14:52,653 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 13:14:52,653 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:14:52,654 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 13:14:52,654 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 13:14:52,655 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 [2024-11-13 13:14:53,031 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 13:14:53,041 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 13:14:53,044 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 13:14:53,046 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 13:14:53,046 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 13:14:53,048 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c Unable to find full path for "g++" [2024-11-13 13:14:55,554 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 13:14:56,038 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 13:14:56,038 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-11-13 13:14:56,061 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/22ca443ed/e9c8d36490f048998fefcb79acd33bf3/FLAGa5caa22c5 [2024-11-13 13:14:56,147 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/22ca443ed/e9c8d36490f048998fefcb79acd33bf3 [2024-11-13 13:14:56,152 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 13:14:56,153 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 13:14:56,156 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 13:14:56,157 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 13:14:56,161 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 13:14:56,162 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:56,163 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@67a9f91d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56, skipping insertion in model container [2024-11-13 13:14:56,165 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:56,226 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 13:14:56,409 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-11-13 13:14:56,742 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:14:56,751 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 13:14:56,763 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-11-13 13:14:56,952 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:14:56,969 INFO L204 MainTranslator]: Completed translation [2024-11-13 13:14:56,970 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56 WrapperNode [2024-11-13 13:14:56,971 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 13:14:56,972 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 13:14:56,972 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 13:14:56,972 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 13:14:56,981 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,022 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,361 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1976 [2024-11-13 13:14:57,361 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 13:14:57,362 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 13:14:57,362 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 13:14:57,363 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 13:14:57,374 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,375 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,409 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,583 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 13:14:57,583 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,584 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,682 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,708 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,744 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,764 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,851 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 13:14:57,853 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 13:14:57,854 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 13:14:57,854 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 13:14:57,855 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (1/1) ... [2024-11-13 13:14:57,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:14:57,891 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:14:57,913 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 13:14:57,919 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 13:14:57,952 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 13:14:57,952 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 13:14:57,952 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 13:14:57,954 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-13 13:14:57,954 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 13:14:57,954 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 13:14:58,368 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 13:14:58,371 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 13:15:01,728 INFO L? ?]: Removed 1091 outVars from TransFormulas that were not future-live. [2024-11-13 13:15:01,729 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 13:15:01,766 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 13:15:01,766 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 13:15:01,767 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:15:01 BoogieIcfgContainer [2024-11-13 13:15:01,767 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 13:15:01,769 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 13:15:01,770 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 13:15:01,775 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 13:15:01,775 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 01:14:56" (1/3) ... [2024-11-13 13:15:01,776 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43347f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:15:01, skipping insertion in model container [2024-11-13 13:15:01,777 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:14:56" (2/3) ... [2024-11-13 13:15:01,777 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@43347f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:15:01, skipping insertion in model container [2024-11-13 13:15:01,777 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:15:01" (3/3) ... [2024-11-13 13:15:01,779 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-11-13 13:15:01,795 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 13:15:01,798 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c that has 2 procedures, 552 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 13:15:01,885 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 13:15:01,903 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3baeb525, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 13:15:01,903 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 13:15:01,912 INFO L276 IsEmpty]: Start isEmpty. Operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:01,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-11-13 13:15:01,932 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:01,933 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:01,934 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:01,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:01,940 INFO L85 PathProgramCache]: Analyzing trace with hash 105595379, now seen corresponding path program 1 times [2024-11-13 13:15:01,948 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:01,949 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795071876] [2024-11-13 13:15:01,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:01,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:02,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:02,725 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:02,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:02,743 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:02,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:02,751 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:02,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:02,768 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:02,771 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:02,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [795071876] [2024-11-13 13:15:02,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [795071876] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:02,776 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:02,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-13 13:15:02,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647813255] [2024-11-13 13:15:02,779 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:02,784 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-13 13:15:02,784 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:02,817 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-13 13:15:02,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 13:15:02,822 INFO L87 Difference]: Start difference. First operand has 552 states, 546 states have (on average 1.4945054945054945) internal successors, (816), 547 states have internal predecessors, (816), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:02,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:02,916 INFO L93 Difference]: Finished difference Result 999 states and 1493 transitions. [2024-11-13 13:15:02,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-13 13:15:02,919 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 149 [2024-11-13 13:15:02,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:02,930 INFO L225 Difference]: With dead ends: 999 [2024-11-13 13:15:02,931 INFO L226 Difference]: Without dead ends: 549 [2024-11-13 13:15:02,936 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 13:15:02,939 INFO L432 NwaCegarLoop]: 817 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 817 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:02,940 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 817 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:15:02,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 549 states. [2024-11-13 13:15:03,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 549 to 549. [2024-11-13 13:15:03,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 549 states, 544 states have (on average 1.4908088235294117) internal successors, (811), 544 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:03,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 817 transitions. [2024-11-13 13:15:03,043 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 817 transitions. Word has length 149 [2024-11-13 13:15:03,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:03,045 INFO L471 AbstractCegarLoop]: Abstraction has 549 states and 817 transitions. [2024-11-13 13:15:03,046 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 68.5) internal successors, (137), 2 states have internal predecessors, (137), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:03,047 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 817 transitions. [2024-11-13 13:15:03,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2024-11-13 13:15:03,053 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:03,053 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:03,056 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-13 13:15:03,057 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:03,057 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:03,057 INFO L85 PathProgramCache]: Analyzing trace with hash 677396781, now seen corresponding path program 1 times [2024-11-13 13:15:03,057 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:03,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651509658] [2024-11-13 13:15:03,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:03,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:03,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:05,009 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:05,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:05,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:05,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:05,020 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:05,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:05,027 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:05,029 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:05,029 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651509658] [2024-11-13 13:15:05,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [651509658] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:05,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:05,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:05,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194367546] [2024-11-13 13:15:05,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:05,032 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:05,034 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:05,035 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:05,035 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:05,036 INFO L87 Difference]: Start difference. First operand 549 states and 817 transitions. Second operand has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:05,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:05,154 INFO L93 Difference]: Finished difference Result 553 states and 821 transitions. [2024-11-13 13:15:05,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:05,155 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 149 [2024-11-13 13:15:05,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:05,163 INFO L225 Difference]: With dead ends: 553 [2024-11-13 13:15:05,164 INFO L226 Difference]: Without dead ends: 551 [2024-11-13 13:15:05,164 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:05,165 INFO L432 NwaCegarLoop]: 815 mSDtfsCounter, 0 mSDsluCounter, 1624 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2439 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:05,170 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2439 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:15:05,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-11-13 13:15:05,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-11-13 13:15:05,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.489010989010989) internal successors, (813), 546 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:05,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 819 transitions. [2024-11-13 13:15:05,197 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 819 transitions. Word has length 149 [2024-11-13 13:15:05,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:05,199 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 819 transitions. [2024-11-13 13:15:05,199 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.25) internal successors, (137), 4 states have internal predecessors, (137), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:05,199 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 819 transitions. [2024-11-13 13:15:05,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2024-11-13 13:15:05,202 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:05,203 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:05,203 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-13 13:15:05,203 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:05,204 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:05,204 INFO L85 PathProgramCache]: Analyzing trace with hash -473840291, now seen corresponding path program 1 times [2024-11-13 13:15:05,204 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:05,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395641805] [2024-11-13 13:15:05,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:05,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:05,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:06,014 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:06,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:06,020 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:06,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:06,024 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:06,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:06,033 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:06,034 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [395641805] [2024-11-13 13:15:06,034 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [395641805] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:06,034 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:06,034 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:06,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909267078] [2024-11-13 13:15:06,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:06,035 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:06,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:06,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:06,040 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:06,040 INFO L87 Difference]: Start difference. First operand 551 states and 819 transitions. Second operand has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:06,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:06,891 INFO L93 Difference]: Finished difference Result 1371 states and 2041 transitions. [2024-11-13 13:15:06,892 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:15:06,893 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 150 [2024-11-13 13:15:06,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:06,899 INFO L225 Difference]: With dead ends: 1371 [2024-11-13 13:15:06,903 INFO L226 Difference]: Without dead ends: 551 [2024-11-13 13:15:06,905 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-13 13:15:06,906 INFO L432 NwaCegarLoop]: 861 mSDtfsCounter, 1618 mSDsluCounter, 1490 mSDsCounter, 0 mSdLazyCounter, 302 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1618 SdHoareTripleChecker+Valid, 2351 SdHoareTripleChecker+Invalid, 339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 302 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:06,907 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1618 Valid, 2351 Invalid, 339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 302 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:15:06,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 551 states. [2024-11-13 13:15:06,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 551 to 551. [2024-11-13 13:15:06,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 551 states, 546 states have (on average 1.4871794871794872) internal successors, (812), 546 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:06,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 551 states to 551 states and 818 transitions. [2024-11-13 13:15:06,956 INFO L78 Accepts]: Start accepts. Automaton has 551 states and 818 transitions. Word has length 150 [2024-11-13 13:15:06,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:06,959 INFO L471 AbstractCegarLoop]: Abstraction has 551 states and 818 transitions. [2024-11-13 13:15:06,959 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 27.6) internal successors, (138), 5 states have internal predecessors, (138), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:06,960 INFO L276 IsEmpty]: Start isEmpty. Operand 551 states and 818 transitions. [2024-11-13 13:15:06,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2024-11-13 13:15:06,966 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:06,967 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:06,967 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-13 13:15:06,967 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:06,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:06,968 INFO L85 PathProgramCache]: Analyzing trace with hash -1290588625, now seen corresponding path program 1 times [2024-11-13 13:15:06,968 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:06,968 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148503613] [2024-11-13 13:15:06,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:06,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:07,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:07,704 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:07,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:07,708 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:07,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:07,711 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:07,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:07,715 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:07,715 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:07,716 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148503613] [2024-11-13 13:15:07,716 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1148503613] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:07,716 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:07,716 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:07,716 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413863130] [2024-11-13 13:15:07,716 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:07,717 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:07,717 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:07,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:07,719 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:07,719 INFO L87 Difference]: Start difference. First operand 551 states and 818 transitions. Second operand has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:07,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:07,783 INFO L93 Difference]: Finished difference Result 1002 states and 1487 transitions. [2024-11-13 13:15:07,785 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:07,785 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 151 [2024-11-13 13:15:07,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:07,790 INFO L225 Difference]: With dead ends: 1002 [2024-11-13 13:15:07,791 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:07,792 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:07,793 INFO L432 NwaCegarLoop]: 814 mSDtfsCounter, 0 mSDsluCounter, 1618 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2432 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:07,793 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2432 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:15:07,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:07,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:07,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4854014598540146) internal successors, (814), 548 states have internal predecessors, (814), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:07,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 820 transitions. [2024-11-13 13:15:07,839 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 820 transitions. Word has length 151 [2024-11-13 13:15:07,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:07,841 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 820 transitions. [2024-11-13 13:15:07,842 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 34.75) internal successors, (139), 4 states have internal predecessors, (139), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:07,842 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 820 transitions. [2024-11-13 13:15:07,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2024-11-13 13:15:07,846 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:07,846 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:07,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-13 13:15:07,846 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:07,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:07,847 INFO L85 PathProgramCache]: Analyzing trace with hash 1843460468, now seen corresponding path program 1 times [2024-11-13 13:15:07,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:07,849 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [12079337] [2024-11-13 13:15:07,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:07,850 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:08,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:08,904 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:08,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:08,915 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:08,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:08,923 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:08,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:08,933 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:08,934 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:08,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [12079337] [2024-11-13 13:15:08,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [12079337] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:08,934 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:08,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:08,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283255701] [2024-11-13 13:15:08,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:08,936 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:08,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:08,937 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:08,938 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:08,938 INFO L87 Difference]: Start difference. First operand 553 states and 820 transitions. Second operand has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:09,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:09,277 INFO L93 Difference]: Finished difference Result 1004 states and 1488 transitions. [2024-11-13 13:15:09,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:09,278 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 152 [2024-11-13 13:15:09,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:09,281 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:09,281 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:09,285 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:09,286 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 694 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 694 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:09,286 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [694 Valid, 1470 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 13:15:09,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:09,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:09,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4835766423357664) internal successors, (813), 548 states have internal predecessors, (813), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:09,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 819 transitions. [2024-11-13 13:15:09,306 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 819 transitions. Word has length 152 [2024-11-13 13:15:09,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:09,307 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 819 transitions. [2024-11-13 13:15:09,307 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.0) internal successors, (140), 4 states have internal predecessors, (140), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:09,307 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 819 transitions. [2024-11-13 13:15:09,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2024-11-13 13:15:09,312 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:09,313 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:09,313 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-13 13:15:09,313 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:09,313 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:09,314 INFO L85 PathProgramCache]: Analyzing trace with hash -954896960, now seen corresponding path program 1 times [2024-11-13 13:15:09,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:09,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28546322] [2024-11-13 13:15:09,314 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:09,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:09,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:09,955 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:09,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:09,961 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:09,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:09,967 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:09,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:09,972 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:09,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:09,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28546322] [2024-11-13 13:15:09,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [28546322] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:09,973 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:09,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:09,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1064699574] [2024-11-13 13:15:09,974 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:09,974 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:09,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:09,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:09,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:09,976 INFO L87 Difference]: Start difference. First operand 553 states and 819 transitions. Second operand has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:10,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:10,273 INFO L93 Difference]: Finished difference Result 1010 states and 1494 transitions. [2024-11-13 13:15:10,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:15:10,274 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 153 [2024-11-13 13:15:10,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:10,279 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:10,279 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:10,280 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:15:10,283 INFO L432 NwaCegarLoop]: 806 mSDtfsCounter, 705 mSDsluCounter, 1544 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 705 SdHoareTripleChecker+Valid, 2350 SdHoareTripleChecker+Invalid, 100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:10,283 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [705 Valid, 2350 Invalid, 100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:10,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:10,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:10,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4817518248175183) internal successors, (812), 548 states have internal predecessors, (812), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:10,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 818 transitions. [2024-11-13 13:15:10,328 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 818 transitions. Word has length 153 [2024-11-13 13:15:10,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:10,329 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 818 transitions. [2024-11-13 13:15:10,329 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.2) internal successors, (141), 5 states have internal predecessors, (141), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:10,329 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 818 transitions. [2024-11-13 13:15:10,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-11-13 13:15:10,332 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:10,332 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:10,332 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-13 13:15:10,332 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:10,333 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:10,333 INFO L85 PathProgramCache]: Analyzing trace with hash 690807295, now seen corresponding path program 1 times [2024-11-13 13:15:10,333 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:10,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709761723] [2024-11-13 13:15:10,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:10,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:10,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:10,978 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:10,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:10,982 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:10,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:10,986 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:10,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:10,990 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:10,990 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:10,990 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709761723] [2024-11-13 13:15:10,990 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709761723] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:10,990 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:10,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:10,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [690072752] [2024-11-13 13:15:10,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:10,991 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:10,991 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:10,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:10,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:10,992 INFO L87 Difference]: Start difference. First operand 553 states and 818 transitions. Second operand has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:11,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:11,310 INFO L93 Difference]: Finished difference Result 1004 states and 1484 transitions. [2024-11-13 13:15:11,311 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:11,311 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 154 [2024-11-13 13:15:11,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:11,315 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:11,315 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:11,316 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:11,316 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 802 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 805 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:11,317 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [805 Valid, 1477 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 13:15:11,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:11,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:11,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.47992700729927) internal successors, (811), 548 states have internal predecessors, (811), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:11,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 817 transitions. [2024-11-13 13:15:11,338 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 817 transitions. Word has length 154 [2024-11-13 13:15:11,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:11,338 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 817 transitions. [2024-11-13 13:15:11,339 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.4) internal successors, (142), 5 states have internal predecessors, (142), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:11,339 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 817 transitions. [2024-11-13 13:15:11,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-11-13 13:15:11,341 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:11,341 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:11,341 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-13 13:15:11,341 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:11,342 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:11,342 INFO L85 PathProgramCache]: Analyzing trace with hash -1444639353, now seen corresponding path program 1 times [2024-11-13 13:15:11,342 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:11,342 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695400718] [2024-11-13 13:15:11,342 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:11,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:11,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:11,890 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:11,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:11,895 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:11,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:11,899 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:11,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:11,904 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:11,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:11,904 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695400718] [2024-11-13 13:15:11,905 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1695400718] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:11,905 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:11,905 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:11,905 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [631629900] [2024-11-13 13:15:11,905 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:11,906 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:11,906 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:11,908 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:11,908 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:11,909 INFO L87 Difference]: Start difference. First operand 553 states and 817 transitions. Second operand has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:12,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:12,224 INFO L93 Difference]: Finished difference Result 1004 states and 1482 transitions. [2024-11-13 13:15:12,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:12,226 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 155 [2024-11-13 13:15:12,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:12,232 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:12,232 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:12,236 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:12,237 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 1487 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 158 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1490 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 159 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 158 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:12,237 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1490 Valid, 1470 Invalid, 159 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 158 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 13:15:12,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:12,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:12,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4781021897810218) internal successors, (810), 548 states have internal predecessors, (810), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:12,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 816 transitions. [2024-11-13 13:15:12,262 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 816 transitions. Word has length 155 [2024-11-13 13:15:12,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:12,263 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 816 transitions. [2024-11-13 13:15:12,263 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.6) internal successors, (143), 5 states have internal predecessors, (143), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:12,263 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 816 transitions. [2024-11-13 13:15:12,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2024-11-13 13:15:12,281 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:12,281 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:12,281 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-13 13:15:12,281 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:12,282 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:12,282 INFO L85 PathProgramCache]: Analyzing trace with hash 457554086, now seen corresponding path program 1 times [2024-11-13 13:15:12,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:12,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2021194490] [2024-11-13 13:15:12,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:12,283 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:12,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:12,928 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:12,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:12,935 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:12,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:12,943 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:12,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:12,951 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:12,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:12,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2021194490] [2024-11-13 13:15:12,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2021194490] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:12,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:12,953 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:12,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [955505911] [2024-11-13 13:15:12,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:12,954 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:12,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:12,955 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:12,955 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:12,955 INFO L87 Difference]: Start difference. First operand 553 states and 816 transitions. Second operand has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:13,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:13,248 INFO L93 Difference]: Finished difference Result 1004 states and 1480 transitions. [2024-11-13 13:15:13,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:13,249 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 156 [2024-11-13 13:15:13,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:13,253 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:13,253 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:13,254 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:13,254 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 1473 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 156 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1476 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 156 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:13,255 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1476 Valid, 1470 Invalid, 157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 156 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:13,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:13,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:13,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4762773722627738) internal successors, (809), 548 states have internal predecessors, (809), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:13,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 815 transitions. [2024-11-13 13:15:13,275 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 815 transitions. Word has length 156 [2024-11-13 13:15:13,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:13,276 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 815 transitions. [2024-11-13 13:15:13,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 28.8) internal successors, (144), 5 states have internal predecessors, (144), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:13,277 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 815 transitions. [2024-11-13 13:15:13,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-11-13 13:15:13,279 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:13,279 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:13,279 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-13 13:15:13,280 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:13,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:13,281 INFO L85 PathProgramCache]: Analyzing trace with hash -1750596921, now seen corresponding path program 1 times [2024-11-13 13:15:13,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:13,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131684689] [2024-11-13 13:15:13,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:13,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:13,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:13,848 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:13,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:13,853 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:13,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:13,858 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:13,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:13,863 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:13,863 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:13,863 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131684689] [2024-11-13 13:15:13,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [131684689] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:13,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:13,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:13,864 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980865822] [2024-11-13 13:15:13,864 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:13,865 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:13,865 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:13,866 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:13,866 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:13,866 INFO L87 Difference]: Start difference. First operand 553 states and 815 transitions. Second operand has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:14,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:14,164 INFO L93 Difference]: Finished difference Result 1004 states and 1478 transitions. [2024-11-13 13:15:14,164 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:14,165 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 157 [2024-11-13 13:15:14,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:14,168 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:14,168 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:14,169 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:14,169 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 787 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 1477 SdHoareTripleChecker+Invalid, 155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:14,170 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 1477 Invalid, 155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 154 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:14,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:14,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:14,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4744525547445255) internal successors, (808), 548 states have internal predecessors, (808), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:14,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 814 transitions. [2024-11-13 13:15:14,192 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 814 transitions. Word has length 157 [2024-11-13 13:15:14,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:14,192 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 814 transitions. [2024-11-13 13:15:14,193 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.0) internal successors, (145), 5 states have internal predecessors, (145), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:14,193 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 814 transitions. [2024-11-13 13:15:14,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-13 13:15:14,195 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:14,195 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:14,195 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-13 13:15:14,196 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:14,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:14,197 INFO L85 PathProgramCache]: Analyzing trace with hash -273443585, now seen corresponding path program 1 times [2024-11-13 13:15:14,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:14,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684548579] [2024-11-13 13:15:14,197 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:14,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:14,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:14,789 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:14,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:14,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:14,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:14,799 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:14,805 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:14,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:14,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684548579] [2024-11-13 13:15:14,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [684548579] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:14,806 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:14,806 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:14,806 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21570034] [2024-11-13 13:15:14,806 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:14,806 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:14,807 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:14,807 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:14,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:14,808 INFO L87 Difference]: Start difference. First operand 553 states and 814 transitions. Second operand has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:15,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:15,104 INFO L93 Difference]: Finished difference Result 1004 states and 1476 transitions. [2024-11-13 13:15:15,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:15,105 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 158 [2024-11-13 13:15:15,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:15,108 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:15,109 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:15,110 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:15,111 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 1457 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 152 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1460 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 152 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:15,111 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1460 Valid, 1470 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 152 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:15,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:15,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:15,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4726277372262773) internal successors, (807), 548 states have internal predecessors, (807), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:15,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 813 transitions. [2024-11-13 13:15:15,132 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 813 transitions. Word has length 158 [2024-11-13 13:15:15,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:15,133 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 813 transitions. [2024-11-13 13:15:15,133 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.2) internal successors, (146), 5 states have internal predecessors, (146), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:15,133 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 813 transitions. [2024-11-13 13:15:15,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2024-11-13 13:15:15,135 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:15,136 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:15,136 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-13 13:15:15,137 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:15,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:15,137 INFO L85 PathProgramCache]: Analyzing trace with hash -808870848, now seen corresponding path program 1 times [2024-11-13 13:15:15,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:15,137 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016024499] [2024-11-13 13:15:15,137 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:15,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:15,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:15,744 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:15,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:15,749 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:15,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:15,753 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:15,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:15,758 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:15,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:15,758 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1016024499] [2024-11-13 13:15:15,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1016024499] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:15,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:15,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:15,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1939409206] [2024-11-13 13:15:15,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:15,760 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:15,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:15,760 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:15,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:15,761 INFO L87 Difference]: Start difference. First operand 553 states and 813 transitions. Second operand has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:16,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:16,053 INFO L93 Difference]: Finished difference Result 1004 states and 1474 transitions. [2024-11-13 13:15:16,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:16,053 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 159 [2024-11-13 13:15:16,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:16,056 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:16,057 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:16,057 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:16,058 INFO L432 NwaCegarLoop]: 734 mSDtfsCounter, 1449 mSDsluCounter, 736 mSDsCounter, 0 mSdLazyCounter, 150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1452 SdHoareTripleChecker+Valid, 1470 SdHoareTripleChecker+Invalid, 151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:16,058 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1452 Valid, 1470 Invalid, 151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 150 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:16,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:16,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:16,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4708029197080292) internal successors, (806), 548 states have internal predecessors, (806), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:16,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 812 transitions. [2024-11-13 13:15:16,080 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 812 transitions. Word has length 159 [2024-11-13 13:15:16,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:16,080 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 812 transitions. [2024-11-13 13:15:16,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.4) internal successors, (147), 5 states have internal predecessors, (147), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:16,081 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 812 transitions. [2024-11-13 13:15:16,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2024-11-13 13:15:16,083 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:16,083 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:16,083 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-13 13:15:16,083 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:16,084 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:16,084 INFO L85 PathProgramCache]: Analyzing trace with hash -476571176, now seen corresponding path program 1 times [2024-11-13 13:15:16,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:16,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [224140848] [2024-11-13 13:15:16,084 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:16,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:16,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:16,717 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:16,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:16,723 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:16,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:16,731 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:16,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:16,740 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:16,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:16,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [224140848] [2024-11-13 13:15:16,740 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [224140848] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:16,740 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:16,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:16,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [855090947] [2024-11-13 13:15:16,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:16,743 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:16,743 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:16,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:16,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:16,744 INFO L87 Difference]: Start difference. First operand 553 states and 812 transitions. Second operand has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:16,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:16,933 INFO L93 Difference]: Finished difference Result 1004 states and 1472 transitions. [2024-11-13 13:15:16,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:16,934 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 160 [2024-11-13 13:15:16,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:16,937 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:16,938 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:16,939 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:16,941 INFO L432 NwaCegarLoop]: 766 mSDtfsCounter, 700 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 700 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:16,941 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [700 Valid, 1534 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:16,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:16,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:16,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.468978102189781) internal successors, (805), 548 states have internal predecessors, (805), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:16,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 811 transitions. [2024-11-13 13:15:16,964 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 811 transitions. Word has length 160 [2024-11-13 13:15:16,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:16,964 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 811 transitions. [2024-11-13 13:15:16,965 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 37.0) internal successors, (148), 4 states have internal predecessors, (148), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:16,965 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 811 transitions. [2024-11-13 13:15:16,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2024-11-13 13:15:16,968 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:16,968 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:16,968 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-13 13:15:16,969 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:16,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:16,969 INFO L85 PathProgramCache]: Analyzing trace with hash 1920933461, now seen corresponding path program 1 times [2024-11-13 13:15:16,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:16,969 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013276689] [2024-11-13 13:15:16,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:16,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:17,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:17,462 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:17,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:17,468 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:17,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:17,473 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:17,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:17,476 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:17,477 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:17,477 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013276689] [2024-11-13 13:15:17,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013276689] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:17,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:17,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:17,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872817171] [2024-11-13 13:15:17,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:17,479 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:17,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:17,480 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:17,480 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:17,481 INFO L87 Difference]: Start difference. First operand 553 states and 811 transitions. Second operand has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:17,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:17,668 INFO L93 Difference]: Finished difference Result 1004 states and 1470 transitions. [2024-11-13 13:15:17,670 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:17,670 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 161 [2024-11-13 13:15:17,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:17,674 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:17,674 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:17,675 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:17,675 INFO L432 NwaCegarLoop]: 766 mSDtfsCounter, 1489 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1492 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:17,676 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1492 Valid, 1534 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:17,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:17,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:17,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.467153284671533) internal successors, (804), 548 states have internal predecessors, (804), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:17,702 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 810 transitions. [2024-11-13 13:15:17,702 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 810 transitions. Word has length 161 [2024-11-13 13:15:17,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:17,703 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 810 transitions. [2024-11-13 13:15:17,703 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 29.8) internal successors, (149), 5 states have internal predecessors, (149), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:17,703 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 810 transitions. [2024-11-13 13:15:17,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2024-11-13 13:15:17,706 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:17,707 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:17,707 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-13 13:15:17,707 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:17,707 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:17,707 INFO L85 PathProgramCache]: Analyzing trace with hash -115972431, now seen corresponding path program 1 times [2024-11-13 13:15:17,708 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:17,708 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39178523] [2024-11-13 13:15:17,708 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:17,708 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:17,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,219 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:18,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,223 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:18,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:18,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,235 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:18,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:18,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39178523] [2024-11-13 13:15:18,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [39178523] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:18,236 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:18,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:18,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [825066398] [2024-11-13 13:15:18,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:18,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:18,237 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:18,237 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:18,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:18,238 INFO L87 Difference]: Start difference. First operand 553 states and 810 transitions. Second operand has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:18,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:18,430 INFO L93 Difference]: Finished difference Result 1004 states and 1468 transitions. [2024-11-13 13:15:18,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:18,431 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 162 [2024-11-13 13:15:18,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:18,434 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:18,434 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:18,435 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:18,436 INFO L432 NwaCegarLoop]: 766 mSDtfsCounter, 1481 mSDsluCounter, 768 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1484 SdHoareTripleChecker+Valid, 1534 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:18,436 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1484 Valid, 1534 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:18,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:18,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:18,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4653284671532847) internal successors, (803), 548 states have internal predecessors, (803), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:18,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 809 transitions. [2024-11-13 13:15:18,463 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 809 transitions. Word has length 162 [2024-11-13 13:15:18,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:18,464 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 809 transitions. [2024-11-13 13:15:18,464 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.0) internal successors, (150), 5 states have internal predecessors, (150), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:18,465 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 809 transitions. [2024-11-13 13:15:18,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2024-11-13 13:15:18,467 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:18,468 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:18,468 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-13 13:15:18,468 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:18,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:18,468 INFO L85 PathProgramCache]: Analyzing trace with hash 311812430, now seen corresponding path program 1 times [2024-11-13 13:15:18,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:18,469 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788429835] [2024-11-13 13:15:18,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:18,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:18,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,971 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:18,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,977 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:18,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,980 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:18,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:18,987 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:18,987 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:18,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788429835] [2024-11-13 13:15:18,988 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788429835] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:18,988 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:18,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:18,989 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522863722] [2024-11-13 13:15:18,989 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:18,989 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:18,992 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:18,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:18,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:18,993 INFO L87 Difference]: Start difference. First operand 553 states and 809 transitions. Second operand has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:19,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:19,184 INFO L93 Difference]: Finished difference Result 1004 states and 1466 transitions. [2024-11-13 13:15:19,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:19,185 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 163 [2024-11-13 13:15:19,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:19,188 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:19,190 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:19,191 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:19,192 INFO L432 NwaCegarLoop]: 766 mSDtfsCounter, 787 mSDsluCounter, 775 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 790 SdHoareTripleChecker+Valid, 1541 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:19,192 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [790 Valid, 1541 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:19,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:19,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:19,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4635036496350364) internal successors, (802), 548 states have internal predecessors, (802), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:19,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 808 transitions. [2024-11-13 13:15:19,216 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 808 transitions. Word has length 163 [2024-11-13 13:15:19,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:19,216 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 808 transitions. [2024-11-13 13:15:19,216 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.2) internal successors, (151), 5 states have internal predecessors, (151), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:19,217 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 808 transitions. [2024-11-13 13:15:19,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2024-11-13 13:15:19,219 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:19,219 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:19,219 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-13 13:15:19,220 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:19,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:19,220 INFO L85 PathProgramCache]: Analyzing trace with hash -1761805302, now seen corresponding path program 1 times [2024-11-13 13:15:19,220 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:19,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280852593] [2024-11-13 13:15:19,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:19,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:19,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,025 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:20,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,034 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:20,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,040 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:20,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,047 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:20,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:20,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280852593] [2024-11-13 13:15:20,048 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1280852593] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:20,048 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:20,048 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:20,048 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107439436] [2024-11-13 13:15:20,048 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:20,049 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:20,049 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:20,051 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:20,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:20,052 INFO L87 Difference]: Start difference. First operand 553 states and 808 transitions. Second operand has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:20,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:20,185 INFO L93 Difference]: Finished difference Result 1004 states and 1464 transitions. [2024-11-13 13:15:20,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:20,186 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 164 [2024-11-13 13:15:20,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:20,189 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:20,189 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:20,190 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:20,192 INFO L432 NwaCegarLoop]: 782 mSDtfsCounter, 699 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 699 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:20,192 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [699 Valid, 1566 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:20,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:20,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:20,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4598540145985401) internal successors, (800), 548 states have internal predecessors, (800), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:20,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 806 transitions. [2024-11-13 13:15:20,224 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 806 transitions. Word has length 164 [2024-11-13 13:15:20,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:20,226 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 806 transitions. [2024-11-13 13:15:20,226 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.0) internal successors, (152), 4 states have internal predecessors, (152), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:20,226 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 806 transitions. [2024-11-13 13:15:20,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-11-13 13:15:20,229 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:20,229 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:20,230 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-13 13:15:20,230 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:20,231 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:20,231 INFO L85 PathProgramCache]: Analyzing trace with hash -540920697, now seen corresponding path program 1 times [2024-11-13 13:15:20,231 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:20,231 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022146669] [2024-11-13 13:15:20,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:20,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:20,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,795 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:20,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,799 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:20,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:20,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:20,807 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:20,807 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:20,807 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022146669] [2024-11-13 13:15:20,807 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022146669] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:20,807 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:20,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:20,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [265380094] [2024-11-13 13:15:20,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:20,808 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:20,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:20,810 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:20,810 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:20,810 INFO L87 Difference]: Start difference. First operand 553 states and 806 transitions. Second operand has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:20,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:20,937 INFO L93 Difference]: Finished difference Result 1004 states and 1460 transitions. [2024-11-13 13:15:20,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:20,938 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 166 [2024-11-13 13:15:20,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:20,941 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:20,941 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:20,942 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:20,942 INFO L432 NwaCegarLoop]: 782 mSDtfsCounter, 1481 mSDsluCounter, 784 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1484 SdHoareTripleChecker+Valid, 1566 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:20,943 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1484 Valid, 1566 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:20,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:20,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:20,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4580291970802919) internal successors, (799), 548 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:20,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 805 transitions. [2024-11-13 13:15:20,970 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 805 transitions. Word has length 166 [2024-11-13 13:15:20,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:20,971 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 805 transitions. [2024-11-13 13:15:20,971 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 30.8) internal successors, (154), 5 states have internal predecessors, (154), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:20,971 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 805 transitions. [2024-11-13 13:15:20,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2024-11-13 13:15:20,973 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:20,974 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:20,974 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-13 13:15:20,975 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:20,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:20,976 INFO L85 PathProgramCache]: Analyzing trace with hash 430318257, now seen corresponding path program 1 times [2024-11-13 13:15:20,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:20,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120465943] [2024-11-13 13:15:20,976 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:20,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:21,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:21,566 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:21,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:21,571 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 13:15:21,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:21,574 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 85 [2024-11-13 13:15:21,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:21,576 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:21,576 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:21,576 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120465943] [2024-11-13 13:15:21,577 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2120465943] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:21,577 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:21,577 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:21,577 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [657024836] [2024-11-13 13:15:21,577 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:21,577 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:21,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:21,578 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:21,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:21,579 INFO L87 Difference]: Start difference. First operand 553 states and 805 transitions. Second operand has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:21,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:21,676 INFO L93 Difference]: Finished difference Result 1004 states and 1458 transitions. [2024-11-13 13:15:21,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:21,677 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 167 [2024-11-13 13:15:21,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:21,679 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:21,679 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:21,680 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:21,680 INFO L432 NwaCegarLoop]: 785 mSDtfsCounter, 734 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 736 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:21,681 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [736 Valid, 1572 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:21,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:21,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:21,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4562043795620438) internal successors, (798), 548 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:21,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 804 transitions. [2024-11-13 13:15:21,699 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 804 transitions. Word has length 167 [2024-11-13 13:15:21,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:21,699 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 804 transitions. [2024-11-13 13:15:21,699 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 38.75) internal successors, (155), 4 states have internal predecessors, (155), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:21,699 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 804 transitions. [2024-11-13 13:15:21,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-11-13 13:15:21,701 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:21,701 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:21,702 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-13 13:15:21,702 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:21,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:21,702 INFO L85 PathProgramCache]: Analyzing trace with hash -274414691, now seen corresponding path program 1 times [2024-11-13 13:15:21,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:21,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141124692] [2024-11-13 13:15:21,703 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:21,703 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:21,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:22,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:22,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:22,285 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2024-11-13 13:15:22,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:22,287 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 86 [2024-11-13 13:15:22,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:22,289 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:22,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:22,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141124692] [2024-11-13 13:15:22,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2141124692] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:22,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:22,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:22,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1954627937] [2024-11-13 13:15:22,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:22,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:22,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:22,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:22,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:22,292 INFO L87 Difference]: Start difference. First operand 553 states and 804 transitions. Second operand has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:22,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:22,383 INFO L93 Difference]: Finished difference Result 1004 states and 1456 transitions. [2024-11-13 13:15:22,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:22,384 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 168 [2024-11-13 13:15:22,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:22,386 INFO L225 Difference]: With dead ends: 1004 [2024-11-13 13:15:22,386 INFO L226 Difference]: Without dead ends: 553 [2024-11-13 13:15:22,387 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:22,388 INFO L432 NwaCegarLoop]: 785 mSDtfsCounter, 732 mSDsluCounter, 787 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 734 SdHoareTripleChecker+Valid, 1572 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:22,388 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [734 Valid, 1572 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:15:22,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2024-11-13 13:15:22,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 553. [2024-11-13 13:15:22,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 548 states have (on average 1.4543795620437956) internal successors, (797), 548 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:22,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 803 transitions. [2024-11-13 13:15:22,407 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 803 transitions. Word has length 168 [2024-11-13 13:15:22,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:22,407 INFO L471 AbstractCegarLoop]: Abstraction has 553 states and 803 transitions. [2024-11-13 13:15:22,408 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.0) internal successors, (156), 4 states have internal predecessors, (156), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 13:15:22,408 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 803 transitions. [2024-11-13 13:15:22,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-11-13 13:15:22,410 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:22,410 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:22,410 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-13 13:15:22,410 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:22,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:22,411 INFO L85 PathProgramCache]: Analyzing trace with hash 848604686, now seen corresponding path program 1 times [2024-11-13 13:15:22,411 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:22,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [943199236] [2024-11-13 13:15:22,411 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:22,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:22,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:23,308 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:23,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:23,310 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:23,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:23,312 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:23,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:23,314 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:23,314 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:23,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [943199236] [2024-11-13 13:15:23,314 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [943199236] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:23,314 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:23,314 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:23,314 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309303540] [2024-11-13 13:15:23,314 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:23,318 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:23,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:23,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:23,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:23,319 INFO L87 Difference]: Start difference. First operand 553 states and 803 transitions. Second operand has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:23,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:23,679 INFO L93 Difference]: Finished difference Result 1010 states and 1462 transitions. [2024-11-13 13:15:23,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:15:23,680 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 169 [2024-11-13 13:15:23,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:23,683 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:23,683 INFO L226 Difference]: Without dead ends: 557 [2024-11-13 13:15:23,685 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:23,685 INFO L432 NwaCegarLoop]: 793 mSDtfsCounter, 2 mSDsluCounter, 2186 mSDsCounter, 0 mSdLazyCounter, 216 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2979 SdHoareTripleChecker+Invalid, 216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 216 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:23,687 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2979 Invalid, 216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 216 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 13:15:23,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-11-13 13:15:23,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 555. [2024-11-13 13:15:23,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4527272727272726) internal successors, (799), 550 states have internal predecessors, (799), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:23,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 805 transitions. [2024-11-13 13:15:23,707 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 805 transitions. Word has length 169 [2024-11-13 13:15:23,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:23,708 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 805 transitions. [2024-11-13 13:15:23,708 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.4) internal successors, (157), 5 states have internal predecessors, (157), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:23,708 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 805 transitions. [2024-11-13 13:15:23,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2024-11-13 13:15:23,711 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:23,711 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:23,711 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-13 13:15:23,712 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:23,712 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:23,712 INFO L85 PathProgramCache]: Analyzing trace with hash -2121667287, now seen corresponding path program 1 times [2024-11-13 13:15:23,712 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:23,713 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2130558072] [2024-11-13 13:15:23,713 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:23,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:24,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:24,330 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:24,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:24,336 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:24,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:24,340 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:24,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:24,345 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:24,345 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:24,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2130558072] [2024-11-13 13:15:24,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2130558072] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:24,346 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:24,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:24,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801647601] [2024-11-13 13:15:24,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:24,347 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:24,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:24,348 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:24,348 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:24,349 INFO L87 Difference]: Start difference. First operand 555 states and 805 transitions. Second operand has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:24,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:24,521 INFO L93 Difference]: Finished difference Result 1008 states and 1458 transitions. [2024-11-13 13:15:24,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:24,523 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 170 [2024-11-13 13:15:24,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:24,526 INFO L225 Difference]: With dead ends: 1008 [2024-11-13 13:15:24,526 INFO L226 Difference]: Without dead ends: 555 [2024-11-13 13:15:24,527 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:24,529 INFO L432 NwaCegarLoop]: 761 mSDtfsCounter, 684 mSDsluCounter, 763 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 684 SdHoareTripleChecker+Valid, 1524 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:24,530 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [684 Valid, 1524 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:24,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-11-13 13:15:24,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-11-13 13:15:24,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.450909090909091) internal successors, (798), 550 states have internal predecessors, (798), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:24,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 804 transitions. [2024-11-13 13:15:24,554 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 804 transitions. Word has length 170 [2024-11-13 13:15:24,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:24,554 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 804 transitions. [2024-11-13 13:15:24,554 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 39.5) internal successors, (158), 4 states have internal predecessors, (158), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:24,555 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 804 transitions. [2024-11-13 13:15:24,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2024-11-13 13:15:24,557 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:24,557 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:24,557 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-13 13:15:24,558 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:24,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:24,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1629691787, now seen corresponding path program 1 times [2024-11-13 13:15:24,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:24,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126474736] [2024-11-13 13:15:24,559 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:24,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:24,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:25,221 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:25,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:25,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:25,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:25,230 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:25,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:25,235 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:25,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:25,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126474736] [2024-11-13 13:15:25,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2126474736] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:25,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:25,236 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:25,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [590671056] [2024-11-13 13:15:25,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:25,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:25,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:25,237 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:25,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:25,237 INFO L87 Difference]: Start difference. First operand 555 states and 804 transitions. Second operand has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:25,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:25,404 INFO L93 Difference]: Finished difference Result 1008 states and 1456 transitions. [2024-11-13 13:15:25,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:25,404 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 171 [2024-11-13 13:15:25,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:25,407 INFO L225 Difference]: With dead ends: 1008 [2024-11-13 13:15:25,407 INFO L226 Difference]: Without dead ends: 555 [2024-11-13 13:15:25,408 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:25,408 INFO L432 NwaCegarLoop]: 761 mSDtfsCounter, 682 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 682 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:25,409 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [682 Valid, 1531 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:25,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-11-13 13:15:25,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-11-13 13:15:25,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.449090909090909) internal successors, (797), 550 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:25,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 803 transitions. [2024-11-13 13:15:25,427 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 803 transitions. Word has length 171 [2024-11-13 13:15:25,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:25,427 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 803 transitions. [2024-11-13 13:15:25,427 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 31.8) internal successors, (159), 5 states have internal predecessors, (159), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:25,428 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 803 transitions. [2024-11-13 13:15:25,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2024-11-13 13:15:25,429 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:25,430 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:25,430 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-13 13:15:25,430 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:25,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:25,430 INFO L85 PathProgramCache]: Analyzing trace with hash -649195798, now seen corresponding path program 1 times [2024-11-13 13:15:25,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:25,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844963199] [2024-11-13 13:15:25,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:25,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:25,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:26,016 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:26,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:26,022 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:26,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:26,027 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:26,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:26,032 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:26,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:26,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844963199] [2024-11-13 13:15:26,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844963199] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:26,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:26,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:26,033 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553991753] [2024-11-13 13:15:26,033 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:26,033 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:26,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:26,034 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:26,034 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:26,034 INFO L87 Difference]: Start difference. First operand 555 states and 803 transitions. Second operand has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:26,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:26,200 INFO L93 Difference]: Finished difference Result 1008 states and 1454 transitions. [2024-11-13 13:15:26,200 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:26,201 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 172 [2024-11-13 13:15:26,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:26,203 INFO L225 Difference]: With dead ends: 1008 [2024-11-13 13:15:26,203 INFO L226 Difference]: Without dead ends: 555 [2024-11-13 13:15:26,204 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:26,205 INFO L432 NwaCegarLoop]: 761 mSDtfsCounter, 681 mSDsluCounter, 770 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 681 SdHoareTripleChecker+Valid, 1531 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:26,205 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [681 Valid, 1531 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:26,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 555 states. [2024-11-13 13:15:26,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 555 to 555. [2024-11-13 13:15:26,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 555 states, 550 states have (on average 1.4472727272727273) internal successors, (796), 550 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:26,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 555 states to 555 states and 802 transitions. [2024-11-13 13:15:26,223 INFO L78 Accepts]: Start accepts. Automaton has 555 states and 802 transitions. Word has length 172 [2024-11-13 13:15:26,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:26,224 INFO L471 AbstractCegarLoop]: Abstraction has 555 states and 802 transitions. [2024-11-13 13:15:26,224 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.0) internal successors, (160), 5 states have internal predecessors, (160), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:26,224 INFO L276 IsEmpty]: Start isEmpty. Operand 555 states and 802 transitions. [2024-11-13 13:15:26,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-11-13 13:15:26,226 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:26,226 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:26,227 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-13 13:15:26,227 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:26,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:26,227 INFO L85 PathProgramCache]: Analyzing trace with hash -63304310, now seen corresponding path program 1 times [2024-11-13 13:15:26,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:26,227 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228880143] [2024-11-13 13:15:26,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:26,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:26,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:27,160 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:27,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:27,163 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:27,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:27,165 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:27,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:27,169 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:27,169 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:27,169 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228880143] [2024-11-13 13:15:27,170 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228880143] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:27,170 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:27,170 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:27,170 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519943925] [2024-11-13 13:15:27,170 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:27,170 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:27,171 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:27,171 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:27,171 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:27,172 INFO L87 Difference]: Start difference. First operand 555 states and 802 transitions. Second operand has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:27,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:27,764 INFO L93 Difference]: Finished difference Result 1010 states and 1455 transitions. [2024-11-13 13:15:27,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:15:27,764 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173 [2024-11-13 13:15:27,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:27,767 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:27,767 INFO L226 Difference]: Without dead ends: 557 [2024-11-13 13:15:27,768 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:27,768 INFO L432 NwaCegarLoop]: 606 mSDtfsCounter, 697 mSDsluCounter, 1191 mSDsCounter, 0 mSdLazyCounter, 583 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 697 SdHoareTripleChecker+Valid, 1797 SdHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 583 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:27,769 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [697 Valid, 1797 Invalid, 583 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 583 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 13:15:27,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2024-11-13 13:15:27,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 556. [2024-11-13 13:15:27,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4464609800362977) internal successors, (797), 551 states have internal predecessors, (797), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:27,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 803 transitions. [2024-11-13 13:15:27,799 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 803 transitions. Word has length 173 [2024-11-13 13:15:27,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:27,800 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 803 transitions. [2024-11-13 13:15:27,801 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.2) internal successors, (161), 5 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:27,802 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 803 transitions. [2024-11-13 13:15:27,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2024-11-13 13:15:27,805 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:27,805 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:27,805 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-13 13:15:27,805 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:27,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:27,807 INFO L85 PathProgramCache]: Analyzing trace with hash 304684323, now seen corresponding path program 1 times [2024-11-13 13:15:27,807 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:27,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [415655160] [2024-11-13 13:15:27,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:27,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:28,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:28,520 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:28,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:28,522 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:28,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:28,526 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:28,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:28,529 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:28,529 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:28,529 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [415655160] [2024-11-13 13:15:28,529 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [415655160] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:28,529 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:28,529 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:28,530 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801022151] [2024-11-13 13:15:28,530 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:28,530 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:28,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:28,532 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:28,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:28,533 INFO L87 Difference]: Start difference. First operand 556 states and 803 transitions. Second operand has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:28,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:28,943 INFO L93 Difference]: Finished difference Result 1012 states and 1456 transitions. [2024-11-13 13:15:28,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:28,944 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 173 [2024-11-13 13:15:28,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:28,948 INFO L225 Difference]: With dead ends: 1012 [2024-11-13 13:15:28,948 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:28,949 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:28,949 INFO L432 NwaCegarLoop]: 791 mSDtfsCounter, 2 mSDsluCounter, 1392 mSDsCounter, 0 mSdLazyCounter, 201 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 201 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 201 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:28,950 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2183 Invalid, 201 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 201 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 13:15:28,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:28,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:28,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4446460980036298) internal successors, (796), 551 states have internal predecessors, (796), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:28,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 802 transitions. [2024-11-13 13:15:28,974 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 802 transitions. Word has length 173 [2024-11-13 13:15:28,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:28,974 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 802 transitions. [2024-11-13 13:15:28,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.25) internal successors, (161), 4 states have internal predecessors, (161), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:28,974 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 802 transitions. [2024-11-13 13:15:28,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-11-13 13:15:28,977 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:28,978 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:28,978 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-13 13:15:28,980 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:28,980 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:28,980 INFO L85 PathProgramCache]: Analyzing trace with hash 480433128, now seen corresponding path program 1 times [2024-11-13 13:15:28,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:28,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1605938971] [2024-11-13 13:15:28,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:28,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:29,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:29,535 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:29,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:29,539 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:29,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:29,541 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:29,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:29,548 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:29,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:29,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1605938971] [2024-11-13 13:15:29,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1605938971] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:29,549 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:29,549 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:29,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [561339113] [2024-11-13 13:15:29,549 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:29,550 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:29,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:29,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:29,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:29,551 INFO L87 Difference]: Start difference. First operand 556 states and 802 transitions. Second operand has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:29,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:29,842 INFO L93 Difference]: Finished difference Result 1010 states and 1452 transitions. [2024-11-13 13:15:29,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:29,843 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 174 [2024-11-13 13:15:29,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:29,846 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:29,847 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:29,848 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:29,848 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 664 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 664 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 148 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:29,850 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [664 Valid, 1444 Invalid, 148 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:29,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:29,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:29,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.442831215970962) internal successors, (795), 551 states have internal predecessors, (795), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:29,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 801 transitions. [2024-11-13 13:15:29,875 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 801 transitions. Word has length 174 [2024-11-13 13:15:29,875 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:29,875 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 801 transitions. [2024-11-13 13:15:29,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 40.5) internal successors, (162), 4 states have internal predecessors, (162), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:29,876 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 801 transitions. [2024-11-13 13:15:29,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2024-11-13 13:15:29,878 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:29,879 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:29,879 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-13 13:15:29,879 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:29,879 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:29,880 INFO L85 PathProgramCache]: Analyzing trace with hash -13174804, now seen corresponding path program 1 times [2024-11-13 13:15:29,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:29,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406929775] [2024-11-13 13:15:29,880 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:29,880 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:30,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:30,694 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:30,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:30,698 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:30,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:30,704 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:30,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:30,709 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:30,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:30,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406929775] [2024-11-13 13:15:30,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406929775] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:30,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:30,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:30,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353490267] [2024-11-13 13:15:30,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:30,711 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:30,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:30,712 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:30,712 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:30,712 INFO L87 Difference]: Start difference. First operand 556 states and 801 transitions. Second operand has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:30,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:30,977 INFO L93 Difference]: Finished difference Result 1010 states and 1450 transitions. [2024-11-13 13:15:30,977 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:30,978 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 175 [2024-11-13 13:15:30,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:30,980 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:30,980 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:30,981 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:30,982 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1320 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 146 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1320 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 146 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 146 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:30,982 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1320 Valid, 1444 Invalid, 146 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 146 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:30,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:30,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:30,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.441016333938294) internal successors, (794), 551 states have internal predecessors, (794), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:31,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 800 transitions. [2024-11-13 13:15:31,001 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 800 transitions. Word has length 175 [2024-11-13 13:15:31,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:31,001 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 800 transitions. [2024-11-13 13:15:31,001 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.6) internal successors, (163), 5 states have internal predecessors, (163), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:31,001 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 800 transitions. [2024-11-13 13:15:31,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2024-11-13 13:15:31,003 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:31,004 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:31,004 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-13 13:15:31,004 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:31,004 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:31,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1816091799, now seen corresponding path program 1 times [2024-11-13 13:15:31,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:31,005 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627804382] [2024-11-13 13:15:31,005 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:31,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:31,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:31,573 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:31,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:31,577 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:31,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:31,581 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:31,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:31,585 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:31,586 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:31,586 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627804382] [2024-11-13 13:15:31,586 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627804382] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:31,586 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:31,586 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:31,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621952274] [2024-11-13 13:15:31,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:31,587 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:31,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:31,587 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:31,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:31,588 INFO L87 Difference]: Start difference. First operand 556 states and 800 transitions. Second operand has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:31,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:31,830 INFO L93 Difference]: Finished difference Result 1010 states and 1448 transitions. [2024-11-13 13:15:31,831 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:31,831 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 176 [2024-11-13 13:15:31,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:31,835 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:31,835 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:31,836 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:31,841 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1314 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 144 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1314 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 144 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:31,841 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1314 Valid, 1444 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 144 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:31,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:31,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:31,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4392014519056262) internal successors, (793), 551 states have internal predecessors, (793), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:31,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 799 transitions. [2024-11-13 13:15:31,862 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 799 transitions. Word has length 176 [2024-11-13 13:15:31,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:31,862 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 799 transitions. [2024-11-13 13:15:31,863 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 32.8) internal successors, (164), 5 states have internal predecessors, (164), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:31,863 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 799 transitions. [2024-11-13 13:15:31,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2024-11-13 13:15:31,865 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:31,865 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:31,865 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-13 13:15:31,865 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:31,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:31,865 INFO L85 PathProgramCache]: Analyzing trace with hash -1929879509, now seen corresponding path program 1 times [2024-11-13 13:15:31,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:31,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462671082] [2024-11-13 13:15:31,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:31,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:32,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:32,398 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:32,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:32,401 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:32,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:32,405 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:32,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:32,411 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:32,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:32,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1462671082] [2024-11-13 13:15:32,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1462671082] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:32,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:32,412 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:32,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2147311165] [2024-11-13 13:15:32,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:32,413 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:32,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:32,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:32,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:32,414 INFO L87 Difference]: Start difference. First operand 556 states and 799 transitions. Second operand has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:32,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:32,652 INFO L93 Difference]: Finished difference Result 1010 states and 1446 transitions. [2024-11-13 13:15:32,652 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:32,652 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 177 [2024-11-13 13:15:32,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:32,655 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:32,655 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:32,655 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:32,656 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 660 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:32,656 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [660 Valid, 1451 Invalid, 142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:32,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:32,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:32,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4373865698729582) internal successors, (792), 551 states have internal predecessors, (792), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:32,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 798 transitions. [2024-11-13 13:15:32,673 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 798 transitions. Word has length 177 [2024-11-13 13:15:32,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:32,674 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 798 transitions. [2024-11-13 13:15:32,674 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.0) internal successors, (165), 5 states have internal predecessors, (165), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:32,674 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 798 transitions. [2024-11-13 13:15:32,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2024-11-13 13:15:32,676 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:32,676 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:32,676 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-13 13:15:32,676 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:32,677 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:32,677 INFO L85 PathProgramCache]: Analyzing trace with hash -466280598, now seen corresponding path program 1 times [2024-11-13 13:15:32,677 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:32,677 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478668974] [2024-11-13 13:15:32,677 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:32,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:32,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:33,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:33,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:33,236 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:33,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:33,239 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:33,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:33,243 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:33,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:33,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478668974] [2024-11-13 13:15:33,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1478668974] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:33,244 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:33,244 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:15:33,244 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502116981] [2024-11-13 13:15:33,244 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:33,244 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:15:33,244 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:33,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:15:33,245 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:15:33,245 INFO L87 Difference]: Start difference. First operand 556 states and 798 transitions. Second operand has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:33,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:33,458 INFO L93 Difference]: Finished difference Result 1010 states and 1444 transitions. [2024-11-13 13:15:33,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:33,459 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 178 [2024-11-13 13:15:33,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:33,462 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:33,462 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:33,463 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:33,467 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 644 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 644 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:33,467 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [644 Valid, 1444 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:33,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:33,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:33,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4355716878402904) internal successors, (791), 551 states have internal predecessors, (791), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:33,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 797 transitions. [2024-11-13 13:15:33,490 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 797 transitions. Word has length 178 [2024-11-13 13:15:33,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:33,490 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 797 transitions. [2024-11-13 13:15:33,490 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 41.5) internal successors, (166), 4 states have internal predecessors, (166), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:33,491 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 797 transitions. [2024-11-13 13:15:33,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2024-11-13 13:15:33,493 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:33,493 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:33,493 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-13 13:15:33,494 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:33,494 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:33,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1697571818, now seen corresponding path program 1 times [2024-11-13 13:15:33,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:33,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2131720445] [2024-11-13 13:15:33,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:33,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:33,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:34,161 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:34,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:34,166 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:34,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:34,171 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:34,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:34,177 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:34,178 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:34,178 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2131720445] [2024-11-13 13:15:34,178 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2131720445] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:34,178 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:34,178 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:34,178 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1654921475] [2024-11-13 13:15:34,179 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:34,179 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:34,179 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:34,180 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:34,181 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:34,181 INFO L87 Difference]: Start difference. First operand 556 states and 797 transitions. Second operand has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:34,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:34,455 INFO L93 Difference]: Finished difference Result 1010 states and 1442 transitions. [2024-11-13 13:15:34,456 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:34,456 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 179 [2024-11-13 13:15:34,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:34,459 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:34,459 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:34,461 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:34,461 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 658 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 138 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 658 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 138 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:34,465 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [658 Valid, 1451 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 138 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:34,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:34,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:34,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4337568058076224) internal successors, (790), 551 states have internal predecessors, (790), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:34,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 796 transitions. [2024-11-13 13:15:34,492 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 796 transitions. Word has length 179 [2024-11-13 13:15:34,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:34,493 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 796 transitions. [2024-11-13 13:15:34,493 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.4) internal successors, (167), 5 states have internal predecessors, (167), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:34,494 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 796 transitions. [2024-11-13 13:15:34,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2024-11-13 13:15:34,496 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:34,496 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:34,496 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-13 13:15:34,497 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:34,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:34,497 INFO L85 PathProgramCache]: Analyzing trace with hash 910997483, now seen corresponding path program 1 times [2024-11-13 13:15:34,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:34,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938238888] [2024-11-13 13:15:34,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:34,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:34,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:35,144 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:35,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:35,151 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:35,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:35,155 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:35,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:35,160 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:35,161 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:35,161 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938238888] [2024-11-13 13:15:35,161 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [938238888] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:35,161 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:35,161 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:35,161 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468053619] [2024-11-13 13:15:35,162 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:35,162 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:35,162 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:35,163 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:35,163 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:35,163 INFO L87 Difference]: Start difference. First operand 556 states and 796 transitions. Second operand has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:35,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:35,445 INFO L93 Difference]: Finished difference Result 1010 states and 1440 transitions. [2024-11-13 13:15:35,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:35,446 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 180 [2024-11-13 13:15:35,447 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:35,449 INFO L225 Difference]: With dead ends: 1010 [2024-11-13 13:15:35,449 INFO L226 Difference]: Without dead ends: 556 [2024-11-13 13:15:35,450 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:35,451 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1290 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1290 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 136 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:35,451 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1290 Valid, 1444 Invalid, 136 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:35,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2024-11-13 13:15:35,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 556. [2024-11-13 13:15:35,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 556 states, 551 states have (on average 1.4319419237749547) internal successors, (789), 551 states have internal predecessors, (789), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:35,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 795 transitions. [2024-11-13 13:15:35,473 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 795 transitions. Word has length 180 [2024-11-13 13:15:35,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:35,474 INFO L471 AbstractCegarLoop]: Abstraction has 556 states and 795 transitions. [2024-11-13 13:15:35,474 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.6) internal successors, (168), 5 states have internal predecessors, (168), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:35,474 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 795 transitions. [2024-11-13 13:15:35,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2024-11-13 13:15:35,477 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:35,477 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:35,477 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-13 13:15:35,477 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:35,478 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:35,478 INFO L85 PathProgramCache]: Analyzing trace with hash 203821865, now seen corresponding path program 1 times [2024-11-13 13:15:35,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:35,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387209408] [2024-11-13 13:15:35,478 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:35,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:35,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:36,694 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:36,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:36,697 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:36,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:36,699 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:36,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:36,702 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:36,702 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:36,702 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387209408] [2024-11-13 13:15:36,702 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [387209408] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:36,702 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:36,702 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:36,703 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501866171] [2024-11-13 13:15:36,703 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:36,703 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:36,703 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:36,704 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:36,704 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:36,704 INFO L87 Difference]: Start difference. First operand 556 states and 795 transitions. Second operand has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:36,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:36,781 INFO L93 Difference]: Finished difference Result 1089 states and 1528 transitions. [2024-11-13 13:15:36,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:15:36,782 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 181 [2024-11-13 13:15:36,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:36,785 INFO L225 Difference]: With dead ends: 1089 [2024-11-13 13:15:36,785 INFO L226 Difference]: Without dead ends: 635 [2024-11-13 13:15:36,786 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:36,787 INFO L432 NwaCegarLoop]: 782 mSDtfsCounter, 19 mSDsluCounter, 2337 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 3119 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:36,787 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 3119 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:15:36,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 635 states. [2024-11-13 13:15:36,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 635 to 633. [2024-11-13 13:15:36,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 633 states, 628 states have (on average 1.393312101910828) internal successors, (875), 628 states have internal predecessors, (875), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:15:36,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 633 states to 633 states and 881 transitions. [2024-11-13 13:15:36,810 INFO L78 Accepts]: Start accepts. Automaton has 633 states and 881 transitions. Word has length 181 [2024-11-13 13:15:36,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:36,810 INFO L471 AbstractCegarLoop]: Abstraction has 633 states and 881 transitions. [2024-11-13 13:15:36,810 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 33.8) internal successors, (169), 5 states have internal predecessors, (169), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:36,811 INFO L276 IsEmpty]: Start isEmpty. Operand 633 states and 881 transitions. [2024-11-13 13:15:36,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2024-11-13 13:15:36,812 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:36,812 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:36,812 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-13 13:15:36,813 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:36,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:36,813 INFO L85 PathProgramCache]: Analyzing trace with hash -1362569151, now seen corresponding path program 1 times [2024-11-13 13:15:36,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:36,813 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95338026] [2024-11-13 13:15:36,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:36,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:37,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:38,198 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:38,202 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:38,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:38,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:38,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:38,213 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:15:38,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:38,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95338026] [2024-11-13 13:15:38,213 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [95338026] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:38,213 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:38,213 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:15:38,214 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991091895] [2024-11-13 13:15:38,214 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:38,214 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:15:38,214 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:38,215 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:15:38,215 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:38,216 INFO L87 Difference]: Start difference. First operand 633 states and 881 transitions. Second operand has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:38,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:38,422 INFO L93 Difference]: Finished difference Result 1396 states and 1898 transitions. [2024-11-13 13:15:38,423 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:15:38,423 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 182 [2024-11-13 13:15:38,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:38,427 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:38,427 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:38,429 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:15:38,429 INFO L432 NwaCegarLoop]: 776 mSDtfsCounter, 1133 mSDsluCounter, 2322 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1136 SdHoareTripleChecker+Valid, 3098 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:38,429 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1136 Valid, 3098 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:38,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:38,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:38,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3488914819136524) internal successors, (1156), 857 states have internal predecessors, (1156), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:38,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1168 transitions. [2024-11-13 13:15:38,463 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1168 transitions. Word has length 182 [2024-11-13 13:15:38,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:38,463 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1168 transitions. [2024-11-13 13:15:38,463 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 28.333333333333332) internal successors, (170), 6 states have internal predecessors, (170), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:15:38,464 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1168 transitions. [2024-11-13 13:15:38,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 451 [2024-11-13 13:15:38,468 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:38,468 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:38,468 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-13 13:15:38,469 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:38,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:38,469 INFO L85 PathProgramCache]: Analyzing trace with hash 1298155208, now seen corresponding path program 1 times [2024-11-13 13:15:38,469 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:38,470 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024458657] [2024-11-13 13:15:38,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:38,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:38,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,737 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:39,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,741 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:39,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,744 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:39,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,747 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 327 [2024-11-13 13:15:39,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,749 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 343 [2024-11-13 13:15:39,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,751 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355 [2024-11-13 13:15:39,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:39,755 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:39,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:39,755 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2024458657] [2024-11-13 13:15:39,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2024458657] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:39,755 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:39,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:39,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [39921681] [2024-11-13 13:15:39,756 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:39,757 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:39,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:39,758 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:39,758 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:39,758 INFO L87 Difference]: Start difference. First operand 865 states and 1168 transitions. Second operand has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:39,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:39,990 INFO L93 Difference]: Finished difference Result 1396 states and 1897 transitions. [2024-11-13 13:15:39,991 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:39,991 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 450 [2024-11-13 13:15:39,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:39,995 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:39,995 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:39,996 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:39,997 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 723 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 134 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 726 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 134 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:39,997 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [726 Valid, 1451 Invalid, 135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 134 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:40,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:40,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:40,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3477246207701283) internal successors, (1155), 857 states have internal predecessors, (1155), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:40,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1167 transitions. [2024-11-13 13:15:40,031 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1167 transitions. Word has length 450 [2024-11-13 13:15:40,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:40,032 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1167 transitions. [2024-11-13 13:15:40,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.6) internal successors, (423), 5 states have internal predecessors, (423), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:40,033 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1167 transitions. [2024-11-13 13:15:40,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2024-11-13 13:15:40,037 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:40,037 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:40,037 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-13 13:15:40,037 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:40,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:40,038 INFO L85 PathProgramCache]: Analyzing trace with hash -1974891216, now seen corresponding path program 1 times [2024-11-13 13:15:40,038 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:40,038 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584013855] [2024-11-13 13:15:40,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:40,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:40,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,299 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:41,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,302 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:41,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,304 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:41,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,307 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 328 [2024-11-13 13:15:41,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,310 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 344 [2024-11-13 13:15:41,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356 [2024-11-13 13:15:41,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:41,317 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:41,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:41,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [584013855] [2024-11-13 13:15:41,317 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [584013855] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:41,317 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:41,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:41,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1627962597] [2024-11-13 13:15:41,318 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:41,319 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:41,319 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:41,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:41,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:41,322 INFO L87 Difference]: Start difference. First operand 865 states and 1167 transitions. Second operand has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:41,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:41,547 INFO L93 Difference]: Finished difference Result 1396 states and 1895 transitions. [2024-11-13 13:15:41,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:41,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 451 [2024-11-13 13:15:41,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:41,552 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:41,553 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:41,554 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:41,554 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 715 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 718 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 133 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:41,555 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [718 Valid, 1451 Invalid, 133 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:41,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:41,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:41,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3465577596266045) internal successors, (1154), 857 states have internal predecessors, (1154), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:41,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1166 transitions. [2024-11-13 13:15:41,587 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1166 transitions. Word has length 451 [2024-11-13 13:15:41,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:41,588 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1166 transitions. [2024-11-13 13:15:41,589 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 84.8) internal successors, (424), 5 states have internal predecessors, (424), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:41,589 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1166 transitions. [2024-11-13 13:15:41,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 453 [2024-11-13 13:15:41,593 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:41,593 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:41,594 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-13 13:15:41,594 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:41,594 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:41,594 INFO L85 PathProgramCache]: Analyzing trace with hash 228384435, now seen corresponding path program 1 times [2024-11-13 13:15:41,594 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:41,595 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2052661184] [2024-11-13 13:15:41,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:41,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:42,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:42,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:42,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:42,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,805 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 329 [2024-11-13 13:15:42,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 345 [2024-11-13 13:15:42,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,808 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357 [2024-11-13 13:15:42,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:42,812 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:42,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:42,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2052661184] [2024-11-13 13:15:42,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2052661184] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:42,813 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:42,813 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:42,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1019718456] [2024-11-13 13:15:42,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:42,816 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:42,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:42,817 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:42,817 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:42,818 INFO L87 Difference]: Start difference. First operand 865 states and 1166 transitions. Second operand has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:43,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:43,043 INFO L93 Difference]: Finished difference Result 1396 states and 1893 transitions. [2024-11-13 13:15:43,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:43,044 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 452 [2024-11-13 13:15:43,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:43,048 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:43,048 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:43,050 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:43,050 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 707 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 130 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 710 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 131 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 130 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:43,050 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [710 Valid, 1451 Invalid, 131 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 130 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:43,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:43,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:43,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3453908984830805) internal successors, (1153), 857 states have internal predecessors, (1153), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:43,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1165 transitions. [2024-11-13 13:15:43,087 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1165 transitions. Word has length 452 [2024-11-13 13:15:43,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:43,091 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1165 transitions. [2024-11-13 13:15:43,091 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.0) internal successors, (425), 5 states have internal predecessors, (425), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:43,094 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1165 transitions. [2024-11-13 13:15:43,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 454 [2024-11-13 13:15:43,100 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:43,100 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:43,101 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-11-13 13:15:43,101 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:43,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:43,104 INFO L85 PathProgramCache]: Analyzing trace with hash 965268667, now seen corresponding path program 1 times [2024-11-13 13:15:43,105 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:43,105 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030605702] [2024-11-13 13:15:43,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:43,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:43,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,470 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:44,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,473 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:44,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,476 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:44,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,479 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 330 [2024-11-13 13:15:44,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,481 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 346 [2024-11-13 13:15:44,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,483 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358 [2024-11-13 13:15:44,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:44,487 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:44,487 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:44,487 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2030605702] [2024-11-13 13:15:44,487 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2030605702] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:44,487 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:44,487 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:44,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1862952201] [2024-11-13 13:15:44,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:44,489 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:44,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:44,490 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:44,490 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:44,491 INFO L87 Difference]: Start difference. First operand 865 states and 1165 transitions. Second operand has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:44,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:44,728 INFO L93 Difference]: Finished difference Result 1396 states and 1891 transitions. [2024-11-13 13:15:44,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:44,730 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 453 [2024-11-13 13:15:44,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:44,735 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:44,735 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:44,737 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:44,738 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1275 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 128 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1278 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:44,738 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1278 Valid, 1444 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 128 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:44,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:44,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:44,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3442240373395566) internal successors, (1152), 857 states have internal predecessors, (1152), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:44,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1164 transitions. [2024-11-13 13:15:44,796 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1164 transitions. Word has length 453 [2024-11-13 13:15:44,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:44,797 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1164 transitions. [2024-11-13 13:15:44,797 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.2) internal successors, (426), 5 states have internal predecessors, (426), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:44,800 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1164 transitions. [2024-11-13 13:15:44,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2024-11-13 13:15:44,807 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:44,807 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:44,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-11-13 13:15:44,808 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:44,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:44,809 INFO L85 PathProgramCache]: Analyzing trace with hash 2125476638, now seen corresponding path program 1 times [2024-11-13 13:15:44,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:44,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703698498] [2024-11-13 13:15:44,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:44,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:45,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,322 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:46,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,328 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:46,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:46,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,334 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 331 [2024-11-13 13:15:46,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,335 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 347 [2024-11-13 13:15:46,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359 [2024-11-13 13:15:46,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:46,342 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:46,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:46,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703698498] [2024-11-13 13:15:46,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [703698498] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:46,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:46,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:46,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1615625937] [2024-11-13 13:15:46,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:46,345 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:46,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:46,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:46,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:46,349 INFO L87 Difference]: Start difference. First operand 865 states and 1164 transitions. Second operand has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:46,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:46,567 INFO L93 Difference]: Finished difference Result 1396 states and 1889 transitions. [2024-11-13 13:15:46,567 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:46,568 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 454 [2024-11-13 13:15:46,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:46,573 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:46,573 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:46,574 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:46,575 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1259 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1262 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:46,575 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1262 Valid, 1444 Invalid, 127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:46,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:46,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:46,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3430571761960326) internal successors, (1151), 857 states have internal predecessors, (1151), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:46,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1163 transitions. [2024-11-13 13:15:46,609 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1163 transitions. Word has length 454 [2024-11-13 13:15:46,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:46,610 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1163 transitions. [2024-11-13 13:15:46,610 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.4) internal successors, (427), 5 states have internal predecessors, (427), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:46,611 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1163 transitions. [2024-11-13 13:15:46,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 456 [2024-11-13 13:15:46,615 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:46,615 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:46,616 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-13 13:15:46,616 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:46,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:46,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1948967110, now seen corresponding path program 1 times [2024-11-13 13:15:46,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:46,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216375434] [2024-11-13 13:15:46,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:46,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:47,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:47,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,803 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:47,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:47,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,809 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 332 [2024-11-13 13:15:47,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,811 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348 [2024-11-13 13:15:47,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,813 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 360 [2024-11-13 13:15:47,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:47,816 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:47,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:47,817 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1216375434] [2024-11-13 13:15:47,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1216375434] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:47,817 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:47,817 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:47,818 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629048747] [2024-11-13 13:15:47,818 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:47,819 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:47,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:47,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:47,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:47,821 INFO L87 Difference]: Start difference. First operand 865 states and 1163 transitions. Second operand has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:48,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:48,038 INFO L93 Difference]: Finished difference Result 1396 states and 1887 transitions. [2024-11-13 13:15:48,039 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:48,039 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 455 [2024-11-13 13:15:48,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:48,045 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:48,046 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:48,047 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:48,047 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 683 mSDsluCounter, 730 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 686 SdHoareTripleChecker+Valid, 1451 SdHoareTripleChecker+Invalid, 125 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:48,048 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [686 Valid, 1451 Invalid, 125 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:48,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:48,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:48,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3418903150525088) internal successors, (1150), 857 states have internal predecessors, (1150), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:48,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1162 transitions. [2024-11-13 13:15:48,078 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1162 transitions. Word has length 455 [2024-11-13 13:15:48,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:48,079 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1162 transitions. [2024-11-13 13:15:48,079 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.6) internal successors, (428), 5 states have internal predecessors, (428), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:48,079 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1162 transitions. [2024-11-13 13:15:48,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 457 [2024-11-13 13:15:48,083 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:48,084 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:48,084 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2024-11-13 13:15:48,084 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:48,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:48,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1520698377, now seen corresponding path program 1 times [2024-11-13 13:15:48,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:48,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037944955] [2024-11-13 13:15:48,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:48,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:48,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,304 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:49,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,308 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:49,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,310 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:49,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,313 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 333 [2024-11-13 13:15:49,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,315 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 349 [2024-11-13 13:15:49,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,317 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361 [2024-11-13 13:15:49,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:49,320 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:49,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:49,321 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037944955] [2024-11-13 13:15:49,321 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2037944955] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:49,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:49,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:49,321 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275395335] [2024-11-13 13:15:49,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:49,322 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:49,322 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:49,323 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:49,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:49,324 INFO L87 Difference]: Start difference. First operand 865 states and 1162 transitions. Second operand has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:49,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:49,548 INFO L93 Difference]: Finished difference Result 1396 states and 1885 transitions. [2024-11-13 13:15:49,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:49,549 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 456 [2024-11-13 13:15:49,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:49,559 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:49,559 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:49,560 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:49,560 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1227 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1230 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 123 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:49,561 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1230 Valid, 1444 Invalid, 123 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:49,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:49,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:49,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3407234539089847) internal successors, (1149), 857 states have internal predecessors, (1149), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:49,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1161 transitions. [2024-11-13 13:15:49,595 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1161 transitions. Word has length 456 [2024-11-13 13:15:49,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:49,596 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1161 transitions. [2024-11-13 13:15:49,597 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 85.8) internal successors, (429), 5 states have internal predecessors, (429), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:49,597 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1161 transitions. [2024-11-13 13:15:49,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 458 [2024-11-13 13:15:49,601 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:49,602 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:49,602 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2024-11-13 13:15:49,602 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:49,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:49,603 INFO L85 PathProgramCache]: Analyzing trace with hash -671125167, now seen corresponding path program 1 times [2024-11-13 13:15:49,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:49,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954601539] [2024-11-13 13:15:49,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:49,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:50,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,776 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:50,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,779 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:50,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,782 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:50,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,785 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 334 [2024-11-13 13:15:50,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,787 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 350 [2024-11-13 13:15:50,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,790 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 362 [2024-11-13 13:15:50,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:50,793 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:50,793 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:50,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954601539] [2024-11-13 13:15:50,793 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1954601539] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:50,793 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:50,793 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:50,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297207895] [2024-11-13 13:15:50,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:50,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:50,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:50,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:50,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:50,796 INFO L87 Difference]: Start difference. First operand 865 states and 1161 transitions. Second operand has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:51,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:51,013 INFO L93 Difference]: Finished difference Result 1396 states and 1883 transitions. [2024-11-13 13:15:51,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:51,014 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 457 [2024-11-13 13:15:51,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:51,023 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:51,023 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:51,024 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:51,025 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 1211 mSDsluCounter, 723 mSDsCounter, 0 mSdLazyCounter, 120 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1214 SdHoareTripleChecker+Valid, 1444 SdHoareTripleChecker+Invalid, 121 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 120 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:51,025 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1214 Valid, 1444 Invalid, 121 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 120 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:15:51,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:51,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:51,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.339556592765461) internal successors, (1148), 857 states have internal predecessors, (1148), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:51,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1160 transitions. [2024-11-13 13:15:51,059 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1160 transitions. Word has length 457 [2024-11-13 13:15:51,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:51,062 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1160 transitions. [2024-11-13 13:15:51,062 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.0) internal successors, (430), 5 states have internal predecessors, (430), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:51,063 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1160 transitions. [2024-11-13 13:15:51,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 459 [2024-11-13 13:15:51,067 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:51,067 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:51,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-11-13 13:15:51,069 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:51,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:51,069 INFO L85 PathProgramCache]: Analyzing trace with hash -882765452, now seen corresponding path program 1 times [2024-11-13 13:15:51,070 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:51,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881562884] [2024-11-13 13:15:51,070 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:51,071 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:51,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,134 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:52,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,139 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:52,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,142 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:52,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,145 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 335 [2024-11-13 13:15:52,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,147 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 351 [2024-11-13 13:15:52,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,149 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363 [2024-11-13 13:15:52,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:52,152 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:52,152 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:52,152 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881562884] [2024-11-13 13:15:52,152 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881562884] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:52,152 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:52,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:52,153 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [925699350] [2024-11-13 13:15:52,153 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:52,153 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:52,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:52,154 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:52,155 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:52,155 INFO L87 Difference]: Start difference. First operand 865 states and 1160 transitions. Second operand has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:52,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:52,301 INFO L93 Difference]: Finished difference Result 1396 states and 1881 transitions. [2024-11-13 13:15:52,301 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:52,301 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 458 [2024-11-13 13:15:52,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:52,305 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:52,306 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:52,307 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:52,307 INFO L432 NwaCegarLoop]: 745 mSDtfsCounter, 1180 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1183 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:52,308 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1183 Valid, 1492 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:52,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:52,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:52,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.338389731621937) internal successors, (1147), 857 states have internal predecessors, (1147), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:52,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1159 transitions. [2024-11-13 13:15:52,334 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1159 transitions. Word has length 458 [2024-11-13 13:15:52,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:52,335 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1159 transitions. [2024-11-13 13:15:52,336 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.2) internal successors, (431), 5 states have internal predecessors, (431), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:52,336 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1159 transitions. [2024-11-13 13:15:52,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2024-11-13 13:15:52,340 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:52,340 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:52,341 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2024-11-13 13:15:52,341 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:52,341 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:52,341 INFO L85 PathProgramCache]: Analyzing trace with hash 1429620316, now seen corresponding path program 1 times [2024-11-13 13:15:52,341 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:52,341 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2001112605] [2024-11-13 13:15:52,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:52,342 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:52,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,494 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:53,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,497 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:53,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,500 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:53,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,503 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 336 [2024-11-13 13:15:53,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,506 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 352 [2024-11-13 13:15:53,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,508 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364 [2024-11-13 13:15:53,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:53,513 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:53,513 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:53,513 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2001112605] [2024-11-13 13:15:53,513 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2001112605] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:53,514 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:53,514 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:53,514 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857656738] [2024-11-13 13:15:53,514 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:53,515 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:53,515 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:53,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:53,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:53,517 INFO L87 Difference]: Start difference. First operand 865 states and 1159 transitions. Second operand has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:53,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:53,684 INFO L93 Difference]: Finished difference Result 1396 states and 1879 transitions. [2024-11-13 13:15:53,685 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:53,685 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 459 [2024-11-13 13:15:53,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:53,687 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:53,687 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:53,688 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:53,689 INFO L432 NwaCegarLoop]: 745 mSDtfsCounter, 1164 mSDsluCounter, 747 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1167 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:53,689 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1167 Valid, 1492 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:53,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:53,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:53,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.337222870478413) internal successors, (1146), 857 states have internal predecessors, (1146), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:53,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1158 transitions. [2024-11-13 13:15:53,730 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1158 transitions. Word has length 459 [2024-11-13 13:15:53,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:53,731 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1158 transitions. [2024-11-13 13:15:53,731 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.4) internal successors, (432), 5 states have internal predecessors, (432), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:53,732 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1158 transitions. [2024-11-13 13:15:53,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 461 [2024-11-13 13:15:53,739 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:53,739 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:53,740 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-13 13:15:53,740 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:53,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:53,741 INFO L85 PathProgramCache]: Analyzing trace with hash 1790188383, now seen corresponding path program 1 times [2024-11-13 13:15:53,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:53,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725842397] [2024-11-13 13:15:53,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:53,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:54,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,106 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:55,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,109 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:55,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,111 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:55,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,114 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 337 [2024-11-13 13:15:55,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,116 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 353 [2024-11-13 13:15:55,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,118 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365 [2024-11-13 13:15:55,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:55,121 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:55,121 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:55,121 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725842397] [2024-11-13 13:15:55,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1725842397] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:55,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:55,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:55,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2089467454] [2024-11-13 13:15:55,122 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:55,123 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:55,123 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:55,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:55,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:55,124 INFO L87 Difference]: Start difference. First operand 865 states and 1158 transitions. Second operand has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:55,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:55,266 INFO L93 Difference]: Finished difference Result 1396 states and 1877 transitions. [2024-11-13 13:15:55,266 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:55,267 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 460 [2024-11-13 13:15:55,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:55,270 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:55,270 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:55,271 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:55,272 INFO L432 NwaCegarLoop]: 745 mSDtfsCounter, 628 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 631 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:55,272 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [631 Valid, 1499 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:55,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:55,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:55,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3360560093348892) internal successors, (1145), 857 states have internal predecessors, (1145), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:55,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1157 transitions. [2024-11-13 13:15:55,302 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1157 transitions. Word has length 460 [2024-11-13 13:15:55,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:55,303 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1157 transitions. [2024-11-13 13:15:55,303 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.6) internal successors, (433), 5 states have internal predecessors, (433), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:55,303 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1157 transitions. [2024-11-13 13:15:55,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 462 [2024-11-13 13:15:55,307 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:55,308 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:55,308 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-11-13 13:15:55,308 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:55,309 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:55,309 INFO L85 PathProgramCache]: Analyzing trace with hash -1906368537, now seen corresponding path program 1 times [2024-11-13 13:15:55,309 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:55,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285832283] [2024-11-13 13:15:55,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:55,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:55,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,376 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:56,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,378 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:56,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,381 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:56,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,383 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 338 [2024-11-13 13:15:56,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,385 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354 [2024-11-13 13:15:56,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,387 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:15:56,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:56,390 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:56,390 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:56,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285832283] [2024-11-13 13:15:56,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1285832283] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:56,391 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:56,391 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:56,391 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209355197] [2024-11-13 13:15:56,391 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:56,392 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:56,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:56,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:56,393 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:56,393 INFO L87 Difference]: Start difference. First operand 865 states and 1157 transitions. Second operand has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:56,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:56,519 INFO L93 Difference]: Finished difference Result 1396 states and 1875 transitions. [2024-11-13 13:15:56,520 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:56,520 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 461 [2024-11-13 13:15:56,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:56,523 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:56,524 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:56,525 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:56,525 INFO L432 NwaCegarLoop]: 745 mSDtfsCounter, 620 mSDsluCounter, 754 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 623 SdHoareTripleChecker+Valid, 1499 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:56,526 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [623 Valid, 1499 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:56,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:56,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:56,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3348891481913652) internal successors, (1144), 857 states have internal predecessors, (1144), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:56,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1156 transitions. [2024-11-13 13:15:56,553 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1156 transitions. Word has length 461 [2024-11-13 13:15:56,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:56,554 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1156 transitions. [2024-11-13 13:15:56,554 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 86.8) internal successors, (434), 5 states have internal predecessors, (434), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:56,554 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1156 transitions. [2024-11-13 13:15:56,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 463 [2024-11-13 13:15:56,558 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:56,559 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:56,559 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2024-11-13 13:15:56,559 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:56,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:56,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1111744970, now seen corresponding path program 1 times [2024-11-13 13:15:56,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:56,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71565627] [2024-11-13 13:15:56,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:56,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:56,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,901 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:57,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,904 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:57,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,906 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:57,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,908 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 339 [2024-11-13 13:15:57,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,911 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355 [2024-11-13 13:15:57,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,915 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367 [2024-11-13 13:15:57,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:57,918 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:57,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:57,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [71565627] [2024-11-13 13:15:57,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [71565627] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:57,919 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:57,919 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:57,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1234157893] [2024-11-13 13:15:57,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:57,920 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:57,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:57,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:57,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:57,921 INFO L87 Difference]: Start difference. First operand 865 states and 1156 transitions. Second operand has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:58,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:58,017 INFO L93 Difference]: Finished difference Result 1396 states and 1873 transitions. [2024-11-13 13:15:58,017 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:58,018 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 462 [2024-11-13 13:15:58,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:58,021 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:58,021 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:58,022 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:58,022 INFO L432 NwaCegarLoop]: 757 mSDtfsCounter, 1109 mSDsluCounter, 759 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1112 SdHoareTripleChecker+Valid, 1516 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:58,022 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1112 Valid, 1516 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:58,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:58,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:58,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3337222870478413) internal successors, (1143), 857 states have internal predecessors, (1143), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:58,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1155 transitions. [2024-11-13 13:15:58,047 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1155 transitions. Word has length 462 [2024-11-13 13:15:58,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:58,048 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1155 transitions. [2024-11-13 13:15:58,048 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.0) internal successors, (435), 5 states have internal predecessors, (435), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:58,048 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1155 transitions. [2024-11-13 13:15:58,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 464 [2024-11-13 13:15:58,052 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:58,053 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:58,053 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2024-11-13 13:15:58,053 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:58,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:58,054 INFO L85 PathProgramCache]: Analyzing trace with hash 946454002, now seen corresponding path program 1 times [2024-11-13 13:15:58,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:58,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [819292470] [2024-11-13 13:15:58,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:58,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:58,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,075 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:15:59,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,077 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:15:59,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,079 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:15:59,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,082 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 340 [2024-11-13 13:15:59,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,083 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356 [2024-11-13 13:15:59,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,085 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368 [2024-11-13 13:15:59,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:15:59,088 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:15:59,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:15:59,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [819292470] [2024-11-13 13:15:59,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [819292470] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:15:59,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:15:59,089 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:15:59,089 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286102422] [2024-11-13 13:15:59,089 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:15:59,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:15:59,090 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:15:59,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:15:59,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:15:59,091 INFO L87 Difference]: Start difference. First operand 865 states and 1155 transitions. Second operand has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:59,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:15:59,183 INFO L93 Difference]: Finished difference Result 1396 states and 1871 transitions. [2024-11-13 13:15:59,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:15:59,184 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 463 [2024-11-13 13:15:59,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:15:59,187 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:15:59,188 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:15:59,189 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:15:59,189 INFO L432 NwaCegarLoop]: 757 mSDtfsCounter, 597 mSDsluCounter, 766 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 600 SdHoareTripleChecker+Valid, 1523 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:15:59,190 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [600 Valid, 1523 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:15:59,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:15:59,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:15:59,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3325554259043173) internal successors, (1142), 857 states have internal predecessors, (1142), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:15:59,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1154 transitions. [2024-11-13 13:15:59,214 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1154 transitions. Word has length 463 [2024-11-13 13:15:59,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:15:59,214 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1154 transitions. [2024-11-13 13:15:59,214 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.2) internal successors, (436), 5 states have internal predecessors, (436), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:15:59,215 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1154 transitions. [2024-11-13 13:15:59,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 465 [2024-11-13 13:15:59,219 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:15:59,220 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:15:59,220 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2024-11-13 13:15:59,220 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:15:59,220 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:15:59,221 INFO L85 PathProgramCache]: Analyzing trace with hash -879024971, now seen corresponding path program 1 times [2024-11-13 13:15:59,221 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:15:59,221 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497627749] [2024-11-13 13:15:59,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:15:59,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:15:59,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,459 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:00,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,462 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:00,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,465 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:00,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,467 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 341 [2024-11-13 13:16:00,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,469 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357 [2024-11-13 13:16:00,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,471 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 369 [2024-11-13 13:16:00,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:00,474 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:00,475 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:00,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497627749] [2024-11-13 13:16:00,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1497627749] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:00,475 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:00,475 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:00,475 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [387538365] [2024-11-13 13:16:00,476 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:00,476 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:00,476 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:00,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:00,477 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:00,478 INFO L87 Difference]: Start difference. First operand 865 states and 1154 transitions. Second operand has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:01,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:01,084 INFO L93 Difference]: Finished difference Result 1396 states and 1869 transitions. [2024-11-13 13:16:01,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:01,085 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 464 [2024-11-13 13:16:01,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:01,087 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:01,088 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:01,088 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:01,090 INFO L432 NwaCegarLoop]: 578 mSDtfsCounter, 582 mSDsluCounter, 587 mSDsCounter, 0 mSdLazyCounter, 392 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 585 SdHoareTripleChecker+Valid, 1165 SdHoareTripleChecker+Invalid, 393 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 392 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:01,090 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [585 Valid, 1165 Invalid, 393 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 392 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 13:16:01,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:01,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:01,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3313885647607935) internal successors, (1141), 857 states have internal predecessors, (1141), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:01,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1153 transitions. [2024-11-13 13:16:01,112 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1153 transitions. Word has length 464 [2024-11-13 13:16:01,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:01,113 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1153 transitions. [2024-11-13 13:16:01,113 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.4) internal successors, (437), 5 states have internal predecessors, (437), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:01,113 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1153 transitions. [2024-11-13 13:16:01,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 466 [2024-11-13 13:16:01,117 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:01,118 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:01,118 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2024-11-13 13:16:01,118 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:01,118 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:01,119 INFO L85 PathProgramCache]: Analyzing trace with hash 2057691261, now seen corresponding path program 1 times [2024-11-13 13:16:01,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:01,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944802628] [2024-11-13 13:16:01,119 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:01,119 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:02,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,274 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:03,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,277 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:03,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:03,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,283 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 342 [2024-11-13 13:16:03,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,284 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358 [2024-11-13 13:16:03,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,286 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370 [2024-11-13 13:16:03,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:03,289 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:03,290 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:03,290 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1944802628] [2024-11-13 13:16:03,290 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1944802628] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:03,290 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:03,290 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:16:03,290 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2011091034] [2024-11-13 13:16:03,290 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:03,291 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:16:03,291 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:03,292 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:16:03,292 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:16:03,293 INFO L87 Difference]: Start difference. First operand 865 states and 1153 transitions. Second operand has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:03,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:03,379 INFO L93 Difference]: Finished difference Result 1396 states and 1867 transitions. [2024-11-13 13:16:03,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:03,381 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 465 [2024-11-13 13:16:03,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:03,384 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:03,384 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:03,385 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:03,386 INFO L432 NwaCegarLoop]: 756 mSDtfsCounter, 495 mSDsluCounter, 758 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 495 SdHoareTripleChecker+Valid, 1514 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:03,386 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [495 Valid, 1514 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:03,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:03,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:03,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3302217036172694) internal successors, (1140), 857 states have internal predecessors, (1140), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:03,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1152 transitions. [2024-11-13 13:16:03,411 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1152 transitions. Word has length 465 [2024-11-13 13:16:03,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:03,412 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1152 transitions. [2024-11-13 13:16:03,412 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 109.5) internal successors, (438), 4 states have internal predecessors, (438), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:03,412 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1152 transitions. [2024-11-13 13:16:03,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 467 [2024-11-13 13:16:03,417 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:03,417 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:03,417 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-13 13:16:03,418 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:03,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:03,418 INFO L85 PathProgramCache]: Analyzing trace with hash -1105015869, now seen corresponding path program 1 times [2024-11-13 13:16:03,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:03,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817321984] [2024-11-13 13:16:03,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:03,419 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:05,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,845 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:05,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,849 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:05,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,853 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:05,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,858 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 343 [2024-11-13 13:16:05,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,863 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359 [2024-11-13 13:16:05,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,865 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 371 [2024-11-13 13:16:05,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:05,869 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:05,870 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:05,870 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817321984] [2024-11-13 13:16:05,870 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [817321984] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:05,870 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:05,870 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:05,871 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [285237261] [2024-11-13 13:16:05,871 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:05,871 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:05,871 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:05,874 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:05,874 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:05,875 INFO L87 Difference]: Start difference. First operand 865 states and 1152 transitions. Second operand has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:06,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:06,008 INFO L93 Difference]: Finished difference Result 1396 states and 1865 transitions. [2024-11-13 13:16:06,009 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:06,009 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 466 [2024-11-13 13:16:06,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:06,012 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:06,012 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:06,013 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:06,013 INFO L432 NwaCegarLoop]: 741 mSDtfsCounter, 1176 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1176 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:06,014 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1176 Valid, 1484 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:06,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:06,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:06,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3290548424737456) internal successors, (1139), 857 states have internal predecessors, (1139), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:06,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1151 transitions. [2024-11-13 13:16:06,038 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1151 transitions. Word has length 466 [2024-11-13 13:16:06,038 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:06,039 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1151 transitions. [2024-11-13 13:16:06,039 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 87.8) internal successors, (439), 5 states have internal predecessors, (439), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:06,039 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1151 transitions. [2024-11-13 13:16:06,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2024-11-13 13:16:06,043 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:06,043 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:06,043 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2024-11-13 13:16:06,044 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:06,044 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:06,044 INFO L85 PathProgramCache]: Analyzing trace with hash -1243463939, now seen corresponding path program 1 times [2024-11-13 13:16:06,044 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:06,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824497508] [2024-11-13 13:16:06,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:06,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:07,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,211 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:08,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,219 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:08,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,223 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:08,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 344 [2024-11-13 13:16:08,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 360 [2024-11-13 13:16:08,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 372 [2024-11-13 13:16:08,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:08,238 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:08,238 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:08,238 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1824497508] [2024-11-13 13:16:08,238 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1824497508] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:08,238 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:08,239 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:08,239 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139977222] [2024-11-13 13:16:08,239 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:08,239 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:08,239 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:08,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:08,249 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:08,250 INFO L87 Difference]: Start difference. First operand 865 states and 1151 transitions. Second operand has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:08,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:08,539 INFO L93 Difference]: Finished difference Result 1396 states and 1863 transitions. [2024-11-13 13:16:08,540 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:08,540 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 467 [2024-11-13 13:16:08,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:08,546 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:08,547 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:08,548 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:08,578 INFO L432 NwaCegarLoop]: 741 mSDtfsCounter, 654 mSDsluCounter, 750 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 654 SdHoareTripleChecker+Valid, 1491 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:08,579 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [654 Valid, 1491 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:16:08,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:08,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:08,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3278879813302218) internal successors, (1138), 857 states have internal predecessors, (1138), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:08,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1150 transitions. [2024-11-13 13:16:08,649 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1150 transitions. Word has length 467 [2024-11-13 13:16:08,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:08,649 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1150 transitions. [2024-11-13 13:16:08,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.0) internal successors, (440), 5 states have internal predecessors, (440), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:08,650 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1150 transitions. [2024-11-13 13:16:08,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 469 [2024-11-13 13:16:08,663 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:08,664 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:08,664 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-13 13:16:08,664 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:08,665 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:08,665 INFO L85 PathProgramCache]: Analyzing trace with hash -1190542508, now seen corresponding path program 1 times [2024-11-13 13:16:08,665 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:08,665 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [431149159] [2024-11-13 13:16:08,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:08,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:09,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,744 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:10,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,747 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:10,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,750 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:10,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,753 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 345 [2024-11-13 13:16:10,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,755 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361 [2024-11-13 13:16:10,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,757 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 373 [2024-11-13 13:16:10,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:10,760 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:10,761 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:10,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [431149159] [2024-11-13 13:16:10,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [431149159] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:10,761 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:10,761 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:16:10,762 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607747769] [2024-11-13 13:16:10,762 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:10,762 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:16:10,763 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:10,763 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:16:10,764 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:16:10,764 INFO L87 Difference]: Start difference. First operand 865 states and 1150 transitions. Second operand has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:10,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:10,887 INFO L93 Difference]: Finished difference Result 1396 states and 1861 transitions. [2024-11-13 13:16:10,888 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:10,888 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 468 [2024-11-13 13:16:10,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:10,891 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:10,891 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:10,892 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:10,893 INFO L432 NwaCegarLoop]: 741 mSDtfsCounter, 504 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 504 SdHoareTripleChecker+Valid, 1484 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:10,893 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [504 Valid, 1484 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:10,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:10,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:10,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3267211201866977) internal successors, (1137), 857 states have internal predecessors, (1137), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:10,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1149 transitions. [2024-11-13 13:16:10,933 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1149 transitions. Word has length 468 [2024-11-13 13:16:10,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:10,934 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1149 transitions. [2024-11-13 13:16:10,934 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 110.25) internal successors, (441), 4 states have internal predecessors, (441), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:10,934 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1149 transitions. [2024-11-13 13:16:10,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 470 [2024-11-13 13:16:10,938 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:10,939 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:10,939 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53 [2024-11-13 13:16:10,939 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:10,939 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:10,940 INFO L85 PathProgramCache]: Analyzing trace with hash -1899068756, now seen corresponding path program 1 times [2024-11-13 13:16:10,940 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:10,940 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594161854] [2024-11-13 13:16:10,940 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:10,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:11,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,785 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:12,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,788 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:12,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:12,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,796 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 346 [2024-11-13 13:16:12,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 362 [2024-11-13 13:16:12,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 374 [2024-11-13 13:16:12,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:12,803 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:12,804 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:12,804 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594161854] [2024-11-13 13:16:12,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [594161854] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:12,804 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:12,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:12,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330010054] [2024-11-13 13:16:12,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:12,805 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:12,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:12,806 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:12,807 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:12,807 INFO L87 Difference]: Start difference. First operand 865 states and 1149 transitions. Second operand has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:13,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:13,064 INFO L93 Difference]: Finished difference Result 1396 states and 1859 transitions. [2024-11-13 13:16:13,065 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:13,065 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 469 [2024-11-13 13:16:13,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:13,067 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:13,067 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:13,068 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:13,068 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 1211 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 118 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1211 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 118 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 118 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:13,068 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1211 Valid, 1422 Invalid, 118 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 118 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:16:13,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:13,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:13,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.325554259043174) internal successors, (1136), 857 states have internal predecessors, (1136), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:13,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1148 transitions. [2024-11-13 13:16:13,083 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1148 transitions. Word has length 469 [2024-11-13 13:16:13,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:13,084 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1148 transitions. [2024-11-13 13:16:13,084 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.4) internal successors, (442), 5 states have internal predecessors, (442), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:13,084 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1148 transitions. [2024-11-13 13:16:13,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 471 [2024-11-13 13:16:13,086 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:13,086 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:13,086 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54 [2024-11-13 13:16:13,087 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:13,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:13,087 INFO L85 PathProgramCache]: Analyzing trace with hash -820031054, now seen corresponding path program 1 times [2024-11-13 13:16:13,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:13,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934386072] [2024-11-13 13:16:13,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:13,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:13,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,869 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:14,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:14,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,878 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:14,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,881 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 347 [2024-11-13 13:16:14,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,883 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363 [2024-11-13 13:16:14,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,885 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 375 [2024-11-13 13:16:14,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:14,888 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:14,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:14,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934386072] [2024-11-13 13:16:14,889 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934386072] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:14,889 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:14,889 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:14,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1344979098] [2024-11-13 13:16:14,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:14,890 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:14,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:14,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:14,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:14,892 INFO L87 Difference]: Start difference. First operand 865 states and 1148 transitions. Second operand has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:15,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:15,083 INFO L93 Difference]: Finished difference Result 1396 states and 1857 transitions. [2024-11-13 13:16:15,084 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:15,084 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 470 [2024-11-13 13:16:15,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:15,087 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:15,087 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:15,088 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:15,089 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 636 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 636 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:15,089 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [636 Valid, 1429 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:15,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:15,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:15,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3243873978996499) internal successors, (1135), 857 states have internal predecessors, (1135), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:15,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1147 transitions. [2024-11-13 13:16:15,113 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1147 transitions. Word has length 470 [2024-11-13 13:16:15,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:15,114 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1147 transitions. [2024-11-13 13:16:15,114 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.6) internal successors, (443), 5 states have internal predecessors, (443), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:15,114 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1147 transitions. [2024-11-13 13:16:15,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 472 [2024-11-13 13:16:15,118 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:15,118 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:15,119 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55 [2024-11-13 13:16:15,119 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:15,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:15,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1686711419, now seen corresponding path program 1 times [2024-11-13 13:16:15,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:15,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2049125000] [2024-11-13 13:16:15,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:15,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:16,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,320 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:17,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,324 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:17,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,327 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:17,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,332 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348 [2024-11-13 13:16:17,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,334 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364 [2024-11-13 13:16:17,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,336 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 376 [2024-11-13 13:16:17,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:17,341 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:17,342 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:17,342 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2049125000] [2024-11-13 13:16:17,342 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2049125000] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:17,342 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:17,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:16:17,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1759062864] [2024-11-13 13:16:17,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:17,343 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:16:17,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:17,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:16:17,345 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:16:17,345 INFO L87 Difference]: Start difference. First operand 865 states and 1147 transitions. Second operand has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:17,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:17,508 INFO L93 Difference]: Finished difference Result 1396 states and 1855 transitions. [2024-11-13 13:16:17,508 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:17,509 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 471 [2024-11-13 13:16:17,509 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:17,511 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:17,512 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:17,512 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:17,513 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 557 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 114 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 557 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:17,513 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [557 Valid, 1422 Invalid, 114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 114 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:17,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:17,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:17,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.323220536756126) internal successors, (1134), 857 states have internal predecessors, (1134), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:17,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1146 transitions. [2024-11-13 13:16:17,536 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1146 transitions. Word has length 471 [2024-11-13 13:16:17,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:17,537 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1146 transitions. [2024-11-13 13:16:17,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 111.0) internal successors, (444), 4 states have internal predecessors, (444), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:17,537 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1146 transitions. [2024-11-13 13:16:17,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 473 [2024-11-13 13:16:17,541 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:17,541 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:17,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56 [2024-11-13 13:16:17,542 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:17,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:17,542 INFO L85 PathProgramCache]: Analyzing trace with hash 649946275, now seen corresponding path program 1 times [2024-11-13 13:16:17,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:17,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585142910] [2024-11-13 13:16:17,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:17,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:18,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,086 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:19,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,089 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:19,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,091 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:19,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,093 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 349 [2024-11-13 13:16:19,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,094 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365 [2024-11-13 13:16:19,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,095 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 377 [2024-11-13 13:16:19,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:19,097 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:19,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:19,098 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585142910] [2024-11-13 13:16:19,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [585142910] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:19,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:19,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:19,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706843702] [2024-11-13 13:16:19,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:19,099 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:19,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:19,099 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:19,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:19,100 INFO L87 Difference]: Start difference. First operand 865 states and 1146 transitions. Second operand has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:19,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:19,275 INFO L93 Difference]: Finished difference Result 1396 states and 1853 transitions. [2024-11-13 13:16:19,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:19,275 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 472 [2024-11-13 13:16:19,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:19,277 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:19,277 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:19,278 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:19,278 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 634 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 112 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 634 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 112 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:19,278 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [634 Valid, 1429 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 112 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:19,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:19,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:19,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.322053675612602) internal successors, (1133), 857 states have internal predecessors, (1133), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:19,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1145 transitions. [2024-11-13 13:16:19,301 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1145 transitions. Word has length 472 [2024-11-13 13:16:19,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:19,302 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1145 transitions. [2024-11-13 13:16:19,302 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.0) internal successors, (445), 5 states have internal predecessors, (445), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:19,302 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1145 transitions. [2024-11-13 13:16:19,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 474 [2024-11-13 13:16:19,306 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:19,306 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:19,306 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-11-13 13:16:19,307 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:19,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:19,307 INFO L85 PathProgramCache]: Analyzing trace with hash 160788682, now seen corresponding path program 1 times [2024-11-13 13:16:19,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:19,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784790244] [2024-11-13 13:16:19,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:19,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:20,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,200 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:21,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,205 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:21,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,210 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:21,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,214 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 350 [2024-11-13 13:16:21,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,217 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:16:21,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,219 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 378 [2024-11-13 13:16:21,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:21,223 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:21,223 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:21,223 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784790244] [2024-11-13 13:16:21,223 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [784790244] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:21,223 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:21,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:21,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157315875] [2024-11-13 13:16:21,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:21,225 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:21,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:21,226 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:21,226 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:21,227 INFO L87 Difference]: Start difference. First operand 865 states and 1145 transitions. Second operand has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:21,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:21,438 INFO L93 Difference]: Finished difference Result 1396 states and 1851 transitions. [2024-11-13 13:16:21,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:21,438 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 473 [2024-11-13 13:16:21,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:21,441 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:21,441 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:21,441 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:21,442 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 633 mSDsluCounter, 719 mSDsCounter, 0 mSdLazyCounter, 110 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 633 SdHoareTripleChecker+Valid, 1429 SdHoareTripleChecker+Invalid, 110 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:21,442 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [633 Valid, 1429 Invalid, 110 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 110 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:21,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:21,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:21,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3208868144690782) internal successors, (1132), 857 states have internal predecessors, (1132), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:21,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1144 transitions. [2024-11-13 13:16:21,465 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1144 transitions. Word has length 473 [2024-11-13 13:16:21,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:21,465 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1144 transitions. [2024-11-13 13:16:21,465 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.2) internal successors, (446), 5 states have internal predecessors, (446), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:21,465 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1144 transitions. [2024-11-13 13:16:21,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 475 [2024-11-13 13:16:21,470 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:21,470 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:21,470 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-11-13 13:16:21,470 INFO L396 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:21,470 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:21,471 INFO L85 PathProgramCache]: Analyzing trace with hash -1357269740, now seen corresponding path program 1 times [2024-11-13 13:16:21,471 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:21,471 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089791558] [2024-11-13 13:16:21,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:21,471 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:22,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,312 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:23,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,314 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:23,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,316 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:23,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,319 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 351 [2024-11-13 13:16:23,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367 [2024-11-13 13:16:23,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,323 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 379 [2024-11-13 13:16:23,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:23,326 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:23,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:23,326 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089791558] [2024-11-13 13:16:23,327 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089791558] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:23,327 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:23,327 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:16:23,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [946833922] [2024-11-13 13:16:23,327 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:23,328 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:16:23,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:23,328 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:16:23,329 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:23,329 INFO L87 Difference]: Start difference. First operand 865 states and 1144 transitions. Second operand has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:23,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:23,520 INFO L93 Difference]: Finished difference Result 1396 states and 1849 transitions. [2024-11-13 13:16:23,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:23,521 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 474 [2024-11-13 13:16:23,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:23,524 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:23,524 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:23,525 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:23,526 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 1161 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1161 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:23,526 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1161 Valid, 1422 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:23,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:23,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:23,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3197199533255544) internal successors, (1131), 857 states have internal predecessors, (1131), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:23,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1143 transitions. [2024-11-13 13:16:23,549 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1143 transitions. Word has length 474 [2024-11-13 13:16:23,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:23,550 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1143 transitions. [2024-11-13 13:16:23,550 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 89.4) internal successors, (447), 5 states have internal predecessors, (447), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:23,550 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1143 transitions. [2024-11-13 13:16:23,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2024-11-13 13:16:23,554 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:23,554 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:23,555 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable59 [2024-11-13 13:16:23,555 INFO L396 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:23,555 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:23,555 INFO L85 PathProgramCache]: Analyzing trace with hash -1822974055, now seen corresponding path program 1 times [2024-11-13 13:16:23,555 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:23,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218164581] [2024-11-13 13:16:23,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:23,556 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:24,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,597 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:25,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,601 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:25,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,605 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:25,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,608 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 352 [2024-11-13 13:16:25,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,610 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368 [2024-11-13 13:16:25,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,611 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 380 [2024-11-13 13:16:25,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:25,618 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:25,618 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:25,618 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218164581] [2024-11-13 13:16:25,618 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1218164581] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:25,618 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:25,618 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:16:25,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440635654] [2024-11-13 13:16:25,618 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:25,619 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:16:25,619 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:25,620 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:16:25,620 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:16:25,621 INFO L87 Difference]: Start difference. First operand 865 states and 1143 transitions. Second operand has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:25,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:25,773 INFO L93 Difference]: Finished difference Result 1396 states and 1847 transitions. [2024-11-13 13:16:25,773 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:16:25,774 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 475 [2024-11-13 13:16:25,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:25,775 INFO L225 Difference]: With dead ends: 1396 [2024-11-13 13:16:25,775 INFO L226 Difference]: Without dead ends: 865 [2024-11-13 13:16:25,776 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:16:25,776 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 521 mSDsluCounter, 712 mSDsCounter, 0 mSdLazyCounter, 106 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 521 SdHoareTripleChecker+Valid, 1422 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 106 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:25,777 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [521 Valid, 1422 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 106 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:16:25,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2024-11-13 13:16:25,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 865. [2024-11-13 13:16:25,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 857 states have (on average 1.3185530921820303) internal successors, (1130), 857 states have internal predecessors, (1130), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:16:25,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 1142 transitions. [2024-11-13 13:16:25,800 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 1142 transitions. Word has length 475 [2024-11-13 13:16:25,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:25,801 INFO L471 AbstractCegarLoop]: Abstraction has 865 states and 1142 transitions. [2024-11-13 13:16:25,801 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 112.0) internal successors, (448), 4 states have internal predecessors, (448), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:25,801 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 1142 transitions. [2024-11-13 13:16:25,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 477 [2024-11-13 13:16:25,805 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:25,805 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:25,806 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60 [2024-11-13 13:16:25,806 INFO L396 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:25,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:25,806 INFO L85 PathProgramCache]: Analyzing trace with hash -798493947, now seen corresponding path program 1 times [2024-11-13 13:16:25,806 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:25,807 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012528356] [2024-11-13 13:16:25,807 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:25,807 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:27,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,794 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:27,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,796 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:27,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,798 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:27,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,799 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 353 [2024-11-13 13:16:27,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 369 [2024-11-13 13:16:27,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,801 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381 [2024-11-13 13:16:27,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:27,803 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:27,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:27,803 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012528356] [2024-11-13 13:16:27,803 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2012528356] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:27,803 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:27,803 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:16:27,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1016881205] [2024-11-13 13:16:27,803 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:27,804 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:16:27,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:27,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:16:27,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:27,806 INFO L87 Difference]: Start difference. First operand 865 states and 1142 transitions. Second operand has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:28,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:28,494 INFO L93 Difference]: Finished difference Result 1999 states and 2653 transitions. [2024-11-13 13:16:28,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:16:28,495 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 476 [2024-11-13 13:16:28,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:28,500 INFO L225 Difference]: With dead ends: 1999 [2024-11-13 13:16:28,500 INFO L226 Difference]: Without dead ends: 1468 [2024-11-13 13:16:28,501 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:16:28,502 INFO L432 NwaCegarLoop]: 649 mSDtfsCounter, 713 mSDsluCounter, 2105 mSDsCounter, 0 mSdLazyCounter, 569 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 716 SdHoareTripleChecker+Valid, 2754 SdHoareTripleChecker+Invalid, 577 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 569 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:28,502 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [716 Valid, 2754 Invalid, 577 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 569 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 13:16:28,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1468 states. [2024-11-13 13:16:28,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1468 to 1352. [2024-11-13 13:16:28,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1352 states, 1341 states have (on average 1.3154362416107384) internal successors, (1764), 1341 states have internal predecessors, (1764), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 13:16:28,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1352 states to 1352 states and 1782 transitions. [2024-11-13 13:16:28,540 INFO L78 Accepts]: Start accepts. Automaton has 1352 states and 1782 transitions. Word has length 476 [2024-11-13 13:16:28,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:28,541 INFO L471 AbstractCegarLoop]: Abstraction has 1352 states and 1782 transitions. [2024-11-13 13:16:28,543 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 74.83333333333333) internal successors, (449), 6 states have internal predecessors, (449), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:28,543 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 1782 transitions. [2024-11-13 13:16:28,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-11-13 13:16:28,550 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:28,550 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:28,550 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61 [2024-11-13 13:16:28,551 INFO L396 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:28,551 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:28,552 INFO L85 PathProgramCache]: Analyzing trace with hash 557524213, now seen corresponding path program 1 times [2024-11-13 13:16:28,552 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:28,552 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1591413987] [2024-11-13 13:16:28,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:28,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:30,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,284 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:31,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,286 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:31,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,288 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:31,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,290 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354 [2024-11-13 13:16:31,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,292 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370 [2024-11-13 13:16:31,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,294 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382 [2024-11-13 13:16:31,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:31,296 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 115 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:16:31,297 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:31,297 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1591413987] [2024-11-13 13:16:31,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1591413987] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:31,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:31,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:16:31,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449799164] [2024-11-13 13:16:31,298 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:31,298 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:16:31,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:31,299 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:16:31,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:31,300 INFO L87 Difference]: Start difference. First operand 1352 states and 1782 transitions. Second operand has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:32,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:32,156 INFO L93 Difference]: Finished difference Result 1906 states and 2519 transitions. [2024-11-13 13:16:32,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:16:32,156 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-11-13 13:16:32,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:32,159 INFO L225 Difference]: With dead ends: 1906 [2024-11-13 13:16:32,159 INFO L226 Difference]: Without dead ends: 1375 [2024-11-13 13:16:32,160 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:16:32,160 INFO L432 NwaCegarLoop]: 568 mSDtfsCounter, 1340 mSDsluCounter, 1674 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1343 SdHoareTripleChecker+Valid, 2242 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:32,160 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1343 Valid, 2242 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-13 13:16:32,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1375 states. [2024-11-13 13:16:32,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1375 to 1353. [2024-11-13 13:16:32,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1342 states have (on average 1.3152011922503726) internal successors, (1765), 1342 states have internal predecessors, (1765), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 13:16:32,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 1783 transitions. [2024-11-13 13:16:32,194 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 1783 transitions. Word has length 477 [2024-11-13 13:16:32,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:32,194 INFO L471 AbstractCegarLoop]: Abstraction has 1353 states and 1783 transitions. [2024-11-13 13:16:32,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 75.0) internal successors, (450), 6 states have internal predecessors, (450), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:32,194 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 1783 transitions. [2024-11-13 13:16:32,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2024-11-13 13:16:32,199 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:32,199 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:32,200 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62 [2024-11-13 13:16:32,200 INFO L396 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:32,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:32,200 INFO L85 PathProgramCache]: Analyzing trace with hash 1156124924, now seen corresponding path program 1 times [2024-11-13 13:16:32,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:32,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448005744] [2024-11-13 13:16:32,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:32,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:33,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,554 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:16:34,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,557 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2024-11-13 13:16:34,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,559 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2024-11-13 13:16:34,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,560 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 354 [2024-11-13 13:16:34,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,561 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 370 [2024-11-13 13:16:34,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,562 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382 [2024-11-13 13:16:34,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:34,564 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 145 trivial. 0 not checked. [2024-11-13 13:16:34,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:34,564 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448005744] [2024-11-13 13:16:34,564 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448005744] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:34,564 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:34,564 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 13:16:34,564 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976749629] [2024-11-13 13:16:34,564 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:34,565 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:16:34,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:34,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:16:34,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-13 13:16:34,566 INFO L87 Difference]: Start difference. First operand 1353 states and 1783 transitions. Second operand has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:34,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:34,800 INFO L93 Difference]: Finished difference Result 3074 states and 4032 transitions. [2024-11-13 13:16:34,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 13:16:34,800 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 477 [2024-11-13 13:16:34,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:34,806 INFO L225 Difference]: With dead ends: 3074 [2024-11-13 13:16:34,806 INFO L226 Difference]: Without dead ends: 2361 [2024-11-13 13:16:34,808 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:16:34,808 INFO L432 NwaCegarLoop]: 1844 mSDtfsCounter, 1106 mSDsluCounter, 9417 mSDsCounter, 0 mSdLazyCounter, 174 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1109 SdHoareTripleChecker+Valid, 11261 SdHoareTripleChecker+Invalid, 174 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 174 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:34,809 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1109 Valid, 11261 Invalid, 174 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 174 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:16:34,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2361 states. [2024-11-13 13:16:34,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2361 to 1420. [2024-11-13 13:16:34,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1420 states, 1406 states have (on average 1.3200568990042674) internal successors, (1856), 1406 states have internal predecessors, (1856), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:34,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1420 states to 1420 states and 1880 transitions. [2024-11-13 13:16:34,856 INFO L78 Accepts]: Start accepts. Automaton has 1420 states and 1880 transitions. Word has length 477 [2024-11-13 13:16:34,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:34,856 INFO L471 AbstractCegarLoop]: Abstraction has 1420 states and 1880 transitions. [2024-11-13 13:16:34,857 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 46.0) internal successors, (368), 8 states have internal predecessors, (368), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:16:34,857 INFO L276 IsEmpty]: Start isEmpty. Operand 1420 states and 1880 transitions. [2024-11-13 13:16:34,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 479 [2024-11-13 13:16:34,861 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:34,861 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:34,862 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63 [2024-11-13 13:16:34,862 INFO L396 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:34,862 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:34,862 INFO L85 PathProgramCache]: Analyzing trace with hash -1031637214, now seen corresponding path program 1 times [2024-11-13 13:16:34,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:34,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867607211] [2024-11-13 13:16:34,863 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:34,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:36,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,303 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:37,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,305 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 13:16:37,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,306 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:16:37,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,308 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 355 [2024-11-13 13:16:37,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,309 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 371 [2024-11-13 13:16:37,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,309 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383 [2024-11-13 13:16:37,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:37,311 INFO L134 CoverageAnalysis]: Checked inductivity of 175 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 129 trivial. 0 not checked. [2024-11-13 13:16:37,311 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:37,311 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867607211] [2024-11-13 13:16:37,312 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [867607211] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:37,312 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:37,312 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 13:16:37,312 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452824245] [2024-11-13 13:16:37,312 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:37,312 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 13:16:37,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:37,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 13:16:37,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:16:37,314 INFO L87 Difference]: Start difference. First operand 1420 states and 1880 transitions. Second operand has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:16:37,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:37,738 INFO L93 Difference]: Finished difference Result 2814 states and 3716 transitions. [2024-11-13 13:16:37,738 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 13:16:37,738 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 478 [2024-11-13 13:16:37,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:37,742 INFO L225 Difference]: With dead ends: 2814 [2024-11-13 13:16:37,742 INFO L226 Difference]: Without dead ends: 1436 [2024-11-13 13:16:37,744 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-13 13:16:37,745 INFO L432 NwaCegarLoop]: 740 mSDtfsCounter, 786 mSDsluCounter, 2782 mSDsCounter, 0 mSdLazyCounter, 286 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 788 SdHoareTripleChecker+Valid, 3522 SdHoareTripleChecker+Invalid, 292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 286 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:37,745 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [788 Valid, 3522 Invalid, 292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 286 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-13 13:16:37,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1436 states. [2024-11-13 13:16:37,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1436 to 1428. [2024-11-13 13:16:37,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1428 states, 1414 states have (on average 1.3154172560113153) internal successors, (1860), 1414 states have internal predecessors, (1860), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:37,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1428 states to 1428 states and 1884 transitions. [2024-11-13 13:16:37,782 INFO L78 Accepts]: Start accepts. Automaton has 1428 states and 1884 transitions. Word has length 478 [2024-11-13 13:16:37,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:37,783 INFO L471 AbstractCegarLoop]: Abstraction has 1428 states and 1884 transitions. [2024-11-13 13:16:37,783 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 55.0) internal successors, (385), 7 states have internal predecessors, (385), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:16:37,783 INFO L276 IsEmpty]: Start isEmpty. Operand 1428 states and 1884 transitions. [2024-11-13 13:16:37,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 481 [2024-11-13 13:16:37,787 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:37,787 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:37,787 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64 [2024-11-13 13:16:37,787 INFO L396 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:37,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:37,788 INFO L85 PathProgramCache]: Analyzing trace with hash 529696992, now seen corresponding path program 1 times [2024-11-13 13:16:37,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:37,788 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1674227599] [2024-11-13 13:16:37,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:37,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:39,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,350 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:40,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,352 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2024-11-13 13:16:40,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,355 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 88 [2024-11-13 13:16:40,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,356 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 356 [2024-11-13 13:16:40,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,358 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 373 [2024-11-13 13:16:40,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,359 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 385 [2024-11-13 13:16:40,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:40,361 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 149 trivial. 0 not checked. [2024-11-13 13:16:40,362 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:40,362 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1674227599] [2024-11-13 13:16:40,362 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1674227599] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:40,362 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:40,362 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 13:16:40,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489978695] [2024-11-13 13:16:40,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:40,363 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 13:16:40,363 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:40,364 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 13:16:40,364 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:16:40,364 INFO L87 Difference]: Start difference. First operand 1428 states and 1884 transitions. Second operand has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 13:16:41,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:41,138 INFO L93 Difference]: Finished difference Result 2604 states and 3404 transitions. [2024-11-13 13:16:41,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:16:41,138 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) Word has length 480 [2024-11-13 13:16:41,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:41,142 INFO L225 Difference]: With dead ends: 2604 [2024-11-13 13:16:41,142 INFO L226 Difference]: Without dead ends: 1444 [2024-11-13 13:16:41,144 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-13 13:16:41,144 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 753 mSDsluCounter, 1680 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 755 SdHoareTripleChecker+Valid, 2240 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:41,145 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [755 Valid, 2240 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:16:41,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2024-11-13 13:16:41,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1436. [2024-11-13 13:16:41,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1436 states, 1422 states have (on average 1.310829817158931) internal successors, (1864), 1422 states have internal predecessors, (1864), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:41,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1436 states to 1436 states and 1888 transitions. [2024-11-13 13:16:41,199 INFO L78 Accepts]: Start accepts. Automaton has 1436 states and 1888 transitions. Word has length 480 [2024-11-13 13:16:41,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:41,200 INFO L471 AbstractCegarLoop]: Abstraction has 1436 states and 1888 transitions. [2024-11-13 13:16:41,200 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 52.57142857142857) internal successors, (368), 7 states have internal predecessors, (368), 3 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 3 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 13:16:41,200 INFO L276 IsEmpty]: Start isEmpty. Operand 1436 states and 1888 transitions. [2024-11-13 13:16:41,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 483 [2024-11-13 13:16:41,206 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:41,207 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:41,207 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65 [2024-11-13 13:16:41,207 INFO L396 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:41,207 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:41,208 INFO L85 PathProgramCache]: Analyzing trace with hash 1879075376, now seen corresponding path program 1 times [2024-11-13 13:16:41,208 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:41,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570082578] [2024-11-13 13:16:41,208 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:41,208 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:42,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,901 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:43,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,904 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2024-11-13 13:16:43,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 89 [2024-11-13 13:16:43,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,907 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357 [2024-11-13 13:16:43,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,908 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 374 [2024-11-13 13:16:43,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,910 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 387 [2024-11-13 13:16:43,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:43,912 INFO L134 CoverageAnalysis]: Checked inductivity of 177 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 158 trivial. 0 not checked. [2024-11-13 13:16:43,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:43,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570082578] [2024-11-13 13:16:43,913 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [570082578] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:43,913 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:43,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:16:43,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063627884] [2024-11-13 13:16:43,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:43,914 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:16:43,914 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:43,915 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:16:43,915 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:43,915 INFO L87 Difference]: Start difference. First operand 1436 states and 1888 transitions. Second operand has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 13:16:44,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:44,655 INFO L93 Difference]: Finished difference Result 2642 states and 3445 transitions. [2024-11-13 13:16:44,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:16:44,656 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 482 [2024-11-13 13:16:44,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:44,661 INFO L225 Difference]: With dead ends: 2642 [2024-11-13 13:16:44,661 INFO L226 Difference]: Without dead ends: 1444 [2024-11-13 13:16:44,663 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:16:44,665 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 693 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 695 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:44,666 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [695 Valid, 2233 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:16:44,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1444 states. [2024-11-13 13:16:44,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1444 to 1440. [2024-11-13 13:16:44,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1440 states, 1426 states have (on average 1.3099579242636745) internal successors, (1868), 1426 states have internal predecessors, (1868), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:44,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1440 states to 1440 states and 1892 transitions. [2024-11-13 13:16:44,711 INFO L78 Accepts]: Start accepts. Automaton has 1440 states and 1892 transitions. Word has length 482 [2024-11-13 13:16:44,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:44,712 INFO L471 AbstractCegarLoop]: Abstraction has 1440 states and 1892 transitions. [2024-11-13 13:16:44,712 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 60.333333333333336) internal successors, (362), 6 states have internal predecessors, (362), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 13:16:44,712 INFO L276 IsEmpty]: Start isEmpty. Operand 1440 states and 1892 transitions. [2024-11-13 13:16:44,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 485 [2024-11-13 13:16:44,717 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:44,717 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:44,717 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable66 [2024-11-13 13:16:44,717 INFO L396 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:44,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:44,718 INFO L85 PathProgramCache]: Analyzing trace with hash -1721250976, now seen corresponding path program 1 times [2024-11-13 13:16:44,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:44,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1636768759] [2024-11-13 13:16:44,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:44,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:46,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,654 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:47,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,656 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 13:16:47,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,657 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2024-11-13 13:16:47,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,659 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 358 [2024-11-13 13:16:47,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,660 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 376 [2024-11-13 13:16:47,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,661 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 389 [2024-11-13 13:16:47,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:47,663 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-11-13 13:16:47,663 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:47,663 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1636768759] [2024-11-13 13:16:47,663 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1636768759] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:47,663 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:47,663 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 13:16:47,663 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1722118665] [2024-11-13 13:16:47,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:47,664 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:16:47,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:47,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:16:47,665 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-13 13:16:47,665 INFO L87 Difference]: Start difference. First operand 1440 states and 1892 transitions. Second operand has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:16:48,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:48,918 INFO L93 Difference]: Finished difference Result 3624 states and 4693 transitions. [2024-11-13 13:16:48,919 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 13:16:48,919 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 484 [2024-11-13 13:16:48,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:48,924 INFO L225 Difference]: With dead ends: 3624 [2024-11-13 13:16:48,924 INFO L226 Difference]: Without dead ends: 2597 [2024-11-13 13:16:48,927 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:16:48,927 INFO L432 NwaCegarLoop]: 1162 mSDtfsCounter, 1259 mSDsluCounter, 4991 mSDsCounter, 0 mSdLazyCounter, 1408 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1262 SdHoareTripleChecker+Valid, 6153 SdHoareTripleChecker+Invalid, 1408 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1408 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:48,927 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1262 Valid, 6153 Invalid, 1408 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1408 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-13 13:16:48,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2597 states. [2024-11-13 13:16:48,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2597 to 2589. [2024-11-13 13:16:48,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2589 states, 2569 states have (on average 1.2977812378357338) internal successors, (3334), 2569 states have internal predecessors, (3334), 18 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 18 states have call predecessors, (18), 18 states have call successors, (18) [2024-11-13 13:16:49,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2589 states to 2589 states and 3370 transitions. [2024-11-13 13:16:49,001 INFO L78 Accepts]: Start accepts. Automaton has 2589 states and 3370 transitions. Word has length 484 [2024-11-13 13:16:49,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:49,002 INFO L471 AbstractCegarLoop]: Abstraction has 2589 states and 3370 transitions. [2024-11-13 13:16:49,002 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 49.5) internal successors, (396), 8 states have internal predecessors, (396), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:16:49,002 INFO L276 IsEmpty]: Start isEmpty. Operand 2589 states and 3370 transitions. [2024-11-13 13:16:49,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2024-11-13 13:16:49,008 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:49,009 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:49,009 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67 [2024-11-13 13:16:49,009 INFO L396 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:49,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:49,009 INFO L85 PathProgramCache]: Analyzing trace with hash 221570202, now seen corresponding path program 1 times [2024-11-13 13:16:49,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:49,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357197850] [2024-11-13 13:16:49,010 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:49,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:51,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:52,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 13:16:52,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 90 [2024-11-13 13:16:52,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,230 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359 [2024-11-13 13:16:52,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,231 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 377 [2024-11-13 13:16:52,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 390 [2024-11-13 13:16:52,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:52,234 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 150 trivial. 0 not checked. [2024-11-13 13:16:52,234 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:52,234 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357197850] [2024-11-13 13:16:52,234 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1357197850] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:52,234 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:52,234 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:16:52,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1824512975] [2024-11-13 13:16:52,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:52,235 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:16:52,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:52,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:16:52,236 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:16:52,236 INFO L87 Difference]: Start difference. First operand 2589 states and 3370 transitions. Second operand has 6 states, 6 states have (on average 62.166666666666664) internal successors, (373), 6 states have internal predecessors, (373), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 13:16:52,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:52,943 INFO L93 Difference]: Finished difference Result 2599 states and 3378 transitions. [2024-11-13 13:16:52,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:16:52,944 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 62.166666666666664) internal successors, (373), 6 states have internal predecessors, (373), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 486 [2024-11-13 13:16:52,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:52,945 INFO L225 Difference]: With dead ends: 2599 [2024-11-13 13:16:52,946 INFO L226 Difference]: Without dead ends: 1448 [2024-11-13 13:16:52,947 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:16:52,948 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 684 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 685 SdHoareTripleChecker+Valid, 2233 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:52,948 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [685 Valid, 2233 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 13:16:52,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1448 states. [2024-11-13 13:16:52,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1448 to 1444. [2024-11-13 13:16:52,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1444 states, 1430 states have (on average 1.309090909090909) internal successors, (1872), 1430 states have internal predecessors, (1872), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:52,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1444 states to 1444 states and 1896 transitions. [2024-11-13 13:16:52,991 INFO L78 Accepts]: Start accepts. Automaton has 1444 states and 1896 transitions. Word has length 486 [2024-11-13 13:16:52,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:52,991 INFO L471 AbstractCegarLoop]: Abstraction has 1444 states and 1896 transitions. [2024-11-13 13:16:52,991 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 62.166666666666664) internal successors, (373), 6 states have internal predecessors, (373), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 13:16:52,992 INFO L276 IsEmpty]: Start isEmpty. Operand 1444 states and 1896 transitions. [2024-11-13 13:16:52,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 487 [2024-11-13 13:16:52,996 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:52,996 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:52,997 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable68 [2024-11-13 13:16:52,997 INFO L396 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:52,997 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:52,997 INFO L85 PathProgramCache]: Analyzing trace with hash -1224288658, now seen corresponding path program 1 times [2024-11-13 13:16:52,997 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:52,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154268472] [2024-11-13 13:16:52,998 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:52,998 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:56,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,953 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 13:16:56,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,955 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 13:16:56,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,956 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 91 [2024-11-13 13:16:56,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,957 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 359 [2024-11-13 13:16:56,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,958 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 377 [2024-11-13 13:16:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,960 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 391 [2024-11-13 13:16:56,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:16:56,963 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 161 trivial. 0 not checked. [2024-11-13 13:16:56,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:16:56,963 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154268472] [2024-11-13 13:16:56,963 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154268472] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:16:56,963 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:16:56,963 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 13:16:56,963 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [596544434] [2024-11-13 13:16:56,963 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:16:56,964 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 13:16:56,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:16:56,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 13:16:56,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:16:56,965 INFO L87 Difference]: Start difference. First operand 1444 states and 1896 transitions. Second operand has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 13:16:57,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:16:57,403 INFO L93 Difference]: Finished difference Result 2996 states and 3919 transitions. [2024-11-13 13:16:57,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 13:16:57,404 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 486 [2024-11-13 13:16:57,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:16:57,406 INFO L225 Difference]: With dead ends: 2996 [2024-11-13 13:16:57,406 INFO L226 Difference]: Without dead ends: 1460 [2024-11-13 13:16:57,408 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-13 13:16:57,408 INFO L432 NwaCegarLoop]: 737 mSDtfsCounter, 844 mSDsluCounter, 2771 mSDsCounter, 0 mSdLazyCounter, 290 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 3508 SdHoareTripleChecker+Invalid, 300 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 290 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 13:16:57,408 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 3508 Invalid, 300 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 290 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 13:16:57,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1460 states. [2024-11-13 13:16:57,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1460 to 1452. [2024-11-13 13:16:57,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1452 states, 1438 states have (on average 1.3045897079276774) internal successors, (1876), 1438 states have internal predecessors, (1876), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:16:57,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1452 states to 1452 states and 1900 transitions. [2024-11-13 13:16:57,450 INFO L78 Accepts]: Start accepts. Automaton has 1452 states and 1900 transitions. Word has length 486 [2024-11-13 13:16:57,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:16:57,450 INFO L471 AbstractCegarLoop]: Abstraction has 1452 states and 1900 transitions. [2024-11-13 13:16:57,451 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 51.857142857142854) internal successors, (363), 7 states have internal predecessors, (363), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 13:16:57,451 INFO L276 IsEmpty]: Start isEmpty. Operand 1452 states and 1900 transitions. [2024-11-13 13:16:57,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 489 [2024-11-13 13:16:57,453 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:16:57,454 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:16:57,454 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable69 [2024-11-13 13:16:57,454 INFO L396 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:16:57,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:16:57,454 INFO L85 PathProgramCache]: Analyzing trace with hash -378482144, now seen corresponding path program 1 times [2024-11-13 13:16:57,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:16:57,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114383422] [2024-11-13 13:16:57,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:16:57,455 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:16:59,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:03,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,209 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:03,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,211 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2024-11-13 13:17:03,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,214 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361 [2024-11-13 13:17:03,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,216 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 379 [2024-11-13 13:17:03,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,217 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 393 [2024-11-13 13:17:03,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:03,219 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2024-11-13 13:17:03,219 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:03,219 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114383422] [2024-11-13 13:17:03,219 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2114383422] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:03,219 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:03,219 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-13 13:17:03,219 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [396633728] [2024-11-13 13:17:03,219 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:03,220 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 13:17:03,220 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:03,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 13:17:03,221 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2024-11-13 13:17:03,221 INFO L87 Difference]: Start difference. First operand 1452 states and 1900 transitions. Second operand has 10 states, 10 states have (on average 38.3) internal successors, (383), 10 states have internal predecessors, (383), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:03,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:03,790 INFO L93 Difference]: Finished difference Result 2892 states and 3775 transitions. [2024-11-13 13:17:03,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-13 13:17:03,790 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 38.3) internal successors, (383), 10 states have internal predecessors, (383), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 488 [2024-11-13 13:17:03,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:03,794 INFO L225 Difference]: With dead ends: 2892 [2024-11-13 13:17:03,794 INFO L226 Difference]: Without dead ends: 1944 [2024-11-13 13:17:03,796 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2024-11-13 13:17:03,796 INFO L432 NwaCegarLoop]: 1189 mSDtfsCounter, 2265 mSDsluCounter, 6218 mSDsCounter, 0 mSdLazyCounter, 430 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2270 SdHoareTripleChecker+Valid, 7407 SdHoareTripleChecker+Invalid, 433 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 430 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:03,797 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2270 Valid, 7407 Invalid, 433 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 430 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 13:17:03,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1944 states. [2024-11-13 13:17:03,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1944 to 1487. [2024-11-13 13:17:03,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1487 states, 1471 states have (on average 1.3045547246770903) internal successors, (1919), 1471 states have internal predecessors, (1919), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-13 13:17:03,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1487 states to 1487 states and 1947 transitions. [2024-11-13 13:17:03,851 INFO L78 Accepts]: Start accepts. Automaton has 1487 states and 1947 transitions. Word has length 488 [2024-11-13 13:17:03,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:03,851 INFO L471 AbstractCegarLoop]: Abstraction has 1487 states and 1947 transitions. [2024-11-13 13:17:03,852 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 38.3) internal successors, (383), 10 states have internal predecessors, (383), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:03,852 INFO L276 IsEmpty]: Start isEmpty. Operand 1487 states and 1947 transitions. [2024-11-13 13:17:03,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 489 [2024-11-13 13:17:03,856 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:03,857 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:03,857 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70 [2024-11-13 13:17:03,858 INFO L396 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:03,858 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:03,858 INFO L85 PathProgramCache]: Analyzing trace with hash -1555488832, now seen corresponding path program 1 times [2024-11-13 13:17:03,859 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:03,859 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464847438] [2024-11-13 13:17:03,859 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:03,859 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:05,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,737 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:06,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,741 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:06,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,745 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2024-11-13 13:17:06,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,749 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 361 [2024-11-13 13:17:06,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,751 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 379 [2024-11-13 13:17:06,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,754 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 393 [2024-11-13 13:17:06,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:06,758 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2024-11-13 13:17:06,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:06,758 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464847438] [2024-11-13 13:17:06,758 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1464847438] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:06,758 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:06,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 13:17:06,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1041122131] [2024-11-13 13:17:06,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:06,760 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:17:06,760 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:06,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:17:06,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-13 13:17:06,762 INFO L87 Difference]: Start difference. First operand 1487 states and 1947 transitions. Second operand has 8 states, 8 states have (on average 50.0) internal successors, (400), 8 states have internal predecessors, (400), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:08,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:08,010 INFO L93 Difference]: Finished difference Result 3826 states and 4949 transitions. [2024-11-13 13:17:08,010 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 13:17:08,010 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 50.0) internal successors, (400), 8 states have internal predecessors, (400), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 488 [2024-11-13 13:17:08,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:08,014 INFO L225 Difference]: With dead ends: 3826 [2024-11-13 13:17:08,014 INFO L226 Difference]: Without dead ends: 2796 [2024-11-13 13:17:08,016 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:17:08,017 INFO L432 NwaCegarLoop]: 584 mSDtfsCounter, 1255 mSDsluCounter, 2854 mSDsCounter, 0 mSdLazyCounter, 1210 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1258 SdHoareTripleChecker+Valid, 3438 SdHoareTripleChecker+Invalid, 1210 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1210 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:08,017 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1258 Valid, 3438 Invalid, 1210 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1210 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-13 13:17:08,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2796 states. [2024-11-13 13:17:08,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2796 to 2788. [2024-11-13 13:17:08,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2788 states, 2758 states have (on average 1.293691080493111) internal successors, (3568), 2758 states have internal predecessors, (3568), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 13:17:08,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2788 states to 2788 states and 3624 transitions. [2024-11-13 13:17:08,157 INFO L78 Accepts]: Start accepts. Automaton has 2788 states and 3624 transitions. Word has length 488 [2024-11-13 13:17:08,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:08,158 INFO L471 AbstractCegarLoop]: Abstraction has 2788 states and 3624 transitions. [2024-11-13 13:17:08,158 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 50.0) internal successors, (400), 8 states have internal predecessors, (400), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:08,158 INFO L276 IsEmpty]: Start isEmpty. Operand 2788 states and 3624 transitions. [2024-11-13 13:17:08,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2024-11-13 13:17:08,170 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:08,170 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:08,170 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71 [2024-11-13 13:17:08,171 INFO L396 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:08,171 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:08,171 INFO L85 PathProgramCache]: Analyzing trace with hash -1137644674, now seen corresponding path program 1 times [2024-11-13 13:17:08,171 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:08,172 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305181609] [2024-11-13 13:17:08,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:08,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:10,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,053 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:11,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,054 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:11,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,055 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 92 [2024-11-13 13:17:11,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,056 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 362 [2024-11-13 13:17:11,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,057 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 380 [2024-11-13 13:17:11,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,058 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 394 [2024-11-13 13:17:11,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:11,059 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 172 trivial. 0 not checked. [2024-11-13 13:17:11,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:11,059 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305181609] [2024-11-13 13:17:11,060 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1305181609] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:11,060 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:11,060 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:17:11,060 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463258003] [2024-11-13 13:17:11,060 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:11,061 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:17:11,061 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:11,061 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:17:11,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:17:11,062 INFO L87 Difference]: Start difference. First operand 2788 states and 3624 transitions. Second operand has 6 states, 6 states have (on average 59.833333333333336) internal successors, (359), 6 states have internal predecessors, (359), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:17:11,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:11,687 INFO L93 Difference]: Finished difference Result 2798 states and 3632 transitions. [2024-11-13 13:17:11,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:17:11,687 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 59.833333333333336) internal successors, (359), 6 states have internal predecessors, (359), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 490 [2024-11-13 13:17:11,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:11,689 INFO L225 Difference]: With dead ends: 2798 [2024-11-13 13:17:11,689 INFO L226 Difference]: Without dead ends: 1495 [2024-11-13 13:17:11,690 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:17:11,690 INFO L432 NwaCegarLoop]: 559 mSDtfsCounter, 703 mSDsluCounter, 1670 mSDsCounter, 0 mSdLazyCounter, 810 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 706 SdHoareTripleChecker+Valid, 2229 SdHoareTripleChecker+Invalid, 810 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 810 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:11,690 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [706 Valid, 2229 Invalid, 810 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 810 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 13:17:11,691 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1495 states. [2024-11-13 13:17:11,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1495 to 1491. [2024-11-13 13:17:11,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1491 states, 1475 states have (on average 1.3037288135593221) internal successors, (1923), 1475 states have internal predecessors, (1923), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-13 13:17:11,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1491 states to 1491 states and 1951 transitions. [2024-11-13 13:17:11,730 INFO L78 Accepts]: Start accepts. Automaton has 1491 states and 1951 transitions. Word has length 490 [2024-11-13 13:17:11,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:11,730 INFO L471 AbstractCegarLoop]: Abstraction has 1491 states and 1951 transitions. [2024-11-13 13:17:11,730 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 59.833333333333336) internal successors, (359), 6 states have internal predecessors, (359), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:17:11,730 INFO L276 IsEmpty]: Start isEmpty. Operand 1491 states and 1951 transitions. [2024-11-13 13:17:11,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2024-11-13 13:17:11,735 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:11,735 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:11,736 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72 [2024-11-13 13:17:11,736 INFO L396 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:11,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:11,736 INFO L85 PathProgramCache]: Analyzing trace with hash 540170644, now seen corresponding path program 1 times [2024-11-13 13:17:11,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:11,737 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410808726] [2024-11-13 13:17:11,737 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:11,737 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:15,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,155 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:17:22,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,159 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 13:17:22,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,162 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2024-11-13 13:17:22,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,164 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363 [2024-11-13 13:17:22,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,166 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381 [2024-11-13 13:17:22,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,171 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395 [2024-11-13 13:17:22,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:22,180 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 81 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:17:22,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:22,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410808726] [2024-11-13 13:17:22,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [410808726] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:22,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2081916938] [2024-11-13 13:17:22,181 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:22,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:22,181 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:22,185 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:22,188 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 13:17:26,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:26,198 INFO L255 TraceCheckSpWp]: Trace formula consists of 2976 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 13:17:26,226 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:26,379 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 122 trivial. 0 not checked. [2024-11-13 13:17:26,379 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:17:26,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2081916938] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:26,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:17:26,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [18] total 22 [2024-11-13 13:17:26,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1824808869] [2024-11-13 13:17:26,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:26,381 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:17:26,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:26,382 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:17:26,382 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2024-11-13 13:17:26,382 INFO L87 Difference]: Start difference. First operand 1491 states and 1951 transitions. Second operand has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 13:17:26,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:26,501 INFO L93 Difference]: Finished difference Result 2699 states and 3506 transitions. [2024-11-13 13:17:26,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:17:26,501 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 490 [2024-11-13 13:17:26,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:26,504 INFO L225 Difference]: With dead ends: 2699 [2024-11-13 13:17:26,504 INFO L226 Difference]: Without dead ends: 1491 [2024-11-13 13:17:26,506 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 519 GetRequests, 499 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2024-11-13 13:17:26,506 INFO L432 NwaCegarLoop]: 756 mSDtfsCounter, 0 mSDsluCounter, 3005 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3761 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:26,507 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3761 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:17:26,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1491 states. [2024-11-13 13:17:26,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1491 to 1491. [2024-11-13 13:17:26,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1491 states, 1475 states have (on average 1.3010169491525423) internal successors, (1919), 1475 states have internal predecessors, (1919), 14 states have call successors, (14), 1 states have call predecessors, (14), 1 states have return successors, (14), 14 states have call predecessors, (14), 14 states have call successors, (14) [2024-11-13 13:17:26,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1491 states to 1491 states and 1947 transitions. [2024-11-13 13:17:26,558 INFO L78 Accepts]: Start accepts. Automaton has 1491 states and 1947 transitions. Word has length 490 [2024-11-13 13:17:26,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:26,559 INFO L471 AbstractCegarLoop]: Abstraction has 1491 states and 1947 transitions. [2024-11-13 13:17:26,559 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 75.2) internal successors, (376), 6 states have internal predecessors, (376), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 13:17:26,559 INFO L276 IsEmpty]: Start isEmpty. Operand 1491 states and 1947 transitions. [2024-11-13 13:17:26,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2024-11-13 13:17:26,564 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:26,564 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:26,610 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-13 13:17:26,765 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable73 [2024-11-13 13:17:26,765 INFO L396 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:26,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:26,766 INFO L85 PathProgramCache]: Analyzing trace with hash 424666907, now seen corresponding path program 1 times [2024-11-13 13:17:26,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:26,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899659660] [2024-11-13 13:17:26,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:26,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:28,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,631 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2024-11-13 13:17:29,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,635 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:17:29,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,640 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2024-11-13 13:17:29,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,644 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 363 [2024-11-13 13:17:29,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,649 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 381 [2024-11-13 13:17:29,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,651 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 395 [2024-11-13 13:17:29,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:29,653 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 121 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:17:29,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:29,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899659660] [2024-11-13 13:17:29,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899659660] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:29,654 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:29,654 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:17:29,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819456734] [2024-11-13 13:17:29,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:29,655 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:17:29,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:29,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:17:29,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:17:29,656 INFO L87 Difference]: Start difference. First operand 1491 states and 1947 transitions. Second operand has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:30,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:30,602 INFO L93 Difference]: Finished difference Result 2288 states and 3012 transitions. [2024-11-13 13:17:30,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:17:30,603 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 490 [2024-11-13 13:17:30,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:30,607 INFO L225 Difference]: With dead ends: 2288 [2024-11-13 13:17:30,607 INFO L226 Difference]: Without dead ends: 1748 [2024-11-13 13:17:30,608 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:17:30,609 INFO L432 NwaCegarLoop]: 565 mSDtfsCounter, 1284 mSDsluCounter, 1645 mSDsCounter, 0 mSdLazyCounter, 774 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1287 SdHoareTripleChecker+Valid, 2210 SdHoareTripleChecker+Invalid, 777 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 774 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:30,609 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1287 Valid, 2210 Invalid, 777 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 774 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-13 13:17:30,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1748 states. [2024-11-13 13:17:30,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1748 to 1273. [2024-11-13 13:17:30,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1273 states, 1259 states have (on average 1.319301032565528) internal successors, (1661), 1259 states have internal predecessors, (1661), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:17:30,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1273 states to 1273 states and 1685 transitions. [2024-11-13 13:17:30,653 INFO L78 Accepts]: Start accepts. Automaton has 1273 states and 1685 transitions. Word has length 490 [2024-11-13 13:17:30,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:30,654 INFO L471 AbstractCegarLoop]: Abstraction has 1273 states and 1685 transitions. [2024-11-13 13:17:30,654 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 77.16666666666667) internal successors, (463), 6 states have internal predecessors, (463), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:30,654 INFO L276 IsEmpty]: Start isEmpty. Operand 1273 states and 1685 transitions. [2024-11-13 13:17:30,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-11-13 13:17:30,658 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:30,658 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:30,659 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74 [2024-11-13 13:17:30,659 INFO L396 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:30,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:30,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1610266339, now seen corresponding path program 1 times [2024-11-13 13:17:30,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:30,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219700143] [2024-11-13 13:17:30,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:30,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:31,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:17:31,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,876 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 13:17:31,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,879 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 93 [2024-11-13 13:17:31,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,883 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364 [2024-11-13 13:17:31,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,885 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382 [2024-11-13 13:17:31,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,887 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396 [2024-11-13 13:17:31,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:31,890 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2024-11-13 13:17:31,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:31,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1219700143] [2024-11-13 13:17:31,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1219700143] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:31,890 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:31,890 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:17:31,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248598582] [2024-11-13 13:17:31,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:31,891 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:17:31,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:31,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:17:31,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:17:31,892 INFO L87 Difference]: Start difference. First operand 1273 states and 1685 transitions. Second operand has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:32,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:32,648 INFO L93 Difference]: Finished difference Result 2226 states and 2924 transitions. [2024-11-13 13:17:32,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:17:32,649 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 491 [2024-11-13 13:17:32,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:32,651 INFO L225 Difference]: With dead ends: 2226 [2024-11-13 13:17:32,651 INFO L226 Difference]: Without dead ends: 1281 [2024-11-13 13:17:32,652 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:17:32,653 INFO L432 NwaCegarLoop]: 569 mSDtfsCounter, 717 mSDsluCounter, 1673 mSDsCounter, 0 mSdLazyCounter, 790 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 717 SdHoareTripleChecker+Valid, 2242 SdHoareTripleChecker+Invalid, 791 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 790 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:32,653 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [717 Valid, 2242 Invalid, 791 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 790 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:17:32,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1281 states. [2024-11-13 13:17:32,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1281 to 1277. [2024-11-13 13:17:32,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1277 states, 1263 states have (on average 1.3182897862232779) internal successors, (1665), 1263 states have internal predecessors, (1665), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:17:32,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1277 states to 1277 states and 1689 transitions. [2024-11-13 13:17:32,696 INFO L78 Accepts]: Start accepts. Automaton has 1277 states and 1689 transitions. Word has length 491 [2024-11-13 13:17:32,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:32,696 INFO L471 AbstractCegarLoop]: Abstraction has 1277 states and 1689 transitions. [2024-11-13 13:17:32,696 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 64.66666666666667) internal successors, (388), 6 states have internal predecessors, (388), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:32,696 INFO L276 IsEmpty]: Start isEmpty. Operand 1277 states and 1689 transitions. [2024-11-13 13:17:32,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-11-13 13:17:32,700 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:32,701 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:32,701 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75 [2024-11-13 13:17:32,701 INFO L396 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:32,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:32,702 INFO L85 PathProgramCache]: Analyzing trace with hash 1507961131, now seen corresponding path program 1 times [2024-11-13 13:17:32,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:32,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448369629] [2024-11-13 13:17:32,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:32,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:34,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,580 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:17:36,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,582 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:17:36,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,585 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2024-11-13 13:17:36,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,587 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364 [2024-11-13 13:17:36,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,588 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382 [2024-11-13 13:17:36,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,589 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396 [2024-11-13 13:17:36,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:36,591 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 137 trivial. 0 not checked. [2024-11-13 13:17:36,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:36,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1448369629] [2024-11-13 13:17:36,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1448369629] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:36,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:36,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-13 13:17:36,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [762232229] [2024-11-13 13:17:36,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:36,592 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-13 13:17:36,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:36,593 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-13 13:17:36,593 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:17:36,593 INFO L87 Difference]: Start difference. First operand 1277 states and 1689 transitions. Second operand has 9 states, 9 states have (on average 43.333333333333336) internal successors, (390), 9 states have internal predecessors, (390), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:38,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:38,610 INFO L93 Difference]: Finished difference Result 3170 states and 4142 transitions. [2024-11-13 13:17:38,611 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 13:17:38,611 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 43.333333333333336) internal successors, (390), 9 states have internal predecessors, (390), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-11-13 13:17:38,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:38,613 INFO L225 Difference]: With dead ends: 3170 [2024-11-13 13:17:38,613 INFO L226 Difference]: Without dead ends: 2227 [2024-11-13 13:17:38,614 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-13 13:17:38,615 INFO L432 NwaCegarLoop]: 894 mSDtfsCounter, 1238 mSDsluCounter, 4084 mSDsCounter, 0 mSdLazyCounter, 1965 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1239 SdHoareTripleChecker+Valid, 4978 SdHoareTripleChecker+Invalid, 1969 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1965 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:38,615 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1239 Valid, 4978 Invalid, 1969 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1965 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2024-11-13 13:17:38,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2227 states. [2024-11-13 13:17:38,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2227 to 1389. [2024-11-13 13:17:38,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1389 states, 1371 states have (on average 1.3194748358862145) internal successors, (1809), 1371 states have internal predecessors, (1809), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 13:17:38,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1389 states to 1389 states and 1841 transitions. [2024-11-13 13:17:38,714 INFO L78 Accepts]: Start accepts. Automaton has 1389 states and 1841 transitions. Word has length 491 [2024-11-13 13:17:38,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:38,715 INFO L471 AbstractCegarLoop]: Abstraction has 1389 states and 1841 transitions. [2024-11-13 13:17:38,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 43.333333333333336) internal successors, (390), 9 states have internal predecessors, (390), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:38,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1389 states and 1841 transitions. [2024-11-13 13:17:38,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2024-11-13 13:17:38,719 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:38,720 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:38,720 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76 [2024-11-13 13:17:38,720 INFO L396 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:38,720 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:38,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1438519829, now seen corresponding path program 1 times [2024-11-13 13:17:38,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:38,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065464127] [2024-11-13 13:17:38,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:38,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:42,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,633 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:17:44,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,635 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:17:44,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,637 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2024-11-13 13:17:44,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,638 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 364 [2024-11-13 13:17:44,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,640 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 382 [2024-11-13 13:17:44,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,641 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 396 [2024-11-13 13:17:44,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:44,644 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 4 proven. 116 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:17:44,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:44,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065464127] [2024-11-13 13:17:44,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1065464127] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:44,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1285739172] [2024-11-13 13:17:44,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:44,644 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:44,644 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:44,646 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:44,648 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-13 13:17:48,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:48,512 INFO L255 TraceCheckSpWp]: Trace formula consists of 2979 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 13:17:48,526 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:48,620 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 75 proven. 0 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2024-11-13 13:17:48,621 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:17:48,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1285739172] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:48,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:17:48,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-13 13:17:48,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [662833631] [2024-11-13 13:17:48,622 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:48,622 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:17:48,622 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:48,623 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:17:48,623 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 13:17:48,623 INFO L87 Difference]: Start difference. First operand 1389 states and 1841 transitions. Second operand has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:48,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:48,719 INFO L93 Difference]: Finished difference Result 2449 states and 3228 transitions. [2024-11-13 13:17:48,720 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:17:48,720 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 491 [2024-11-13 13:17:48,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:48,722 INFO L225 Difference]: With dead ends: 2449 [2024-11-13 13:17:48,723 INFO L226 Difference]: Without dead ends: 1389 [2024-11-13 13:17:48,724 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 513 GetRequests, 500 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 13:17:48,725 INFO L432 NwaCegarLoop]: 755 mSDtfsCounter, 0 mSDsluCounter, 3001 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3756 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:48,725 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3756 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:17:48,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1389 states. [2024-11-13 13:17:48,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1389 to 1389. [2024-11-13 13:17:48,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1389 states, 1371 states have (on average 1.313639679066375) internal successors, (1801), 1371 states have internal predecessors, (1801), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 13:17:48,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1389 states to 1389 states and 1833 transitions. [2024-11-13 13:17:48,775 INFO L78 Accepts]: Start accepts. Automaton has 1389 states and 1833 transitions. Word has length 491 [2024-11-13 13:17:48,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:48,775 INFO L471 AbstractCegarLoop]: Abstraction has 1389 states and 1833 transitions. [2024-11-13 13:17:48,775 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 77.2) internal successors, (386), 6 states have internal predecessors, (386), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:17:48,776 INFO L276 IsEmpty]: Start isEmpty. Operand 1389 states and 1833 transitions. [2024-11-13 13:17:48,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-11-13 13:17:48,780 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:48,780 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:48,826 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-13 13:17:48,981 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:48,981 INFO L396 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:48,981 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:48,981 INFO L85 PathProgramCache]: Analyzing trace with hash -1811427721, now seen corresponding path program 1 times [2024-11-13 13:17:48,981 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:48,981 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424325565] [2024-11-13 13:17:48,982 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:48,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:50,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,803 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:17:52,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,804 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:17:52,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,806 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 94 [2024-11-13 13:17:52,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,807 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365 [2024-11-13 13:17:52,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,809 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383 [2024-11-13 13:17:52,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,810 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397 [2024-11-13 13:17:52,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:52,812 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 4 proven. 117 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:17:52,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:52,812 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424325565] [2024-11-13 13:17:52,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1424325565] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:52,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1184324378] [2024-11-13 13:17:52,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:52,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:52,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:52,815 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:52,817 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 13:17:56,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:56,749 INFO L255 TraceCheckSpWp]: Trace formula consists of 2985 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-13 13:17:56,764 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:57,635 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 157 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 13:17:57,635 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:17:57,636 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1184324378] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:57,636 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:17:57,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2024-11-13 13:17:57,636 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728099017] [2024-11-13 13:17:57,636 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:57,637 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:17:57,637 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:57,638 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:17:57,638 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2024-11-13 13:17:57,638 INFO L87 Difference]: Start difference. First operand 1389 states and 1833 transitions. Second operand has 8 states, 8 states have (on average 58.625) internal successors, (469), 8 states have internal predecessors, (469), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:59,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:59,006 INFO L93 Difference]: Finished difference Result 2994 states and 3927 transitions. [2024-11-13 13:17:59,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-13 13:17:59,007 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 58.625) internal successors, (469), 8 states have internal predecessors, (469), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493 [2024-11-13 13:17:59,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:59,009 INFO L225 Difference]: With dead ends: 2994 [2024-11-13 13:17:59,009 INFO L226 Difference]: Without dead ends: 2213 [2024-11-13 13:17:59,010 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 521 GetRequests, 500 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=78, Invalid=428, Unknown=0, NotChecked=0, Total=506 [2024-11-13 13:17:59,011 INFO L432 NwaCegarLoop]: 885 mSDtfsCounter, 1460 mSDsluCounter, 3179 mSDsCounter, 0 mSdLazyCounter, 1520 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1463 SdHoareTripleChecker+Valid, 4064 SdHoareTripleChecker+Invalid, 1527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1520 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:59,011 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1463 Valid, 4064 Invalid, 1527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1520 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-13 13:17:59,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2213 states. [2024-11-13 13:17:59,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2213 to 1791. [2024-11-13 13:17:59,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1791 states, 1773 states have (on average 1.2859560067681894) internal successors, (2280), 1773 states have internal predecessors, (2280), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 13:17:59,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1791 states to 1791 states and 2312 transitions. [2024-11-13 13:17:59,045 INFO L78 Accepts]: Start accepts. Automaton has 1791 states and 2312 transitions. Word has length 493 [2024-11-13 13:17:59,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:59,046 INFO L471 AbstractCegarLoop]: Abstraction has 1791 states and 2312 transitions. [2024-11-13 13:17:59,046 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 58.625) internal successors, (469), 8 states have internal predecessors, (469), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:17:59,046 INFO L276 IsEmpty]: Start isEmpty. Operand 1791 states and 2312 transitions. [2024-11-13 13:17:59,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-11-13 13:17:59,050 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:59,050 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:59,085 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-13 13:17:59,251 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable78,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:59,251 INFO L396 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:59,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:59,251 INFO L85 PathProgramCache]: Analyzing trace with hash 189873430, now seen corresponding path program 1 times [2024-11-13 13:17:59,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:59,252 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50868408] [2024-11-13 13:17:59,252 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:59,252 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:18:02,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,931 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:18:07,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,933 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:18:07,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,935 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:18:07,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,937 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365 [2024-11-13 13:18:07,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,939 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383 [2024-11-13 13:18:07,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,941 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397 [2024-11-13 13:18:07,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:07,943 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 81 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-13 13:18:07,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:18:07,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [50868408] [2024-11-13 13:18:07,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [50868408] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:18:07,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1691513455] [2024-11-13 13:18:07,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:07,944 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:07,944 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:18:07,946 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:18:07,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-13 13:18:12,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:12,732 INFO L255 TraceCheckSpWp]: Trace formula consists of 2985 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-13 13:18:12,745 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:18:13,247 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 149 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-13 13:18:13,247 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:18:13,247 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1691513455] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:18:13,247 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:18:13,248 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [17] total 23 [2024-11-13 13:18:13,248 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [507911393] [2024-11-13 13:18:13,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:18:13,249 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:18:13,249 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:18:13,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:18:13,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=446, Unknown=0, NotChecked=0, Total=506 [2024-11-13 13:18:13,250 INFO L87 Difference]: Start difference. First operand 1791 states and 2312 transitions. Second operand has 8 states, 8 states have (on average 58.25) internal successors, (466), 8 states have internal predecessors, (466), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:14,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:18:14,293 INFO L93 Difference]: Finished difference Result 3791 states and 4900 transitions. [2024-11-13 13:18:14,293 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 13:18:14,294 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 58.25) internal successors, (466), 8 states have internal predecessors, (466), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493 [2024-11-13 13:18:14,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:18:14,296 INFO L225 Difference]: With dead ends: 3791 [2024-11-13 13:18:14,296 INFO L226 Difference]: Without dead ends: 2739 [2024-11-13 13:18:14,298 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 524 GetRequests, 501 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=72, Invalid=528, Unknown=0, NotChecked=0, Total=600 [2024-11-13 13:18:14,298 INFO L432 NwaCegarLoop]: 565 mSDtfsCounter, 1861 mSDsluCounter, 2801 mSDsCounter, 0 mSdLazyCounter, 1168 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1867 SdHoareTripleChecker+Valid, 3366 SdHoareTripleChecker+Invalid, 1171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 1168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-13 13:18:14,298 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1867 Valid, 3366 Invalid, 1171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 1168 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-13 13:18:14,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2739 states. [2024-11-13 13:18:14,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2739 to 2405. [2024-11-13 13:18:14,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2405 states, 2375 states have (on average 1.2665263157894737) internal successors, (3008), 2375 states have internal predecessors, (3008), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 13:18:14,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2405 states to 2405 states and 3064 transitions. [2024-11-13 13:18:14,382 INFO L78 Accepts]: Start accepts. Automaton has 2405 states and 3064 transitions. Word has length 493 [2024-11-13 13:18:14,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:18:14,382 INFO L471 AbstractCegarLoop]: Abstraction has 2405 states and 3064 transitions. [2024-11-13 13:18:14,382 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 58.25) internal successors, (466), 8 states have internal predecessors, (466), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:14,383 INFO L276 IsEmpty]: Start isEmpty. Operand 2405 states and 3064 transitions. [2024-11-13 13:18:14,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 494 [2024-11-13 13:18:14,388 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:18:14,388 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:18:14,437 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-13 13:18:14,589 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable79 [2024-11-13 13:18:14,589 INFO L396 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:18:14,589 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:18:14,590 INFO L85 PathProgramCache]: Analyzing trace with hash -1379497947, now seen corresponding path program 1 times [2024-11-13 13:18:14,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:18:14,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295161019] [2024-11-13 13:18:14,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:14,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:18:14,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,582 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:18:15,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,583 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:18:15,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,584 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:18:15,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,585 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 365 [2024-11-13 13:18:15,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,586 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 383 [2024-11-13 13:18:15,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,588 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 397 [2024-11-13 13:18:15,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:15,590 INFO L134 CoverageAnalysis]: Checked inductivity of 178 backedges. 46 proven. 0 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2024-11-13 13:18:15,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:18:15,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295161019] [2024-11-13 13:18:15,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1295161019] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:18:15,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:18:15,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:18:15,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839991216] [2024-11-13 13:18:15,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:18:15,591 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:18:15,592 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:18:15,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:18:15,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:18:15,593 INFO L87 Difference]: Start difference. First operand 2405 states and 3064 transitions. Second operand has 6 states, 6 states have (on average 66.33333333333333) internal successors, (398), 6 states have internal predecessors, (398), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:15,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:18:15,701 INFO L93 Difference]: Finished difference Result 3897 states and 4968 transitions. [2024-11-13 13:18:15,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:18:15,702 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 66.33333333333333) internal successors, (398), 6 states have internal predecessors, (398), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 493 [2024-11-13 13:18:15,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:18:15,705 INFO L225 Difference]: With dead ends: 3897 [2024-11-13 13:18:15,705 INFO L226 Difference]: Without dead ends: 2527 [2024-11-13 13:18:15,707 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:18:15,707 INFO L432 NwaCegarLoop]: 754 mSDtfsCounter, 16 mSDsluCounter, 2998 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 3752 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:18:15,707 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 3752 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:18:15,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2527 states. [2024-11-13 13:18:15,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2527 to 2527. [2024-11-13 13:18:15,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2527 states, 2497 states have (on average 1.2703243892671205) internal successors, (3172), 2497 states have internal predecessors, (3172), 28 states have call successors, (28), 1 states have call predecessors, (28), 1 states have return successors, (28), 28 states have call predecessors, (28), 28 states have call successors, (28) [2024-11-13 13:18:15,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2527 states to 2527 states and 3228 transitions. [2024-11-13 13:18:15,761 INFO L78 Accepts]: Start accepts. Automaton has 2527 states and 3228 transitions. Word has length 493 [2024-11-13 13:18:15,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:18:15,761 INFO L471 AbstractCegarLoop]: Abstraction has 2527 states and 3228 transitions. [2024-11-13 13:18:15,761 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 66.33333333333333) internal successors, (398), 6 states have internal predecessors, (398), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:15,761 INFO L276 IsEmpty]: Start isEmpty. Operand 2527 states and 3228 transitions. [2024-11-13 13:18:15,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 495 [2024-11-13 13:18:15,766 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:18:15,767 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:18:15,767 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80 [2024-11-13 13:18:15,767 INFO L396 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:18:15,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:18:15,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1333072119, now seen corresponding path program 1 times [2024-11-13 13:18:15,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:18:15,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1890357623] [2024-11-13 13:18:15,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:15,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:18:18,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,687 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:18:20,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,689 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:18:20,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,691 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:18:20,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,692 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:18:20,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,693 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 384 [2024-11-13 13:18:20,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,694 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 398 [2024-11-13 13:18:20,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:20,696 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 4 proven. 115 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:18:20,696 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:18:20,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1890357623] [2024-11-13 13:18:20,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1890357623] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:18:20,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1270545836] [2024-11-13 13:18:20,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:20,697 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:20,697 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:18:20,699 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:18:20,700 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 13:18:25,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:25,132 INFO L255 TraceCheckSpWp]: Trace formula consists of 2988 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-13 13:18:25,145 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:18:25,573 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 113 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:18:25,573 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:18:26,193 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:18:26,193 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1270545836] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-13 13:18:26,193 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-13 13:18:26,194 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22 [2024-11-13 13:18:26,194 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637504139] [2024-11-13 13:18:26,194 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:18:26,195 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 13:18:26,195 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:18:26,196 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 13:18:26,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2024-11-13 13:18:26,197 INFO L87 Difference]: Start difference. First operand 2527 states and 3228 transitions. Second operand has 7 states, 7 states have (on average 66.71428571428571) internal successors, (467), 7 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:26,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:18:26,451 INFO L93 Difference]: Finished difference Result 4170 states and 5342 transitions. [2024-11-13 13:18:26,451 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 13:18:26,452 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 66.71428571428571) internal successors, (467), 7 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 494 [2024-11-13 13:18:26,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:18:26,456 INFO L225 Difference]: With dead ends: 4170 [2024-11-13 13:18:26,456 INFO L226 Difference]: Without dead ends: 3350 [2024-11-13 13:18:26,458 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1012 GetRequests, 990 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2024-11-13 13:18:26,458 INFO L432 NwaCegarLoop]: 1338 mSDtfsCounter, 482 mSDsluCounter, 6080 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 482 SdHoareTripleChecker+Valid, 7418 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:18:26,459 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [482 Valid, 7418 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:18:26,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3350 states. [2024-11-13 13:18:26,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3350 to 3000. [2024-11-13 13:18:26,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3000 states, 2966 states have (on average 1.2585974376264328) internal successors, (3733), 2966 states have internal predecessors, (3733), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-13 13:18:26,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3000 states to 3000 states and 3797 transitions. [2024-11-13 13:18:26,559 INFO L78 Accepts]: Start accepts. Automaton has 3000 states and 3797 transitions. Word has length 494 [2024-11-13 13:18:26,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:18:26,560 INFO L471 AbstractCegarLoop]: Abstraction has 3000 states and 3797 transitions. [2024-11-13 13:18:26,560 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 66.71428571428571) internal successors, (467), 7 states have internal predecessors, (467), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:18:26,560 INFO L276 IsEmpty]: Start isEmpty. Operand 3000 states and 3797 transitions. [2024-11-13 13:18:26,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 496 [2024-11-13 13:18:26,566 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:18:26,566 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:18:26,613 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-13 13:18:26,766 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:26,767 INFO L396 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:18:26,767 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:18:26,768 INFO L85 PathProgramCache]: Analyzing trace with hash -1556336006, now seen corresponding path program 1 times [2024-11-13 13:18:26,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:18:26,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489759301] [2024-11-13 13:18:26,768 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:26,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:18:29,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:18:36,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,216 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:18:36,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,220 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:18:36,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:18:36,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 384 [2024-11-13 13:18:36,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,230 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 398 [2024-11-13 13:18:36,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:36,235 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 82 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:18:36,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:18:36,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489759301] [2024-11-13 13:18:36,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [489759301] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:18:36,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1140482313] [2024-11-13 13:18:36,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:36,235 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:36,236 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:18:36,237 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:18:36,239 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-13 13:18:42,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:42,267 INFO L255 TraceCheckSpWp]: Trace formula consists of 2991 conjuncts, 157 conjuncts are in the unsatisfiable core [2024-11-13 13:18:42,291 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:18:49,931 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 82 proven. 38 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:18:49,932 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:19:05,416 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 78 proven. 42 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:19:05,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1140482313] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:19:05,416 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:19:05,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 28, 29] total 71 [2024-11-13 13:19:05,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274663801] [2024-11-13 13:19:05,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:19:05,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 71 states [2024-11-13 13:19:05,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:19:05,418 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2024-11-13 13:19:05,419 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=478, Invalid=4492, Unknown=0, NotChecked=0, Total=4970 [2024-11-13 13:19:05,419 INFO L87 Difference]: Start difference. First operand 3000 states and 3797 transitions. Second operand has 71 states, 71 states have (on average 17.535211267605632) internal successors, (1245), 71 states have internal predecessors, (1245), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-13 13:20:37,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:20:37,824 INFO L93 Difference]: Finished difference Result 74833 states and 93312 transitions. [2024-11-13 13:20:37,825 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 450 states. [2024-11-13 13:20:37,825 INFO L78 Accepts]: Start accepts. Automaton has has 71 states, 71 states have (on average 17.535211267605632) internal successors, (1245), 71 states have internal predecessors, (1245), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) Word has length 495 [2024-11-13 13:20:37,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:20:37,884 INFO L225 Difference]: With dead ends: 74833 [2024-11-13 13:20:37,885 INFO L226 Difference]: Without dead ends: 72432 [2024-11-13 13:20:37,915 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1455 GetRequests, 949 SyntacticMatches, 0 SemanticMatches, 506 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104990 ImplicationChecksByTransitivity, 43.0s TimeCoverageRelationStatistics Valid=21638, Invalid=235918, Unknown=0, NotChecked=0, Total=257556 [2024-11-13 13:20:37,915 INFO L432 NwaCegarLoop]: 1851 mSDtfsCounter, 60225 mSDsluCounter, 71120 mSDsCounter, 0 mSdLazyCounter, 45148 mSolverCounterSat, 344 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 36.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60231 SdHoareTripleChecker+Valid, 72971 SdHoareTripleChecker+Invalid, 45492 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.5s SdHoareTripleChecker+Time, 344 IncrementalHoareTripleChecker+Valid, 45148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 41.6s IncrementalHoareTripleChecker+Time [2024-11-13 13:20:37,916 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [60231 Valid, 72971 Invalid, 45492 Unknown, 0 Unchecked, 0.5s Time], IncrementalHoareTripleChecker [344 Valid, 45148 Invalid, 0 Unknown, 0 Unchecked, 41.6s Time] [2024-11-13 13:20:37,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72432 states. [2024-11-13 13:20:38,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72432 to 20220. [2024-11-13 13:20:38,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20220 states, 20034 states have (on average 1.2549665568533492) internal successors, (25142), 20034 states have internal predecessors, (25142), 184 states have call successors, (184), 1 states have call predecessors, (184), 1 states have return successors, (184), 184 states have call predecessors, (184), 184 states have call successors, (184) [2024-11-13 13:20:38,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20220 states to 20220 states and 25510 transitions. [2024-11-13 13:20:38,672 INFO L78 Accepts]: Start accepts. Automaton has 20220 states and 25510 transitions. Word has length 495 [2024-11-13 13:20:38,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:20:38,673 INFO L471 AbstractCegarLoop]: Abstraction has 20220 states and 25510 transitions. [2024-11-13 13:20:38,673 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 71 states, 71 states have (on average 17.535211267605632) internal successors, (1245), 71 states have internal predecessors, (1245), 12 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 12 states have call predecessors, (18), 12 states have call successors, (18) [2024-11-13 13:20:38,673 INFO L276 IsEmpty]: Start isEmpty. Operand 20220 states and 25510 transitions. [2024-11-13 13:20:38,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-11-13 13:20:38,692 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:20:38,693 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:20:38,727 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-13 13:20:38,893 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable82,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:20:38,893 INFO L396 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:20:38,894 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:20:38,894 INFO L85 PathProgramCache]: Analyzing trace with hash 577744513, now seen corresponding path program 1 times [2024-11-13 13:20:38,894 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:20:38,894 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652185691] [2024-11-13 13:20:38,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:20:38,894 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:20:41,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,239 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:20:44,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,241 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:20:44,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,242 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:20:44,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,243 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:20:44,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,245 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 385 [2024-11-13 13:20:44,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,247 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 399 [2024-11-13 13:20:44,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:44,250 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 4 proven. 118 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:20:44,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:20:44,250 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652185691] [2024-11-13 13:20:44,250 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652185691] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:20:44,250 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1452408910] [2024-11-13 13:20:44,250 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:20:44,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:20:44,251 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:20:44,252 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:20:44,256 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 13:20:52,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:20:52,291 INFO L255 TraceCheckSpWp]: Trace formula consists of 2994 conjuncts, 44 conjuncts are in the unsatisfiable core [2024-11-13 13:20:52,303 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:20:53,737 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 154 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 13:20:53,737 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:20:56,291 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 118 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:20:56,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1452408910] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:20:56,291 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:20:56,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 23 [2024-11-13 13:20:56,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613050225] [2024-11-13 13:20:56,291 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:20:56,293 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-11-13 13:20:56,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:20:56,294 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-11-13 13:20:56,294 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=442, Unknown=0, NotChecked=0, Total=506 [2024-11-13 13:20:56,294 INFO L87 Difference]: Start difference. First operand 20220 states and 25510 transitions. Second operand has 23 states, 23 states have (on average 55.47826086956522) internal successors, (1276), 23 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-13 13:20:58,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:20:58,776 INFO L93 Difference]: Finished difference Result 31615 states and 39927 transitions. [2024-11-13 13:20:58,777 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-13 13:20:58,777 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 55.47826086956522) internal successors, (1276), 23 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) Word has length 496 [2024-11-13 13:20:58,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:20:58,794 INFO L225 Difference]: With dead ends: 31615 [2024-11-13 13:20:58,794 INFO L226 Difference]: Without dead ends: 20294 [2024-11-13 13:20:58,806 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1024 GetRequests, 992 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=189, Invalid=933, Unknown=0, NotChecked=0, Total=1122 [2024-11-13 13:20:58,806 INFO L432 NwaCegarLoop]: 701 mSDtfsCounter, 2647 mSDsluCounter, 7243 mSDsCounter, 0 mSdLazyCounter, 2890 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2650 SdHoareTripleChecker+Valid, 7944 SdHoareTripleChecker+Invalid, 2898 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 2890 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2024-11-13 13:20:58,807 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2650 Valid, 7944 Invalid, 2898 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 2890 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2024-11-13 13:20:58,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20294 states. [2024-11-13 13:20:59,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20294 to 20258. [2024-11-13 13:20:59,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20258 states, 20072 states have (on average 1.2547827819848545) internal successors, (25186), 20072 states have internal predecessors, (25186), 184 states have call successors, (184), 1 states have call predecessors, (184), 1 states have return successors, (184), 184 states have call predecessors, (184), 184 states have call successors, (184) [2024-11-13 13:20:59,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20258 states to 20258 states and 25554 transitions. [2024-11-13 13:20:59,233 INFO L78 Accepts]: Start accepts. Automaton has 20258 states and 25554 transitions. Word has length 496 [2024-11-13 13:20:59,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:20:59,233 INFO L471 AbstractCegarLoop]: Abstraction has 20258 states and 25554 transitions. [2024-11-13 13:20:59,234 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 55.47826086956522) internal successors, (1276), 23 states have internal predecessors, (1276), 5 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 5 states have call predecessors, (18), 5 states have call successors, (18) [2024-11-13 13:20:59,234 INFO L276 IsEmpty]: Start isEmpty. Operand 20258 states and 25554 transitions. [2024-11-13 13:20:59,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 497 [2024-11-13 13:20:59,251 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:20:59,252 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:20:59,301 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-11-13 13:20:59,453 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable83 [2024-11-13 13:20:59,454 INFO L396 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:20:59,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:20:59,454 INFO L85 PathProgramCache]: Analyzing trace with hash 790787429, now seen corresponding path program 1 times [2024-11-13 13:20:59,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:20:59,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206137368] [2024-11-13 13:20:59,454 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:20:59,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:21:01,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,368 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:21:03,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,370 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:21:03,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,372 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:21:03,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,373 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:21:03,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,375 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 385 [2024-11-13 13:21:03,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,376 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 399 [2024-11-13 13:21:03,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:03,378 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 116 proven. 3 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:21:03,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:21:03,378 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [206137368] [2024-11-13 13:21:03,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [206137368] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:21:03,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1613377273] [2024-11-13 13:21:03,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:21:03,379 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:21:03,379 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:21:03,381 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:21:03,382 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-13 13:21:08,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:08,039 INFO L255 TraceCheckSpWp]: Trace formula consists of 2992 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 13:21:08,045 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:21:08,103 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 154 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-13 13:21:08,103 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:21:08,103 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1613377273] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:21:08,103 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:21:08,103 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2024-11-13 13:21:08,104 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911387852] [2024-11-13 13:21:08,104 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:21:08,104 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:21:08,104 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:21:08,105 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:21:08,105 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:21:08,106 INFO L87 Difference]: Start difference. First operand 20258 states and 25554 transitions. Second operand has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:21:08,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:21:08,504 INFO L93 Difference]: Finished difference Result 40071 states and 50487 transitions. [2024-11-13 13:21:08,505 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:21:08,505 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 496 [2024-11-13 13:21:08,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:21:08,524 INFO L225 Difference]: With dead ends: 40071 [2024-11-13 13:21:08,525 INFO L226 Difference]: Without dead ends: 20258 [2024-11-13 13:21:08,539 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 515 GetRequests, 505 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=109, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:21:08,539 INFO L432 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 2997 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 3751 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:21:08,539 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 3751 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:21:08,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20258 states. [2024-11-13 13:21:09,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20258 to 20258. [2024-11-13 13:21:09,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20258 states, 20072 states have (on average 1.2530888800318851) internal successors, (25152), 20072 states have internal predecessors, (25152), 184 states have call successors, (184), 1 states have call predecessors, (184), 1 states have return successors, (184), 184 states have call predecessors, (184), 184 states have call successors, (184) [2024-11-13 13:21:09,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20258 states to 20258 states and 25520 transitions. [2024-11-13 13:21:09,055 INFO L78 Accepts]: Start accepts. Automaton has 20258 states and 25520 transitions. Word has length 496 [2024-11-13 13:21:09,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:21:09,056 INFO L471 AbstractCegarLoop]: Abstraction has 20258 states and 25520 transitions. [2024-11-13 13:21:09,056 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 94.2) internal successors, (471), 6 states have internal predecessors, (471), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:21:09,056 INFO L276 IsEmpty]: Start isEmpty. Operand 20258 states and 25520 transitions. [2024-11-13 13:21:09,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-11-13 13:21:09,079 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:21:09,080 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:21:09,130 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-13 13:21:09,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable84 [2024-11-13 13:21:09,281 INFO L396 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:21:09,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:21:09,281 INFO L85 PathProgramCache]: Analyzing trace with hash 768773700, now seen corresponding path program 1 times [2024-11-13 13:21:09,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:21:09,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106880430] [2024-11-13 13:21:09,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:21:09,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:21:13,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,680 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:21:16,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,682 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:21:16,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,684 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:21:16,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,686 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367 [2024-11-13 13:21:16,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,687 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386 [2024-11-13 13:21:16,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,689 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 400 [2024-11-13 13:21:16,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:16,692 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:21:16,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:21:16,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106880430] [2024-11-13 13:21:16,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2106880430] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:21:16,693 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [42987050] [2024-11-13 13:21:16,693 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:21:16,693 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:21:16,693 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:21:16,695 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:21:16,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-13 13:21:24,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:21:24,777 INFO L255 TraceCheckSpWp]: Trace formula consists of 2995 conjuncts, 121 conjuncts are in the unsatisfiable core [2024-11-13 13:21:24,790 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:21:28,491 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 8 proven. 128 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:21:28,491 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:21:37,367 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 8 proven. 128 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:21:37,367 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [42987050] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:21:37,367 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:21:37,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 28, 22] total 56 [2024-11-13 13:21:37,367 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996156586] [2024-11-13 13:21:37,367 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:21:37,369 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 56 states [2024-11-13 13:21:37,369 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:21:37,371 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2024-11-13 13:21:37,371 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=261, Invalid=2819, Unknown=0, NotChecked=0, Total=3080 [2024-11-13 13:21:37,372 INFO L87 Difference]: Start difference. First operand 20258 states and 25520 transitions. Second operand has 56 states, 53 states have (on average 26.37735849056604) internal successors, (1398), 56 states have internal predecessors, (1398), 9 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 9 states have call successors, (18) [2024-11-13 13:21:59,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:21:59,347 INFO L93 Difference]: Finished difference Result 106590 states and 133473 transitions. [2024-11-13 13:21:59,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 163 states. [2024-11-13 13:21:59,348 INFO L78 Accepts]: Start accepts. Automaton has has 56 states, 53 states have (on average 26.37735849056604) internal successors, (1398), 56 states have internal predecessors, (1398), 9 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 9 states have call successors, (18) Word has length 497 [2024-11-13 13:21:59,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:21:59,437 INFO L225 Difference]: With dead ends: 106590 [2024-11-13 13:21:59,437 INFO L226 Difference]: Without dead ends: 89779 [2024-11-13 13:21:59,463 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1171 GetRequests, 965 SyntacticMatches, 1 SemanticMatches, 205 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13658 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=3509, Invalid=39133, Unknown=0, NotChecked=0, Total=42642 [2024-11-13 13:21:59,464 INFO L432 NwaCegarLoop]: 1468 mSDtfsCounter, 6544 mSDsluCounter, 43822 mSDsCounter, 0 mSdLazyCounter, 17525 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 10.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6549 SdHoareTripleChecker+Valid, 45290 SdHoareTripleChecker+Invalid, 17563 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.2s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 17525 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 12.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:21:59,468 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6549 Valid, 45290 Invalid, 17563 Unknown, 0 Unchecked, 0.2s Time], IncrementalHoareTripleChecker [38 Valid, 17525 Invalid, 0 Unknown, 0 Unchecked, 12.2s Time] [2024-11-13 13:21:59,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89779 states. [2024-11-13 13:22:00,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89779 to 20526. [2024-11-13 13:22:00,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20526 states, 20340 states have (on average 1.2493608652900687) internal successors, (25412), 20340 states have internal predecessors, (25412), 184 states have call successors, (184), 1 states have call predecessors, (184), 1 states have return successors, (184), 184 states have call predecessors, (184), 184 states have call successors, (184) [2024-11-13 13:22:00,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20526 states to 20526 states and 25780 transitions. [2024-11-13 13:22:00,564 INFO L78 Accepts]: Start accepts. Automaton has 20526 states and 25780 transitions. Word has length 497 [2024-11-13 13:22:00,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:22:00,565 INFO L471 AbstractCegarLoop]: Abstraction has 20526 states and 25780 transitions. [2024-11-13 13:22:00,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 56 states, 53 states have (on average 26.37735849056604) internal successors, (1398), 56 states have internal predecessors, (1398), 9 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 6 states have call predecessors, (18), 9 states have call successors, (18) [2024-11-13 13:22:00,565 INFO L276 IsEmpty]: Start isEmpty. Operand 20526 states and 25780 transitions. [2024-11-13 13:22:00,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 498 [2024-11-13 13:22:00,580 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:22:00,580 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:00,612 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2024-11-13 13:22:00,781 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable85,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:22:00,781 INFO L396 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:22:00,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:22:00,781 INFO L85 PathProgramCache]: Analyzing trace with hash -1385373554, now seen corresponding path program 1 times [2024-11-13 13:22:00,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:22:00,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183502237] [2024-11-13 13:22:00,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:00,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:22:01,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,871 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:22:01,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:22:01,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:22:01,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,875 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367 [2024-11-13 13:22:01,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,876 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386 [2024-11-13 13:22:01,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,877 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 400 [2024-11-13 13:22:01,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:01,879 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 96 trivial. 0 not checked. [2024-11-13 13:22:01,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:22:01,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183502237] [2024-11-13 13:22:01,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1183502237] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:22:01,879 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:22:01,879 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:22:01,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822445035] [2024-11-13 13:22:01,880 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:22:01,880 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:22:01,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:22:01,881 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:22:01,881 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:22:01,881 INFO L87 Difference]: Start difference. First operand 20526 states and 25780 transitions. Second operand has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:22:02,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:22:02,178 INFO L93 Difference]: Finished difference Result 38625 states and 48383 transitions. [2024-11-13 13:22:02,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:22:02,179 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 497 [2024-11-13 13:22:02,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:22:02,206 INFO L225 Difference]: With dead ends: 38625 [2024-11-13 13:22:02,206 INFO L226 Difference]: Without dead ends: 20638 [2024-11-13 13:22:02,223 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:22:02,224 INFO L432 NwaCegarLoop]: 754 mSDtfsCounter, 0 mSDsluCounter, 1498 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2252 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:22:02,224 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2252 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:22:02,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20638 states. [2024-11-13 13:22:02,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20638 to 20638. [2024-11-13 13:22:02,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20638 states, 20452 states have (on average 1.2479953060825346) internal successors, (25524), 20452 states have internal predecessors, (25524), 184 states have call successors, (184), 1 states have call predecessors, (184), 1 states have return successors, (184), 184 states have call predecessors, (184), 184 states have call successors, (184) [2024-11-13 13:22:02,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20638 states to 20638 states and 25892 transitions. [2024-11-13 13:22:02,871 INFO L78 Accepts]: Start accepts. Automaton has 20638 states and 25892 transitions. Word has length 497 [2024-11-13 13:22:02,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:22:02,871 INFO L471 AbstractCegarLoop]: Abstraction has 20638 states and 25892 transitions. [2024-11-13 13:22:02,872 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 88.2) internal successors, (441), 5 states have internal predecessors, (441), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:22:02,872 INFO L276 IsEmpty]: Start isEmpty. Operand 20638 states and 25892 transitions. [2024-11-13 13:22:02,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-11-13 13:22:02,886 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:22:02,887 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:02,887 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86 [2024-11-13 13:22:02,887 INFO L396 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:22:02,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:22:02,887 INFO L85 PathProgramCache]: Analyzing trace with hash -415707967, now seen corresponding path program 1 times [2024-11-13 13:22:02,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:22:02,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948508183] [2024-11-13 13:22:02,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:02,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:22:03,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,800 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2024-11-13 13:22:04,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,801 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 81 [2024-11-13 13:22:04,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,802 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-13 13:22:04,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,803 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 368 [2024-11-13 13:22:04,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,804 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386 [2024-11-13 13:22:04,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,805 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 400 [2024-11-13 13:22:04,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 179 backedges. 119 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:22:04,808 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:22:04,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948508183] [2024-11-13 13:22:04,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1948508183] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:22:04,808 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:22:04,808 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 13:22:04,808 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1637339053] [2024-11-13 13:22:04,808 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:22:04,809 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 13:22:04,809 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:22:04,809 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 13:22:04,809 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:22:04,810 INFO L87 Difference]: Start difference. First operand 20638 states and 25892 transitions. Second operand has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:22:05,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:22:05,278 INFO L93 Difference]: Finished difference Result 39883 states and 50146 transitions. [2024-11-13 13:22:05,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 13:22:05,278 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 498 [2024-11-13 13:22:05,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:22:05,302 INFO L225 Difference]: With dead ends: 39883 [2024-11-13 13:22:05,302 INFO L226 Difference]: Without dead ends: 28272 [2024-11-13 13:22:05,312 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-13 13:22:05,312 INFO L432 NwaCegarLoop]: 1310 mSDtfsCounter, 534 mSDsluCounter, 4670 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 534 SdHoareTripleChecker+Valid, 5980 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:22:05,312 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [534 Valid, 5980 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:22:05,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28272 states. [2024-11-13 13:22:05,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28272 to 22272. [2024-11-13 13:22:05,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22272 states, 22008 states have (on average 1.249818247909851) internal successors, (27506), 22008 states have internal predecessors, (27506), 262 states have call successors, (262), 1 states have call predecessors, (262), 1 states have return successors, (262), 262 states have call predecessors, (262), 262 states have call successors, (262) [2024-11-13 13:22:05,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22272 states to 22272 states and 28030 transitions. [2024-11-13 13:22:05,923 INFO L78 Accepts]: Start accepts. Automaton has 22272 states and 28030 transitions. Word has length 498 [2024-11-13 13:22:05,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:22:05,924 INFO L471 AbstractCegarLoop]: Abstraction has 22272 states and 28030 transitions. [2024-11-13 13:22:05,924 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 78.5) internal successors, (471), 6 states have internal predecessors, (471), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 13:22:05,924 INFO L276 IsEmpty]: Start isEmpty. Operand 22272 states and 28030 transitions. [2024-11-13 13:22:05,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-11-13 13:22:05,948 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:22:05,948 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:05,949 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87 [2024-11-13 13:22:05,949 INFO L396 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:22:05,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:22:05,949 INFO L85 PathProgramCache]: Analyzing trace with hash -1936033725, now seen corresponding path program 1 times [2024-11-13 13:22:05,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:22:05,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973348755] [2024-11-13 13:22:05,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:05,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:22:09,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,325 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 13:22:12,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,329 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 13:22:12,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 95 [2024-11-13 13:22:12,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,334 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 367 [2024-11-13 13:22:12,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 386 [2024-11-13 13:22:12,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,340 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 400 [2024-11-13 13:22:12,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:12,345 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 2 proven. 119 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 13:22:12,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:22:12,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973348755] [2024-11-13 13:22:12,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [973348755] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:22:12,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [469178863] [2024-11-13 13:22:12,346 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:12,346 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:22:12,346 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:22:12,349 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:22:12,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-13 13:22:18,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:18,562 INFO L255 TraceCheckSpWp]: Trace formula consists of 2996 conjuncts, 94 conjuncts are in the unsatisfiable core [2024-11-13 13:22:18,574 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:22:21,877 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 5 proven. 131 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:22:21,877 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:22:26,451 INFO L134 CoverageAnalysis]: Checked inductivity of 181 backedges. 5 proven. 131 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:22:26,451 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [469178863] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:22:26,451 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:22:26,451 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 23, 19] total 44 [2024-11-13 13:22:26,451 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78453916] [2024-11-13 13:22:26,452 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:22:26,452 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 44 states [2024-11-13 13:22:26,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:22:26,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2024-11-13 13:22:26,454 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=200, Invalid=1692, Unknown=0, NotChecked=0, Total=1892 [2024-11-13 13:22:26,454 INFO L87 Difference]: Start difference. First operand 22272 states and 28030 transitions. Second operand has 44 states, 42 states have (on average 26.30952380952381) internal successors, (1105), 44 states have internal predecessors, (1105), 9 states have call successors, (17), 1 states have call predecessors, (17), 2 states have return successors, (17), 7 states have call predecessors, (17), 9 states have call successors, (17) [2024-11-13 13:22:32,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:22:32,710 INFO L93 Difference]: Finished difference Result 54451 states and 68155 transitions. [2024-11-13 13:22:32,710 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-13 13:22:32,710 INFO L78 Accepts]: Start accepts. Automaton has has 44 states, 42 states have (on average 26.30952380952381) internal successors, (1105), 44 states have internal predecessors, (1105), 9 states have call successors, (17), 1 states have call predecessors, (17), 2 states have return successors, (17), 7 states have call predecessors, (17), 9 states have call successors, (17) Word has length 498 [2024-11-13 13:22:32,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:22:32,754 INFO L225 Difference]: With dead ends: 54451 [2024-11-13 13:22:32,754 INFO L226 Difference]: Without dead ends: 40902 [2024-11-13 13:22:32,774 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1055 GetRequests, 976 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1525 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=762, Invalid=5558, Unknown=0, NotChecked=0, Total=6320 [2024-11-13 13:22:32,774 INFO L432 NwaCegarLoop]: 688 mSDtfsCounter, 5037 mSDsluCounter, 14718 mSDsCounter, 0 mSdLazyCounter, 6084 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5041 SdHoareTripleChecker+Valid, 15406 SdHoareTripleChecker+Invalid, 6103 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 6084 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:22:32,775 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5041 Valid, 15406 Invalid, 6103 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [19 Valid, 6084 Invalid, 0 Unknown, 0 Unchecked, 4.1s Time] [2024-11-13 13:22:32,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40902 states. [2024-11-13 13:22:33,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40902 to 22218. [2024-11-13 13:22:33,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22218 states, 21954 states have (on average 1.2479730345267377) internal successors, (27398), 21954 states have internal predecessors, (27398), 262 states have call successors, (262), 1 states have call predecessors, (262), 1 states have return successors, (262), 262 states have call predecessors, (262), 262 states have call successors, (262) [2024-11-13 13:22:33,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22218 states to 22218 states and 27922 transitions. [2024-11-13 13:22:33,417 INFO L78 Accepts]: Start accepts. Automaton has 22218 states and 27922 transitions. Word has length 498 [2024-11-13 13:22:33,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:22:33,417 INFO L471 AbstractCegarLoop]: Abstraction has 22218 states and 27922 transitions. [2024-11-13 13:22:33,417 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 44 states, 42 states have (on average 26.30952380952381) internal successors, (1105), 44 states have internal predecessors, (1105), 9 states have call successors, (17), 1 states have call predecessors, (17), 2 states have return successors, (17), 7 states have call predecessors, (17), 9 states have call successors, (17) [2024-11-13 13:22:33,417 INFO L276 IsEmpty]: Start isEmpty. Operand 22218 states and 27922 transitions. [2024-11-13 13:22:33,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 499 [2024-11-13 13:22:33,434 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:22:33,434 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:33,468 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2024-11-13 13:22:33,635 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable88 [2024-11-13 13:22:33,635 INFO L396 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:22:33,635 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:22:33,635 INFO L85 PathProgramCache]: Analyzing trace with hash -373273150, now seen corresponding path program 1 times [2024-11-13 13:22:33,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:22:33,636 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698990468] [2024-11-13 13:22:33,636 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:33,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:22:39,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 13:22:39,434 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 13:22:45,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 13:22:46,626 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 13:22:46,628 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-13 13:22:46,629 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-13 13:22:46,631 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89 [2024-11-13 13:22:46,635 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:47,202 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-13 13:22:47,206 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.11 01:22:47 BoogieIcfgContainer [2024-11-13 13:22:47,206 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-13 13:22:47,207 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-13 13:22:47,207 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-13 13:22:47,207 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-13 13:22:47,208 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:15:01" (3/4) ... [2024-11-13 13:22:47,211 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-13 13:22:47,213 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-13 13:22:47,213 INFO L158 Benchmark]: Toolchain (without parser) took 471060.50ms. Allocated memory was 109.1MB in the beginning and 5.4GB in the end (delta: 5.3GB). Free memory was 82.3MB in the beginning and 4.0GB in the end (delta: -3.9GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2024-11-13 13:22:47,214 INFO L158 Benchmark]: CDTParser took 0.48ms. Allocated memory is still 83.9MB. Free memory is still 40.5MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 13:22:47,214 INFO L158 Benchmark]: CACSL2BoogieTranslator took 815.66ms. Allocated memory is still 109.1MB. Free memory was 82.3MB in the beginning and 45.8MB in the end (delta: 36.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-13 13:22:47,214 INFO L158 Benchmark]: Boogie Procedure Inliner took 389.67ms. Allocated memory is still 109.1MB. Free memory was 45.8MB in the beginning and 46.2MB in the end (delta: -408.2kB). Peak memory consumption was 26.6MB. Max. memory is 16.1GB. [2024-11-13 13:22:47,214 INFO L158 Benchmark]: Boogie Preprocessor took 489.10ms. Allocated memory is still 109.1MB. Free memory was 46.2MB in the beginning and 51.0MB in the end (delta: -4.8MB). Peak memory consumption was 44.3MB. Max. memory is 16.1GB. [2024-11-13 13:22:47,215 INFO L158 Benchmark]: RCFGBuilder took 3913.77ms. Allocated memory was 109.1MB in the beginning and 218.1MB in the end (delta: 109.1MB). Free memory was 50.9MB in the beginning and 66.8MB in the end (delta: -16.0MB). Peak memory consumption was 99.4MB. Max. memory is 16.1GB. [2024-11-13 13:22:47,215 INFO L158 Benchmark]: TraceAbstraction took 465436.78ms. Allocated memory was 218.1MB in the beginning and 5.4GB in the end (delta: 5.2GB). Free memory was 65.1MB in the beginning and 4.0GB in the end (delta: -3.9GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. [2024-11-13 13:22:47,215 INFO L158 Benchmark]: Witness Printer took 5.90ms. Allocated memory is still 5.4GB. Free memory was 4.0GB in the beginning and 4.0GB in the end (delta: 79.8kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 13:22:47,216 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.48ms. Allocated memory is still 83.9MB. Free memory is still 40.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 815.66ms. Allocated memory is still 109.1MB. Free memory was 82.3MB in the beginning and 45.8MB in the end (delta: 36.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 389.67ms. Allocated memory is still 109.1MB. Free memory was 45.8MB in the beginning and 46.2MB in the end (delta: -408.2kB). Peak memory consumption was 26.6MB. Max. memory is 16.1GB. * Boogie Preprocessor took 489.10ms. Allocated memory is still 109.1MB. Free memory was 46.2MB in the beginning and 51.0MB in the end (delta: -4.8MB). Peak memory consumption was 44.3MB. Max. memory is 16.1GB. * RCFGBuilder took 3913.77ms. Allocated memory was 109.1MB in the beginning and 218.1MB in the end (delta: 109.1MB). Free memory was 50.9MB in the beginning and 66.8MB in the end (delta: -16.0MB). Peak memory consumption was 99.4MB. Max. memory is 16.1GB. * TraceAbstraction took 465436.78ms. Allocated memory was 218.1MB in the beginning and 5.4GB in the end (delta: 5.2GB). Free memory was 65.1MB in the beginning and 4.0GB in the end (delta: -3.9GB). Peak memory consumption was 1.3GB. Max. memory is 16.1GB. * Witness Printer took 5.90ms. Allocated memory is still 5.4GB. Free memory was 4.0GB in the beginning and 4.0GB in the end (delta: 79.8kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 164, overapproximation of bitwiseOr at line 389, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseAnd at line 265, overapproximation of bitwiseAnd at line 635, overapproximation of bitwiseAnd at line 229, overapproximation of bitwiseAnd at line 502, overapproximation of bitwiseAnd at line 654, overapproximation of bitwiseAnd at line 221, overapproximation of bitwiseAnd at line 464, overapproximation of bitwiseAnd at line 289, overapproximation of bitwiseAnd at line 578, overapproximation of bitwiseAnd at line 165, overapproximation of bitwiseAnd at line 540, overapproximation of bitwiseAnd at line 398, overapproximation of bitwiseAnd at line 559, overapproximation of bitwiseAnd at line 301, overapproximation of bitwiseAnd at line 247, overapproximation of bitwiseAnd at line 521, overapproximation of bitwiseAnd at line 271, overapproximation of bitwiseAnd at line 125, overapproximation of bitwiseAnd at line 241, overapproximation of bitwiseAnd at line 692, overapproximation of bitwiseAnd at line 616, overapproximation of bitwiseAnd at line 277, overapproximation of bitwiseAnd at line 283, overapproximation of bitwiseAnd at line 129, overapproximation of bitwiseAnd at line 295, overapproximation of bitwiseAnd at line 483, overapproximation of bitwiseAnd at line 766, overapproximation of bitwiseAnd at line 253. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 6); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (6 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 5); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (5 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 4); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (4 - 1); [L41] const SORT_60 mask_SORT_60 = (SORT_60)-1 >> (sizeof(SORT_60) * 8 - 3); [L42] const SORT_60 msb_SORT_60 = (SORT_60)1 << (3 - 1); [L44] const SORT_81 mask_SORT_81 = (SORT_81)-1 >> (sizeof(SORT_81) * 8 - 2); [L45] const SORT_81 msb_SORT_81 = (SORT_81)1 << (2 - 1); [L47] const SORT_13 var_15 = 16; [L48] const SORT_19 var_20 = 15; [L49] const SORT_19 var_25 = 14; [L50] const SORT_19 var_30 = 13; [L51] const SORT_19 var_35 = 12; [L52] const SORT_19 var_40 = 11; [L53] const SORT_19 var_45 = 10; [L54] const SORT_19 var_50 = 9; [L55] const SORT_19 var_55 = 8; [L56] const SORT_60 var_61 = 7; [L57] const SORT_60 var_66 = 6; [L58] const SORT_60 var_71 = 5; [L59] const SORT_60 var_76 = 4; [L60] const SORT_81 var_82 = 3; [L61] const SORT_81 var_87 = 2; [L62] const SORT_1 var_92 = 1; [L63] const SORT_13 var_105 = 17; [L64] const SORT_11 var_122 = 0; [L65] const SORT_1 var_152 = 0; [L66] const SORT_3 var_373 = 0; [L68] SORT_1 input_2; [L69] SORT_3 input_4; [L70] SORT_1 input_5; [L71] SORT_1 input_6; [L72] SORT_1 input_7; [L73] SORT_1 input_8; [L74] SORT_3 input_9; [L75] SORT_1 input_150; [L77] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L77] SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L78] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L79] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L79] SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L80] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L80] SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L81] SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L82] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L82] SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L83] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L83] SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L84] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L84] SORT_3 state_44 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L85] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L85] SORT_3 state_49 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L86] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L86] SORT_3 state_54 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L87] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L87] SORT_3 state_59 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L88] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L88] SORT_3 state_65 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L89] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L89] SORT_3 state_70 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L90] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L90] SORT_3 state_75 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L91] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L91] SORT_3 state_80 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L92] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L92] SORT_3 state_86 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L93] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L93] SORT_3 state_91 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L94] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L94] SORT_3 state_96 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L95] SORT_11 state_101 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L96] SORT_1 state_109 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L97] SORT_1 state_110 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L98] SORT_11 state_113 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L99] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L99] SORT_3 state_128 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L100] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L100] SORT_1 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L101] SORT_11 state_185 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L103] SORT_1 init_133_arg_1 = var_92; [L104] state_132 = init_133_arg_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ulong() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ulong() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=255, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=0] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=0] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=0] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=0] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_27=0, var_30=13, var_32=0, var_35=12, var_373=0, var_37=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=0, var_55=8, var_57=0, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=0, var_76=4, var_78=0, var_82=3, var_84=0, var_87=2, var_89=0, var_92=1, var_94=0, var_98=0] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=18446744073709551615U] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=1, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=0, var_155_arg_1=-256, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND FALSE !(!(cond)) [L401] RET __VERIFIER_assert(!(bad_156_arg_0)) [L403] SORT_11 var_186_arg_0 = state_185; [L404] SORT_13 var_186 = var_186_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] EXPR var_186 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L405] var_186 = var_186 & mask_SORT_13 [L406] SORT_13 var_236_arg_0 = var_186; [L407] SORT_13 var_236_arg_1 = var_15; [L408] SORT_1 var_236 = var_236_arg_0 == var_236_arg_1; [L409] SORT_1 var_237_arg_0 = input_6; [L410] SORT_1 var_237_arg_1 = var_236; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_237_arg_0=0, var_237_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] EXPR var_237_arg_0 & var_237_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L411] SORT_1 var_237 = var_237_arg_0 & var_237_arg_1; [L412] EXPR var_237 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L412] var_237 = var_237 & mask_SORT_1 [L413] SORT_1 var_372_arg_0 = var_237; [L414] SORT_3 var_372_arg_1 = input_4; [L415] SORT_3 var_372_arg_2 = state_10; [L416] SORT_3 var_372 = var_372_arg_0 ? var_372_arg_1 : var_372_arg_2; [L417] SORT_1 var_374_arg_0 = input_7; [L418] SORT_3 var_374_arg_1 = var_373; [L419] SORT_3 var_374_arg_2 = var_372; [L420] SORT_3 var_374 = var_374_arg_0 ? var_374_arg_1 : var_374_arg_2; [L421] SORT_3 next_375_arg_1 = var_374; [L422] SORT_1 var_160_arg_0 = input_6; [L423] SORT_1 var_160_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_160_arg_0=0, var_160_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] EXPR var_160_arg_0 | var_160_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L424] SORT_1 var_160 = var_160_arg_0 | var_160_arg_1; [L425] SORT_1 var_161_arg_0 = var_160; [L426] SORT_1 var_161_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161_arg_0=0, var_161_arg_1=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] EXPR var_161_arg_0 | var_161_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L427] SORT_1 var_161 = var_161_arg_0 | var_161_arg_1; [L428] EXPR var_161 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L428] var_161 = var_161 & mask_SORT_1 [L429] SORT_1 var_303_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_303_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] EXPR var_303_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L430] var_303_arg_0 = var_303_arg_0 & mask_SORT_1 [L431] SORT_11 var_303 = var_303_arg_0; [L432] SORT_11 var_304_arg_0 = state_12; [L433] SORT_11 var_304_arg_1 = var_303; [L434] SORT_11 var_304 = var_304_arg_0 + var_304_arg_1; [L435] SORT_1 var_376_arg_0 = var_161; [L436] SORT_11 var_376_arg_1 = var_304; [L437] SORT_11 var_376_arg_2 = state_12; [L438] SORT_11 var_376 = var_376_arg_0 ? var_376_arg_1 : var_376_arg_2; [L439] SORT_1 var_377_arg_0 = input_7; [L440] SORT_11 var_377_arg_1 = var_122; [L441] SORT_11 var_377_arg_2 = var_376; [L442] SORT_11 var_377 = var_377_arg_0 ? var_377_arg_1 : var_377_arg_2; [L443] SORT_11 next_378_arg_1 = var_377; [L444] SORT_19 var_229_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_229_arg_0=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] EXPR var_229_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L445] var_229_arg_0 = var_229_arg_0 & mask_SORT_19 [L446] SORT_13 var_229 = var_229_arg_0; [L447] SORT_13 var_230_arg_0 = var_186; [L448] SORT_13 var_230_arg_1 = var_229; [L449] SORT_1 var_230 = var_230_arg_0 == var_230_arg_1; [L450] SORT_1 var_231_arg_0 = input_6; [L451] SORT_1 var_231_arg_1 = var_230; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_231_arg_0=0, var_231_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] EXPR var_231_arg_0 & var_231_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L452] SORT_1 var_231 = var_231_arg_0 & var_231_arg_1; [L453] EXPR var_231 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L453] var_231 = var_231 & mask_SORT_1 [L454] SORT_1 var_379_arg_0 = var_231; [L455] SORT_3 var_379_arg_1 = input_4; [L456] SORT_3 var_379_arg_2 = state_18; [L457] SORT_3 var_379 = var_379_arg_0 ? var_379_arg_1 : var_379_arg_2; [L458] SORT_1 var_380_arg_0 = input_7; [L459] SORT_3 var_380_arg_1 = var_373; [L460] SORT_3 var_380_arg_2 = var_379; [L461] SORT_3 var_380 = var_380_arg_0 ? var_380_arg_1 : var_380_arg_2; [L462] SORT_3 next_381_arg_1 = var_380; [L463] SORT_19 var_222_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_222_arg_0=14, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] EXPR var_222_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L464] var_222_arg_0 = var_222_arg_0 & mask_SORT_19 [L465] SORT_13 var_222 = var_222_arg_0; [L466] SORT_13 var_223_arg_0 = var_186; [L467] SORT_13 var_223_arg_1 = var_222; [L468] SORT_1 var_223 = var_223_arg_0 == var_223_arg_1; [L469] SORT_1 var_224_arg_0 = input_6; [L470] SORT_1 var_224_arg_1 = var_223; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_224_arg_0=0, var_224_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L471] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L472] EXPR var_224 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L472] var_224 = var_224 & mask_SORT_1 [L473] SORT_1 var_382_arg_0 = var_224; [L474] SORT_3 var_382_arg_1 = input_4; [L475] SORT_3 var_382_arg_2 = state_24; [L476] SORT_3 var_382 = var_382_arg_0 ? var_382_arg_1 : var_382_arg_2; [L477] SORT_1 var_383_arg_0 = input_7; [L478] SORT_3 var_383_arg_1 = var_373; [L479] SORT_3 var_383_arg_2 = var_382; [L480] SORT_3 var_383 = var_383_arg_0 ? var_383_arg_1 : var_383_arg_2; [L481] SORT_3 next_384_arg_1 = var_383; [L482] SORT_19 var_215_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_215_arg_0=13, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] EXPR var_215_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L483] var_215_arg_0 = var_215_arg_0 & mask_SORT_19 [L484] SORT_13 var_215 = var_215_arg_0; [L485] SORT_13 var_216_arg_0 = var_186; [L486] SORT_13 var_216_arg_1 = var_215; [L487] SORT_1 var_216 = var_216_arg_0 == var_216_arg_1; [L488] SORT_1 var_217_arg_0 = input_6; [L489] SORT_1 var_217_arg_1 = var_216; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_217_arg_0=0, var_217_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] EXPR var_217_arg_0 & var_217_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L490] SORT_1 var_217 = var_217_arg_0 & var_217_arg_1; [L491] EXPR var_217 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L491] var_217 = var_217 & mask_SORT_1 [L492] SORT_1 var_385_arg_0 = var_217; [L493] SORT_3 var_385_arg_1 = input_4; [L494] SORT_3 var_385_arg_2 = state_29; [L495] SORT_3 var_385 = var_385_arg_0 ? var_385_arg_1 : var_385_arg_2; [L496] SORT_1 var_386_arg_0 = input_7; [L497] SORT_3 var_386_arg_1 = var_373; [L498] SORT_3 var_386_arg_2 = var_385; [L499] SORT_3 var_386 = var_386_arg_0 ? var_386_arg_1 : var_386_arg_2; [L500] SORT_3 next_387_arg_1 = var_386; [L501] SORT_19 var_208_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_208_arg_0=12, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] EXPR var_208_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L502] var_208_arg_0 = var_208_arg_0 & mask_SORT_19 [L503] SORT_13 var_208 = var_208_arg_0; [L504] SORT_13 var_209_arg_0 = var_186; [L505] SORT_13 var_209_arg_1 = var_208; [L506] SORT_1 var_209 = var_209_arg_0 == var_209_arg_1; [L507] SORT_1 var_210_arg_0 = input_6; [L508] SORT_1 var_210_arg_1 = var_209; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_210_arg_0=0, var_210_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] EXPR var_210_arg_0 & var_210_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L509] SORT_1 var_210 = var_210_arg_0 & var_210_arg_1; [L510] EXPR var_210 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L510] var_210 = var_210 & mask_SORT_1 [L511] SORT_1 var_388_arg_0 = var_210; [L512] SORT_3 var_388_arg_1 = input_4; [L513] SORT_3 var_388_arg_2 = state_34; [L514] SORT_3 var_388 = var_388_arg_0 ? var_388_arg_1 : var_388_arg_2; [L515] SORT_1 var_389_arg_0 = input_7; [L516] SORT_3 var_389_arg_1 = var_373; [L517] SORT_3 var_389_arg_2 = var_388; [L518] SORT_3 var_389 = var_389_arg_0 ? var_389_arg_1 : var_389_arg_2; [L519] SORT_3 next_390_arg_1 = var_389; [L520] SORT_19 var_201_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_201_arg_0=11, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] EXPR var_201_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L521] var_201_arg_0 = var_201_arg_0 & mask_SORT_19 [L522] SORT_13 var_201 = var_201_arg_0; [L523] SORT_13 var_202_arg_0 = var_186; [L524] SORT_13 var_202_arg_1 = var_201; [L525] SORT_1 var_202 = var_202_arg_0 == var_202_arg_1; [L526] SORT_1 var_203_arg_0 = input_6; [L527] SORT_1 var_203_arg_1 = var_202; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_203_arg_0=0, var_203_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] EXPR var_203_arg_0 & var_203_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L528] SORT_1 var_203 = var_203_arg_0 & var_203_arg_1; [L529] EXPR var_203 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L529] var_203 = var_203 & mask_SORT_1 [L530] SORT_1 var_391_arg_0 = var_203; [L531] SORT_3 var_391_arg_1 = input_4; [L532] SORT_3 var_391_arg_2 = state_39; [L533] SORT_3 var_391 = var_391_arg_0 ? var_391_arg_1 : var_391_arg_2; [L534] SORT_1 var_392_arg_0 = input_7; [L535] SORT_3 var_392_arg_1 = var_373; [L536] SORT_3 var_392_arg_2 = var_391; [L537] SORT_3 var_392 = var_392_arg_0 ? var_392_arg_1 : var_392_arg_2; [L538] SORT_3 next_393_arg_1 = var_392; [L539] SORT_19 var_194_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_194_arg_0=10, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] EXPR var_194_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L540] var_194_arg_0 = var_194_arg_0 & mask_SORT_19 [L541] SORT_13 var_194 = var_194_arg_0; [L542] SORT_13 var_195_arg_0 = var_186; [L543] SORT_13 var_195_arg_1 = var_194; [L544] SORT_1 var_195 = var_195_arg_0 == var_195_arg_1; [L545] SORT_1 var_196_arg_0 = input_6; [L546] SORT_1 var_196_arg_1 = var_195; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_196_arg_0=0, var_196_arg_1=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] EXPR var_196_arg_0 & var_196_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L547] SORT_1 var_196 = var_196_arg_0 & var_196_arg_1; [L548] EXPR var_196 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L548] var_196 = var_196 & mask_SORT_1 [L549] SORT_1 var_394_arg_0 = var_196; [L550] SORT_3 var_394_arg_1 = input_4; [L551] SORT_3 var_394_arg_2 = state_44; [L552] SORT_3 var_394 = var_394_arg_0 ? var_394_arg_1 : var_394_arg_2; [L553] SORT_1 var_395_arg_0 = input_7; [L554] SORT_3 var_395_arg_1 = var_373; [L555] SORT_3 var_395_arg_2 = var_394; [L556] SORT_3 var_395 = var_395_arg_0 ? var_395_arg_1 : var_395_arg_2; [L557] SORT_3 next_396_arg_1 = var_395; [L558] SORT_19 var_298_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_298_arg_0=9, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] EXPR var_298_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L559] var_298_arg_0 = var_298_arg_0 & mask_SORT_19 [L560] SORT_13 var_298 = var_298_arg_0; [L561] SORT_13 var_299_arg_0 = var_186; [L562] SORT_13 var_299_arg_1 = var_298; [L563] SORT_1 var_299 = var_299_arg_0 == var_299_arg_1; [L564] SORT_1 var_300_arg_0 = input_6; [L565] SORT_1 var_300_arg_1 = var_299; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_300_arg_0=0, var_300_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] EXPR var_300_arg_0 & var_300_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L566] SORT_1 var_300 = var_300_arg_0 & var_300_arg_1; [L567] EXPR var_300 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L567] var_300 = var_300 & mask_SORT_1 [L568] SORT_1 var_397_arg_0 = var_300; [L569] SORT_3 var_397_arg_1 = input_4; [L570] SORT_3 var_397_arg_2 = state_49; [L571] SORT_3 var_397 = var_397_arg_0 ? var_397_arg_1 : var_397_arg_2; [L572] SORT_1 var_398_arg_0 = input_7; [L573] SORT_3 var_398_arg_1 = var_373; [L574] SORT_3 var_398_arg_2 = var_397; [L575] SORT_3 var_398 = var_398_arg_0 ? var_398_arg_1 : var_398_arg_2; [L576] SORT_3 next_399_arg_1 = var_398; [L577] SORT_19 var_291_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_291_arg_0=8, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] EXPR var_291_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L578] var_291_arg_0 = var_291_arg_0 & mask_SORT_19 [L579] SORT_13 var_291 = var_291_arg_0; [L580] SORT_13 var_292_arg_0 = var_186; [L581] SORT_13 var_292_arg_1 = var_291; [L582] SORT_1 var_292 = var_292_arg_0 == var_292_arg_1; [L583] SORT_1 var_293_arg_0 = input_6; [L584] SORT_1 var_293_arg_1 = var_292; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_293_arg_0=0, var_293_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] EXPR var_293_arg_0 & var_293_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L585] SORT_1 var_293 = var_293_arg_0 & var_293_arg_1; [L586] EXPR var_293 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L586] var_293 = var_293 & mask_SORT_1 [L587] SORT_1 var_400_arg_0 = var_293; [L588] SORT_3 var_400_arg_1 = input_4; [L589] SORT_3 var_400_arg_2 = state_54; [L590] SORT_3 var_400 = var_400_arg_0 ? var_400_arg_1 : var_400_arg_2; [L591] SORT_1 var_401_arg_0 = input_7; [L592] SORT_3 var_401_arg_1 = var_373; [L593] SORT_3 var_401_arg_2 = var_400; [L594] SORT_3 var_401 = var_401_arg_0 ? var_401_arg_1 : var_401_arg_2; [L595] SORT_3 next_402_arg_1 = var_401; [L596] SORT_60 var_284_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_284_arg_0=7, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] EXPR var_284_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L597] var_284_arg_0 = var_284_arg_0 & mask_SORT_60 [L598] SORT_13 var_284 = var_284_arg_0; [L599] SORT_13 var_285_arg_0 = var_186; [L600] SORT_13 var_285_arg_1 = var_284; [L601] SORT_1 var_285 = var_285_arg_0 == var_285_arg_1; [L602] SORT_1 var_286_arg_0 = input_6; [L603] SORT_1 var_286_arg_1 = var_285; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_286_arg_0=0, var_286_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] EXPR var_286_arg_0 & var_286_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L604] SORT_1 var_286 = var_286_arg_0 & var_286_arg_1; [L605] EXPR var_286 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L605] var_286 = var_286 & mask_SORT_1 [L606] SORT_1 var_403_arg_0 = var_286; [L607] SORT_3 var_403_arg_1 = input_4; [L608] SORT_3 var_403_arg_2 = state_59; [L609] SORT_3 var_403 = var_403_arg_0 ? var_403_arg_1 : var_403_arg_2; [L610] SORT_1 var_404_arg_0 = input_7; [L611] SORT_3 var_404_arg_1 = var_373; [L612] SORT_3 var_404_arg_2 = var_403; [L613] SORT_3 var_404 = var_404_arg_0 ? var_404_arg_1 : var_404_arg_2; [L614] SORT_3 next_405_arg_1 = var_404; [L615] SORT_60 var_277_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_277_arg_0=6, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] EXPR var_277_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L616] var_277_arg_0 = var_277_arg_0 & mask_SORT_60 [L617] SORT_13 var_277 = var_277_arg_0; [L618] SORT_13 var_278_arg_0 = var_186; [L619] SORT_13 var_278_arg_1 = var_277; [L620] SORT_1 var_278 = var_278_arg_0 == var_278_arg_1; [L621] SORT_1 var_279_arg_0 = input_6; [L622] SORT_1 var_279_arg_1 = var_278; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_279_arg_0=0, var_279_arg_1=1, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] EXPR var_279_arg_0 & var_279_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L623] SORT_1 var_279 = var_279_arg_0 & var_279_arg_1; [L624] EXPR var_279 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L624] var_279 = var_279 & mask_SORT_1 [L625] SORT_1 var_406_arg_0 = var_279; [L626] SORT_3 var_406_arg_1 = input_4; [L627] SORT_3 var_406_arg_2 = state_65; [L628] SORT_3 var_406 = var_406_arg_0 ? var_406_arg_1 : var_406_arg_2; [L629] SORT_1 var_407_arg_0 = input_7; [L630] SORT_3 var_407_arg_1 = var_373; [L631] SORT_3 var_407_arg_2 = var_406; [L632] SORT_3 var_407 = var_407_arg_0 ? var_407_arg_1 : var_407_arg_2; [L633] SORT_3 next_408_arg_1 = var_407; [L634] SORT_60 var_270_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_270_arg_0=5, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] EXPR var_270_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L635] var_270_arg_0 = var_270_arg_0 & mask_SORT_60 [L636] SORT_13 var_270 = var_270_arg_0; [L637] SORT_13 var_271_arg_0 = var_186; [L638] SORT_13 var_271_arg_1 = var_270; [L639] SORT_1 var_271 = var_271_arg_0 == var_271_arg_1; [L640] SORT_1 var_272_arg_0 = input_6; [L641] SORT_1 var_272_arg_1 = var_271; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_272_arg_0=0, var_272_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] EXPR var_272_arg_0 & var_272_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L642] SORT_1 var_272 = var_272_arg_0 & var_272_arg_1; [L643] EXPR var_272 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L643] var_272 = var_272 & mask_SORT_1 [L644] SORT_1 var_409_arg_0 = var_272; [L645] SORT_3 var_409_arg_1 = input_4; [L646] SORT_3 var_409_arg_2 = state_70; [L647] SORT_3 var_409 = var_409_arg_0 ? var_409_arg_1 : var_409_arg_2; [L648] SORT_1 var_410_arg_0 = input_7; [L649] SORT_3 var_410_arg_1 = var_373; [L650] SORT_3 var_410_arg_2 = var_409; [L651] SORT_3 var_410 = var_410_arg_0 ? var_410_arg_1 : var_410_arg_2; [L652] SORT_3 next_411_arg_1 = var_410; [L653] SORT_60 var_263_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_263_arg_0=4, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] EXPR var_263_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L654] var_263_arg_0 = var_263_arg_0 & mask_SORT_60 [L655] SORT_13 var_263 = var_263_arg_0; [L656] SORT_13 var_264_arg_0 = var_186; [L657] SORT_13 var_264_arg_1 = var_263; [L658] SORT_1 var_264 = var_264_arg_0 == var_264_arg_1; [L659] SORT_1 var_265_arg_0 = input_6; [L660] SORT_1 var_265_arg_1 = var_264; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_265_arg_0=0, var_265_arg_1=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] EXPR var_265_arg_0 & var_265_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L661] SORT_1 var_265 = var_265_arg_0 & var_265_arg_1; [L662] EXPR var_265 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L662] var_265 = var_265 & mask_SORT_1 [L663] SORT_1 var_412_arg_0 = var_265; [L664] SORT_3 var_412_arg_1 = input_4; [L665] SORT_3 var_412_arg_2 = state_75; [L666] SORT_3 var_412 = var_412_arg_0 ? var_412_arg_1 : var_412_arg_2; [L667] SORT_1 var_413_arg_0 = input_7; [L668] SORT_3 var_413_arg_1 = var_373; [L669] SORT_3 var_413_arg_2 = var_412; [L670] SORT_3 var_413 = var_413_arg_0 ? var_413_arg_1 : var_413_arg_2; [L671] SORT_3 next_414_arg_1 = var_413; [L672] SORT_81 var_256_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_256_arg_0=3, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] EXPR var_256_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L673] var_256_arg_0 = var_256_arg_0 & mask_SORT_81 [L674] SORT_13 var_256 = var_256_arg_0; [L675] SORT_13 var_257_arg_0 = var_186; [L676] SORT_13 var_257_arg_1 = var_256; [L677] SORT_1 var_257 = var_257_arg_0 == var_257_arg_1; [L678] SORT_1 var_258_arg_0 = input_6; [L679] SORT_1 var_258_arg_1 = var_257; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_258_arg_0=0, var_258_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] EXPR var_258_arg_0 & var_258_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L680] SORT_1 var_258 = var_258_arg_0 & var_258_arg_1; [L681] EXPR var_258 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L681] var_258 = var_258 & mask_SORT_1 [L682] SORT_1 var_415_arg_0 = var_258; [L683] SORT_3 var_415_arg_1 = input_4; [L684] SORT_3 var_415_arg_2 = state_80; [L685] SORT_3 var_415 = var_415_arg_0 ? var_415_arg_1 : var_415_arg_2; [L686] SORT_1 var_416_arg_0 = input_7; [L687] SORT_3 var_416_arg_1 = var_373; [L688] SORT_3 var_416_arg_2 = var_415; [L689] SORT_3 var_416 = var_416_arg_0 ? var_416_arg_1 : var_416_arg_2; [L690] SORT_3 next_417_arg_1 = var_416; [L691] SORT_81 var_249_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_249_arg_0=2, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] EXPR var_249_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L692] var_249_arg_0 = var_249_arg_0 & mask_SORT_81 [L693] SORT_13 var_249 = var_249_arg_0; [L694] SORT_13 var_250_arg_0 = var_186; [L695] SORT_13 var_250_arg_1 = var_249; [L696] SORT_1 var_250 = var_250_arg_0 == var_250_arg_1; [L697] SORT_1 var_251_arg_0 = input_6; [L698] SORT_1 var_251_arg_1 = var_250; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_251_arg_0=0, var_251_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] EXPR var_251_arg_0 & var_251_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L699] SORT_1 var_251 = var_251_arg_0 & var_251_arg_1; [L700] EXPR var_251 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L700] var_251 = var_251 & mask_SORT_1 [L701] SORT_1 var_418_arg_0 = var_251; [L702] SORT_3 var_418_arg_1 = input_4; [L703] SORT_3 var_418_arg_2 = state_86; [L704] SORT_3 var_418 = var_418_arg_0 ? var_418_arg_1 : var_418_arg_2; [L705] SORT_1 var_419_arg_0 = input_7; [L706] SORT_3 var_419_arg_1 = var_373; [L707] SORT_3 var_419_arg_2 = var_418; [L708] SORT_3 var_419 = var_419_arg_0 ? var_419_arg_1 : var_419_arg_2; [L709] SORT_3 next_420_arg_1 = var_419; [L710] SORT_1 var_242_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_242_arg_0=1, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] EXPR var_242_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L711] var_242_arg_0 = var_242_arg_0 & mask_SORT_1 [L712] SORT_13 var_242 = var_242_arg_0; [L713] SORT_13 var_243_arg_0 = var_186; [L714] SORT_13 var_243_arg_1 = var_242; [L715] SORT_1 var_243 = var_243_arg_0 == var_243_arg_1; [L716] SORT_1 var_244_arg_0 = input_6; [L717] SORT_1 var_244_arg_1 = var_243; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_244_arg_0=0, var_244_arg_1=0, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] EXPR var_244_arg_0 & var_244_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L718] SORT_1 var_244 = var_244_arg_0 & var_244_arg_1; [L719] EXPR var_244 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_186=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L719] var_244 = var_244 & mask_SORT_1 [L720] SORT_1 var_421_arg_0 = var_244; [L721] SORT_3 var_421_arg_1 = input_4; [L722] SORT_3 var_421_arg_2 = state_91; [L723] SORT_3 var_421 = var_421_arg_0 ? var_421_arg_1 : var_421_arg_2; [L724] SORT_1 var_422_arg_0 = input_7; [L725] SORT_3 var_422_arg_1 = var_373; [L726] SORT_3 var_422_arg_2 = var_421; [L727] SORT_3 var_422 = var_422_arg_0 ? var_422_arg_1 : var_422_arg_2; [L728] SORT_3 next_423_arg_1 = var_422; [L729] SORT_13 var_187_arg_0 = var_186; [L730] SORT_1 var_187 = var_187_arg_0 != 0; [L731] SORT_1 var_188_arg_0 = var_187; [L732] SORT_1 var_188 = ~var_188_arg_0; [L733] SORT_1 var_189_arg_0 = input_6; [L734] SORT_1 var_189_arg_1 = var_188; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_189_arg_0=0, var_189_arg_1=-1, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L735] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L736] EXPR var_189 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L736] var_189 = var_189 & mask_SORT_1 [L737] SORT_1 var_424_arg_0 = var_189; [L738] SORT_3 var_424_arg_1 = input_4; [L739] SORT_3 var_424_arg_2 = state_96; [L740] SORT_3 var_424 = var_424_arg_0 ? var_424_arg_1 : var_424_arg_2; [L741] SORT_1 var_425_arg_0 = input_7; [L742] SORT_3 var_425_arg_1 = var_373; [L743] SORT_3 var_425_arg_2 = var_424; [L744] SORT_3 var_425 = var_425_arg_0 ? var_425_arg_1 : var_425_arg_2; [L745] SORT_3 next_426_arg_1 = var_425; [L746] SORT_1 var_427_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_427_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] EXPR var_427_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_101=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L747] var_427_arg_0 = var_427_arg_0 & mask_SORT_1 [L748] SORT_11 var_427 = var_427_arg_0; [L749] SORT_11 var_428_arg_0 = state_101; [L750] SORT_11 var_428_arg_1 = var_427; [L751] SORT_11 var_428 = var_428_arg_0 + var_428_arg_1; [L752] SORT_1 var_429_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_429_arg_0=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] EXPR var_429_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_428=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L753] var_429_arg_0 = var_429_arg_0 & mask_SORT_1 [L754] SORT_11 var_429 = var_429_arg_0; [L755] SORT_11 var_430_arg_0 = var_428; [L756] SORT_11 var_430_arg_1 = var_429; [L757] SORT_11 var_430 = var_430_arg_0 - var_430_arg_1; [L758] SORT_1 var_431_arg_0 = input_7; [L759] SORT_11 var_431_arg_1 = var_122; [L760] SORT_11 var_431_arg_2 = var_430; [L761] SORT_11 var_431 = var_431_arg_0 ? var_431_arg_1 : var_431_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_431=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] EXPR var_431 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L762] var_431 = var_431 & mask_SORT_11 [L763] SORT_11 next_432_arg_1 = var_431; [L764] SORT_1 var_333_arg_0 = state_109; [L765] SORT_1 var_333 = ~var_333_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=-1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] EXPR var_333 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L766] var_333 = var_333 & mask_SORT_1 [L767] SORT_1 var_329_arg_0 = input_8; [L768] SORT_1 var_329_arg_1 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329_arg_0=0, var_329_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] EXPR var_329_arg_0 & var_329_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L769] SORT_1 var_329 = var_329_arg_0 & var_329_arg_1; [L770] SORT_1 var_330_arg_0 = state_109; [L771] SORT_1 var_330_arg_1 = var_329; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_330_arg_0=0, var_330_arg_1=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] EXPR var_330_arg_0 | var_330_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L772] SORT_1 var_330 = var_330_arg_0 | var_330_arg_1; [L773] SORT_1 var_433_arg_0 = var_333; [L774] SORT_1 var_433_arg_1 = var_330; [L775] SORT_1 var_433_arg_2 = state_109; [L776] SORT_1 var_433 = var_433_arg_0 ? var_433_arg_1 : var_433_arg_2; [L777] SORT_1 var_434_arg_0 = input_7; [L778] SORT_1 var_434_arg_1 = var_152; [L779] SORT_1 var_434_arg_2 = var_433; [L780] SORT_1 var_434 = var_434_arg_0 ? var_434_arg_1 : var_434_arg_2; [L781] SORT_1 next_435_arg_1 = var_434; [L782] SORT_1 var_341_arg_0 = var_126; [L783] SORT_1 var_341_arg_1 = state_110; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_341_arg_0=0, var_341_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] EXPR var_341_arg_0 | var_341_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, state_109=0, state_110=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L784] SORT_1 var_341 = var_341_arg_0 | var_341_arg_1; [L785] SORT_1 var_436_arg_0 = var_92; [L786] SORT_1 var_436_arg_1 = var_341; [L787] SORT_1 var_436_arg_2 = state_110; [L788] SORT_1 var_436 = var_436_arg_0 ? var_436_arg_1 : var_436_arg_2; [L789] SORT_1 var_437_arg_0 = input_7; [L790] SORT_1 var_437_arg_1 = var_152; [L791] SORT_1 var_437_arg_2 = var_436; [L792] SORT_1 var_437 = var_437_arg_0 ? var_437_arg_1 : var_437_arg_2; [L793] SORT_1 next_438_arg_1 = var_437; [L794] SORT_1 var_353_arg_0 = input_6; [L795] SORT_1 var_353_arg_1 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_353_arg_0=0, var_353_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] EXPR var_353_arg_0 | var_353_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L796] SORT_1 var_353 = var_353_arg_0 | var_353_arg_1; [L797] SORT_1 var_354_arg_0 = var_353; [L798] SORT_1 var_354_arg_1 = input_7; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_354_arg_0=0, var_354_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] EXPR var_354_arg_0 | var_354_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_109=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L799] SORT_1 var_354 = var_354_arg_0 | var_354_arg_1; [L800] SORT_1 var_355_arg_0 = var_354; [L801] SORT_1 var_355_arg_1 = state_109; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_355_arg_0=0, var_355_arg_1=0, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] EXPR var_355_arg_0 | var_355_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L802] SORT_1 var_355 = var_355_arg_0 | var_355_arg_1; [L803] EXPR var_355 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_113=0, state_128=0, state_185=0, var_105=17, var_122=0, var_123=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L803] var_355 = var_355 & mask_SORT_1 [L804] SORT_1 var_439_arg_0 = var_355; [L805] SORT_11 var_439_arg_1 = var_123; [L806] SORT_11 var_439_arg_2 = state_113; [L807] SORT_11 var_439 = var_439_arg_0 ? var_439_arg_1 : var_439_arg_2; [L808] SORT_1 var_440_arg_0 = input_7; [L809] SORT_11 var_440_arg_1 = var_122; [L810] SORT_11 var_440_arg_2 = var_439; [L811] SORT_11 var_440 = var_440_arg_0 ? var_440_arg_1 : var_440_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_440=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] EXPR var_440 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_329=0, var_333=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L812] var_440 = var_440 & mask_SORT_11 [L813] SORT_11 next_441_arg_1 = var_440; [L814] SORT_1 var_338_arg_0 = var_329; [L815] SORT_1 var_338_arg_1 = var_333; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_338_arg_0=0, var_338_arg_1=1, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] EXPR var_338_arg_0 & var_338_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L816] SORT_1 var_338 = var_338_arg_0 & var_338_arg_1; [L817] EXPR var_338 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_128=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L817] var_338 = var_338 & mask_SORT_1 [L818] SORT_1 var_442_arg_0 = var_338; [L819] SORT_3 var_442_arg_1 = input_4; [L820] SORT_3 var_442_arg_2 = state_128; [L821] SORT_3 var_442 = var_442_arg_0 ? var_442_arg_1 : var_442_arg_2; [L822] SORT_1 var_443_arg_0 = input_7; [L823] SORT_3 var_443_arg_1 = var_373; [L824] SORT_3 var_443_arg_2 = var_442; [L825] SORT_3 var_443 = var_443_arg_0 ? var_443_arg_1 : var_443_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_443=0, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] EXPR var_443 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_6=0, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L826] var_443 = var_443 & mask_SORT_3 [L827] SORT_3 next_444_arg_1 = var_443; [L828] SORT_1 next_445_arg_1 = var_152; [L829] SORT_1 var_309_arg_0 = input_6; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_309_arg_0=0, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] EXPR var_309_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_7=0, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, next_375_arg_1=0, next_378_arg_1=0, next_381_arg_1=0, next_384_arg_1=0, next_387_arg_1=0, next_390_arg_1=0, next_393_arg_1=0, next_396_arg_1=0, next_399_arg_1=0, next_402_arg_1=0, next_405_arg_1=0, next_408_arg_1=0, next_411_arg_1=0, next_414_arg_1=0, next_417_arg_1=0, next_420_arg_1=0, next_423_arg_1=0, next_426_arg_1=0, next_432_arg_1=0, next_435_arg_1=0, next_438_arg_1=0, next_441_arg_1=0, next_444_arg_1=0, next_445_arg_1=0, state_185=0, var_105=17, var_122=0, var_152=0, var_15=16, var_161=0, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L830] var_309_arg_0 = var_309_arg_0 & mask_SORT_1 [L831] SORT_11 var_309 = var_309_arg_0; [L832] SORT_11 var_310_arg_0 = state_185; [L833] SORT_11 var_310_arg_1 = var_309; [L834] SORT_11 var_310 = var_310_arg_0 + var_310_arg_1; [L835] SORT_1 var_446_arg_0 = var_161; [L836] SORT_11 var_446_arg_1 = var_310; [L837] SORT_11 var_446_arg_2 = state_185; [L838] SORT_11 var_446 = var_446_arg_0 ? var_446_arg_1 : var_446_arg_2; [L839] SORT_1 var_447_arg_0 = input_7; [L840] SORT_11 var_447_arg_1 = var_122; [L841] SORT_11 var_447_arg_2 = var_446; [L842] SORT_11 var_447 = var_447_arg_0 ? var_447_arg_1 : var_447_arg_2; [L843] SORT_11 next_448_arg_1 = var_447; [L845] state_10 = next_375_arg_1 [L846] state_12 = next_378_arg_1 [L847] state_18 = next_381_arg_1 [L848] state_24 = next_384_arg_1 [L849] state_29 = next_387_arg_1 [L850] state_34 = next_390_arg_1 [L851] state_39 = next_393_arg_1 [L852] state_44 = next_396_arg_1 [L853] state_49 = next_399_arg_1 [L854] state_54 = next_402_arg_1 [L855] state_59 = next_405_arg_1 [L856] state_65 = next_408_arg_1 [L857] state_70 = next_411_arg_1 [L858] state_75 = next_414_arg_1 [L859] state_80 = next_417_arg_1 [L860] state_86 = next_420_arg_1 [L861] state_91 = next_423_arg_1 [L862] state_96 = next_426_arg_1 [L863] state_101 = next_432_arg_1 [L864] state_109 = next_435_arg_1 [L865] state_110 = next_438_arg_1 [L866] state_113 = next_441_arg_1 [L867] state_128 = next_444_arg_1 [L868] state_132 = next_445_arg_1 [L869] state_185 = next_448_arg_1 [L107] input_2 = __VERIFIER_nondet_uchar() [L108] input_4 = __VERIFIER_nondet_ulong() [L109] input_5 = __VERIFIER_nondet_uchar() [L110] input_6 = __VERIFIER_nondet_uchar() [L111] input_7 = __VERIFIER_nondet_uchar() [L112] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L112] input_7 = input_7 & mask_SORT_1 [L113] input_8 = __VERIFIER_nondet_uchar() [L114] input_9 = __VERIFIER_nondet_ulong() [L115] input_150 = __VERIFIER_nondet_uchar() [L117] SORT_1 var_134_arg_0 = input_7; [L118] SORT_1 var_134_arg_1 = state_132; [L119] SORT_1 var_134 = var_134_arg_0 == var_134_arg_1; [L120] SORT_1 var_135_arg_0 = var_92; [L121] SORT_1 var_135 = ~var_135_arg_0; [L122] SORT_1 var_136_arg_0 = var_134; [L123] SORT_1 var_136_arg_1 = var_135; VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_136_arg_0=0, var_136_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] EXPR var_136_arg_0 | var_136_arg_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L124] SORT_1 var_136 = var_136_arg_0 | var_136_arg_1; [L125] EXPR var_136 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L125] var_136 = var_136 & mask_SORT_1 [L126] SORT_1 constr_137_arg_0 = var_136; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L127] CALL assume_abort_if_not(constr_137_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L127] RET assume_abort_if_not(constr_137_arg_0) VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L128] SORT_13 var_106_arg_0 = var_105; VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_106_arg_0=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] EXPR var_106_arg_0 & mask_SORT_13 VAL [constr_137_arg_0=1, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L129] var_106_arg_0 = var_106_arg_0 & mask_SORT_13 [L130] SORT_11 var_106 = var_106_arg_0; [L131] SORT_11 var_107_arg_0 = state_101; [L132] SORT_11 var_107_arg_1 = var_106; [L133] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L134] SORT_1 var_138_arg_0 = var_107; [L135] SORT_1 var_138 = ~var_138_arg_0; [L136] SORT_1 var_139_arg_0 = input_6; [L137] SORT_1 var_139 = ~var_139_arg_0; [L138] SORT_1 var_140_arg_0 = var_138; [L139] SORT_1 var_140_arg_1 = var_139; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_140_arg_0=-1, var_140_arg_1=-1, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] EXPR var_140_arg_0 | var_140_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L140] SORT_1 var_140 = var_140_arg_0 | var_140_arg_1; [L141] SORT_1 var_141_arg_0 = var_92; [L142] SORT_1 var_141 = ~var_141_arg_0; [L143] SORT_1 var_142_arg_0 = var_140; [L144] SORT_1 var_142_arg_1 = var_141; VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_142_arg_0=255, var_142_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] EXPR var_142_arg_0 | var_142_arg_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L145] SORT_1 var_142 = var_142_arg_0 | var_142_arg_1; [L146] EXPR var_142 & mask_SORT_1 VAL [constr_137_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L146] var_142 = var_142 & mask_SORT_1 [L147] SORT_1 constr_143_arg_0 = var_142; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L148] CALL assume_abort_if_not(constr_143_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_143_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L149] SORT_11 var_102_arg_0 = state_101; [L150] SORT_1 var_102 = var_102_arg_0 != 0; [L151] SORT_1 var_103_arg_0 = var_102; [L152] SORT_1 var_103 = ~var_103_arg_0; [L153] SORT_1 var_144_arg_0 = var_103; [L154] SORT_1 var_144 = ~var_144_arg_0; [L155] SORT_1 var_145_arg_0 = input_5; [L156] SORT_1 var_145 = ~var_145_arg_0; [L157] SORT_1 var_146_arg_0 = var_144; [L158] SORT_1 var_146_arg_1 = var_145; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_146_arg_0=-256, var_146_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] EXPR var_146_arg_0 | var_146_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L159] SORT_1 var_146 = var_146_arg_0 | var_146_arg_1; [L160] SORT_1 var_147_arg_0 = var_92; [L161] SORT_1 var_147 = ~var_147_arg_0; [L162] SORT_1 var_148_arg_0 = var_146; [L163] SORT_1 var_148_arg_1 = var_147; VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_148_arg_0=254, var_148_arg_1=-2, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] EXPR var_148_arg_0 | var_148_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L164] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L165] EXPR var_148 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L165] var_148 = var_148 & mask_SORT_1 [L166] SORT_1 constr_149_arg_0 = var_148; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L167] CALL assume_abort_if_not(constr_149_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L167] RET assume_abort_if_not(constr_149_arg_0) VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L169] SORT_1 var_153_arg_0 = state_132; [L170] SORT_1 var_153_arg_1 = var_152; [L171] SORT_1 var_153_arg_2 = var_92; [L172] SORT_1 var_153 = var_153_arg_0 ? var_153_arg_1 : var_153_arg_2; [L173] SORT_1 var_111_arg_0 = state_110; [L174] SORT_1 var_111 = ~var_111_arg_0; [L175] SORT_1 var_112_arg_0 = state_109; [L176] SORT_1 var_112_arg_1 = var_111; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_112_arg_0=0, var_112_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] EXPR var_112_arg_0 & var_112_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L177] SORT_1 var_112 = var_112_arg_0 & var_112_arg_1; [L178] SORT_11 var_114_arg_0 = state_113; [L179] SORT_1 var_114 = var_114_arg_0 != 0; [L180] SORT_1 var_115_arg_0 = var_112; [L181] SORT_1 var_115_arg_1 = var_114; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115_arg_0=0, var_115_arg_1=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] EXPR var_115_arg_0 & var_115_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L182] SORT_1 var_115 = var_115_arg_0 & var_115_arg_1; [L183] SORT_1 var_116_arg_0 = state_109; [L184] SORT_1 var_116 = ~var_116_arg_0; [L185] SORT_1 var_117_arg_0 = input_6; [L186] SORT_1 var_117_arg_1 = var_116; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_117_arg_0=0, var_117_arg_1=-1, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] EXPR var_117_arg_0 & var_117_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L187] SORT_1 var_117 = var_117_arg_0 & var_117_arg_1; [L188] SORT_1 var_118_arg_0 = var_117; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_118_arg_0=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] EXPR var_118_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L189] var_118_arg_0 = var_118_arg_0 & mask_SORT_1 [L190] SORT_11 var_118 = var_118_arg_0; [L191] SORT_11 var_119_arg_0 = state_113; [L192] SORT_11 var_119_arg_1 = var_118; [L193] SORT_11 var_119 = var_119_arg_0 + var_119_arg_1; [L194] SORT_1 var_120_arg_0 = input_5; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_120_arg_0=257, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] EXPR var_120_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_119=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L195] var_120_arg_0 = var_120_arg_0 & mask_SORT_1 [L196] SORT_11 var_120 = var_120_arg_0; [L197] SORT_11 var_121_arg_0 = var_119; [L198] SORT_11 var_121_arg_1 = var_120; [L199] SORT_11 var_121 = var_121_arg_0 - var_121_arg_1; [L200] SORT_1 var_123_arg_0 = input_7; [L201] SORT_11 var_123_arg_1 = var_122; [L202] SORT_11 var_123_arg_2 = var_121; [L203] SORT_11 var_123 = var_123_arg_0 ? var_123_arg_1 : var_123_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] EXPR var_123 & mask_SORT_11 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_115=0, var_122=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L204] var_123 = var_123 & mask_SORT_11 [L205] SORT_11 var_124_arg_0 = var_123; [L206] SORT_1 var_124 = var_124_arg_0 != 0; [L207] SORT_1 var_125_arg_0 = var_124; [L208] SORT_1 var_125 = ~var_125_arg_0; [L209] SORT_1 var_126_arg_0 = var_115; [L210] SORT_1 var_126_arg_1 = var_125; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126_arg_0=0, var_126_arg_1=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] EXPR var_126_arg_0 & var_126_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L211] SORT_1 var_126 = var_126_arg_0 & var_126_arg_1; [L212] SORT_1 var_127_arg_0 = var_126; [L213] SORT_1 var_127 = ~var_127_arg_0; [L214] SORT_11 var_14_arg_0 = state_12; [L215] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] EXPR var_14 & mask_SORT_13 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L216] var_14 = var_14 & mask_SORT_13 [L217] SORT_13 var_97_arg_0 = var_14; [L218] SORT_1 var_97 = var_97_arg_0 != 0; [L219] SORT_1 var_98_arg_0 = var_97; [L220] SORT_1 var_98 = ~var_98_arg_0; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=-1] [L221] EXPR var_98 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L221] var_98 = var_98 & mask_SORT_1 [L222] SORT_1 var_93_arg_0 = var_92; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_93_arg_0=1, var_98=1] [L223] EXPR var_93_arg_0 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_98=1] [L223] var_93_arg_0 = var_93_arg_0 & mask_SORT_1 [L224] SORT_13 var_93 = var_93_arg_0; [L225] SORT_13 var_94_arg_0 = var_14; [L226] SORT_13 var_94_arg_1 = var_93; [L227] SORT_1 var_94 = var_94_arg_0 == var_94_arg_1; [L228] SORT_81 var_88_arg_0 = var_87; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_88_arg_0=2, var_92=1, var_94=0, var_98=1] [L229] EXPR var_88_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_94=0, var_98=1] [L229] var_88_arg_0 = var_88_arg_0 & mask_SORT_81 [L230] SORT_13 var_88 = var_88_arg_0; [L231] SORT_13 var_89_arg_0 = var_14; [L232] SORT_13 var_89_arg_1 = var_88; [L233] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L234] SORT_81 var_83_arg_0 = var_82; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_83_arg_0=3, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L235] EXPR var_83_arg_0 & mask_SORT_81 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L235] var_83_arg_0 = var_83_arg_0 & mask_SORT_81 [L236] SORT_13 var_83 = var_83_arg_0; [L237] SORT_13 var_84_arg_0 = var_14; [L238] SORT_13 var_84_arg_1 = var_83; [L239] SORT_1 var_84 = var_84_arg_0 == var_84_arg_1; [L240] SORT_60 var_77_arg_0 = var_76; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_77_arg_0=4, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L241] EXPR var_77_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L241] var_77_arg_0 = var_77_arg_0 & mask_SORT_60 [L242] SORT_13 var_77 = var_77_arg_0; [L243] SORT_13 var_78_arg_0 = var_14; [L244] SORT_13 var_78_arg_1 = var_77; [L245] SORT_1 var_78 = var_78_arg_0 == var_78_arg_1; [L246] SORT_60 var_72_arg_0 = var_71; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_72_arg_0=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L247] EXPR var_72_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L247] var_72_arg_0 = var_72_arg_0 & mask_SORT_60 [L248] SORT_13 var_72 = var_72_arg_0; [L249] SORT_13 var_73_arg_0 = var_14; [L250] SORT_13 var_73_arg_1 = var_72; [L251] SORT_1 var_73 = var_73_arg_0 == var_73_arg_1; [L252] SORT_60 var_67_arg_0 = var_66; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_67_arg_0=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L253] EXPR var_67_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L253] var_67_arg_0 = var_67_arg_0 & mask_SORT_60 [L254] SORT_13 var_67 = var_67_arg_0; [L255] SORT_13 var_68_arg_0 = var_14; [L256] SORT_13 var_68_arg_1 = var_67; [L257] SORT_1 var_68 = var_68_arg_0 == var_68_arg_1; [L258] SORT_60 var_62_arg_0 = var_61; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_62_arg_0=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L259] EXPR var_62_arg_0 & mask_SORT_60 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_60 [L260] SORT_13 var_62 = var_62_arg_0; [L261] SORT_13 var_63_arg_0 = var_14; [L262] SORT_13 var_63_arg_1 = var_62; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_19 var_56_arg_0 = var_55; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_56_arg_0=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L265] EXPR var_56_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L265] var_56_arg_0 = var_56_arg_0 & mask_SORT_19 [L266] SORT_13 var_56 = var_56_arg_0; [L267] SORT_13 var_57_arg_0 = var_14; [L268] SORT_13 var_57_arg_1 = var_56; [L269] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L270] SORT_19 var_51_arg_0 = var_50; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_51_arg_0=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L271] EXPR var_51_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L271] var_51_arg_0 = var_51_arg_0 & mask_SORT_19 [L272] SORT_13 var_51 = var_51_arg_0; [L273] SORT_13 var_52_arg_0 = var_14; [L274] SORT_13 var_52_arg_1 = var_51; [L275] SORT_1 var_52 = var_52_arg_0 == var_52_arg_1; [L276] SORT_19 var_46_arg_0 = var_45; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_46_arg_0=10, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L277] EXPR var_46_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L277] var_46_arg_0 = var_46_arg_0 & mask_SORT_19 [L278] SORT_13 var_46 = var_46_arg_0; [L279] SORT_13 var_47_arg_0 = var_14; [L280] SORT_13 var_47_arg_1 = var_46; [L281] SORT_1 var_47 = var_47_arg_0 == var_47_arg_1; [L282] SORT_19 var_41_arg_0 = var_40; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_41_arg_0=11, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L283] EXPR var_41_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L283] var_41_arg_0 = var_41_arg_0 & mask_SORT_19 [L284] SORT_13 var_41 = var_41_arg_0; [L285] SORT_13 var_42_arg_0 = var_14; [L286] SORT_13 var_42_arg_1 = var_41; [L287] SORT_1 var_42 = var_42_arg_0 == var_42_arg_1; [L288] SORT_19 var_36_arg_0 = var_35; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_36_arg_0=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L289] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L289] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L290] SORT_13 var_36 = var_36_arg_0; [L291] SORT_13 var_37_arg_0 = var_14; [L292] SORT_13 var_37_arg_1 = var_36; [L293] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L294] SORT_19 var_31_arg_0 = var_30; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_31_arg_0=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L295] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L295] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L296] SORT_13 var_31 = var_31_arg_0; [L297] SORT_13 var_32_arg_0 = var_14; [L298] SORT_13 var_32_arg_1 = var_31; [L299] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L300] SORT_19 var_26_arg_0 = var_25; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_26_arg_0=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L301] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L301] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L302] SORT_13 var_26 = var_26_arg_0; [L303] SORT_13 var_27_arg_0 = var_14; [L304] SORT_13 var_27_arg_1 = var_26; [L305] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L306] SORT_19 var_21_arg_0 = var_20; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_21_arg_0=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L307] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_14=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_27=1, var_30=13, var_32=1, var_35=12, var_373=0, var_37=1, var_40=11, var_42=0, var_45=10, var_47=0, var_50=9, var_52=1, var_55=8, var_57=1, var_61=7, var_63=0, var_66=6, var_68=0, var_71=5, var_73=1, var_76=4, var_78=1, var_82=3, var_84=0, var_87=2, var_89=1, var_92=1, var_94=0, var_98=1] [L307] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L308] SORT_13 var_21 = var_21_arg_0; [L309] SORT_13 var_22_arg_0 = var_14; [L310] SORT_13 var_22_arg_1 = var_21; [L311] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L312] SORT_13 var_16_arg_0 = var_14; [L313] SORT_13 var_16_arg_1 = var_15; [L314] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L315] SORT_1 var_17_arg_0 = var_16; [L316] SORT_3 var_17_arg_1 = state_10; [L317] SORT_3 var_17_arg_2 = input_9; [L318] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L319] SORT_1 var_23_arg_0 = var_22; [L320] SORT_3 var_23_arg_1 = state_18; [L321] SORT_3 var_23_arg_2 = var_17; [L322] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L323] SORT_1 var_28_arg_0 = var_27; [L324] SORT_3 var_28_arg_1 = state_24; [L325] SORT_3 var_28_arg_2 = var_23; [L326] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L327] SORT_1 var_33_arg_0 = var_32; [L328] SORT_3 var_33_arg_1 = state_29; [L329] SORT_3 var_33_arg_2 = var_28; [L330] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L331] SORT_1 var_38_arg_0 = var_37; [L332] SORT_3 var_38_arg_1 = state_34; [L333] SORT_3 var_38_arg_2 = var_33; [L334] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L335] SORT_1 var_43_arg_0 = var_42; [L336] SORT_3 var_43_arg_1 = state_39; [L337] SORT_3 var_43_arg_2 = var_38; [L338] SORT_3 var_43 = var_43_arg_0 ? var_43_arg_1 : var_43_arg_2; [L339] SORT_1 var_48_arg_0 = var_47; [L340] SORT_3 var_48_arg_1 = state_44; [L341] SORT_3 var_48_arg_2 = var_43; [L342] SORT_3 var_48 = var_48_arg_0 ? var_48_arg_1 : var_48_arg_2; [L343] SORT_1 var_53_arg_0 = var_52; [L344] SORT_3 var_53_arg_1 = state_49; [L345] SORT_3 var_53_arg_2 = var_48; [L346] SORT_3 var_53 = var_53_arg_0 ? var_53_arg_1 : var_53_arg_2; [L347] SORT_1 var_58_arg_0 = var_57; [L348] SORT_3 var_58_arg_1 = state_54; [L349] SORT_3 var_58_arg_2 = var_53; [L350] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; [L351] SORT_1 var_64_arg_0 = var_63; [L352] SORT_3 var_64_arg_1 = state_59; [L353] SORT_3 var_64_arg_2 = var_58; [L354] SORT_3 var_64 = var_64_arg_0 ? var_64_arg_1 : var_64_arg_2; [L355] SORT_1 var_69_arg_0 = var_68; [L356] SORT_3 var_69_arg_1 = state_65; [L357] SORT_3 var_69_arg_2 = var_64; [L358] SORT_3 var_69 = var_69_arg_0 ? var_69_arg_1 : var_69_arg_2; [L359] SORT_1 var_74_arg_0 = var_73; [L360] SORT_3 var_74_arg_1 = state_70; [L361] SORT_3 var_74_arg_2 = var_69; [L362] SORT_3 var_74 = var_74_arg_0 ? var_74_arg_1 : var_74_arg_2; [L363] SORT_1 var_79_arg_0 = var_78; [L364] SORT_3 var_79_arg_1 = state_75; [L365] SORT_3 var_79_arg_2 = var_74; [L366] SORT_3 var_79 = var_79_arg_0 ? var_79_arg_1 : var_79_arg_2; [L367] SORT_1 var_85_arg_0 = var_84; [L368] SORT_3 var_85_arg_1 = state_80; [L369] SORT_3 var_85_arg_2 = var_79; [L370] SORT_3 var_85 = var_85_arg_0 ? var_85_arg_1 : var_85_arg_2; [L371] SORT_1 var_90_arg_0 = var_89; [L372] SORT_3 var_90_arg_1 = state_86; [L373] SORT_3 var_90_arg_2 = var_85; [L374] SORT_3 var_90 = var_90_arg_0 ? var_90_arg_1 : var_90_arg_2; [L375] SORT_1 var_95_arg_0 = var_94; [L376] SORT_3 var_95_arg_1 = state_91; [L377] SORT_3 var_95_arg_2 = var_90; [L378] SORT_3 var_95 = var_95_arg_0 ? var_95_arg_1 : var_95_arg_2; [L379] SORT_1 var_99_arg_0 = var_98; [L380] SORT_3 var_99_arg_1 = state_96; [L381] SORT_3 var_99_arg_2 = var_95; [L382] SORT_3 var_99 = var_99_arg_0 ? var_99_arg_1 : var_99_arg_2; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1, var_99=0] [L383] EXPR var_99 & mask_SORT_3 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_127=-1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L383] var_99 = var_99 & mask_SORT_3 [L384] SORT_3 var_129_arg_0 = state_128; [L385] SORT_3 var_129_arg_1 = var_99; [L386] SORT_1 var_129 = var_129_arg_0 == var_129_arg_1; [L387] SORT_1 var_130_arg_0 = var_127; [L388] SORT_1 var_130_arg_1 = var_129; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_130_arg_0=-1, var_130_arg_1=1, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] EXPR var_130_arg_0 | var_130_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_132=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_153=1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L389] SORT_1 var_130 = var_130_arg_0 | var_130_arg_1; [L390] SORT_1 var_151_arg_0 = state_132; [L391] SORT_1 var_151_arg_1 = input_150; [L392] SORT_1 var_151_arg_2 = var_130; [L393] SORT_1 var_151 = var_151_arg_0 ? var_151_arg_1 : var_151_arg_2; [L394] SORT_1 var_154_arg_0 = var_151; [L395] SORT_1 var_154 = ~var_154_arg_0; [L396] SORT_1 var_155_arg_0 = var_153; [L397] SORT_1 var_155_arg_1 = var_154; VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_155_arg_0=1, var_155_arg_1=-1, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] EXPR var_155_arg_0 & var_155_arg_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L398] SORT_1 var_155 = var_155_arg_0 & var_155_arg_1; [L399] EXPR var_155 & mask_SORT_1 VAL [constr_137_arg_0=1, constr_143_arg_0=1, constr_149_arg_0=1, input_5=257, input_6=0, input_7=1, mask_SORT_11=63, mask_SORT_13=31, mask_SORT_19=15, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_60=7, mask_SORT_81=3, state_101=0, state_109=0, state_10=0, state_110=0, state_113=0, state_128=0, state_12=0, state_185=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_44=0, state_49=0, state_54=0, state_59=0, state_65=0, state_70=0, state_75=0, state_80=0, state_86=0, state_91=0, state_96=0, var_105=17, var_122=0, var_123=0, var_126=0, var_152=0, var_15=16, var_20=15, var_25=14, var_30=13, var_35=12, var_373=0, var_40=11, var_45=10, var_50=9, var_55=8, var_61=7, var_66=6, var_71=5, var_76=4, var_82=3, var_87=2, var_92=1] [L399] var_155 = var_155 & mask_SORT_1 [L400] SORT_1 bad_156_arg_0 = var_155; [L401] CALL __VERIFIER_assert(!(bad_156_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 552 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 464.8s, OverallIterations: 90, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.5s, AutomataDifference: 154.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 145479 SdHoareTripleChecker+Valid, 83.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 145333 mSDsluCounter, 337071 SdHoareTripleChecker+Invalid, 71.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 267436 mSDsCounter, 528 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 93587 IncrementalHoareTripleChecker+Invalid, 94115 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 528 mSolverCounterUnsat, 69635 mSDtfsCounter, 93587 mSolverCounterSat, 1.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 9612 GetRequests, 8326 SyntacticMatches, 2 SemanticMatches, 1284 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120928 ImplicationChecksByTransitivity, 60.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22272occurred in iteration=88, InterpolantAutomatonStates: 1093, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 7.6s AutomataMinimizationTime, 89 MinimizatonAttempts, 150201 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 4.6s SsaConstructionTime, 99.7s SatisfiabilityAnalysisTime, 148.0s InterpolantComputationTime, 36945 NumberOfCodeBlocks, 36945 NumberOfCodeBlocksAsserted, 100 NumberOfCheckSat, 38823 ConstructedInterpolants, 0 QuantifiedInterpolants, 222100 SizeOfPredicates, 59 NumberOfNonLiveVariables, 29881 ConjunctsInSsa, 511 ConjunctsInUnsatCore, 104 InterpolantComputations, 85 PerfectInterpolantSequences, 11249/12680 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-13 13:22:47,297 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 13:22:50,840 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 13:22:50,961 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-13 13:22:50,967 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 13:22:50,968 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 13:22:51,031 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 13:22:51,036 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 13:22:51,036 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 13:22:51,037 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 13:22:51,037 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 13:22:51,037 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 13:22:51,037 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 13:22:51,037 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 13:22:51,038 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 13:22:51,038 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 13:22:51,038 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 13:22:51,038 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 13:22:51,038 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 13:22:51,042 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 13:22:51,043 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 13:22:51,043 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:22:51,044 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-13 13:22:51,044 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 13:22:51,045 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 13:22:51,045 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 13:22:51,045 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 13:22:51,045 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 740169cb7aec884028548f875dd7710b7e8c54465b62519efb8743dcffb7d119 [2024-11-13 13:22:51,386 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 13:22:51,398 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 13:22:51,401 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 13:22:51,402 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 13:22:51,403 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 13:22:51,404 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c Unable to find full path for "g++" [2024-11-13 13:22:53,796 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 13:22:54,338 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 13:22:54,339 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-11-13 13:22:54,363 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/fcdab9aa0/7b28b8aac31743feb56e96a1b7eb94ac/FLAGdc1ae8812 [2024-11-13 13:22:54,398 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/data/fcdab9aa0/7b28b8aac31743feb56e96a1b7eb94ac [2024-11-13 13:22:54,403 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 13:22:54,407 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 13:22:54,410 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 13:22:54,411 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 13:22:54,418 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 13:22:54,419 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:22:54" (1/1) ... [2024-11-13 13:22:54,420 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@c306927 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:54, skipping insertion in model container [2024-11-13 13:22:54,423 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:22:54" (1/1) ... [2024-11-13 13:22:54,499 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 13:22:54,748 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-11-13 13:22:55,026 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:22:55,040 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 13:22:55,050 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c[1280,1293] [2024-11-13 13:22:55,178 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:22:55,193 INFO L204 MainTranslator]: Completed translation [2024-11-13 13:22:55,193 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55 WrapperNode [2024-11-13 13:22:55,194 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 13:22:55,195 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 13:22:55,195 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 13:22:55,195 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 13:22:55,202 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,238 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,337 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 912 [2024-11-13 13:22:55,337 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 13:22:55,338 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 13:22:55,338 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 13:22:55,338 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 13:22:55,348 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,350 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,371 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,422 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 13:22:55,422 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,422 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,449 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,458 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,461 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,465 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,474 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 13:22:55,475 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 13:22:55,475 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 13:22:55,475 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 13:22:55,476 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (1/1) ... [2024-11-13 13:22:55,511 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:22:55,524 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:22:55,539 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 13:22:55,541 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 13:22:55,569 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 13:22:55,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-13 13:22:55,569 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 13:22:55,569 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 13:22:55,570 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 13:22:55,571 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 13:22:55,885 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 13:22:55,887 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 13:22:57,186 INFO L? ?]: Removed 271 outVars from TransFormulas that were not future-live. [2024-11-13 13:22:57,186 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 13:22:57,199 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 13:22:57,199 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 13:22:57,200 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:22:57 BoogieIcfgContainer [2024-11-13 13:22:57,200 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 13:22:57,206 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 13:22:57,208 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 13:22:57,218 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 13:22:57,218 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 01:22:54" (1/3) ... [2024-11-13 13:22:57,219 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2035e61a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:22:57, skipping insertion in model container [2024-11-13 13:22:57,220 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:22:55" (2/3) ... [2024-11-13 13:22:57,221 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2035e61a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:22:57, skipping insertion in model container [2024-11-13 13:22:57,221 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:22:57" (3/3) ... [2024-11-13 13:22:57,223 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c [2024-11-13 13:22:57,244 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 13:22:57,247 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d16_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 13:22:57,319 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 13:22:57,337 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@38e0baa8, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 13:22:57,337 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 13:22:57,343 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:22:57,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-13 13:22:57,353 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:22:57,354 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:22:57,355 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:22:57,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:22:57,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-13 13:22:57,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 13:22:57,377 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1247574852] [2024-11-13 13:22:57,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:57,379 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:22:57,379 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:22:57,383 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:22:57,385 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 13:22:58,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:58,055 INFO L255 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-13 13:22:58,082 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:22:58,605 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-13 13:22:58,605 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:22:58,898 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 13:22:58,898 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1247574852] [2024-11-13 13:22:58,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1247574852] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:22:58,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [376659664] [2024-11-13 13:22:58,899 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:22:58,899 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 13:22:58,900 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 13:22:58,902 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 13:22:58,907 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-13 13:22:59,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:22:59,905 INFO L255 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 13:22:59,918 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:23:00,083 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 13:23:00,083 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:23:00,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [376659664] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:23:00,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 13:23:00,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-13 13:23:00,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755911317] [2024-11-13 13:23:00,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:23:00,092 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:23:00,092 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 13:23:00,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:23:00,116 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:23:00,118 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:23:00,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:23:00,348 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-13 13:23:00,350 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:23:00,351 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-13 13:23:00,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:23:00,358 INFO L225 Difference]: With dead ends: 43 [2024-11-13 13:23:00,358 INFO L226 Difference]: Without dead ends: 25 [2024-11-13 13:23:00,362 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 13:23:00,366 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:23:00,367 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:23:00,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-13 13:23:00,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-13 13:23:00,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:23:00,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-13 13:23:00,411 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-13 13:23:00,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:23:00,413 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-13 13:23:00,413 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 13:23:00,413 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-13 13:23:00,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-13 13:23:00,416 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:23:00,416 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-13 13:23:00,444 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 13:23:00,625 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Forceful destruction successful, exit code 0 [2024-11-13 13:23:00,820 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 13:23:00,820 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:23:00,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:23:00,821 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-13 13:23:00,823 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 13:23:00,823 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [727745028] [2024-11-13 13:23:00,823 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:23:00,824 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:23:00,824 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:23:00,827 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:23:00,829 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 13:23:01,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:23:01,510 INFO L255 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-13 13:23:01,527 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:23:02,441 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:23:02,443 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:23:02,736 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 13:23:02,736 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [727745028] [2024-11-13 13:23:02,736 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [727745028] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:23:02,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [464175456] [2024-11-13 13:23:02,739 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:23:02,739 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 13:23:02,739 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 13:23:02,742 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 13:23:02,745 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-13 13:23:04,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:23:04,345 INFO L255 TraceCheckSpWp]: Trace formula consists of 656 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-13 13:23:04,367 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:23:04,921 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 13:23:04,921 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:23:05,133 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [464175456] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:23:05,133 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 13:23:05,133 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-13 13:23:05,133 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [706171275] [2024-11-13 13:23:05,133 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 13:23:05,134 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 13:23:05,135 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 13:23:05,135 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 13:23:05,136 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:23:05,136 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:23:05,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:23:05,914 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-13 13:23:05,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 13:23:05,915 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-13 13:23:05,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:23:05,917 INFO L225 Difference]: With dead ends: 36 [2024-11-13 13:23:05,918 INFO L226 Difference]: Without dead ends: 34 [2024-11-13 13:23:05,919 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-13 13:23:05,921 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 13:23:05,922 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 13:23:05,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-13 13:23:05,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-13 13:23:05,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 13:23:05,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-13 13:23:05,938 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-13 13:23:05,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:23:05,938 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-13 13:23:05,939 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 13:23:05,939 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-13 13:23:05,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-13 13:23:05,941 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:23:05,941 INFO L215 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-13 13:23:05,957 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Forceful destruction successful, exit code 0 [2024-11-13 13:23:06,162 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-13 13:23:06,345 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:23:06,345 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:23:06,346 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:23:06,346 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-13 13:23:06,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 13:23:06,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [160744311] [2024-11-13 13:23:06,349 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 13:23:06,349 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:23:06,350 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:23:06,352 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:23:06,354 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 13:23:07,429 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 13:23:07,430 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:23:07,444 INFO L255 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-13 13:23:07,464 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:23:13,607 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 13:23:13,607 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:24:02,213 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 13:24:02,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [160744311] [2024-11-13 13:24:02,213 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [160744311] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:24:02,214 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [821164526] [2024-11-13 13:24:02,214 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 13:24:02,214 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 13:24:02,214 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 13:24:02,216 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 13:24:02,218 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-13 13:24:04,268 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 13:24:04,268 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:24:04,317 INFO L255 TraceCheckSpWp]: Trace formula consists of 960 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-13 13:24:04,336 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:24:08,405 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 13:24:08,405 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:24:14,392 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse9 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse15 (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_96~0#1|))) (.cse18 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 (_ bv255 32))))) (.cse13 (= ((_ extract 7 0) (bvand .cse9 (_ bv254 32))) (_ bv0 8)))) (let ((.cse10 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_109~0#1|)) (.cse12 (not .cse13)) (.cse16 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_19| (_ BitVec 64))) (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_19|)))) (.cse11 (forall ((|v_ULTIMATE.start_main_~var_99_arg_2~0#1_19| (_ BitVec 64))) (not (= |c_ULTIMATE.start_main_~state_128~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_99_arg_2~0#1_19|))))) (.cse17 (not .cse18)) (.cse14 (not .cse15)) (.cse8 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|))))))))) (let ((.cse0 (not .cse8)) (.cse3 (and (or .cse11 .cse17) (or .cse18 .cse14))) (.cse1 (and (or .cse17 .cse16) (or .cse15 .cse18))) (.cse5 (forall ((|v_ULTIMATE.start_main_~var_151_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_152~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_151_arg_1~0#1_21|))))))))) .cse9))))) (.cse6 (and (or .cse15 .cse13) (or .cse12 .cse16))) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_126_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_153_arg_2~0#1_20| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse10 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_21|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_21|)))))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_153_arg_2~0#1_20|))))))))))) (.cse7 (and (or .cse11 .cse12) (or .cse13 .cse14))) (.cse4 (forall ((|v_ULTIMATE.start_main_~var_126_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_115_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_153_arg_2~0#1_20| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse9 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_126_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand .cse10 ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_1~0#1_21|)))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_115_arg_1~0#1_21|)))))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_153_arg_2~0#1_20|)))))))))))) (and (or .cse0 (and (or .cse1 .cse2) (or .cse3 .cse4))) (or .cse0 (and (or .cse5 .cse3) (or .cse1 .cse5))) (or (and (or .cse5 .cse6) (or .cse7 .cse5)) .cse8) (or (and (or .cse6 .cse2) (or .cse7 .cse4)) .cse8)))))) is different from false [2024-11-13 13:24:15,111 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [821164526] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:24:15,111 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 13:24:15,111 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 14 [2024-11-13 13:24:15,112 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [612113674] [2024-11-13 13:24:15,112 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 13:24:15,112 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-13 13:24:15,112 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 13:24:15,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-13 13:24:15,114 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=199, Unknown=8, NotChecked=28, Total=272 [2024-11-13 13:24:15,114 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 14 states, 12 states have (on average 2.75) internal successors, (33), 14 states have internal predecessors, (33), 6 states have call successors, (12), 1 states have call predecessors, (12), 2 states have return successors, (12), 5 states have call predecessors, (12), 6 states have call successors, (12) [2024-11-13 13:24:44,453 WARN L249 Executor]: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) stderr output: (error "out of memory") [2024-11-13 13:24:44,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-13 13:24:44,453 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 101 [2024-11-13 13:24:44,454 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 77.1s TimeCoverageRelationStatistics Valid=97, Invalid=495, Unknown=12, NotChecked=46, Total=650 [2024-11-13 13:24:44,455 INFO L432 NwaCegarLoop]: 10 mSDtfsCounter, 12 mSDsluCounter, 87 mSDsCounter, 0 mSdLazyCounter, 199 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 97 SdHoareTripleChecker+Invalid, 209 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 199 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-13 13:24:44,455 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 97 Invalid, 209 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 199 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-13 13:24:44,471 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-13 13:24:44,674 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-13 13:24:44,857 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt,6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:24:44,858 FATAL L? ?]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:277) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:140) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:99) at de.uni_freiburg.informatik.ultimate.logic.WrapperScript.pop(WrapperScript.java:153) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.scripttransfer.HistoryRecordingScript.pop(HistoryRecordingScript.java:117) at de.uni_freiburg.informatik.ultimate.lib.smtlibutils.ManagedScript.pop(ManagedScript.java:138) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.MonolithicImplicationChecker.checkImplication(MonolithicImplicationChecker.java:86) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.compare(PredicateUnifier.java:947) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier$PredicateComparison.(PredicateUnifier.java:786) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate(PredicateUnifier.java:374) at de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicateForConjunction(PredicateUnifier.java:244) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.getOrConstructPredicate(DeterministicInterpolantAutomaton.java:282) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.DeterministicInterpolantAutomaton.constructSuccessorsAndTransitions(DeterministicInterpolantAutomaton.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:79) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.BasicAbstractInterpolantAutomaton.computeSuccs(BasicAbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:233) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.internalSuccessors(AbstractInterpolantAutomaton.java:1) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.TotalizeNwa.internalSuccessors(TotalizeNwa.java:246) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ComplementDeterministicNwa.internalSuccessors(ComplementDeterministicNwa.java:121) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:218) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.ProductNwa.internalSuccessors(ProductNwa.java:210) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1058) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:960) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:182) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.computeAutomataDifference(NwaCegarLoop.java:373) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.NwaCegarLoop.refineAbstraction(NwaCegarLoop.java:345) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.refineAbstractionInternal(AbstractCegarLoop.java:463) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:414) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.startCegar(AbstractCegarLoop.java:342) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.runCegar(AbstractCegarLoop.java:324) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.executeCegarLoop(TraceAbstractionStarter.java:429) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseProgram(TraceAbstractionStarter.java:315) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.analyseSequentialProgram(TraceAbstractionStarter.java:276) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:170) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:143) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:124) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:167) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:150) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:127) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:233) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:227) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:144) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:106) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:319) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:63) Caused by: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: EOF at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1518) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:701) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:383) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:258) ... 48 more [2024-11-13 13:24:44,864 INFO L158 Benchmark]: Toolchain (without parser) took 110458.12ms. Allocated memory was 117.4MB in the beginning and 813.7MB in the end (delta: 696.3MB). Free memory was 91.7MB in the beginning and 639.3MB in the end (delta: -547.6MB). Peak memory consumption was 151.8MB. Max. memory is 16.1GB. [2024-11-13 13:24:44,865 INFO L158 Benchmark]: CDTParser took 0.51ms. Allocated memory is still 117.4MB. Free memory is still 84.1MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 13:24:44,865 INFO L158 Benchmark]: CACSL2BoogieTranslator took 784.15ms. Allocated memory is still 117.4MB. Free memory was 91.5MB in the beginning and 59.9MB in the end (delta: 31.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2024-11-13 13:24:44,866 INFO L158 Benchmark]: Boogie Procedure Inliner took 142.53ms. Allocated memory is still 117.4MB. Free memory was 59.9MB in the beginning and 53.3MB in the end (delta: 6.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 13:24:44,866 INFO L158 Benchmark]: Boogie Preprocessor took 136.16ms. Allocated memory is still 117.4MB. Free memory was 53.2MB in the beginning and 45.9MB in the end (delta: 7.2MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 13:24:44,866 INFO L158 Benchmark]: RCFGBuilder took 1725.56ms. Allocated memory was 117.4MB in the beginning and 251.7MB in the end (delta: 134.2MB). Free memory was 45.9MB in the beginning and 173.0MB in the end (delta: -127.0MB). Peak memory consumption was 23.0MB. Max. memory is 16.1GB. [2024-11-13 13:24:44,867 INFO L158 Benchmark]: TraceAbstraction took 107657.51ms. Allocated memory was 251.7MB in the beginning and 813.7MB in the end (delta: 562.0MB). Free memory was 172.3MB in the beginning and 639.3MB in the end (delta: -467.0MB). Peak memory consumption was 98.6MB. Max. memory is 16.1GB. [2024-11-13 13:24:44,869 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.51ms. Allocated memory is still 117.4MB. Free memory is still 84.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 784.15ms. Allocated memory is still 117.4MB. Free memory was 91.5MB in the beginning and 59.9MB in the end (delta: 31.6MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 142.53ms. Allocated memory is still 117.4MB. Free memory was 59.9MB in the beginning and 53.3MB in the end (delta: 6.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 136.16ms. Allocated memory is still 117.4MB. Free memory was 53.2MB in the beginning and 45.9MB in the end (delta: 7.2MB). There was no memory consumed. Max. memory is 16.1GB. * RCFGBuilder took 1725.56ms. Allocated memory was 117.4MB in the beginning and 251.7MB in the end (delta: 134.2MB). Free memory was 45.9MB in the beginning and 173.0MB in the end (delta: -127.0MB). Peak memory consumption was 23.0MB. Max. memory is 16.1GB. * TraceAbstraction took 107657.51ms. Allocated memory was 251.7MB in the beginning and 813.7MB in the end (delta: 562.0MB). Free memory was 172.3MB in the beginning and 639.3MB in the end (delta: -467.0MB). Peak memory consumption was 98.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory") : de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:262) RESULT: Ultimate could not prove your program: Toolchain returned no result. Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: ERROR: ExceptionOrErrorResult: SMTLIBException: External (MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_3e9b8153-e5a0-4d5c-a7f7-0be084fd1edb/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1) with exit command (exit)) Received EOF on stdin. stderr output: (error "out of memory")