./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 15:35:17,523 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 15:35:17,610 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-13 15:35:17,617 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 15:35:17,619 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 15:35:17,657 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 15:35:17,658 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 15:35:17,659 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 15:35:17,659 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 15:35:17,660 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 15:35:17,660 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 15:35:17,660 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 15:35:17,660 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 15:35:17,660 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 15:35:17,660 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 15:35:17,660 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 15:35:17,660 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 15:35:17,661 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 15:35:17,661 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 15:35:17,662 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 15:35:17,662 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 15:35:17,663 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 15:35:17,663 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 15:35:17,663 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 [2024-11-13 15:35:17,953 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 15:35:17,968 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 15:35:17,970 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 15:35:17,972 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 15:35:17,972 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 15:35:17,974 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c Unable to find full path for "g++" [2024-11-13 15:35:19,827 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 15:35:20,145 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 15:35:20,146 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-13 15:35:20,156 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/6a74e18f5/f7ba23797a1e4c2697285e410faa50d3/FLAG69788212a [2024-11-13 15:35:20,416 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/6a74e18f5/f7ba23797a1e4c2697285e410faa50d3 [2024-11-13 15:35:20,419 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 15:35:20,422 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 15:35:20,424 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 15:35:20,424 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 15:35:20,429 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 15:35:20,430 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 03:35:20" (1/1) ... [2024-11-13 15:35:20,431 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32fa6300 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:20, skipping insertion in model container [2024-11-13 15:35:20,432 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 03:35:20" (1/1) ... [2024-11-13 15:35:20,483 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 15:35:20,665 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-13 15:35:20,868 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 15:35:20,878 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 15:35:20,886 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-13 15:35:20,993 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 15:35:21,007 INFO L204 MainTranslator]: Completed translation [2024-11-13 15:35:21,008 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21 WrapperNode [2024-11-13 15:35:21,008 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 15:35:21,009 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 15:35:21,009 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 15:35:21,009 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 15:35:21,016 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,039 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,236 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1382 [2024-11-13 15:35:21,237 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 15:35:21,237 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 15:35:21,237 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 15:35:21,238 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 15:35:21,247 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,248 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,272 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,394 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 15:35:21,394 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,394 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,454 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,474 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,505 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,515 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,552 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 15:35:21,554 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 15:35:21,555 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 15:35:21,555 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 15:35:21,556 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (1/1) ... [2024-11-13 15:35:21,561 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 15:35:21,573 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:35:21,586 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 15:35:21,591 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 15:35:21,619 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 15:35:21,619 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 15:35:21,619 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 15:35:21,620 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-13 15:35:21,621 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 15:35:21,621 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 15:35:21,897 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 15:35:21,899 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 15:35:24,183 INFO L? ?]: Removed 754 outVars from TransFormulas that were not future-live. [2024-11-13 15:35:24,183 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 15:35:24,203 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 15:35:24,203 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 15:35:24,204 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 03:35:24 BoogieIcfgContainer [2024-11-13 15:35:24,204 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 15:35:24,206 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 15:35:24,206 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 15:35:24,211 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 15:35:24,211 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 03:35:20" (1/3) ... [2024-11-13 15:35:24,212 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6142d4ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 03:35:24, skipping insertion in model container [2024-11-13 15:35:24,212 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:35:21" (2/3) ... [2024-11-13 15:35:24,213 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6142d4ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 03:35:24, skipping insertion in model container [2024-11-13 15:35:24,213 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 03:35:24" (3/3) ... [2024-11-13 15:35:24,214 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-13 15:35:24,231 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 15:35:24,235 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c that has 2 procedures, 392 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 15:35:24,315 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 15:35:24,331 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2d97d9ee, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 15:35:24,332 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 15:35:24,338 INFO L276 IsEmpty]: Start isEmpty. Operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:24,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 15:35:24,355 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:24,356 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:24,357 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:24,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:24,363 INFO L85 PathProgramCache]: Analyzing trace with hash -1934366869, now seen corresponding path program 1 times [2024-11-13 15:35:24,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:24,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507279799] [2024-11-13 15:35:24,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:24,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:24,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:24,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:24,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:24,881 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:24,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:24,884 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:24,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:24,892 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:24,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:24,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507279799] [2024-11-13 15:35:24,893 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507279799] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:24,893 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:24,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-13 15:35:24,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709557300] [2024-11-13 15:35:24,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:24,903 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-13 15:35:24,903 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:24,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-13 15:35:24,937 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 15:35:24,947 INFO L87 Difference]: Start difference. First operand has 392 states, 386 states have (on average 1.4922279792746114) internal successors, (576), 387 states have internal predecessors, (576), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:25,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:25,027 INFO L93 Difference]: Finished difference Result 711 states and 1061 transitions. [2024-11-13 15:35:25,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-13 15:35:25,029 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) Word has length 117 [2024-11-13 15:35:25,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:25,041 INFO L225 Difference]: With dead ends: 711 [2024-11-13 15:35:25,042 INFO L226 Difference]: Without dead ends: 389 [2024-11-13 15:35:25,048 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 15:35:25,055 INFO L432 NwaCegarLoop]: 577 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 577 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:25,056 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 577 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:35:25,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2024-11-13 15:35:25,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 389. [2024-11-13 15:35:25,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 384 states have (on average 1.4869791666666667) internal successors, (571), 384 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:25,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 577 transitions. [2024-11-13 15:35:25,121 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 577 transitions. Word has length 117 [2024-11-13 15:35:25,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:25,122 INFO L471 AbstractCegarLoop]: Abstraction has 389 states and 577 transitions. [2024-11-13 15:35:25,123 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 52.5) internal successors, (105), 2 states have internal predecessors, (105), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:25,123 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 577 transitions. [2024-11-13 15:35:25,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2024-11-13 15:35:25,127 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:25,128 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:25,129 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-13 15:35:25,129 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:25,129 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:25,130 INFO L85 PathProgramCache]: Analyzing trace with hash 504535717, now seen corresponding path program 1 times [2024-11-13 15:35:25,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:25,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947441412] [2024-11-13 15:35:25,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:25,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:25,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:26,516 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:26,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:26,520 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:26,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:26,523 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:26,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:26,526 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:26,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:26,526 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947441412] [2024-11-13 15:35:26,526 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947441412] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:26,527 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:26,527 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:26,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [289194119] [2024-11-13 15:35:26,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:26,530 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:26,530 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:26,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:26,534 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:26,534 INFO L87 Difference]: Start difference. First operand 389 states and 577 transitions. Second operand has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:26,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:26,601 INFO L93 Difference]: Finished difference Result 393 states and 581 transitions. [2024-11-13 15:35:26,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:26,601 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 117 [2024-11-13 15:35:26,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:26,604 INFO L225 Difference]: With dead ends: 393 [2024-11-13 15:35:26,604 INFO L226 Difference]: Without dead ends: 391 [2024-11-13 15:35:26,604 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:26,609 INFO L432 NwaCegarLoop]: 575 mSDtfsCounter, 0 mSDsluCounter, 1144 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1719 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:26,609 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1719 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:35:26,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-13 15:35:26,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-13 15:35:26,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4844559585492227) internal successors, (573), 386 states have internal predecessors, (573), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:26,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 579 transitions. [2024-11-13 15:35:26,642 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 579 transitions. Word has length 117 [2024-11-13 15:35:26,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:26,643 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 579 transitions. [2024-11-13 15:35:26,643 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.25) internal successors, (105), 4 states have internal predecessors, (105), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:26,643 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 579 transitions. [2024-11-13 15:35:26,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2024-11-13 15:35:26,645 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:26,645 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:26,645 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-13 15:35:26,645 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:26,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:26,646 INFO L85 PathProgramCache]: Analyzing trace with hash -1537566187, now seen corresponding path program 1 times [2024-11-13 15:35:26,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:26,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991275896] [2024-11-13 15:35:26,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:26,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:26,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:27,328 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:27,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:27,336 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:27,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:27,344 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:27,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:27,352 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:27,355 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:27,355 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991275896] [2024-11-13 15:35:27,355 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991275896] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:27,355 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:27,356 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:27,357 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [499259888] [2024-11-13 15:35:27,357 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:27,358 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:27,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:27,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:27,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:27,359 INFO L87 Difference]: Start difference. First operand 391 states and 579 transitions. Second operand has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:27,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:27,908 INFO L93 Difference]: Finished difference Result 971 states and 1441 transitions. [2024-11-13 15:35:27,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:35:27,909 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 118 [2024-11-13 15:35:27,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:27,913 INFO L225 Difference]: With dead ends: 971 [2024-11-13 15:35:27,913 INFO L226 Difference]: Without dead ends: 391 [2024-11-13 15:35:27,915 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2024-11-13 15:35:27,916 INFO L432 NwaCegarLoop]: 629 mSDtfsCounter, 1090 mSDsluCounter, 1058 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1090 SdHoareTripleChecker+Valid, 1687 SdHoareTripleChecker+Invalid, 275 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:27,916 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1090 Valid, 1687 Invalid, 275 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:35:27,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2024-11-13 15:35:27,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 391. [2024-11-13 15:35:27,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 391 states, 386 states have (on average 1.4818652849740932) internal successors, (572), 386 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:27,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 578 transitions. [2024-11-13 15:35:27,943 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 578 transitions. Word has length 118 [2024-11-13 15:35:27,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:27,944 INFO L471 AbstractCegarLoop]: Abstraction has 391 states and 578 transitions. [2024-11-13 15:35:27,944 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.2) internal successors, (106), 5 states have internal predecessors, (106), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:27,944 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 578 transitions. [2024-11-13 15:35:27,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2024-11-13 15:35:27,946 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:27,946 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:27,946 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-13 15:35:27,947 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:27,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:27,951 INFO L85 PathProgramCache]: Analyzing trace with hash 930225119, now seen corresponding path program 1 times [2024-11-13 15:35:27,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:27,951 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [674834018] [2024-11-13 15:35:27,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:27,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:28,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:28,450 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:28,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:28,453 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:28,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:28,457 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:28,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:28,461 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:28,461 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:28,461 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [674834018] [2024-11-13 15:35:28,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [674834018] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:28,462 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:28,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:28,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562904956] [2024-11-13 15:35:28,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:28,462 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:28,462 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:28,463 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:28,463 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:28,463 INFO L87 Difference]: Start difference. First operand 391 states and 578 transitions. Second operand has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:28,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:28,514 INFO L93 Difference]: Finished difference Result 714 states and 1055 transitions. [2024-11-13 15:35:28,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:28,515 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 119 [2024-11-13 15:35:28,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:28,519 INFO L225 Difference]: With dead ends: 714 [2024-11-13 15:35:28,519 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:28,519 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:28,522 INFO L432 NwaCegarLoop]: 574 mSDtfsCounter, 0 mSDsluCounter, 1138 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1712 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:28,523 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1712 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:35:28,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:28,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:28,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4793814432989691) internal successors, (574), 388 states have internal predecessors, (574), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:28,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 580 transitions. [2024-11-13 15:35:28,540 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 580 transitions. Word has length 119 [2024-11-13 15:35:28,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:28,541 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 580 transitions. [2024-11-13 15:35:28,541 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 26.75) internal successors, (107), 4 states have internal predecessors, (107), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:28,541 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 580 transitions. [2024-11-13 15:35:28,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2024-11-13 15:35:28,546 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:28,547 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:28,547 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-13 15:35:28,547 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:28,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:28,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1969209588, now seen corresponding path program 1 times [2024-11-13 15:35:28,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:28,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389776019] [2024-11-13 15:35:28,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:28,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:28,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,165 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:29,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,171 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:29,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,175 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:29,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,181 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:29,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:29,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389776019] [2024-11-13 15:35:29,182 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [389776019] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:29,182 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:29,182 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:29,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1478456729] [2024-11-13 15:35:29,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:29,183 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:29,184 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:29,184 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:29,184 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:29,185 INFO L87 Difference]: Start difference. First operand 393 states and 580 transitions. Second operand has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:29,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:29,282 INFO L93 Difference]: Finished difference Result 716 states and 1056 transitions. [2024-11-13 15:35:29,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:29,282 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 120 [2024-11-13 15:35:29,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:29,284 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:29,284 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:29,285 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:29,286 INFO L432 NwaCegarLoop]: 554 mSDtfsCounter, 487 mSDsluCounter, 556 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 487 SdHoareTripleChecker+Valid, 1110 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:29,286 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [487 Valid, 1110 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:29,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:29,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:29,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4742268041237114) internal successors, (572), 388 states have internal predecessors, (572), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:29,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 578 transitions. [2024-11-13 15:35:29,298 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 578 transitions. Word has length 120 [2024-11-13 15:35:29,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:29,299 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 578 transitions. [2024-11-13 15:35:29,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.0) internal successors, (108), 4 states have internal predecessors, (108), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:29,299 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 578 transitions. [2024-11-13 15:35:29,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2024-11-13 15:35:29,301 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:29,302 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:29,302 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-13 15:35:29,302 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:29,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:29,302 INFO L85 PathProgramCache]: Analyzing trace with hash -1008433679, now seen corresponding path program 1 times [2024-11-13 15:35:29,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:29,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493560212] [2024-11-13 15:35:29,302 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:29,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:29,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,792 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:29,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,801 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:29,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,806 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:29,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:29,811 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:29,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:29,812 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493560212] [2024-11-13 15:35:29,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [493560212] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:29,812 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:29,812 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:29,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [927821681] [2024-11-13 15:35:29,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:29,813 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:29,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:29,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:29,814 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:29,815 INFO L87 Difference]: Start difference. First operand 393 states and 578 transitions. Second operand has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:29,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:29,915 INFO L93 Difference]: Finished difference Result 716 states and 1052 transitions. [2024-11-13 15:35:29,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:29,916 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 122 [2024-11-13 15:35:29,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:29,919 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:29,919 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:29,920 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:29,920 INFO L432 NwaCegarLoop]: 554 mSDtfsCounter, 1041 mSDsluCounter, 556 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1044 SdHoareTripleChecker+Valid, 1110 SdHoareTripleChecker+Invalid, 41 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:29,921 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1044 Valid, 1110 Invalid, 41 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:29,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:29,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:29,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4716494845360826) internal successors, (571), 388 states have internal predecessors, (571), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:29,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 577 transitions. [2024-11-13 15:35:29,942 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 577 transitions. Word has length 122 [2024-11-13 15:35:29,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:29,943 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 577 transitions. [2024-11-13 15:35:29,947 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.0) internal successors, (110), 5 states have internal predecessors, (110), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:29,947 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 577 transitions. [2024-11-13 15:35:29,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2024-11-13 15:35:29,949 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:29,950 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:29,951 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-13 15:35:29,951 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:29,951 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:29,951 INFO L85 PathProgramCache]: Analyzing trace with hash 830697491, now seen corresponding path program 1 times [2024-11-13 15:35:29,951 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:29,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051525594] [2024-11-13 15:35:29,952 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:29,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:30,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:30,617 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:30,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:30,627 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:30,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:30,634 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:30,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:30,644 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:30,644 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:30,644 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051525594] [2024-11-13 15:35:30,644 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051525594] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:30,644 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:30,644 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:30,644 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [923051751] [2024-11-13 15:35:30,645 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:30,645 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:30,645 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:30,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:30,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:30,646 INFO L87 Difference]: Start difference. First operand 393 states and 577 transitions. Second operand has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:30,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:30,821 INFO L93 Difference]: Finished difference Result 716 states and 1050 transitions. [2024-11-13 15:35:30,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:30,822 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 123 [2024-11-13 15:35:30,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:30,824 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:30,824 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:30,825 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:30,826 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 478 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 478 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:30,826 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [478 Valid, 1064 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:30,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:30,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:30,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4690721649484537) internal successors, (570), 388 states have internal predecessors, (570), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:30,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 576 transitions. [2024-11-13 15:35:30,850 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 576 transitions. Word has length 123 [2024-11-13 15:35:30,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:30,850 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 576 transitions. [2024-11-13 15:35:30,850 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 27.75) internal successors, (111), 4 states have internal predecessors, (111), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:30,850 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 576 transitions. [2024-11-13 15:35:30,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2024-11-13 15:35:30,853 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:30,854 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:30,854 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-13 15:35:30,854 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:30,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:30,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1226913834, now seen corresponding path program 1 times [2024-11-13 15:35:30,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:30,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456644054] [2024-11-13 15:35:30,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:30,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:30,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,296 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:31,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,300 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:31,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,303 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:31,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,307 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:31,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:31,307 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456644054] [2024-11-13 15:35:31,307 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456644054] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:31,307 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:31,307 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:31,307 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300870009] [2024-11-13 15:35:31,307 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:31,308 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:31,308 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:31,308 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:31,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:31,308 INFO L87 Difference]: Start difference. First operand 393 states and 576 transitions. Second operand has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:31,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:31,464 INFO L93 Difference]: Finished difference Result 716 states and 1048 transitions. [2024-11-13 15:35:31,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:31,465 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 124 [2024-11-13 15:35:31,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:31,467 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:31,467 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:31,468 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:31,468 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 560 mSDsluCounter, 540 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 563 SdHoareTripleChecker+Valid, 1071 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:31,469 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [563 Valid, 1071 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:31,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:31,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:31,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4664948453608246) internal successors, (569), 388 states have internal predecessors, (569), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:31,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 575 transitions. [2024-11-13 15:35:31,490 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 575 transitions. Word has length 124 [2024-11-13 15:35:31,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:31,490 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 575 transitions. [2024-11-13 15:35:31,491 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.4) internal successors, (112), 5 states have internal predecessors, (112), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:31,491 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 575 transitions. [2024-11-13 15:35:31,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2024-11-13 15:35:31,492 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:31,493 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:31,493 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-13 15:35:31,493 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:31,493 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:31,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1835076396, now seen corresponding path program 1 times [2024-11-13 15:35:31,494 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:31,494 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140218299] [2024-11-13 15:35:31,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:31,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:31,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,897 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:31,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,901 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:31,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,905 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:31,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:31,912 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:31,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:31,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140218299] [2024-11-13 15:35:31,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2140218299] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:31,912 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:31,913 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:31,913 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [953717250] [2024-11-13 15:35:31,913 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:31,913 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:31,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:31,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:31,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:31,917 INFO L87 Difference]: Start difference. First operand 393 states and 575 transitions. Second operand has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:32,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:32,065 INFO L93 Difference]: Finished difference Result 716 states and 1046 transitions. [2024-11-13 15:35:32,066 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:32,066 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 125 [2024-11-13 15:35:32,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:32,069 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:32,069 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:32,070 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:32,071 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 1024 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1027 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 81 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:32,072 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1027 Valid, 1064 Invalid, 81 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:32,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:32,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:32,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4639175257731958) internal successors, (568), 388 states have internal predecessors, (568), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:32,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 574 transitions. [2024-11-13 15:35:32,086 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 574 transitions. Word has length 125 [2024-11-13 15:35:32,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:32,087 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 574 transitions. [2024-11-13 15:35:32,087 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.6) internal successors, (113), 5 states have internal predecessors, (113), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:32,087 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 574 transitions. [2024-11-13 15:35:32,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2024-11-13 15:35:32,092 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:32,093 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:32,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-13 15:35:32,093 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:32,093 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:32,094 INFO L85 PathProgramCache]: Analyzing trace with hash 130738915, now seen corresponding path program 1 times [2024-11-13 15:35:32,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:32,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925780909] [2024-11-13 15:35:32,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:32,094 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:32,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:32,496 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:32,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:32,499 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:32,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:32,504 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:32,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:32,509 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:32,509 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:32,509 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925780909] [2024-11-13 15:35:32,510 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925780909] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:32,510 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:32,510 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:32,510 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907060193] [2024-11-13 15:35:32,510 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:32,510 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:32,510 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:32,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:32,511 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:32,512 INFO L87 Difference]: Start difference. First operand 393 states and 574 transitions. Second operand has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:32,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:32,662 INFO L93 Difference]: Finished difference Result 716 states and 1044 transitions. [2024-11-13 15:35:32,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:32,665 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 126 [2024-11-13 15:35:32,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:32,668 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:32,668 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:32,668 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:32,669 INFO L432 NwaCegarLoop]: 531 mSDtfsCounter, 1016 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1019 SdHoareTripleChecker+Valid, 1064 SdHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:32,669 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1019 Valid, 1064 Invalid, 79 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:32,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:32,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:32,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.461340206185567) internal successors, (567), 388 states have internal predecessors, (567), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:32,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 573 transitions. [2024-11-13 15:35:32,684 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 573 transitions. Word has length 126 [2024-11-13 15:35:32,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:32,685 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 573 transitions. [2024-11-13 15:35:32,685 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 22.8) internal successors, (114), 5 states have internal predecessors, (114), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:32,685 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 573 transitions. [2024-11-13 15:35:32,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2024-11-13 15:35:32,687 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:32,687 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:32,687 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-13 15:35:32,688 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:32,688 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:32,688 INFO L85 PathProgramCache]: Analyzing trace with hash -1413439803, now seen corresponding path program 1 times [2024-11-13 15:35:32,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:32,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424697527] [2024-11-13 15:35:32,688 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:32,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:32,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,165 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:33,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,170 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 57 [2024-11-13 15:35:33,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,172 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 15:35:33,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,175 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:33,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:33,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424697527] [2024-11-13 15:35:33,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [424697527] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:33,175 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:33,176 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:33,176 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [414032008] [2024-11-13 15:35:33,176 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:33,176 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:33,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:33,177 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:33,177 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:33,177 INFO L87 Difference]: Start difference. First operand 393 states and 573 transitions. Second operand has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:33,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:33,279 INFO L93 Difference]: Finished difference Result 716 states and 1042 transitions. [2024-11-13 15:35:33,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:33,280 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 127 [2024-11-13 15:35:33,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:33,281 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:33,281 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:33,282 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:33,282 INFO L432 NwaCegarLoop]: 553 mSDtfsCounter, 518 mSDsluCounter, 555 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1108 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:33,283 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1108 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:33,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:33,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:33,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.458762886597938) internal successors, (566), 388 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:33,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 572 transitions. [2024-11-13 15:35:33,296 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 572 transitions. Word has length 127 [2024-11-13 15:35:33,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:33,297 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 572 transitions. [2024-11-13 15:35:33,297 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.75) internal successors, (115), 4 states have internal predecessors, (115), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:33,297 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 572 transitions. [2024-11-13 15:35:33,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2024-11-13 15:35:33,298 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:33,298 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:33,298 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-13 15:35:33,299 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:33,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:33,299 INFO L85 PathProgramCache]: Analyzing trace with hash -12372935, now seen corresponding path program 1 times [2024-11-13 15:35:33,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:33,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [231783116] [2024-11-13 15:35:33,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:33,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:33,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,874 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:33,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,878 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 15:35:33,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,883 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 15:35:33,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:33,888 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:33,888 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:33,888 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [231783116] [2024-11-13 15:35:33,888 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [231783116] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:33,888 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:33,888 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:33,889 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1855343986] [2024-11-13 15:35:33,889 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:33,889 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:33,889 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:33,889 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:33,890 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:33,890 INFO L87 Difference]: Start difference. First operand 393 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:34,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:34,038 INFO L93 Difference]: Finished difference Result 716 states and 1040 transitions. [2024-11-13 15:35:34,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:34,038 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 128 [2024-11-13 15:35:34,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:34,040 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:34,040 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:34,041 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:34,041 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 473 mSDsluCounter, 532 mSDsCounter, 0 mSdLazyCounter, 76 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 473 SdHoareTripleChecker+Valid, 1062 SdHoareTripleChecker+Invalid, 76 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 76 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:34,042 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [473 Valid, 1062 Invalid, 76 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 76 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:34,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:34,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:34,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4561855670103092) internal successors, (565), 388 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:34,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 571 transitions. [2024-11-13 15:35:34,056 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 571 transitions. Word has length 128 [2024-11-13 15:35:34,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:34,056 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 571 transitions. [2024-11-13 15:35:34,057 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.2) internal successors, (116), 5 states have internal predecessors, (116), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:34,057 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 571 transitions. [2024-11-13 15:35:34,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2024-11-13 15:35:34,058 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:34,058 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:34,058 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-13 15:35:34,058 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:34,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:34,059 INFO L85 PathProgramCache]: Analyzing trace with hash -1411160021, now seen corresponding path program 1 times [2024-11-13 15:35:34,059 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:34,059 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [913025174] [2024-11-13 15:35:34,059 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:34,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:34,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:34,699 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:34,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:34,705 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 15:35:34,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:34,712 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 15:35:34,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:34,721 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:34,721 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:34,722 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [913025174] [2024-11-13 15:35:34,722 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [913025174] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:34,722 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:34,722 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:34,722 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3723017] [2024-11-13 15:35:34,722 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:34,723 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:34,723 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:34,723 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:34,724 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:34,724 INFO L87 Difference]: Start difference. First operand 393 states and 571 transitions. Second operand has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:34,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:34,893 INFO L93 Difference]: Finished difference Result 716 states and 1038 transitions. [2024-11-13 15:35:34,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:34,894 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 129 [2024-11-13 15:35:34,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:34,896 INFO L225 Difference]: With dead ends: 716 [2024-11-13 15:35:34,896 INFO L226 Difference]: Without dead ends: 393 [2024-11-13 15:35:34,896 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:34,897 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 469 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 469 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 74 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:34,897 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [469 Valid, 1069 Invalid, 74 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:34,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2024-11-13 15:35:34,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 393. [2024-11-13 15:35:34,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 388 states have (on average 1.4536082474226804) internal successors, (564), 388 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:34,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 570 transitions. [2024-11-13 15:35:34,912 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 570 transitions. Word has length 129 [2024-11-13 15:35:34,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:34,912 INFO L471 AbstractCegarLoop]: Abstraction has 393 states and 570 transitions. [2024-11-13 15:35:34,913 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.4) internal successors, (117), 5 states have internal predecessors, (117), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:34,913 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 570 transitions. [2024-11-13 15:35:34,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2024-11-13 15:35:34,914 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:34,914 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:34,914 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-13 15:35:34,914 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:34,914 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:34,915 INFO L85 PathProgramCache]: Analyzing trace with hash -970409222, now seen corresponding path program 1 times [2024-11-13 15:35:34,915 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:34,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270324014] [2024-11-13 15:35:34,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:34,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:35,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:35,667 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:35,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:35,669 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 15:35:35,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:35,672 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 15:35:35,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:35,674 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:35,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:35,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270324014] [2024-11-13 15:35:35,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270324014] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:35,675 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:35,675 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:35,675 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255701898] [2024-11-13 15:35:35,675 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:35,675 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:35,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:35,676 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:35,676 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:35,676 INFO L87 Difference]: Start difference. First operand 393 states and 570 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:35,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:35,954 INFO L93 Difference]: Finished difference Result 722 states and 1044 transitions. [2024-11-13 15:35:35,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 15:35:35,955 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 130 [2024-11-13 15:35:35,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:35,957 INFO L225 Difference]: With dead ends: 722 [2024-11-13 15:35:35,957 INFO L226 Difference]: Without dead ends: 397 [2024-11-13 15:35:35,958 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:35,959 INFO L432 NwaCegarLoop]: 560 mSDtfsCounter, 2 mSDsluCounter, 1527 mSDsCounter, 0 mSdLazyCounter, 176 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 2087 SdHoareTripleChecker+Invalid, 176 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 176 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:35,959 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 2087 Invalid, 176 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 176 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 15:35:35,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2024-11-13 15:35:35,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 395. [2024-11-13 15:35:35,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4512820512820512) internal successors, (566), 390 states have internal predecessors, (566), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:35,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 572 transitions. [2024-11-13 15:35:35,974 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 572 transitions. Word has length 130 [2024-11-13 15:35:35,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:35,974 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 572 transitions. [2024-11-13 15:35:35,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:35,975 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 572 transitions. [2024-11-13 15:35:35,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2024-11-13 15:35:35,976 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:35,976 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:35,976 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-13 15:35:35,976 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:35,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:35,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1963964559, now seen corresponding path program 1 times [2024-11-13 15:35:35,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:35,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1667306614] [2024-11-13 15:35:35,977 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:35,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:36,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:36,501 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:36,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:36,506 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 15:35:36,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:36,510 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 15:35:36,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:36,515 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:36,516 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:36,516 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1667306614] [2024-11-13 15:35:36,516 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1667306614] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:36,516 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:36,516 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:36,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634704536] [2024-11-13 15:35:36,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:36,517 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:36,517 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:36,517 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:36,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:36,518 INFO L87 Difference]: Start difference. First operand 395 states and 572 transitions. Second operand has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:36,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:36,675 INFO L93 Difference]: Finished difference Result 720 states and 1040 transitions. [2024-11-13 15:35:36,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:36,676 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 131 [2024-11-13 15:35:36,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:36,677 INFO L225 Difference]: With dead ends: 720 [2024-11-13 15:35:36,677 INFO L226 Difference]: Without dead ends: 395 [2024-11-13 15:35:36,678 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:36,678 INFO L432 NwaCegarLoop]: 530 mSDtfsCounter, 467 mSDsluCounter, 539 mSDsCounter, 0 mSdLazyCounter, 72 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 467 SdHoareTripleChecker+Valid, 1069 SdHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 72 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:36,679 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [467 Valid, 1069 Invalid, 72 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 72 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:36,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2024-11-13 15:35:36,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2024-11-13 15:35:36,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4487179487179487) internal successors, (565), 390 states have internal predecessors, (565), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:36,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 571 transitions. [2024-11-13 15:35:36,693 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 571 transitions. Word has length 131 [2024-11-13 15:35:36,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:36,693 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 571 transitions. [2024-11-13 15:35:36,693 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.8) internal successors, (119), 5 states have internal predecessors, (119), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:36,693 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 571 transitions. [2024-11-13 15:35:36,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2024-11-13 15:35:36,695 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:36,695 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:36,695 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-13 15:35:36,695 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:36,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:36,696 INFO L85 PathProgramCache]: Analyzing trace with hash -1513937355, now seen corresponding path program 1 times [2024-11-13 15:35:36,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:36,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096329901] [2024-11-13 15:35:36,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:36,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:36,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:37,069 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:37,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:37,072 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 58 [2024-11-13 15:35:37,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:37,077 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 70 [2024-11-13 15:35:37,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:37,081 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:37,081 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:37,082 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096329901] [2024-11-13 15:35:37,083 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096329901] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:37,083 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:37,083 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:37,083 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607277146] [2024-11-13 15:35:37,083 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:37,084 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:37,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:37,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:37,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:37,087 INFO L87 Difference]: Start difference. First operand 395 states and 571 transitions. Second operand has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:37,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:37,177 INFO L93 Difference]: Finished difference Result 720 states and 1038 transitions. [2024-11-13 15:35:37,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:37,178 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) Word has length 132 [2024-11-13 15:35:37,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:37,180 INFO L225 Difference]: With dead ends: 720 [2024-11-13 15:35:37,180 INFO L226 Difference]: Without dead ends: 395 [2024-11-13 15:35:37,181 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:37,182 INFO L432 NwaCegarLoop]: 550 mSDtfsCounter, 513 mSDsluCounter, 552 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1102 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:37,182 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1102 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:37,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2024-11-13 15:35:37,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 395. [2024-11-13 15:35:37,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 395 states, 390 states have (on average 1.4461538461538461) internal successors, (564), 390 states have internal predecessors, (564), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:37,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 570 transitions. [2024-11-13 15:35:37,199 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 570 transitions. Word has length 132 [2024-11-13 15:35:37,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:37,200 INFO L471 AbstractCegarLoop]: Abstraction has 395 states and 570 transitions. [2024-11-13 15:35:37,200 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.0) internal successors, (120), 4 states have internal predecessors, (120), 2 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 2 states have call predecessors, (3), 2 states have call successors, (3) [2024-11-13 15:35:37,200 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 570 transitions. [2024-11-13 15:35:37,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2024-11-13 15:35:37,201 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:37,202 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:37,202 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-13 15:35:37,202 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:37,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:37,202 INFO L85 PathProgramCache]: Analyzing trace with hash -946071650, now seen corresponding path program 1 times [2024-11-13 15:35:37,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:37,202 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184550329] [2024-11-13 15:35:37,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:37,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:37,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:38,112 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:38,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:38,115 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:38,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:38,118 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:38,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:38,122 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:38,123 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:38,123 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184550329] [2024-11-13 15:35:38,123 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [184550329] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:38,123 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:38,123 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:38,123 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1010650736] [2024-11-13 15:35:38,123 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:38,125 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:38,125 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:38,126 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:38,127 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:38,127 INFO L87 Difference]: Start difference. First operand 395 states and 570 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:38,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:38,210 INFO L93 Difference]: Finished difference Result 766 states and 1093 transitions. [2024-11-13 15:35:38,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 15:35:38,211 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 133 [2024-11-13 15:35:38,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:38,213 INFO L225 Difference]: With dead ends: 766 [2024-11-13 15:35:38,213 INFO L226 Difference]: Without dead ends: 441 [2024-11-13 15:35:38,214 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:38,214 INFO L432 NwaCegarLoop]: 558 mSDtfsCounter, 19 mSDsluCounter, 1665 mSDsCounter, 0 mSdLazyCounter, 32 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 2223 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 32 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:38,215 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [19 Valid, 2223 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 32 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:35:38,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2024-11-13 15:35:38,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 439. [2024-11-13 15:35:38,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 439 states, 434 states have (on average 1.4216589861751152) internal successors, (617), 434 states have internal predecessors, (617), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:38,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 439 states to 439 states and 623 transitions. [2024-11-13 15:35:38,238 INFO L78 Accepts]: Start accepts. Automaton has 439 states and 623 transitions. Word has length 133 [2024-11-13 15:35:38,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:38,238 INFO L471 AbstractCegarLoop]: Abstraction has 439 states and 623 transitions. [2024-11-13 15:35:38,239 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:38,239 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 623 transitions. [2024-11-13 15:35:38,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-13 15:35:38,241 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:38,241 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:38,241 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-13 15:35:38,241 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:38,242 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:38,242 INFO L85 PathProgramCache]: Analyzing trace with hash 1645437340, now seen corresponding path program 1 times [2024-11-13 15:35:38,242 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:38,242 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725924091] [2024-11-13 15:35:38,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:38,242 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:38,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,008 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:39,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,012 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:39,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,015 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:39,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,018 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:39,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:39,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725924091] [2024-11-13 15:35:39,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1725924091] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:39,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:39,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:39,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418648271] [2024-11-13 15:35:39,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:39,020 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:39,020 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:39,020 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:39,020 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:39,021 INFO L87 Difference]: Start difference. First operand 439 states and 623 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:39,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:39,494 INFO L93 Difference]: Finished difference Result 812 states and 1148 transitions. [2024-11-13 15:35:39,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 15:35:39,494 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-13 15:35:39,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:39,497 INFO L225 Difference]: With dead ends: 812 [2024-11-13 15:35:39,497 INFO L226 Difference]: Without dead ends: 443 [2024-11-13 15:35:39,498 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:39,499 INFO L432 NwaCegarLoop]: 414 mSDtfsCounter, 481 mSDsluCounter, 807 mSDsCounter, 0 mSdLazyCounter, 463 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 481 SdHoareTripleChecker+Valid, 1221 SdHoareTripleChecker+Invalid, 463 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 463 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:39,499 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [481 Valid, 1221 Invalid, 463 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 463 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:35:39,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 443 states. [2024-11-13 15:35:39,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 443 to 441. [2024-11-13 15:35:39,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 441 states, 436 states have (on average 1.4197247706422018) internal successors, (619), 436 states have internal predecessors, (619), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:39,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 625 transitions. [2024-11-13 15:35:39,515 INFO L78 Accepts]: Start accepts. Automaton has 441 states and 625 transitions. Word has length 134 [2024-11-13 15:35:39,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:39,517 INFO L471 AbstractCegarLoop]: Abstraction has 441 states and 625 transitions. [2024-11-13 15:35:39,517 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:39,517 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 625 transitions. [2024-11-13 15:35:39,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2024-11-13 15:35:39,519 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:39,520 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:39,520 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-13 15:35:39,520 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:39,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:39,521 INFO L85 PathProgramCache]: Analyzing trace with hash -1796888029, now seen corresponding path program 1 times [2024-11-13 15:35:39,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:39,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386799424] [2024-11-13 15:35:39,521 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:39,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:39,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,965 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:39,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,967 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:39,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,970 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:39,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:39,972 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:39,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:39,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386799424] [2024-11-13 15:35:39,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1386799424] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:39,972 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:39,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:39,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200025427] [2024-11-13 15:35:39,973 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:39,974 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:39,974 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:39,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:39,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:39,976 INFO L87 Difference]: Start difference. First operand 441 states and 625 transitions. Second operand has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:40,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:40,258 INFO L93 Difference]: Finished difference Result 816 states and 1150 transitions. [2024-11-13 15:35:40,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:40,259 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 134 [2024-11-13 15:35:40,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:40,261 INFO L225 Difference]: With dead ends: 816 [2024-11-13 15:35:40,261 INFO L226 Difference]: Without dead ends: 441 [2024-11-13 15:35:40,261 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:40,262 INFO L432 NwaCegarLoop]: 559 mSDtfsCounter, 2 mSDsluCounter, 968 mSDsCounter, 0 mSdLazyCounter, 161 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 1527 SdHoareTripleChecker+Invalid, 161 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 161 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:40,262 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 1527 Invalid, 161 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 161 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 15:35:40,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2024-11-13 15:35:40,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 441. [2024-11-13 15:35:40,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 441 states, 436 states have (on average 1.415137614678899) internal successors, (617), 436 states have internal predecessors, (617), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:35:40,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 623 transitions. [2024-11-13 15:35:40,278 INFO L78 Accepts]: Start accepts. Automaton has 441 states and 623 transitions. Word has length 134 [2024-11-13 15:35:40,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:40,278 INFO L471 AbstractCegarLoop]: Abstraction has 441 states and 623 transitions. [2024-11-13 15:35:40,279 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 30.5) internal successors, (122), 4 states have internal predecessors, (122), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:40,279 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 623 transitions. [2024-11-13 15:35:40,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2024-11-13 15:35:40,280 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:40,280 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:40,280 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-13 15:35:40,281 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:40,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:40,281 INFO L85 PathProgramCache]: Analyzing trace with hash -265694730, now seen corresponding path program 1 times [2024-11-13 15:35:40,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:40,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228026932] [2024-11-13 15:35:40,281 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:40,281 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:40,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:41,106 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:41,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:41,110 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:41,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:41,116 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:41,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:41,120 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:35:41,120 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:41,120 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228026932] [2024-11-13 15:35:41,121 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1228026932] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:41,121 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:41,121 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:35:41,121 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1501545128] [2024-11-13 15:35:41,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:41,121 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:35:41,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:41,122 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:35:41,122 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:41,122 INFO L87 Difference]: Start difference. First operand 441 states and 623 transitions. Second operand has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:41,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:41,288 INFO L93 Difference]: Finished difference Result 980 states and 1364 transitions. [2024-11-13 15:35:41,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:35:41,288 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 135 [2024-11-13 15:35:41,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:41,291 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:41,292 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:41,292 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:35:41,293 INFO L432 NwaCegarLoop]: 551 mSDtfsCounter, 856 mSDsluCounter, 1647 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 859 SdHoareTripleChecker+Valid, 2198 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:41,296 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [859 Valid, 2198 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:41,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:41,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:41,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3843594009983362) internal successors, (832), 601 states have internal predecessors, (832), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:41,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 844 transitions. [2024-11-13 15:35:41,327 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 844 transitions. Word has length 135 [2024-11-13 15:35:41,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:41,327 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 844 transitions. [2024-11-13 15:35:41,328 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 20.5) internal successors, (123), 6 states have internal predecessors, (123), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:35:41,328 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 844 transitions. [2024-11-13 15:35:41,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2024-11-13 15:35:41,334 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:41,335 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:41,335 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-13 15:35:41,335 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:41,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:41,336 INFO L85 PathProgramCache]: Analyzing trace with hash 1416781402, now seen corresponding path program 1 times [2024-11-13 15:35:41,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:41,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705031924] [2024-11-13 15:35:41,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:41,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:41,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,163 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:42,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,165 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:42,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,168 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:42,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,172 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 232 [2024-11-13 15:35:42,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,178 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248 [2024-11-13 15:35:42,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,180 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260 [2024-11-13 15:35:42,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:42,183 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:42,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:42,184 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705031924] [2024-11-13 15:35:42,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [705031924] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:42,184 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:42,184 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:42,184 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822730748] [2024-11-13 15:35:42,184 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:42,186 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:42,186 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:42,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:42,188 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:42,188 INFO L87 Difference]: Start difference. First operand 609 states and 844 transitions. Second operand has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:42,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:42,330 INFO L93 Difference]: Finished difference Result 980 states and 1363 transitions. [2024-11-13 15:35:42,330 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:42,330 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 324 [2024-11-13 15:35:42,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:42,334 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:42,335 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:42,336 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:42,338 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 936 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 939 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:42,338 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [939 Valid, 1058 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:42,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:42,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:42,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.382695507487521) internal successors, (831), 601 states have internal predecessors, (831), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:42,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 843 transitions. [2024-11-13 15:35:42,365 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 843 transitions. Word has length 324 [2024-11-13 15:35:42,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:42,365 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 843 transitions. [2024-11-13 15:35:42,366 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.4) internal successors, (297), 5 states have internal predecessors, (297), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:42,366 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 843 transitions. [2024-11-13 15:35:42,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2024-11-13 15:35:42,370 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:42,371 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:42,371 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-13 15:35:42,371 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:42,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:42,372 INFO L85 PathProgramCache]: Analyzing trace with hash -14832564, now seen corresponding path program 1 times [2024-11-13 15:35:42,373 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:42,373 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564800903] [2024-11-13 15:35:42,373 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:42,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:42,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,201 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:43,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,205 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:43,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,209 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:43,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 233 [2024-11-13 15:35:43,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,215 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 15:35:43,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,218 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 261 [2024-11-13 15:35:43,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:43,222 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:43,222 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:43,222 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564800903] [2024-11-13 15:35:43,222 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1564800903] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:43,222 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:43,222 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:43,223 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [932537714] [2024-11-13 15:35:43,223 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:43,224 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:43,224 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:43,225 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:43,225 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:43,225 INFO L87 Difference]: Start difference. First operand 609 states and 843 transitions. Second operand has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:43,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:43,376 INFO L93 Difference]: Finished difference Result 980 states and 1361 transitions. [2024-11-13 15:35:43,376 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:43,377 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 325 [2024-11-13 15:35:43,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:43,381 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:43,381 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:43,382 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:43,383 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 506 mSDsluCounter, 537 mSDsCounter, 0 mSdLazyCounter, 68 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 509 SdHoareTripleChecker+Valid, 1065 SdHoareTripleChecker+Invalid, 69 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 68 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:43,384 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [509 Valid, 1065 Invalid, 69 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 68 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:43,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:43,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:43,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3810316139767056) internal successors, (830), 601 states have internal predecessors, (830), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:43,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 842 transitions. [2024-11-13 15:35:43,417 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 842 transitions. Word has length 325 [2024-11-13 15:35:43,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:43,418 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 842 transitions. [2024-11-13 15:35:43,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:43,419 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 842 transitions. [2024-11-13 15:35:43,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2024-11-13 15:35:43,425 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:43,425 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:43,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-13 15:35:43,426 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:43,426 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:43,426 INFO L85 PathProgramCache]: Analyzing trace with hash -1326096113, now seen corresponding path program 1 times [2024-11-13 15:35:43,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:43,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534607609] [2024-11-13 15:35:43,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:43,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:43,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,251 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:44,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,255 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:44,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,258 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:44,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,261 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 234 [2024-11-13 15:35:44,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,263 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250 [2024-11-13 15:35:44,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,265 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262 [2024-11-13 15:35:44,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:44,268 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:44,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:44,268 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534607609] [2024-11-13 15:35:44,268 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [534607609] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:44,268 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:44,268 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:44,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885917347] [2024-11-13 15:35:44,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:44,269 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:44,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:44,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:44,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:44,271 INFO L87 Difference]: Start difference. First operand 609 states and 842 transitions. Second operand has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:44,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:44,403 INFO L93 Difference]: Finished difference Result 980 states and 1359 transitions. [2024-11-13 15:35:44,403 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:44,403 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 326 [2024-11-13 15:35:44,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:44,406 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:44,406 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:44,407 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:44,408 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 904 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 66 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 907 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 67 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 66 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:44,408 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [907 Valid, 1058 Invalid, 67 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 66 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:44,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:44,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:44,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3793677204658903) internal successors, (829), 601 states have internal predecessors, (829), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:44,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 841 transitions. [2024-11-13 15:35:44,437 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 841 transitions. Word has length 326 [2024-11-13 15:35:44,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:44,437 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 841 transitions. [2024-11-13 15:35:44,438 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.8) internal successors, (299), 5 states have internal predecessors, (299), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:44,438 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 841 transitions. [2024-11-13 15:35:44,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2024-11-13 15:35:44,443 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:44,444 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:44,444 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-13 15:35:44,444 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:44,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:44,445 INFO L85 PathProgramCache]: Analyzing trace with hash 1287865569, now seen corresponding path program 1 times [2024-11-13 15:35:44,445 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:44,445 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [436979505] [2024-11-13 15:35:44,445 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:44,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:44,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,328 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:45,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,333 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:45,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,337 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:45,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,341 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 235 [2024-11-13 15:35:45,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,342 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251 [2024-11-13 15:35:45,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,344 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263 [2024-11-13 15:35:45,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:45,348 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:45,348 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:45,348 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [436979505] [2024-11-13 15:35:45,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [436979505] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:45,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:45,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:45,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1659649688] [2024-11-13 15:35:45,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:45,349 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:45,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:45,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:45,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:45,351 INFO L87 Difference]: Start difference. First operand 609 states and 841 transitions. Second operand has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:45,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:45,480 INFO L93 Difference]: Finished difference Result 980 states and 1357 transitions. [2024-11-13 15:35:45,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:45,481 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 327 [2024-11-13 15:35:45,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:45,484 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:45,484 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:45,485 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:45,485 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 888 mSDsluCounter, 530 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 891 SdHoareTripleChecker+Valid, 1058 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:45,486 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [891 Valid, 1058 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:45,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:45,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:45,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.377703826955075) internal successors, (828), 601 states have internal predecessors, (828), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:45,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 840 transitions. [2024-11-13 15:35:45,511 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 840 transitions. Word has length 327 [2024-11-13 15:35:45,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:45,512 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 840 transitions. [2024-11-13 15:35:45,512 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.0) internal successors, (300), 5 states have internal predecessors, (300), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:45,512 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 840 transitions. [2024-11-13 15:35:45,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2024-11-13 15:35:45,517 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:45,517 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:45,518 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-13 15:35:45,518 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:45,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:45,518 INFO L85 PathProgramCache]: Analyzing trace with hash 735995716, now seen corresponding path program 1 times [2024-11-13 15:35:45,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:45,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1060337106] [2024-11-13 15:35:45,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:45,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:45,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,364 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:46,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,367 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:46,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,370 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:46,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,373 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 236 [2024-11-13 15:35:46,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,374 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252 [2024-11-13 15:35:46,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,376 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264 [2024-11-13 15:35:46,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:46,379 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:46,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:46,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1060337106] [2024-11-13 15:35:46,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1060337106] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:46,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:46,380 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:46,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402204806] [2024-11-13 15:35:46,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:46,380 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:46,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:46,381 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:46,381 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:46,382 INFO L87 Difference]: Start difference. First operand 609 states and 840 transitions. Second operand has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:46,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:46,480 INFO L93 Difference]: Finished difference Result 980 states and 1355 transitions. [2024-11-13 15:35:46,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:46,481 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 328 [2024-11-13 15:35:46,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:46,484 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:46,484 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:46,485 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:46,485 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 475 mSDsluCounter, 549 mSDsCounter, 0 mSdLazyCounter, 38 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 478 SdHoareTripleChecker+Valid, 1089 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 38 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:46,487 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [478 Valid, 1089 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 38 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:46,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:46,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:46,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3760399334442597) internal successors, (827), 601 states have internal predecessors, (827), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:46,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 839 transitions. [2024-11-13 15:35:46,514 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 839 transitions. Word has length 328 [2024-11-13 15:35:46,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:46,514 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 839 transitions. [2024-11-13 15:35:46,515 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.2) internal successors, (301), 5 states have internal predecessors, (301), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:46,515 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 839 transitions. [2024-11-13 15:35:46,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 330 [2024-11-13 15:35:46,520 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:46,520 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:46,520 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-13 15:35:46,521 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:46,521 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:46,521 INFO L85 PathProgramCache]: Analyzing trace with hash 13990134, now seen corresponding path program 1 times [2024-11-13 15:35:46,521 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:46,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659788701] [2024-11-13 15:35:46,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:46,522 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:46,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,423 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:47,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,427 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:47,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,431 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:47,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,435 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 237 [2024-11-13 15:35:47,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,438 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 15:35:47,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265 [2024-11-13 15:35:47,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:47,445 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:47,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:47,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [659788701] [2024-11-13 15:35:47,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [659788701] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:47,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:47,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:47,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142567501] [2024-11-13 15:35:47,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:47,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:47,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:47,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:47,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:47,449 INFO L87 Difference]: Start difference. First operand 609 states and 839 transitions. Second operand has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:47,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:47,555 INFO L93 Difference]: Finished difference Result 980 states and 1353 transitions. [2024-11-13 15:35:47,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:47,556 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 329 [2024-11-13 15:35:47,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:47,559 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:47,560 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:47,561 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:47,562 INFO L432 NwaCegarLoop]: 540 mSDtfsCounter, 849 mSDsluCounter, 542 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 852 SdHoareTripleChecker+Valid, 1082 SdHoareTripleChecker+Invalid, 37 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:47,563 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [852 Valid, 1082 Invalid, 37 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:47,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:47,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:47,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3743760399334441) internal successors, (826), 601 states have internal predecessors, (826), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:47,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 838 transitions. [2024-11-13 15:35:47,593 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 838 transitions. Word has length 329 [2024-11-13 15:35:47,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:47,594 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 838 transitions. [2024-11-13 15:35:47,594 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.4) internal successors, (302), 5 states have internal predecessors, (302), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:47,594 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 838 transitions. [2024-11-13 15:35:47,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2024-11-13 15:35:47,601 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:47,601 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:47,601 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-13 15:35:47,603 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:47,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:47,603 INFO L85 PathProgramCache]: Analyzing trace with hash 252686585, now seen corresponding path program 1 times [2024-11-13 15:35:47,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:47,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [234632263] [2024-11-13 15:35:47,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:47,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:47,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,537 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:48,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,540 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:48,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,543 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:48,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,545 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 238 [2024-11-13 15:35:48,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,547 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 15:35:48,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,549 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266 [2024-11-13 15:35:48,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:48,553 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:48,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:48,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [234632263] [2024-11-13 15:35:48,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [234632263] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:48,555 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:48,555 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:48,555 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1661655733] [2024-11-13 15:35:48,555 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:48,556 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:48,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:48,557 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:48,557 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:48,557 INFO L87 Difference]: Start difference. First operand 609 states and 838 transitions. Second operand has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:48,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:48,992 INFO L93 Difference]: Finished difference Result 980 states and 1351 transitions. [2024-11-13 15:35:48,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:48,993 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 330 [2024-11-13 15:35:48,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:48,996 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:48,996 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:48,997 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:48,998 INFO L432 NwaCegarLoop]: 401 mSDtfsCounter, 826 mSDsluCounter, 403 mSDsCounter, 0 mSdLazyCounter, 312 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 829 SdHoareTripleChecker+Valid, 804 SdHoareTripleChecker+Invalid, 313 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 312 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:48,999 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [829 Valid, 804 Invalid, 313 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 312 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:35:49,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:49,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:49,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3727121464226288) internal successors, (825), 601 states have internal predecessors, (825), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:49,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 837 transitions. [2024-11-13 15:35:49,026 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 837 transitions. Word has length 330 [2024-11-13 15:35:49,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:49,026 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 837 transitions. [2024-11-13 15:35:49,026 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:49,027 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 837 transitions. [2024-11-13 15:35:49,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2024-11-13 15:35:49,032 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:49,033 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:49,034 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2024-11-13 15:35:49,034 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:49,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:49,034 INFO L85 PathProgramCache]: Analyzing trace with hash 1816692875, now seen corresponding path program 1 times [2024-11-13 15:35:49,035 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:49,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108644037] [2024-11-13 15:35:49,035 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:49,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:49,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,468 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:50,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,471 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:50,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,474 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:50,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,476 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 239 [2024-11-13 15:35:50,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,480 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 15:35:50,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,483 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267 [2024-11-13 15:35:50,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:50,485 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:50,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:50,486 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108644037] [2024-11-13 15:35:50,486 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [108644037] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:50,486 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:50,486 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 15:35:50,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443425293] [2024-11-13 15:35:50,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:50,487 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:35:50,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:50,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:35:50,488 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 15:35:50,488 INFO L87 Difference]: Start difference. First operand 609 states and 837 transitions. Second operand has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:50,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:50,568 INFO L93 Difference]: Finished difference Result 980 states and 1349 transitions. [2024-11-13 15:35:50,569 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:50,569 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 331 [2024-11-13 15:35:50,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:50,572 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:50,572 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:50,573 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:50,574 INFO L432 NwaCegarLoop]: 539 mSDtfsCounter, 381 mSDsluCounter, 541 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 381 SdHoareTripleChecker+Valid, 1080 SdHoareTripleChecker+Invalid, 34 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:50,575 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [381 Valid, 1080 Invalid, 34 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:35:50,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:50,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:50,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3710482529118135) internal successors, (824), 601 states have internal predecessors, (824), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:50,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 836 transitions. [2024-11-13 15:35:50,610 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 836 transitions. Word has length 331 [2024-11-13 15:35:50,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:50,611 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 836 transitions. [2024-11-13 15:35:50,611 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.0) internal successors, (304), 4 states have internal predecessors, (304), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:50,611 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 836 transitions. [2024-11-13 15:35:50,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2024-11-13 15:35:50,616 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:50,617 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:50,617 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-13 15:35:50,617 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:50,617 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:50,617 INFO L85 PathProgramCache]: Analyzing trace with hash -1121222933, now seen corresponding path program 1 times [2024-11-13 15:35:50,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:50,618 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131895492] [2024-11-13 15:35:50,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:50,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:51,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,914 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:51,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,918 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:51,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,922 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:51,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,926 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240 [2024-11-13 15:35:51,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,928 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 15:35:51,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,930 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268 [2024-11-13 15:35:51,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:51,933 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:51,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:51,934 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131895492] [2024-11-13 15:35:51,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1131895492] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:51,934 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:51,934 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:51,934 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1582236897] [2024-11-13 15:35:51,934 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:51,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:51,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:51,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:51,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:51,937 INFO L87 Difference]: Start difference. First operand 609 states and 836 transitions. Second operand has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:52,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:52,091 INFO L93 Difference]: Finished difference Result 980 states and 1347 transitions. [2024-11-13 15:35:52,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:52,091 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 332 [2024-11-13 15:35:52,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:52,094 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:52,094 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:52,095 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:52,097 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 861 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 62 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 861 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 62 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:52,098 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [861 Valid, 1050 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 62 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:52,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:52,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:52,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3693843594009982) internal successors, (823), 601 states have internal predecessors, (823), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:52,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 835 transitions. [2024-11-13 15:35:52,123 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 835 transitions. Word has length 332 [2024-11-13 15:35:52,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:52,124 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 835 transitions. [2024-11-13 15:35:52,124 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.0) internal successors, (305), 5 states have internal predecessors, (305), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:52,125 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 835 transitions. [2024-11-13 15:35:52,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 334 [2024-11-13 15:35:52,130 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:52,130 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:52,131 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-13 15:35:52,131 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:52,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:52,131 INFO L85 PathProgramCache]: Analyzing trace with hash -1635772725, now seen corresponding path program 1 times [2024-11-13 15:35:52,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:52,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800614139] [2024-11-13 15:35:52,132 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:52,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:52,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,589 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:53,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,592 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:53,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,595 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:53,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,598 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 241 [2024-11-13 15:35:53,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,600 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 15:35:53,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,601 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269 [2024-11-13 15:35:53,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:53,604 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:53,605 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:53,605 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800614139] [2024-11-13 15:35:53,605 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [800614139] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:53,605 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:53,605 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:53,605 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [178071632] [2024-11-13 15:35:53,605 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:53,606 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:53,606 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:53,607 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:53,607 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:53,607 INFO L87 Difference]: Start difference. First operand 609 states and 835 transitions. Second operand has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:53,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:53,742 INFO L93 Difference]: Finished difference Result 980 states and 1345 transitions. [2024-11-13 15:35:53,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:53,743 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 333 [2024-11-13 15:35:53,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:53,746 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:53,746 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:53,746 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:53,747 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 453 mSDsluCounter, 533 mSDsCounter, 0 mSdLazyCounter, 60 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 453 SdHoareTripleChecker+Valid, 1057 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 60 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:53,747 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [453 Valid, 1057 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 60 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:53,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:53,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:53,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.367720465890183) internal successors, (822), 601 states have internal predecessors, (822), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:53,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 834 transitions. [2024-11-13 15:35:53,767 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 834 transitions. Word has length 333 [2024-11-13 15:35:53,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:53,767 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 834 transitions. [2024-11-13 15:35:53,767 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.2) internal successors, (306), 5 states have internal predecessors, (306), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:53,768 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 834 transitions. [2024-11-13 15:35:53,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2024-11-13 15:35:53,770 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:53,770 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:53,770 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-13 15:35:53,771 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:53,771 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:53,771 INFO L85 PathProgramCache]: Analyzing trace with hash -646254406, now seen corresponding path program 1 times [2024-11-13 15:35:53,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:53,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93564604] [2024-11-13 15:35:53,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:53,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:54,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,017 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:55,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,021 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:55,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,024 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:55,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,027 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 242 [2024-11-13 15:35:55,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,028 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258 [2024-11-13 15:35:55,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,030 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 270 [2024-11-13 15:35:55,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:55,033 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:55,033 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:55,033 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93564604] [2024-11-13 15:35:55,033 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [93564604] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:55,033 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:55,033 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:35:55,034 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [767382810] [2024-11-13 15:35:55,034 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:55,035 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:35:55,035 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:55,036 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:35:55,037 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:35:55,037 INFO L87 Difference]: Start difference. First operand 609 states and 834 transitions. Second operand has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:55,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:55,177 INFO L93 Difference]: Finished difference Result 980 states and 1343 transitions. [2024-11-13 15:35:55,177 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:35:55,178 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 334 [2024-11-13 15:35:55,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:55,181 INFO L225 Difference]: With dead ends: 980 [2024-11-13 15:35:55,181 INFO L226 Difference]: Without dead ends: 609 [2024-11-13 15:35:55,182 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:55,183 INFO L432 NwaCegarLoop]: 524 mSDtfsCounter, 841 mSDsluCounter, 526 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 841 SdHoareTripleChecker+Valid, 1050 SdHoareTripleChecker+Invalid, 58 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:55,185 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [841 Valid, 1050 Invalid, 58 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:35:55,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 609 states. [2024-11-13 15:35:55,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 609 to 609. [2024-11-13 15:35:55,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 609 states, 601 states have (on average 1.3660565723793676) internal successors, (821), 601 states have internal predecessors, (821), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:35:55,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 609 states to 609 states and 833 transitions. [2024-11-13 15:35:55,209 INFO L78 Accepts]: Start accepts. Automaton has 609 states and 833 transitions. Word has length 334 [2024-11-13 15:35:55,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:55,210 INFO L471 AbstractCegarLoop]: Abstraction has 609 states and 833 transitions. [2024-11-13 15:35:55,210 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 61.4) internal successors, (307), 5 states have internal predecessors, (307), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:55,210 INFO L276 IsEmpty]: Start isEmpty. Operand 609 states and 833 transitions. [2024-11-13 15:35:55,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 336 [2024-11-13 15:35:55,213 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:55,214 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:55,214 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2024-11-13 15:35:55,214 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:55,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:55,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1591163324, now seen corresponding path program 1 times [2024-11-13 15:35:55,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:55,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506137222] [2024-11-13 15:35:55,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:55,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:56,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,639 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:56,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,642 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:56,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,644 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:56,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,646 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 243 [2024-11-13 15:35:56,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,648 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 259 [2024-11-13 15:35:56,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,650 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 15:35:56,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:56,653 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:56,653 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:56,653 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506137222] [2024-11-13 15:35:56,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [506137222] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:56,653 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:56,654 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:35:56,654 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808860033] [2024-11-13 15:35:56,654 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:56,654 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:35:56,655 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:56,655 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:35:56,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:56,656 INFO L87 Difference]: Start difference. First operand 609 states and 833 transitions. Second operand has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:57,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:35:57,376 INFO L93 Difference]: Finished difference Result 1423 states and 1954 transitions. [2024-11-13 15:35:57,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:35:57,377 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 335 [2024-11-13 15:35:57,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:35:57,381 INFO L225 Difference]: With dead ends: 1423 [2024-11-13 15:35:57,381 INFO L226 Difference]: Without dead ends: 1052 [2024-11-13 15:35:57,383 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:35:57,383 INFO L432 NwaCegarLoop]: 544 mSDtfsCounter, 348 mSDsluCounter, 1977 mSDsCounter, 0 mSdLazyCounter, 607 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 351 SdHoareTripleChecker+Valid, 2521 SdHoareTripleChecker+Invalid, 615 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 607 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 15:35:57,384 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [351 Valid, 2521 Invalid, 615 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 607 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 15:35:57,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1052 states. [2024-11-13 15:35:57,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1052 to 936. [2024-11-13 15:35:57,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 936 states, 925 states have (on average 1.3621621621621622) internal successors, (1260), 925 states have internal predecessors, (1260), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 15:35:57,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 936 states to 936 states and 1278 transitions. [2024-11-13 15:35:57,423 INFO L78 Accepts]: Start accepts. Automaton has 936 states and 1278 transitions. Word has length 335 [2024-11-13 15:35:57,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:35:57,424 INFO L471 AbstractCegarLoop]: Abstraction has 936 states and 1278 transitions. [2024-11-13 15:35:57,424 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.333333333333336) internal successors, (308), 6 states have internal predecessors, (308), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:35:57,425 INFO L276 IsEmpty]: Start isEmpty. Operand 936 states and 1278 transitions. [2024-11-13 15:35:57,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-13 15:35:57,428 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:35:57,428 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:35:57,428 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2024-11-13 15:35:57,429 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:35:57,429 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:35:57,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1614923872, now seen corresponding path program 1 times [2024-11-13 15:35:57,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:35:57,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986172941] [2024-11-13 15:35:57,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:35:57,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:35:58,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 43 [2024-11-13 15:35:59,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,283 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 59 [2024-11-13 15:35:59,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,286 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 71 [2024-11-13 15:35:59,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,289 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244 [2024-11-13 15:35:59,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,291 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260 [2024-11-13 15:35:59,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,292 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 15:35:59,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:35:59,295 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 84 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:35:59,295 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:35:59,295 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986172941] [2024-11-13 15:35:59,296 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1986172941] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:35:59,296 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:35:59,296 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:35:59,296 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [98520433] [2024-11-13 15:35:59,296 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:35:59,297 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:35:59,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:35:59,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:35:59,298 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:35:59,298 INFO L87 Difference]: Start difference. First operand 936 states and 1278 transitions. Second operand has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:00,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:00,030 INFO L93 Difference]: Finished difference Result 1330 states and 1820 transitions. [2024-11-13 15:36:00,031 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:00,031 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 336 [2024-11-13 15:36:00,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:00,035 INFO L225 Difference]: With dead ends: 1330 [2024-11-13 15:36:00,035 INFO L226 Difference]: Without dead ends: 959 [2024-11-13 15:36:00,036 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:36:00,037 INFO L432 NwaCegarLoop]: 398 mSDtfsCounter, 766 mSDsluCounter, 1178 mSDsCounter, 0 mSdLazyCounter, 631 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 769 SdHoareTripleChecker+Valid, 1576 SdHoareTripleChecker+Invalid, 631 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 631 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:00,037 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [769 Valid, 1576 Invalid, 631 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 631 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 15:36:00,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 959 states. [2024-11-13 15:36:00,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 959 to 937. [2024-11-13 15:36:00,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 937 states, 926 states have (on average 1.3617710583153348) internal successors, (1261), 926 states have internal predecessors, (1261), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 15:36:00,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 937 states to 937 states and 1279 transitions. [2024-11-13 15:36:00,089 INFO L78 Accepts]: Start accepts. Automaton has 937 states and 1279 transitions. Word has length 336 [2024-11-13 15:36:00,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:00,090 INFO L471 AbstractCegarLoop]: Abstraction has 937 states and 1279 transitions. [2024-11-13 15:36:00,090 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 51.5) internal successors, (309), 6 states have internal predecessors, (309), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:00,090 INFO L276 IsEmpty]: Start isEmpty. Operand 937 states and 1279 transitions. [2024-11-13 15:36:00,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2024-11-13 15:36:00,093 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:00,093 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:00,093 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2024-11-13 15:36:00,093 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:00,094 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:00,094 INFO L85 PathProgramCache]: Analyzing trace with hash -390800339, now seen corresponding path program 1 times [2024-11-13 15:36:00,094 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:00,094 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181854844] [2024-11-13 15:36:00,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:00,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:01,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,685 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 15:36:02,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,687 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 15:36:02,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,689 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 15:36:02,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,691 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 244 [2024-11-13 15:36:02,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,692 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 260 [2024-11-13 15:36:02,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,695 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 15:36:02,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:02,697 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 138 trivial. 0 not checked. [2024-11-13 15:36:02,697 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:02,697 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1181854844] [2024-11-13 15:36:02,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1181854844] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:02,697 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:02,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 15:36:02,698 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562197889] [2024-11-13 15:36:02,698 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:02,699 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 15:36:02,699 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:02,699 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 15:36:02,700 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:36:02,700 INFO L87 Difference]: Start difference. First operand 937 states and 1279 transitions. Second operand has 7 states, 7 states have (on average 33.857142857142854) internal successors, (237), 7 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:03,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:03,388 INFO L93 Difference]: Finished difference Result 1779 states and 2417 transitions. [2024-11-13 15:36:03,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:03,389 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.857142857142854) internal successors, (237), 7 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 336 [2024-11-13 15:36:03,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:03,392 INFO L225 Difference]: With dead ends: 1779 [2024-11-13 15:36:03,393 INFO L226 Difference]: Without dead ends: 949 [2024-11-13 15:36:03,394 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-13 15:36:03,395 INFO L432 NwaCegarLoop]: 391 mSDtfsCounter, 1042 mSDsluCounter, 1166 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1045 SdHoareTripleChecker+Valid, 1557 SdHoareTripleChecker+Invalid, 655 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:03,395 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1045 Valid, 1557 Invalid, 655 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 15:36:03,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 949 states. [2024-11-13 15:36:03,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 949 to 943. [2024-11-13 15:36:03,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 943 states, 932 states have (on average 1.3562231759656653) internal successors, (1264), 932 states have internal predecessors, (1264), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 15:36:03,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 943 states to 943 states and 1282 transitions. [2024-11-13 15:36:03,435 INFO L78 Accepts]: Start accepts. Automaton has 943 states and 1282 transitions. Word has length 336 [2024-11-13 15:36:03,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:03,436 INFO L471 AbstractCegarLoop]: Abstraction has 943 states and 1282 transitions. [2024-11-13 15:36:03,436 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.857142857142854) internal successors, (237), 7 states have internal predecessors, (237), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:03,436 INFO L276 IsEmpty]: Start isEmpty. Operand 943 states and 1282 transitions. [2024-11-13 15:36:03,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 339 [2024-11-13 15:36:03,439 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:03,440 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:03,440 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-13 15:36:03,440 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:03,440 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:03,441 INFO L85 PathProgramCache]: Analyzing trace with hash 264224577, now seen corresponding path program 1 times [2024-11-13 15:36:03,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:03,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924887218] [2024-11-13 15:36:03,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:03,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:04,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,589 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:05,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,593 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 15:36:05,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,597 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 15:36:05,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,600 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 246 [2024-11-13 15:36:05,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,602 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 262 [2024-11-13 15:36:05,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,604 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 15:36:05,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:05,607 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-13 15:36:05,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:05,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924887218] [2024-11-13 15:36:05,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924887218] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:05,607 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:05,608 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 15:36:05,608 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690557933] [2024-11-13 15:36:05,608 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:05,609 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 15:36:05,609 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:05,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 15:36:05,610 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2024-11-13 15:36:05,610 INFO L87 Difference]: Start difference. First operand 943 states and 1282 transitions. Second operand has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:05,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:05,853 INFO L93 Difference]: Finished difference Result 2126 states and 2883 transitions. [2024-11-13 15:36:05,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 15:36:05,853 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 338 [2024-11-13 15:36:05,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:05,859 INFO L225 Difference]: With dead ends: 2126 [2024-11-13 15:36:05,859 INFO L226 Difference]: Without dead ends: 1635 [2024-11-13 15:36:05,861 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:36:05,861 INFO L432 NwaCegarLoop]: 1267 mSDtfsCounter, 829 mSDsluCounter, 5977 mSDsCounter, 0 mSdLazyCounter, 164 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 832 SdHoareTripleChecker+Valid, 7244 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 164 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:05,863 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [832 Valid, 7244 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 164 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 15:36:05,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1635 states. [2024-11-13 15:36:05,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1635 to 1012. [2024-11-13 15:36:05,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1012 states, 998 states have (on average 1.3587174348697395) internal successors, (1356), 998 states have internal predecessors, (1356), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 15:36:05,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1012 states to 1012 states and 1380 transitions. [2024-11-13 15:36:05,904 INFO L78 Accepts]: Start accepts. Automaton has 1012 states and 1380 transitions. Word has length 338 [2024-11-13 15:36:05,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:05,905 INFO L471 AbstractCegarLoop]: Abstraction has 1012 states and 1380 transitions. [2024-11-13 15:36:05,905 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 32.5) internal successors, (260), 8 states have internal predecessors, (260), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:05,905 INFO L276 IsEmpty]: Start isEmpty. Operand 1012 states and 1380 transitions. [2024-11-13 15:36:05,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2024-11-13 15:36:05,908 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:05,908 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:05,909 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-13 15:36:05,909 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:05,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:05,909 INFO L85 PathProgramCache]: Analyzing trace with hash 2025188781, now seen corresponding path program 1 times [2024-11-13 15:36:05,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:05,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159630316] [2024-11-13 15:36:05,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:05,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:07,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,130 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 15:36:08,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,134 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 15:36:08,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,137 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 15:36:08,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,141 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 247 [2024-11-13 15:36:08,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,142 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 263 [2024-11-13 15:36:08,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,144 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 15:36:08,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:08,147 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2024-11-13 15:36:08,147 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:08,147 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159630316] [2024-11-13 15:36:08,147 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [159630316] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:08,147 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:08,147 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-13 15:36:08,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140017953] [2024-11-13 15:36:08,148 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:08,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 15:36:08,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:08,149 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 15:36:08,149 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2024-11-13 15:36:08,149 INFO L87 Difference]: Start difference. First operand 1012 states and 1380 transitions. Second operand has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:09,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:09,138 INFO L93 Difference]: Finished difference Result 2518 states and 3403 transitions. [2024-11-13 15:36:09,138 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 15:36:09,138 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 339 [2024-11-13 15:36:09,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:09,144 INFO L225 Difference]: With dead ends: 2518 [2024-11-13 15:36:09,144 INFO L226 Difference]: Without dead ends: 1878 [2024-11-13 15:36:09,146 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 15:36:09,146 INFO L432 NwaCegarLoop]: 416 mSDtfsCounter, 1289 mSDsluCounter, 1986 mSDsCounter, 0 mSdLazyCounter, 970 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1292 SdHoareTripleChecker+Valid, 2402 SdHoareTripleChecker+Invalid, 970 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 970 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:09,146 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1292 Valid, 2402 Invalid, 970 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 970 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-13 15:36:09,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1878 states. [2024-11-13 15:36:09,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1878 to 1870. [2024-11-13 15:36:09,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1870 states, 1844 states have (on average 1.3503253796095445) internal successors, (2490), 1844 states have internal predecessors, (2490), 24 states have call successors, (24), 1 states have call predecessors, (24), 1 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-13 15:36:09,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1870 states to 1870 states and 2538 transitions. [2024-11-13 15:36:09,203 INFO L78 Accepts]: Start accepts. Automaton has 1870 states and 2538 transitions. Word has length 339 [2024-11-13 15:36:09,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:09,204 INFO L471 AbstractCegarLoop]: Abstraction has 1870 states and 2538 transitions. [2024-11-13 15:36:09,204 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 35.25) internal successors, (282), 8 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:09,204 INFO L276 IsEmpty]: Start isEmpty. Operand 1870 states and 2538 transitions. [2024-11-13 15:36:09,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-13 15:36:09,209 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:09,209 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:09,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-13 15:36:09,209 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:09,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:09,210 INFO L85 PathProgramCache]: Analyzing trace with hash -2002348361, now seen corresponding path program 1 times [2024-11-13 15:36:09,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:09,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983343743] [2024-11-13 15:36:09,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:09,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:10,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,773 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 44 [2024-11-13 15:36:10,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,775 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 15:36:10,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,776 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 72 [2024-11-13 15:36:10,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,778 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 248 [2024-11-13 15:36:10,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,781 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 264 [2024-11-13 15:36:10,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,786 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 15:36:10,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:10,789 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 139 trivial. 0 not checked. [2024-11-13 15:36:10,789 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:10,789 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983343743] [2024-11-13 15:36:10,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983343743] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:10,789 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:10,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:36:10,793 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42008477] [2024-11-13 15:36:10,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:10,794 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:36:10,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:10,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:36:10,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:36:10,799 INFO L87 Difference]: Start difference. First operand 1870 states and 2538 transitions. Second operand has 6 states, 6 states have (on average 40.166666666666664) internal successors, (241), 6 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:11,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:11,371 INFO L93 Difference]: Finished difference Result 1880 states and 2546 transitions. [2024-11-13 15:36:11,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:11,371 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 40.166666666666664) internal successors, (241), 6 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 341 [2024-11-13 15:36:11,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:11,375 INFO L225 Difference]: With dead ends: 1880 [2024-11-13 15:36:11,375 INFO L226 Difference]: Without dead ends: 1020 [2024-11-13 15:36:11,376 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:36:11,377 INFO L432 NwaCegarLoop]: 391 mSDtfsCounter, 511 mSDsluCounter, 1166 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 514 SdHoareTripleChecker+Valid, 1557 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:11,377 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [514 Valid, 1557 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 15:36:11,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1020 states. [2024-11-13 15:36:11,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1020 to 1016. [2024-11-13 15:36:11,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1016 states, 1002 states have (on average 1.3572854291417165) internal successors, (1360), 1002 states have internal predecessors, (1360), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 15:36:11,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1016 states to 1016 states and 1384 transitions. [2024-11-13 15:36:11,419 INFO L78 Accepts]: Start accepts. Automaton has 1016 states and 1384 transitions. Word has length 341 [2024-11-13 15:36:11,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:11,419 INFO L471 AbstractCegarLoop]: Abstraction has 1016 states and 1384 transitions. [2024-11-13 15:36:11,419 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 40.166666666666664) internal successors, (241), 6 states have internal predecessors, (241), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:11,419 INFO L276 IsEmpty]: Start isEmpty. Operand 1016 states and 1384 transitions. [2024-11-13 15:36:11,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 342 [2024-11-13 15:36:11,424 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:11,424 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:11,425 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2024-11-13 15:36:11,425 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:11,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:11,425 INFO L85 PathProgramCache]: Analyzing trace with hash 615740921, now seen corresponding path program 1 times [2024-11-13 15:36:11,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:11,426 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531887474] [2024-11-13 15:36:11,426 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:11,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:12,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,429 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:13,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,432 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 15:36:13,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,436 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 73 [2024-11-13 15:36:13,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,439 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 15:36:13,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 265 [2024-11-13 15:36:13,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,442 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 277 [2024-11-13 15:36:13,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:13,445 INFO L134 CoverageAnalysis]: Checked inductivity of 146 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2024-11-13 15:36:13,445 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:13,445 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531887474] [2024-11-13 15:36:13,445 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [531887474] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:13,445 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:13,445 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-13 15:36:13,445 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274178522] [2024-11-13 15:36:13,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:13,446 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 15:36:13,446 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:13,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 15:36:13,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2024-11-13 15:36:13,447 INFO L87 Difference]: Start difference. First operand 1016 states and 1384 transitions. Second operand has 10 states, 10 states have (on average 27.1) internal successors, (271), 10 states have internal predecessors, (271), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:14,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:14,661 INFO L93 Difference]: Finished difference Result 2475 states and 3332 transitions. [2024-11-13 15:36:14,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-13 15:36:14,662 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 27.1) internal successors, (271), 10 states have internal predecessors, (271), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 341 [2024-11-13 15:36:14,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:14,667 INFO L225 Difference]: With dead ends: 2475 [2024-11-13 15:36:14,667 INFO L226 Difference]: Without dead ends: 1758 [2024-11-13 15:36:14,668 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2024-11-13 15:36:14,669 INFO L432 NwaCegarLoop]: 623 mSDtfsCounter, 2151 mSDsluCounter, 2745 mSDsCounter, 0 mSdLazyCounter, 1483 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2152 SdHoareTripleChecker+Valid, 3368 SdHoareTripleChecker+Invalid, 1490 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 1483 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:14,669 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2152 Valid, 3368 Invalid, 1490 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 1483 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2024-11-13 15:36:14,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1758 states. [2024-11-13 15:36:14,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1758 to 1132. [2024-11-13 15:36:14,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1132 states, 1114 states have (on average 1.3680430879712746) internal successors, (1524), 1114 states have internal predecessors, (1524), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 15:36:14,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1132 states to 1132 states and 1556 transitions. [2024-11-13 15:36:14,708 INFO L78 Accepts]: Start accepts. Automaton has 1132 states and 1556 transitions. Word has length 341 [2024-11-13 15:36:14,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:14,709 INFO L471 AbstractCegarLoop]: Abstraction has 1132 states and 1556 transitions. [2024-11-13 15:36:14,709 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 27.1) internal successors, (271), 10 states have internal predecessors, (271), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:14,709 INFO L276 IsEmpty]: Start isEmpty. Operand 1132 states and 1556 transitions. [2024-11-13 15:36:14,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 344 [2024-11-13 15:36:14,712 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:14,713 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:14,713 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2024-11-13 15:36:14,713 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:14,713 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:14,713 INFO L85 PathProgramCache]: Analyzing trace with hash -872040147, now seen corresponding path program 1 times [2024-11-13 15:36:14,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:14,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916173694] [2024-11-13 15:36:14,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:14,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:15,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,221 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:16,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,223 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 61 [2024-11-13 15:36:16,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 74 [2024-11-13 15:36:16,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,226 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 250 [2024-11-13 15:36:16,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 266 [2024-11-13 15:36:16,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 279 [2024-11-13 15:36:16,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:16,232 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2024-11-13 15:36:16,232 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:16,232 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916173694] [2024-11-13 15:36:16,232 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1916173694] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:16,232 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:16,232 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 15:36:16,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660931594] [2024-11-13 15:36:16,232 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:16,233 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 15:36:16,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:16,233 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 15:36:16,234 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:36:16,235 INFO L87 Difference]: Start difference. First operand 1132 states and 1556 transitions. Second operand has 7 states, 7 states have (on average 36.285714285714285) internal successors, (254), 7 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:16,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:16,760 INFO L93 Difference]: Finished difference Result 2083 states and 2856 transitions. [2024-11-13 15:36:16,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:16,760 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 36.285714285714285) internal successors, (254), 7 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 343 [2024-11-13 15:36:16,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:16,764 INFO L225 Difference]: With dead ends: 2083 [2024-11-13 15:36:16,764 INFO L226 Difference]: Without dead ends: 1148 [2024-11-13 15:36:16,766 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-13 15:36:16,766 INFO L432 NwaCegarLoop]: 390 mSDtfsCounter, 538 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 540 SdHoareTripleChecker+Valid, 1560 SdHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:16,766 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [540 Valid, 1560 Invalid, 652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 15:36:16,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1148 states. [2024-11-13 15:36:16,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1148 to 1140. [2024-11-13 15:36:16,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1140 states, 1122 states have (on average 1.3618538324420677) internal successors, (1528), 1122 states have internal predecessors, (1528), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 15:36:16,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1560 transitions. [2024-11-13 15:36:16,798 INFO L78 Accepts]: Start accepts. Automaton has 1140 states and 1560 transitions. Word has length 343 [2024-11-13 15:36:16,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:16,798 INFO L471 AbstractCegarLoop]: Abstraction has 1140 states and 1560 transitions. [2024-11-13 15:36:16,798 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 36.285714285714285) internal successors, (254), 7 states have internal predecessors, (254), 2 states have call successors, (4), 1 states have call predecessors, (4), 1 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:16,799 INFO L276 IsEmpty]: Start isEmpty. Operand 1140 states and 1560 transitions. [2024-11-13 15:36:16,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 346 [2024-11-13 15:36:16,802 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:16,802 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:16,802 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2024-11-13 15:36:16,803 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:16,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:16,803 INFO L85 PathProgramCache]: Analyzing trace with hash -743085205, now seen corresponding path program 1 times [2024-11-13 15:36:16,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:16,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [648690663] [2024-11-13 15:36:16,803 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:16,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:17,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,522 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:18,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,525 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2024-11-13 15:36:18,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,527 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 75 [2024-11-13 15:36:18,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,528 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 251 [2024-11-13 15:36:18,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,530 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 268 [2024-11-13 15:36:18,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,531 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 281 [2024-11-13 15:36:18,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:18,533 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2024-11-13 15:36:18,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:18,534 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [648690663] [2024-11-13 15:36:18,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [648690663] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:18,534 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:18,534 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:36:18,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881629965] [2024-11-13 15:36:18,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:18,535 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:36:18,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:18,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:36:18,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:36:18,536 INFO L87 Difference]: Start difference. First operand 1140 states and 1560 transitions. Second operand has 6 states, 6 states have (on average 44.0) internal successors, (264), 6 states have internal predecessors, (264), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 15:36:19,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:19,025 INFO L93 Difference]: Finished difference Result 2046 states and 2789 transitions. [2024-11-13 15:36:19,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:19,025 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 44.0) internal successors, (264), 6 states have internal predecessors, (264), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 345 [2024-11-13 15:36:19,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:19,030 INFO L225 Difference]: With dead ends: 2046 [2024-11-13 15:36:19,030 INFO L226 Difference]: Without dead ends: 1172 [2024-11-13 15:36:19,031 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:36:19,032 INFO L432 NwaCegarLoop]: 389 mSDtfsCounter, 488 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 489 SdHoareTripleChecker+Valid, 1549 SdHoareTripleChecker+Invalid, 652 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:19,032 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [489 Valid, 1549 Invalid, 652 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:36:19,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1172 states. [2024-11-13 15:36:19,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1172 to 1144. [2024-11-13 15:36:19,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1144 states, 1126 states have (on average 1.3428063943161634) internal successors, (1512), 1126 states have internal predecessors, (1512), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 15:36:19,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1144 states to 1144 states and 1544 transitions. [2024-11-13 15:36:19,066 INFO L78 Accepts]: Start accepts. Automaton has 1144 states and 1544 transitions. Word has length 345 [2024-11-13 15:36:19,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:19,066 INFO L471 AbstractCegarLoop]: Abstraction has 1144 states and 1544 transitions. [2024-11-13 15:36:19,067 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 44.0) internal successors, (264), 6 states have internal predecessors, (264), 2 states have call successors, (5), 1 states have call predecessors, (5), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-13 15:36:19,067 INFO L276 IsEmpty]: Start isEmpty. Operand 1144 states and 1544 transitions. [2024-11-13 15:36:19,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2024-11-13 15:36:19,070 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:19,070 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:19,071 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2024-11-13 15:36:19,071 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:19,071 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:19,071 INFO L85 PathProgramCache]: Analyzing trace with hash 2083245869, now seen corresponding path program 1 times [2024-11-13 15:36:19,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:19,072 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608291677] [2024-11-13 15:36:19,072 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:19,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:20,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,739 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:20,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,741 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 62 [2024-11-13 15:36:20,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,743 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 76 [2024-11-13 15:36:20,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,744 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 252 [2024-11-13 15:36:20,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,747 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 269 [2024-11-13 15:36:20,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,748 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 283 [2024-11-13 15:36:20,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:20,750 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 85 proven. 4 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:20,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:20,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608291677] [2024-11-13 15:36:20,750 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608291677] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:20,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1067276384] [2024-11-13 15:36:20,750 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:20,751 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:20,751 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:20,753 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:20,755 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 15:36:22,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:22,082 INFO L255 TraceCheckSpWp]: Trace formula consists of 2061 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-11-13 15:36:22,107 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:22,427 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 108 trivial. 0 not checked. [2024-11-13 15:36:22,427 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:36:22,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1067276384] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:22,428 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:36:22,428 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2024-11-13 15:36:22,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [679868984] [2024-11-13 15:36:22,428 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:22,429 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:36:22,429 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:22,429 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:36:22,429 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 15:36:22,430 INFO L87 Difference]: Start difference. First operand 1144 states and 1544 transitions. Second operand has 6 states, 6 states have (on average 43.333333333333336) internal successors, (260), 6 states have internal predecessors, (260), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:22,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:22,968 INFO L93 Difference]: Finished difference Result 2081 states and 2799 transitions. [2024-11-13 15:36:22,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:22,968 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 43.333333333333336) internal successors, (260), 6 states have internal predecessors, (260), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 347 [2024-11-13 15:36:22,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:22,972 INFO L225 Difference]: With dead ends: 2081 [2024-11-13 15:36:22,972 INFO L226 Difference]: Without dead ends: 1152 [2024-11-13 15:36:22,974 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 358 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2024-11-13 15:36:22,974 INFO L432 NwaCegarLoop]: 389 mSDtfsCounter, 489 mSDsluCounter, 1160 mSDsCounter, 0 mSdLazyCounter, 650 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 491 SdHoareTripleChecker+Valid, 1549 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 650 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:22,974 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [491 Valid, 1549 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 650 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-13 15:36:22,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1152 states. [2024-11-13 15:36:23,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1152 to 1148. [2024-11-13 15:36:23,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1148 states, 1130 states have (on average 1.3415929203539823) internal successors, (1516), 1130 states have internal predecessors, (1516), 16 states have call successors, (16), 1 states have call predecessors, (16), 1 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-13 15:36:23,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1148 states to 1148 states and 1548 transitions. [2024-11-13 15:36:23,004 INFO L78 Accepts]: Start accepts. Automaton has 1148 states and 1548 transitions. Word has length 347 [2024-11-13 15:36:23,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:23,005 INFO L471 AbstractCegarLoop]: Abstraction has 1148 states and 1548 transitions. [2024-11-13 15:36:23,005 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 43.333333333333336) internal successors, (260), 6 states have internal predecessors, (260), 2 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:23,005 INFO L276 IsEmpty]: Start isEmpty. Operand 1148 states and 1548 transitions. [2024-11-13 15:36:23,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-13 15:36:23,008 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:23,009 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:23,036 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 15:36:23,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:23,209 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:23,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:23,210 INFO L85 PathProgramCache]: Analyzing trace with hash 568587949, now seen corresponding path program 1 times [2024-11-13 15:36:23,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:23,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1652584328] [2024-11-13 15:36:23,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:23,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:24,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,040 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:26,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,043 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:26,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,047 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:26,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,049 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 15:36:26,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,051 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 15:36:26,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,053 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 15:36:26,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:26,056 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:26,056 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:26,056 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1652584328] [2024-11-13 15:36:26,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1652584328] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:26,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1877386344] [2024-11-13 15:36:26,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:26,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:26,057 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:26,061 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:26,065 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-13 15:36:27,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:27,913 INFO L255 TraceCheckSpWp]: Trace formula consists of 2063 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-13 15:36:27,921 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:28,210 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 84 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:28,211 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:36:28,648 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 90 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:28,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1877386344] provided 1 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:28,648 INFO L185 FreeRefinementEngine]: Found 1 perfect and 2 imperfect interpolant sequences. [2024-11-13 15:36:28,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [11, 8] total 22 [2024-11-13 15:36:28,649 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [778434484] [2024-11-13 15:36:28,649 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:28,649 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 15:36:28,649 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:28,650 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 15:36:28,650 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2024-11-13 15:36:28,650 INFO L87 Difference]: Start difference. First operand 1148 states and 1548 transitions. Second operand has 7 states, 7 states have (on average 46.0) internal successors, (322), 7 states have internal predecessors, (322), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:28,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:28,833 INFO L93 Difference]: Finished difference Result 1968 states and 2661 transitions. [2024-11-13 15:36:28,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 15:36:28,834 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 46.0) internal successors, (322), 7 states have internal predecessors, (322), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 349 [2024-11-13 15:36:28,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:28,838 INFO L225 Difference]: With dead ends: 1968 [2024-11-13 15:36:28,838 INFO L226 Difference]: Without dead ends: 1557 [2024-11-13 15:36:28,839 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 722 GetRequests, 700 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2024-11-13 15:36:28,840 INFO L432 NwaCegarLoop]: 960 mSDtfsCounter, 354 mSDsluCounter, 4360 mSDsCounter, 0 mSdLazyCounter, 74 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 354 SdHoareTripleChecker+Valid, 5320 SdHoareTripleChecker+Invalid, 75 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 74 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:28,840 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [354 Valid, 5320 Invalid, 75 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 74 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:36:28,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1557 states. [2024-11-13 15:36:28,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1557 to 1354. [2024-11-13 15:36:28,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1354 states, 1332 states have (on average 1.3325825825825826) internal successors, (1775), 1332 states have internal predecessors, (1775), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-11-13 15:36:28,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1354 states to 1354 states and 1815 transitions. [2024-11-13 15:36:28,875 INFO L78 Accepts]: Start accepts. Automaton has 1354 states and 1815 transitions. Word has length 349 [2024-11-13 15:36:28,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:28,876 INFO L471 AbstractCegarLoop]: Abstraction has 1354 states and 1815 transitions. [2024-11-13 15:36:28,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 46.0) internal successors, (322), 7 states have internal predecessors, (322), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:28,876 INFO L276 IsEmpty]: Start isEmpty. Operand 1354 states and 1815 transitions. [2024-11-13 15:36:28,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 350 [2024-11-13 15:36:28,917 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:28,917 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:28,948 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-13 15:36:29,118 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:29,118 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:29,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:29,120 INFO L85 PathProgramCache]: Analyzing trace with hash -1308830486, now seen corresponding path program 1 times [2024-11-13 15:36:29,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:29,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518123957] [2024-11-13 15:36:29,120 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:29,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:29,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,950 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:29,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,951 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:29,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,952 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:29,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,953 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 15:36:29,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,954 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 15:36:29,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,957 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 15:36:29,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:29,958 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 0 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2024-11-13 15:36:29,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:29,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518123957] [2024-11-13 15:36:29,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [518123957] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:29,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:29,959 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 15:36:29,959 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [817955056] [2024-11-13 15:36:29,959 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:29,960 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 15:36:29,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:29,960 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 15:36:29,960 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:36:29,961 INFO L87 Difference]: Start difference. First operand 1354 states and 1815 transitions. Second operand has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:30,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:30,026 INFO L93 Difference]: Finished difference Result 2324 states and 3121 transitions. [2024-11-13 15:36:30,026 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 15:36:30,027 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 349 [2024-11-13 15:36:30,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:30,030 INFO L225 Difference]: With dead ends: 2324 [2024-11-13 15:36:30,031 INFO L226 Difference]: Without dead ends: 1466 [2024-11-13 15:36:30,032 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 15:36:30,033 INFO L432 NwaCegarLoop]: 546 mSDtfsCounter, 16 mSDsluCounter, 1626 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 2172 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:30,033 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 2172 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:36:30,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1466 states. [2024-11-13 15:36:30,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1466 to 1466. [2024-11-13 15:36:30,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1466 states, 1444 states have (on average 1.3400277008310248) internal successors, (1935), 1444 states have internal predecessors, (1935), 20 states have call successors, (20), 1 states have call predecessors, (20), 1 states have return successors, (20), 20 states have call predecessors, (20), 20 states have call successors, (20) [2024-11-13 15:36:30,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1466 states to 1466 states and 1975 transitions. [2024-11-13 15:36:30,069 INFO L78 Accepts]: Start accepts. Automaton has 1466 states and 1975 transitions. Word has length 349 [2024-11-13 15:36:30,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:30,070 INFO L471 AbstractCegarLoop]: Abstraction has 1466 states and 1975 transitions. [2024-11-13 15:36:30,070 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 57.6) internal successors, (288), 5 states have internal predecessors, (288), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:36:30,070 INFO L276 IsEmpty]: Start isEmpty. Operand 1466 states and 1975 transitions. [2024-11-13 15:36:30,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 351 [2024-11-13 15:36:30,073 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:30,074 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:30,074 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2024-11-13 15:36:30,074 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:30,074 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:30,074 INFO L85 PathProgramCache]: Analyzing trace with hash 1560551046, now seen corresponding path program 1 times [2024-11-13 15:36:30,074 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:30,074 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991751697] [2024-11-13 15:36:30,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:30,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:31,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,188 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:33,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,189 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:33,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,190 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:33,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 253 [2024-11-13 15:36:33,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 271 [2024-11-13 15:36:33,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 15:36:33,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:33,198 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:33,199 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:33,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991751697] [2024-11-13 15:36:33,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991751697] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:33,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1857428778] [2024-11-13 15:36:33,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:33,199 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:33,199 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:33,202 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:33,204 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 15:36:34,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:34,838 INFO L255 TraceCheckSpWp]: Trace formula consists of 2066 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-13 15:36:34,845 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:35,154 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 120 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-13 15:36:35,154 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:36:35,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1857428778] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:35,155 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:36:35,155 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [11] total 17 [2024-11-13 15:36:35,155 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1701709875] [2024-11-13 15:36:35,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:35,156 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 15:36:35,156 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:35,156 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 15:36:35,156 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2024-11-13 15:36:35,157 INFO L87 Difference]: Start difference. First operand 1466 states and 1975 transitions. Second operand has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:35,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:35,866 INFO L93 Difference]: Finished difference Result 3185 states and 4298 transitions. [2024-11-13 15:36:35,867 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 15:36:35,867 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 350 [2024-11-13 15:36:35,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:35,870 INFO L225 Difference]: With dead ends: 3185 [2024-11-13 15:36:35,870 INFO L226 Difference]: Without dead ends: 2369 [2024-11-13 15:36:35,872 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 374 GetRequests, 357 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2024-11-13 15:36:35,872 INFO L432 NwaCegarLoop]: 395 mSDtfsCounter, 1351 mSDsluCounter, 1951 mSDsCounter, 0 mSdLazyCounter, 948 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1357 SdHoareTripleChecker+Valid, 2346 SdHoareTripleChecker+Invalid, 951 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 948 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:35,872 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1357 Valid, 2346 Invalid, 951 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 948 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-13 15:36:35,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2369 states. [2024-11-13 15:36:35,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2369 to 2023. [2024-11-13 15:36:35,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2023 states, 1989 states have (on average 1.3293112116641528) internal successors, (2644), 1989 states have internal predecessors, (2644), 32 states have call successors, (32), 1 states have call predecessors, (32), 1 states have return successors, (32), 32 states have call predecessors, (32), 32 states have call successors, (32) [2024-11-13 15:36:35,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2023 states to 2023 states and 2708 transitions. [2024-11-13 15:36:35,922 INFO L78 Accepts]: Start accepts. Automaton has 2023 states and 2708 transitions. Word has length 350 [2024-11-13 15:36:35,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:35,922 INFO L471 AbstractCegarLoop]: Abstraction has 2023 states and 2708 transitions. [2024-11-13 15:36:35,922 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 40.375) internal successors, (323), 8 states have internal predecessors, (323), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:35,923 INFO L276 IsEmpty]: Start isEmpty. Operand 2023 states and 2708 transitions. [2024-11-13 15:36:35,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 15:36:35,927 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:35,927 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:35,955 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-13 15:36:36,127 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:36,128 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:36,128 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:36,128 INFO L85 PathProgramCache]: Analyzing trace with hash 1364522509, now seen corresponding path program 1 times [2024-11-13 15:36:36,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:36,128 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951312146] [2024-11-13 15:36:36,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:36,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:37,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,929 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:38,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,931 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:38,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,934 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:38,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,936 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 15:36:38,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,937 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 15:36:38,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,938 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 15:36:38,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:38,940 INFO L134 CoverageAnalysis]: Checked inductivity of 151 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 111 trivial. 0 not checked. [2024-11-13 15:36:38,940 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:38,941 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951312146] [2024-11-13 15:36:38,941 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [951312146] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:38,941 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:38,941 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2024-11-13 15:36:38,941 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727266828] [2024-11-13 15:36:38,941 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:38,942 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 15:36:38,942 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:38,942 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 15:36:38,942 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2024-11-13 15:36:38,943 INFO L87 Difference]: Start difference. First operand 2023 states and 2708 transitions. Second operand has 10 states, 10 states have (on average 27.6) internal successors, (276), 10 states have internal predecessors, (276), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:39,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:39,493 INFO L93 Difference]: Finished difference Result 3692 states and 4932 transitions. [2024-11-13 15:36:39,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-13 15:36:39,494 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 27.6) internal successors, (276), 10 states have internal predecessors, (276), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-13 15:36:39,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:39,500 INFO L225 Difference]: With dead ends: 3692 [2024-11-13 15:36:39,500 INFO L226 Difference]: Without dead ends: 2615 [2024-11-13 15:36:39,502 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:39,506 INFO L432 NwaCegarLoop]: 809 mSDtfsCounter, 1609 mSDsluCounter, 3940 mSDsCounter, 0 mSdLazyCounter, 321 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1614 SdHoareTripleChecker+Valid, 4749 SdHoareTripleChecker+Invalid, 323 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 321 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:39,507 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1614 Valid, 4749 Invalid, 323 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 321 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:36:39,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2615 states. [2024-11-13 15:36:39,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2615 to 2147. [2024-11-13 15:36:39,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2147 states, 2107 states have (on average 1.3270052206929284) internal successors, (2796), 2107 states have internal predecessors, (2796), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:36:39,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2147 states to 2147 states and 2872 transitions. [2024-11-13 15:36:39,608 INFO L78 Accepts]: Start accepts. Automaton has 2147 states and 2872 transitions. Word has length 351 [2024-11-13 15:36:39,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:39,609 INFO L471 AbstractCegarLoop]: Abstraction has 2147 states and 2872 transitions. [2024-11-13 15:36:39,609 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 27.6) internal successors, (276), 10 states have internal predecessors, (276), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:39,609 INFO L276 IsEmpty]: Start isEmpty. Operand 2147 states and 2872 transitions. [2024-11-13 15:36:39,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 15:36:39,613 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:39,613 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:39,613 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2024-11-13 15:36:39,614 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:39,614 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:39,614 INFO L85 PathProgramCache]: Analyzing trace with hash -1344369747, now seen corresponding path program 1 times [2024-11-13 15:36:39,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:39,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501021878] [2024-11-13 15:36:39,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:39,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:40,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,576 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:41,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,579 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:41,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,581 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:41,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,583 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 15:36:41,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,584 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 15:36:41,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,585 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 15:36:41,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:41,586 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2024-11-13 15:36:41,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:41,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501021878] [2024-11-13 15:36:41,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501021878] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:41,587 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:36:41,587 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2024-11-13 15:36:41,587 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1232146560] [2024-11-13 15:36:41,587 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:41,587 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2024-11-13 15:36:41,588 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:41,588 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-13 15:36:41,588 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:36:41,588 INFO L87 Difference]: Start difference. First operand 2147 states and 2872 transitions. Second operand has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:42,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:42,986 INFO L93 Difference]: Finished difference Result 4626 states and 6108 transitions. [2024-11-13 15:36:42,986 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 15:36:42,987 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) Word has length 351 [2024-11-13 15:36:42,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:42,995 INFO L225 Difference]: With dead ends: 4626 [2024-11-13 15:36:42,995 INFO L226 Difference]: Without dead ends: 3396 [2024-11-13 15:36:42,998 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:42,998 INFO L432 NwaCegarLoop]: 585 mSDtfsCounter, 1399 mSDsluCounter, 2682 mSDsCounter, 0 mSdLazyCounter, 1521 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1400 SdHoareTripleChecker+Valid, 3267 SdHoareTripleChecker+Invalid, 1529 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 1521 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:42,999 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1400 Valid, 3267 Invalid, 1529 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 1521 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-13 15:36:43,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3396 states. [2024-11-13 15:36:43,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3396 to 2167. [2024-11-13 15:36:43,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2167 states, 2127 states have (on average 1.3286318758815232) internal successors, (2826), 2127 states have internal predecessors, (2826), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:36:43,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 2167 states and 2902 transitions. [2024-11-13 15:36:43,081 INFO L78 Accepts]: Start accepts. Automaton has 2167 states and 2902 transitions. Word has length 351 [2024-11-13 15:36:43,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:43,081 INFO L471 AbstractCegarLoop]: Abstraction has 2167 states and 2902 transitions. [2024-11-13 15:36:43,081 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 31.11111111111111) internal successors, (280), 9 states have internal predecessors, (280), 3 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 3 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:36:43,081 INFO L276 IsEmpty]: Start isEmpty. Operand 2167 states and 2902 transitions. [2024-11-13 15:36:43,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 352 [2024-11-13 15:36:43,086 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:43,086 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:43,087 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2024-11-13 15:36:43,087 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:43,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:43,087 INFO L85 PathProgramCache]: Analyzing trace with hash 533469101, now seen corresponding path program 1 times [2024-11-13 15:36:43,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:43,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854975419] [2024-11-13 15:36:43,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:43,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:43,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,038 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:45,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,040 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:45,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,043 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:45,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,044 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 254 [2024-11-13 15:36:45,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,046 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 272 [2024-11-13 15:36:45,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,048 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 286 [2024-11-13 15:36:45,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:45,051 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 4 proven. 85 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:45,052 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:45,052 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854975419] [2024-11-13 15:36:45,052 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854975419] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:45,052 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2137821619] [2024-11-13 15:36:45,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:45,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:45,052 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:45,054 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:45,056 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-13 15:36:46,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:46,910 INFO L255 TraceCheckSpWp]: Trace formula consists of 2069 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 15:36:46,915 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:46,993 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 74 proven. 0 refuted. 0 times theorem prover too weak. 75 trivial. 0 not checked. [2024-11-13 15:36:46,994 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:36:46,994 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2137821619] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:46,994 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:36:46,994 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-13 15:36:46,994 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [424381195] [2024-11-13 15:36:46,994 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:46,995 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:36:46,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:46,996 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:36:46,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:46,997 INFO L87 Difference]: Start difference. First operand 2167 states and 2902 transitions. Second operand has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:47,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:47,105 INFO L93 Difference]: Finished difference Result 3737 states and 4998 transitions. [2024-11-13 15:36:47,106 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:47,106 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) Word has length 351 [2024-11-13 15:36:47,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:47,113 INFO L225 Difference]: With dead ends: 3737 [2024-11-13 15:36:47,113 INFO L226 Difference]: Without dead ends: 2167 [2024-11-13 15:36:47,115 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 373 GetRequests, 360 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:47,116 INFO L432 NwaCegarLoop]: 546 mSDtfsCounter, 0 mSDsluCounter, 2165 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2711 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:47,116 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2711 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:36:47,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2167 states. [2024-11-13 15:36:47,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2167 to 2167. [2024-11-13 15:36:47,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2167 states, 2127 states have (on average 1.319228960977903) internal successors, (2806), 2127 states have internal predecessors, (2806), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:36:47,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 2167 states and 2882 transitions. [2024-11-13 15:36:47,173 INFO L78 Accepts]: Start accepts. Automaton has 2167 states and 2882 transitions. Word has length 351 [2024-11-13 15:36:47,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:47,174 INFO L471 AbstractCegarLoop]: Abstraction has 2167 states and 2882 transitions. [2024-11-13 15:36:47,174 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 60.4) internal successors, (302), 6 states have internal predecessors, (302), 2 states have call successors, (4), 1 states have call predecessors, (4), 2 states have return successors, (4), 2 states have call predecessors, (4), 2 states have call successors, (4) [2024-11-13 15:36:47,174 INFO L276 IsEmpty]: Start isEmpty. Operand 2167 states and 2882 transitions. [2024-11-13 15:36:47,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-13 15:36:47,178 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:47,178 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:47,206 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-13 15:36:47,379 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:47,379 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:47,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:47,379 INFO L85 PathProgramCache]: Analyzing trace with hash 624694877, now seen corresponding path program 1 times [2024-11-13 15:36:47,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:47,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780878597] [2024-11-13 15:36:47,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:47,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:48,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,437 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:49,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,439 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:49,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,440 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 77 [2024-11-13 15:36:49,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,442 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 15:36:49,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,443 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 15:36:49,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,444 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2024-11-13 15:36:49,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:49,446 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:49,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:49,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780878597] [2024-11-13 15:36:49,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1780878597] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:49,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2132347622] [2024-11-13 15:36:49,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:49,446 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:49,446 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:49,448 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:49,449 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 15:36:51,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:51,531 INFO L255 TraceCheckSpWp]: Trace formula consists of 2075 conjuncts, 100 conjuncts are in the unsatisfiable core [2024-11-13 15:36:51,543 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:52,476 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 15:36:52,476 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:36:52,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2132347622] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:52,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:36:52,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [11] total 19 [2024-11-13 15:36:52,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864151693] [2024-11-13 15:36:52,477 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:52,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 15:36:52,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:52,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 15:36:52,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=293, Unknown=0, NotChecked=0, Total=342 [2024-11-13 15:36:52,479 INFO L87 Difference]: Start difference. First operand 2167 states and 2882 transitions. Second operand has 10 states, 10 states have (on average 32.9) internal successors, (329), 10 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:53,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:53,833 INFO L93 Difference]: Finished difference Result 4402 states and 5786 transitions. [2024-11-13 15:36:53,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-13 15:36:53,833 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 32.9) internal successors, (329), 10 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 353 [2024-11-13 15:36:53,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:53,841 INFO L225 Difference]: With dead ends: 4402 [2024-11-13 15:36:53,841 INFO L226 Difference]: Without dead ends: 3312 [2024-11-13 15:36:53,843 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 358 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380 [2024-11-13 15:36:53,843 INFO L432 NwaCegarLoop]: 582 mSDtfsCounter, 847 mSDsluCounter, 3751 mSDsCounter, 0 mSdLazyCounter, 2078 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 4333 SdHoareTripleChecker+Invalid, 2080 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2078 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:53,843 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 4333 Invalid, 2080 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2078 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2024-11-13 15:36:53,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3312 states. [2024-11-13 15:36:53,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3312 to 2824. [2024-11-13 15:36:53,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2824 states, 2784 states have (on average 1.2977729885057472) internal successors, (3613), 2784 states have internal predecessors, (3613), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:36:53,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2824 states to 2824 states and 3689 transitions. [2024-11-13 15:36:53,914 INFO L78 Accepts]: Start accepts. Automaton has 2824 states and 3689 transitions. Word has length 353 [2024-11-13 15:36:53,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:53,917 INFO L471 AbstractCegarLoop]: Abstraction has 2824 states and 3689 transitions. [2024-11-13 15:36:53,917 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 32.9) internal successors, (329), 10 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:36:53,917 INFO L276 IsEmpty]: Start isEmpty. Operand 2824 states and 3689 transitions. [2024-11-13 15:36:53,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-13 15:36:53,922 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:53,922 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:53,951 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-13 15:36:54,122 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2024-11-13 15:36:54,123 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:54,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:54,124 INFO L85 PathProgramCache]: Analyzing trace with hash -358698018, now seen corresponding path program 1 times [2024-11-13 15:36:54,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:54,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124306245] [2024-11-13 15:36:54,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:54,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:55,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,607 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:36:56,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,609 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:36:56,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,611 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 15:36:56,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,613 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 15:36:56,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,615 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 15:36:56,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,616 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2024-11-13 15:36:56,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:56,619 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:36:56,619 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:36:56,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124306245] [2024-11-13 15:36:56,619 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2124306245] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:36:56,619 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [367833813] [2024-11-13 15:36:56,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:56,619 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:56,620 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:36:56,622 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:36:56,625 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-13 15:36:58,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:36:58,360 INFO L255 TraceCheckSpWp]: Trace formula consists of 2075 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 15:36:58,365 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:36:58,417 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 57 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2024-11-13 15:36:58,418 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:36:58,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [367833813] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:36:58,418 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:36:58,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-13 15:36:58,419 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [790933248] [2024-11-13 15:36:58,419 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:36:58,419 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:36:58,419 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:36:58,420 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:36:58,420 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:58,420 INFO L87 Difference]: Start difference. First operand 2824 states and 3689 transitions. Second operand has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 15:36:58,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:36:58,490 INFO L93 Difference]: Finished difference Result 5171 states and 6734 transitions. [2024-11-13 15:36:58,490 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:36:58,490 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) Word has length 353 [2024-11-13 15:36:58,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:36:58,496 INFO L225 Difference]: With dead ends: 5171 [2024-11-13 15:36:58,496 INFO L226 Difference]: Without dead ends: 2824 [2024-11-13 15:36:58,498 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 362 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:36:58,499 INFO L432 NwaCegarLoop]: 545 mSDtfsCounter, 0 mSDsluCounter, 2161 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2706 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:36:58,499 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2706 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:36:58,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2824 states. [2024-11-13 15:36:58,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2824 to 2824. [2024-11-13 15:36:58,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2824 states, 2784 states have (on average 1.2948994252873562) internal successors, (3605), 2784 states have internal predecessors, (3605), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:36:58,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2824 states to 2824 states and 3681 transitions. [2024-11-13 15:36:58,559 INFO L78 Accepts]: Start accepts. Automaton has 2824 states and 3681 transitions. Word has length 353 [2024-11-13 15:36:58,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:36:58,559 INFO L471 AbstractCegarLoop]: Abstraction has 2824 states and 3681 transitions. [2024-11-13 15:36:58,560 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 54.6) internal successors, (273), 6 states have internal predecessors, (273), 3 states have call successors, (5), 2 states have call predecessors, (5), 3 states have return successors, (5), 2 states have call predecessors, (5), 3 states have call successors, (5) [2024-11-13 15:36:58,560 INFO L276 IsEmpty]: Start isEmpty. Operand 2824 states and 3681 transitions. [2024-11-13 15:36:58,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2024-11-13 15:36:58,564 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:36:58,564 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:36:58,594 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-13 15:36:58,765 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:36:58,765 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:36:58,766 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:36:58,766 INFO L85 PathProgramCache]: Analyzing trace with hash -2085445667, now seen corresponding path program 1 times [2024-11-13 15:36:58,766 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:36:58,766 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322521543] [2024-11-13 15:36:58,766 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:36:58,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:36:59,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,648 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 46 [2024-11-13 15:37:00,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,649 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:37:00,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,651 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:37:00,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,653 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 255 [2024-11-13 15:37:00,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,654 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 273 [2024-11-13 15:37:00,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,655 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 287 [2024-11-13 15:37:00,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:00,657 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 4 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:00,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:00,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1322521543] [2024-11-13 15:37:00,657 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1322521543] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:37:00,657 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [231305629] [2024-11-13 15:37:00,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:00,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:00,657 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:37:00,659 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:37:00,660 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 15:37:02,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:02,378 INFO L255 TraceCheckSpWp]: Trace formula consists of 2077 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-13 15:37:02,385 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:37:03,955 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 126 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 15:37:03,955 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:37:03,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [231305629] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:37:03,955 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:37:03,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [11] total 20 [2024-11-13 15:37:03,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [797332388] [2024-11-13 15:37:03,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:37:03,956 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2024-11-13 15:37:03,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:03,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2024-11-13 15:37:03,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2024-11-13 15:37:03,957 INFO L87 Difference]: Start difference. First operand 2824 states and 3681 transitions. Second operand has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:04,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:04,916 INFO L93 Difference]: Finished difference Result 3953 states and 5186 transitions. [2024-11-13 15:37:04,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 15:37:04,917 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 353 [2024-11-13 15:37:04,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:04,923 INFO L225 Difference]: With dead ends: 3953 [2024-11-13 15:37:04,923 INFO L226 Difference]: Without dead ends: 3042 [2024-11-13 15:37:04,925 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 357 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2024-11-13 15:37:04,926 INFO L432 NwaCegarLoop]: 418 mSDtfsCounter, 991 mSDsluCounter, 2999 mSDsCounter, 0 mSdLazyCounter, 1463 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 994 SdHoareTripleChecker+Valid, 3417 SdHoareTripleChecker+Invalid, 1467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 1463 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:04,926 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [994 Valid, 3417 Invalid, 1467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 1463 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-13 15:37:04,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3042 states. [2024-11-13 15:37:04,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3042 to 3016. [2024-11-13 15:37:04,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3016 states, 2976 states have (on average 1.3020833333333333) internal successors, (3875), 2976 states have internal predecessors, (3875), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:37:04,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3016 states to 3016 states and 3951 transitions. [2024-11-13 15:37:04,991 INFO L78 Accepts]: Start accepts. Automaton has 3016 states and 3951 transitions. Word has length 353 [2024-11-13 15:37:04,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:04,992 INFO L471 AbstractCegarLoop]: Abstraction has 3016 states and 3951 transitions. [2024-11-13 15:37:04,992 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 29.90909090909091) internal successors, (329), 11 states have internal predecessors, (329), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:04,992 INFO L276 IsEmpty]: Start isEmpty. Operand 3016 states and 3951 transitions. [2024-11-13 15:37:04,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-13 15:37:04,997 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:04,997 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:05,029 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-13 15:37:05,197 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2024-11-13 15:37:05,198 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:05,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:05,198 INFO L85 PathProgramCache]: Analyzing trace with hash 287235583, now seen corresponding path program 1 times [2024-11-13 15:37:05,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:05,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563218702] [2024-11-13 15:37:05,198 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:05,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:05,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,838 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:37:05,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,840 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 63 [2024-11-13 15:37:05,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,841 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 15:37:05,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,842 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 15:37:05,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,843 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 15:37:05,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,844 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 15:37:05,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:05,845 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2024-11-13 15:37:05,845 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:05,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563218702] [2024-11-13 15:37:05,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [563218702] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:37:05,845 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:37:05,845 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:37:05,845 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856275254] [2024-11-13 15:37:05,846 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:37:05,846 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:37:05,846 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:05,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:37:05,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:37:05,847 INFO L87 Difference]: Start difference. First operand 3016 states and 3951 transitions. Second operand has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:06,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:06,259 INFO L93 Difference]: Finished difference Result 5243 states and 6842 transitions. [2024-11-13 15:37:06,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:37:06,259 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-13 15:37:06,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:06,264 INFO L225 Difference]: With dead ends: 5243 [2024-11-13 15:37:06,264 INFO L226 Difference]: Without dead ends: 3112 [2024-11-13 15:37:06,266 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:37:06,267 INFO L432 NwaCegarLoop]: 399 mSDtfsCounter, 505 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 626 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 505 SdHoareTripleChecker+Valid, 1569 SdHoareTripleChecker+Invalid, 627 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 626 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:06,267 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [505 Valid, 1569 Invalid, 627 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 626 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:37:06,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3112 states. [2024-11-13 15:37:06,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3112 to 3064. [2024-11-13 15:37:06,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3064 states, 3024 states have (on average 1.2972883597883598) internal successors, (3923), 3024 states have internal predecessors, (3923), 38 states have call successors, (38), 1 states have call predecessors, (38), 1 states have return successors, (38), 38 states have call predecessors, (38), 38 states have call successors, (38) [2024-11-13 15:37:06,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3064 states to 3064 states and 3999 transitions. [2024-11-13 15:37:06,331 INFO L78 Accepts]: Start accepts. Automaton has 3064 states and 3999 transitions. Word has length 354 [2024-11-13 15:37:06,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:06,331 INFO L471 AbstractCegarLoop]: Abstraction has 3064 states and 3999 transitions. [2024-11-13 15:37:06,332 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 47.0) internal successors, (282), 6 states have internal predecessors, (282), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:06,332 INFO L276 IsEmpty]: Start isEmpty. Operand 3064 states and 3999 transitions. [2024-11-13 15:37:06,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-13 15:37:06,336 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:06,337 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:06,337 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2024-11-13 15:37:06,337 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:06,337 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:06,337 INFO L85 PathProgramCache]: Analyzing trace with hash 1995361007, now seen corresponding path program 1 times [2024-11-13 15:37:06,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:06,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973748523] [2024-11-13 15:37:06,338 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:06,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:07,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,132 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:37:11,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,134 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:37:11,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,136 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:37:11,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,137 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 15:37:11,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,138 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 15:37:11,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,140 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 15:37:11,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:11,142 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 51 proven. 36 refuted. 0 times theorem prover too weak. 62 trivial. 0 not checked. [2024-11-13 15:37:11,142 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:11,146 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973748523] [2024-11-13 15:37:11,146 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973748523] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:37:11,146 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1589692310] [2024-11-13 15:37:11,146 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:11,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:11,147 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:37:11,149 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:37:11,153 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-13 15:37:13,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:13,636 INFO L255 TraceCheckSpWp]: Trace formula consists of 2078 conjuncts, 66 conjuncts are in the unsatisfiable core [2024-11-13 15:37:13,646 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:37:14,865 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 121 proven. 4 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2024-11-13 15:37:14,865 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:37:16,734 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 83 proven. 6 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:16,734 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1589692310] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 15:37:16,734 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 15:37:16,734 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 13, 11] total 37 [2024-11-13 15:37:16,734 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1247149321] [2024-11-13 15:37:16,734 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 15:37:16,736 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2024-11-13 15:37:16,736 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:16,737 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2024-11-13 15:37:16,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=1185, Unknown=0, NotChecked=0, Total=1332 [2024-11-13 15:37:16,737 INFO L87 Difference]: Start difference. First operand 3064 states and 3999 transitions. Second operand has 37 states, 37 states have (on average 22.56756756756757) internal successors, (835), 37 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-13 15:37:28,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:28,944 INFO L93 Difference]: Finished difference Result 21120 states and 27372 transitions. [2024-11-13 15:37:28,944 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2024-11-13 15:37:28,944 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 22.56756756756757) internal successors, (835), 37 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) Word has length 354 [2024-11-13 15:37:28,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:28,957 INFO L225 Difference]: With dead ends: 21120 [2024-11-13 15:37:28,957 INFO L226 Difference]: Without dead ends: 18259 [2024-11-13 15:37:28,966 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 830 GetRequests, 701 SyntacticMatches, 0 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4793 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=1928, Invalid=15102, Unknown=0, NotChecked=0, Total=17030 [2024-11-13 15:37:28,966 INFO L432 NwaCegarLoop]: 1114 mSDtfsCounter, 6121 mSDsluCounter, 24013 mSDsCounter, 0 mSdLazyCounter, 15578 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 7.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6124 SdHoareTripleChecker+Valid, 25127 SdHoareTripleChecker+Invalid, 15637 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 15578 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 8.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:28,966 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6124 Valid, 25127 Invalid, 15637 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [59 Valid, 15578 Invalid, 0 Unknown, 0 Unchecked, 8.4s Time] [2024-11-13 15:37:28,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18259 states. [2024-11-13 15:37:29,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18259 to 6897. [2024-11-13 15:37:29,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6897 states, 6777 states have (on average 1.2878854950568097) internal successors, (8728), 6777 states have internal predecessors, (8728), 118 states have call successors, (118), 1 states have call predecessors, (118), 1 states have return successors, (118), 118 states have call predecessors, (118), 118 states have call successors, (118) [2024-11-13 15:37:29,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6897 states to 6897 states and 8964 transitions. [2024-11-13 15:37:29,229 INFO L78 Accepts]: Start accepts. Automaton has 6897 states and 8964 transitions. Word has length 354 [2024-11-13 15:37:29,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:29,230 INFO L471 AbstractCegarLoop]: Abstraction has 6897 states and 8964 transitions. [2024-11-13 15:37:29,230 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 22.56756756756757) internal successors, (835), 37 states have internal predecessors, (835), 7 states have call successors, (18), 2 states have call predecessors, (18), 2 states have return successors, (18), 7 states have call predecessors, (18), 7 states have call successors, (18) [2024-11-13 15:37:29,230 INFO L276 IsEmpty]: Start isEmpty. Operand 6897 states and 8964 transitions. [2024-11-13 15:37:29,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2024-11-13 15:37:29,240 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:29,241 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:29,269 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2024-11-13 15:37:29,441 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:29,441 INFO L396 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:29,442 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:29,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1305707799, now seen corresponding path program 1 times [2024-11-13 15:37:29,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:29,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615554134] [2024-11-13 15:37:29,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:29,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:30,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,336 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 47 [2024-11-13 15:37:31,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,338 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 65 [2024-11-13 15:37:31,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,339 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 80 [2024-11-13 15:37:31,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,341 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 15:37:31,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,342 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 15:37:31,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,343 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 15:37:31,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:31,345 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:31,345 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:31,345 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [615554134] [2024-11-13 15:37:31,345 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [615554134] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:37:31,345 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:37:31,345 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-13 15:37:31,345 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434623015] [2024-11-13 15:37:31,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:37:31,346 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-13 15:37:31,346 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:31,347 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-13 15:37:31,347 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:37:31,347 INFO L87 Difference]: Start difference. First operand 6897 states and 8964 transitions. Second operand has 7 states, 7 states have (on average 46.714285714285715) internal successors, (327), 7 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:32,162 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:32,162 INFO L93 Difference]: Finished difference Result 10765 states and 14015 transitions. [2024-11-13 15:37:32,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-13 15:37:32,163 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 46.714285714285715) internal successors, (327), 7 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 354 [2024-11-13 15:37:32,163 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:32,169 INFO L225 Difference]: With dead ends: 10765 [2024-11-13 15:37:32,170 INFO L226 Difference]: Without dead ends: 8577 [2024-11-13 15:37:32,172 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2024-11-13 15:37:32,173 INFO L432 NwaCegarLoop]: 691 mSDtfsCounter, 746 mSDsluCounter, 2030 mSDsCounter, 0 mSdLazyCounter, 1141 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 749 SdHoareTripleChecker+Valid, 2721 SdHoareTripleChecker+Invalid, 1142 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:32,173 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [749 Valid, 2721 Invalid, 1142 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1141 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 15:37:32,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8577 states. [2024-11-13 15:37:32,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8577 to 8503. [2024-11-13 15:37:32,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8503 states, 8375 states have (on average 1.2884776119402985) internal successors, (10791), 8375 states have internal predecessors, (10791), 126 states have call successors, (126), 1 states have call predecessors, (126), 1 states have return successors, (126), 126 states have call predecessors, (126), 126 states have call successors, (126) [2024-11-13 15:37:32,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8503 states to 8503 states and 11043 transitions. [2024-11-13 15:37:32,362 INFO L78 Accepts]: Start accepts. Automaton has 8503 states and 11043 transitions. Word has length 354 [2024-11-13 15:37:32,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:32,362 INFO L471 AbstractCegarLoop]: Abstraction has 8503 states and 11043 transitions. [2024-11-13 15:37:32,362 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 46.714285714285715) internal successors, (327), 7 states have internal predecessors, (327), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:37:32,362 INFO L276 IsEmpty]: Start isEmpty. Operand 8503 states and 11043 transitions. [2024-11-13 15:37:32,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2024-11-13 15:37:32,377 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:32,378 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:32,378 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52 [2024-11-13 15:37:32,378 INFO L396 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:32,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:32,378 INFO L85 PathProgramCache]: Analyzing trace with hash -37451416, now seen corresponding path program 1 times [2024-11-13 15:37:32,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:32,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [435787838] [2024-11-13 15:37:32,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:32,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:33,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,846 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:37:34,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,847 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:37:34,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,848 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:37:34,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,849 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 256 [2024-11-13 15:37:34,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,851 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 274 [2024-11-13 15:37:34,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,853 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 288 [2024-11-13 15:37:34,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:34,855 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 4 proven. 83 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:34,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:34,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [435787838] [2024-11-13 15:37:34,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [435787838] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:37:34,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2098049115] [2024-11-13 15:37:34,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:34,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:34,856 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:37:34,859 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:37:34,862 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-13 15:37:36,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:36,856 INFO L255 TraceCheckSpWp]: Trace formula consists of 2081 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 15:37:36,860 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:37:36,933 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 122 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-13 15:37:36,934 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:37:36,934 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2098049115] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:37:36,934 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:37:36,934 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [11] total 15 [2024-11-13 15:37:36,934 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846634566] [2024-11-13 15:37:36,934 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:37:36,935 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:37:36,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:36,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:37:36,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:37:36,936 INFO L87 Difference]: Start difference. First operand 8503 states and 11043 transitions. Second operand has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:37:37,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:37,132 INFO L93 Difference]: Finished difference Result 16531 states and 21437 transitions. [2024-11-13 15:37:37,132 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:37:37,133 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 355 [2024-11-13 15:37:37,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:37,142 INFO L225 Difference]: With dead ends: 16531 [2024-11-13 15:37:37,142 INFO L226 Difference]: Without dead ends: 8503 [2024-11-13 15:37:37,150 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 377 GetRequests, 364 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2024-11-13 15:37:37,151 INFO L432 NwaCegarLoop]: 544 mSDtfsCounter, 0 mSDsluCounter, 2157 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2701 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:37,151 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2701 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:37:37,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8503 states. [2024-11-13 15:37:37,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8503 to 8503. [2024-11-13 15:37:37,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8503 states, 8375 states have (on average 1.2856119402985076) internal successors, (10767), 8375 states have internal predecessors, (10767), 126 states have call successors, (126), 1 states have call predecessors, (126), 1 states have return successors, (126), 126 states have call predecessors, (126), 126 states have call successors, (126) [2024-11-13 15:37:37,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8503 states to 8503 states and 11019 transitions. [2024-11-13 15:37:37,332 INFO L78 Accepts]: Start accepts. Automaton has 8503 states and 11019 transitions. Word has length 355 [2024-11-13 15:37:37,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:37,332 INFO L471 AbstractCegarLoop]: Abstraction has 8503 states and 11019 transitions. [2024-11-13 15:37:37,332 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 66.0) internal successors, (330), 6 states have internal predecessors, (330), 3 states have call successors, (6), 2 states have call predecessors, (6), 3 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:37:37,332 INFO L276 IsEmpty]: Start isEmpty. Operand 8503 states and 11019 transitions. [2024-11-13 15:37:37,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 15:37:37,342 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:37,342 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:37,368 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-11-13 15:37:37,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable53,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:37,543 INFO L396 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:37,543 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:37,543 INFO L85 PathProgramCache]: Analyzing trace with hash -2130974579, now seen corresponding path program 1 times [2024-11-13 15:37:37,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:37,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582406908] [2024-11-13 15:37:37,543 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:37,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:38,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,759 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:37:39,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,761 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:37:39,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,762 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:37:39,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,763 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 15:37:39,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,764 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 15:37:39,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,765 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289 [2024-11-13 15:37:39,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:39,767 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 4 proven. 84 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:39,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:39,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582406908] [2024-11-13 15:37:39,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [582406908] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:37:39,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1692407511] [2024-11-13 15:37:39,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:39,768 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:39,768 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:37:39,769 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:37:39,770 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2024-11-13 15:37:42,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:42,756 INFO L255 TraceCheckSpWp]: Trace formula consists of 2084 conjuncts, 75 conjuncts are in the unsatisfiable core [2024-11-13 15:37:42,763 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:37:44,952 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 35 proven. 53 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:44,953 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:37:49,851 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 2 proven. 86 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:37:49,851 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1692407511] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 15:37:49,851 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 15:37:49,851 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 14, 15] total 36 [2024-11-13 15:37:49,851 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177630408] [2024-11-13 15:37:49,851 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 15:37:49,852 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2024-11-13 15:37:49,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:37:49,854 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-13 15:37:49,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=1104, Unknown=0, NotChecked=0, Total=1260 [2024-11-13 15:37:49,854 INFO L87 Difference]: Start difference. First operand 8503 states and 11019 transitions. Second operand has 36 states, 36 states have (on average 26.944444444444443) internal successors, (970), 36 states have internal predecessors, (970), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-13 15:37:52,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:37:52,767 INFO L93 Difference]: Finished difference Result 10774 states and 13959 transitions. [2024-11-13 15:37:52,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-13 15:37:52,768 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 26.944444444444443) internal successors, (970), 36 states have internal predecessors, (970), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) Word has length 356 [2024-11-13 15:37:52,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:37:52,778 INFO L225 Difference]: With dead ends: 10774 [2024-11-13 15:37:52,778 INFO L226 Difference]: Without dead ends: 8621 [2024-11-13 15:37:52,783 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 749 GetRequests, 699 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 641 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=330, Invalid=2322, Unknown=0, NotChecked=0, Total=2652 [2024-11-13 15:37:52,783 INFO L432 NwaCegarLoop]: 493 mSDtfsCounter, 1145 mSDsluCounter, 7256 mSDsCounter, 0 mSdLazyCounter, 3509 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1145 SdHoareTripleChecker+Valid, 7749 SdHoareTripleChecker+Invalid, 3518 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 3509 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.3s IncrementalHoareTripleChecker+Time [2024-11-13 15:37:52,783 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1145 Valid, 7749 Invalid, 3518 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 3509 Invalid, 0 Unknown, 0 Unchecked, 2.3s Time] [2024-11-13 15:37:52,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8621 states. [2024-11-13 15:37:52,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8621 to 8515. [2024-11-13 15:37:52,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8515 states, 8387 states have (on average 1.2856802193871468) internal successors, (10783), 8387 states have internal predecessors, (10783), 126 states have call successors, (126), 1 states have call predecessors, (126), 1 states have return successors, (126), 126 states have call predecessors, (126), 126 states have call successors, (126) [2024-11-13 15:37:52,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8515 states to 8515 states and 11035 transitions. [2024-11-13 15:37:52,902 INFO L78 Accepts]: Start accepts. Automaton has 8515 states and 11035 transitions. Word has length 356 [2024-11-13 15:37:52,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:37:52,903 INFO L471 AbstractCegarLoop]: Abstraction has 8515 states and 11035 transitions. [2024-11-13 15:37:52,903 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 26.944444444444443) internal successors, (970), 36 states have internal predecessors, (970), 6 states have call successors, (18), 1 states have call predecessors, (18), 1 states have return successors, (18), 6 states have call predecessors, (18), 6 states have call successors, (18) [2024-11-13 15:37:52,903 INFO L276 IsEmpty]: Start isEmpty. Operand 8515 states and 11035 transitions. [2024-11-13 15:37:52,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 15:37:52,912 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:37:52,913 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:37:52,935 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2024-11-13 15:37:53,113 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2024-11-13 15:37:53,113 INFO L396 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:37:53,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:37:53,114 INFO L85 PathProgramCache]: Analyzing trace with hash 1369145809, now seen corresponding path program 1 times [2024-11-13 15:37:53,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:37:53,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646096610] [2024-11-13 15:37:53,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:53,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:37:54,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,887 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:37:54,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,888 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:37:54,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,890 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:37:54,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,892 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 15:37:54,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,893 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 15:37:54,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,894 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289 [2024-11-13 15:37:54,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:54,895 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 80 proven. 4 refuted. 0 times theorem prover too weak. 63 trivial. 0 not checked. [2024-11-13 15:37:54,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:37:54,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646096610] [2024-11-13 15:37:54,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646096610] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:37:54,896 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1422079096] [2024-11-13 15:37:54,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:37:54,896 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:37:54,896 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:37:54,897 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:37:54,898 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2024-11-13 15:37:57,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:37:57,386 INFO L255 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 116 conjuncts are in the unsatisfiable core [2024-11-13 15:37:57,395 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:37:59,070 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 118 proven. 2 refuted. 0 times theorem prover too weak. 27 trivial. 0 not checked. [2024-11-13 15:37:59,071 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:38:05,190 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 78 proven. 9 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:38:05,190 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1422079096] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 15:38:05,190 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 15:38:05,190 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 17, 24] total 42 [2024-11-13 15:38:05,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161746879] [2024-11-13 15:38:05,190 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 15:38:05,191 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 42 states [2024-11-13 15:38:05,191 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:38:05,192 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2024-11-13 15:38:05,193 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1325, Unknown=0, NotChecked=0, Total=1722 [2024-11-13 15:38:05,193 INFO L87 Difference]: Start difference. First operand 8515 states and 11035 transitions. Second operand has 42 states, 42 states have (on average 18.452380952380953) internal successors, (775), 42 states have internal predecessors, (775), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-13 15:38:08,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:38:08,382 INFO L93 Difference]: Finished difference Result 23205 states and 30056 transitions. [2024-11-13 15:38:08,383 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-13 15:38:08,383 INFO L78 Accepts]: Start accepts. Automaton has has 42 states, 42 states have (on average 18.452380952380953) internal successors, (775), 42 states have internal predecessors, (775), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) Word has length 356 [2024-11-13 15:38:08,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:38:08,393 INFO L225 Difference]: With dead ends: 23205 [2024-11-13 15:38:08,393 INFO L226 Difference]: Without dead ends: 15177 [2024-11-13 15:38:08,399 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 732 GetRequests, 690 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 620 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=435, Invalid=1457, Unknown=0, NotChecked=0, Total=1892 [2024-11-13 15:38:08,399 INFO L432 NwaCegarLoop]: 600 mSDtfsCounter, 3096 mSDsluCounter, 9175 mSDsCounter, 0 mSdLazyCounter, 4839 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 2.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3096 SdHoareTripleChecker+Valid, 9775 SdHoareTripleChecker+Invalid, 4846 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 4839 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.9s IncrementalHoareTripleChecker+Time [2024-11-13 15:38:08,400 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3096 Valid, 9775 Invalid, 4846 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 4839 Invalid, 0 Unknown, 0 Unchecked, 2.9s Time] [2024-11-13 15:38:08,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15177 states. [2024-11-13 15:38:08,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15177 to 15087. [2024-11-13 15:38:08,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15087 states, 14905 states have (on average 1.287688695068769) internal successors, (19193), 14905 states have internal predecessors, (19193), 180 states have call successors, (180), 1 states have call predecessors, (180), 1 states have return successors, (180), 180 states have call predecessors, (180), 180 states have call successors, (180) [2024-11-13 15:38:08,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15087 states to 15087 states and 19553 transitions. [2024-11-13 15:38:08,641 INFO L78 Accepts]: Start accepts. Automaton has 15087 states and 19553 transitions. Word has length 356 [2024-11-13 15:38:08,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:38:08,642 INFO L471 AbstractCegarLoop]: Abstraction has 15087 states and 19553 transitions. [2024-11-13 15:38:08,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 42 states, 42 states have (on average 18.452380952380953) internal successors, (775), 42 states have internal predecessors, (775), 6 states have call successors, (15), 2 states have call predecessors, (15), 2 states have return successors, (15), 6 states have call predecessors, (15), 6 states have call successors, (15) [2024-11-13 15:38:08,642 INFO L276 IsEmpty]: Start isEmpty. Operand 15087 states and 19553 transitions. [2024-11-13 15:38:08,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 15:38:08,658 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:08,658 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:08,691 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2024-11-13 15:38:08,859 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable55 [2024-11-13 15:38:08,859 INFO L396 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:08,860 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:08,860 INFO L85 PathProgramCache]: Analyzing trace with hash -132418615, now seen corresponding path program 1 times [2024-11-13 15:38:08,860 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:38:08,860 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892046207] [2024-11-13 15:38:08,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:08,860 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:38:10,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,763 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:38:11,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,765 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:38:11,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,766 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:38:11,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,767 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 15:38:11,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,768 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 275 [2024-11-13 15:38:11,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,769 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 289 [2024-11-13 15:38:11,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:11,771 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 54 proven. 34 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:38:11,771 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:38:11,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892046207] [2024-11-13 15:38:11,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892046207] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:38:11,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1923829669] [2024-11-13 15:38:11,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:11,771 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:38:11,771 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:38:11,773 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:38:11,774 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2024-11-13 15:38:14,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:14,528 INFO L255 TraceCheckSpWp]: Trace formula consists of 2082 conjuncts, 95 conjuncts are in the unsatisfiable core [2024-11-13 15:38:14,536 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:17,044 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 7 proven. 96 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 15:38:17,044 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:38:20,727 INFO L134 CoverageAnalysis]: Checked inductivity of 148 backedges. 7 proven. 96 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 15:38:20,727 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1923829669] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 15:38:20,727 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 15:38:20,727 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 24, 23] total 55 [2024-11-13 15:38:20,727 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936094867] [2024-11-13 15:38:20,727 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 15:38:20,728 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2024-11-13 15:38:20,728 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:38:20,730 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2024-11-13 15:38:20,730 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=2711, Unknown=0, NotChecked=0, Total=2970 [2024-11-13 15:38:20,730 INFO L87 Difference]: Start difference. First operand 15087 states and 19553 transitions. Second operand has 55 states, 53 states have (on average 18.339622641509433) internal successors, (972), 55 states have internal predecessors, (972), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-13 15:38:30,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:38:30,562 INFO L93 Difference]: Finished difference Result 45153 states and 58202 transitions. [2024-11-13 15:38:30,563 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2024-11-13 15:38:30,563 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 53 states have (on average 18.339622641509433) internal successors, (972), 55 states have internal predecessors, (972), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18) Word has length 356 [2024-11-13 15:38:30,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:38:30,584 INFO L225 Difference]: With dead ends: 45153 [2024-11-13 15:38:30,584 INFO L226 Difference]: Without dead ends: 33337 [2024-11-13 15:38:30,591 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 814 GetRequests, 683 SyntacticMatches, 0 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4799 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=1977, Invalid=15579, Unknown=0, NotChecked=0, Total=17556 [2024-11-13 15:38:30,592 INFO L432 NwaCegarLoop]: 704 mSDtfsCounter, 7884 mSDsluCounter, 19018 mSDsCounter, 0 mSdLazyCounter, 10384 mSolverCounterSat, 73 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7890 SdHoareTripleChecker+Valid, 19722 SdHoareTripleChecker+Invalid, 10457 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 73 IncrementalHoareTripleChecker+Valid, 10384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 6.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:38:30,592 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7890 Valid, 19722 Invalid, 10457 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [73 Valid, 10384 Invalid, 0 Unknown, 0 Unchecked, 6.0s Time] [2024-11-13 15:38:30,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33337 states. [2024-11-13 15:38:30,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33337 to 17761. [2024-11-13 15:38:30,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17761 states, 17529 states have (on average 1.279308574362485) internal successors, (22425), 17529 states have internal predecessors, (22425), 230 states have call successors, (230), 1 states have call predecessors, (230), 1 states have return successors, (230), 230 states have call predecessors, (230), 230 states have call successors, (230) [2024-11-13 15:38:30,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17761 states to 17761 states and 22885 transitions. [2024-11-13 15:38:30,951 INFO L78 Accepts]: Start accepts. Automaton has 17761 states and 22885 transitions. Word has length 356 [2024-11-13 15:38:30,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:38:30,952 INFO L471 AbstractCegarLoop]: Abstraction has 17761 states and 22885 transitions. [2024-11-13 15:38:30,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 53 states have (on average 18.339622641509433) internal successors, (972), 55 states have internal predecessors, (972), 10 states have call successors, (18), 1 states have call predecessors, (18), 2 states have return successors, (18), 8 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-13 15:38:30,952 INFO L276 IsEmpty]: Start isEmpty. Operand 17761 states and 22885 transitions. [2024-11-13 15:38:30,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 357 [2024-11-13 15:38:30,969 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:30,969 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:31,001 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2024-11-13 15:38:31,170 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable56 [2024-11-13 15:38:31,170 INFO L396 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:31,170 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:31,170 INFO L85 PathProgramCache]: Analyzing trace with hash -152670903, now seen corresponding path program 1 times [2024-11-13 15:38:31,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:38:31,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155682657] [2024-11-13 15:38:31,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:31,171 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:38:31,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 45 [2024-11-13 15:38:32,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,193 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 64 [2024-11-13 15:38:32,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,194 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 79 [2024-11-13 15:38:32,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,195 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 257 [2024-11-13 15:38:32,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,196 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 15:38:32,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,197 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 290 [2024-11-13 15:38:32,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:32,198 INFO L134 CoverageAnalysis]: Checked inductivity of 149 backedges. 89 proven. 0 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2024-11-13 15:38:32,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 15:38:32,198 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155682657] [2024-11-13 15:38:32,198 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1155682657] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:38:32,198 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 15:38:32,198 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-13 15:38:32,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [95051290] [2024-11-13 15:38:32,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:38:32,199 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-13 15:38:32,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 15:38:32,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-13 15:38:32,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-13 15:38:32,200 INFO L87 Difference]: Start difference. First operand 17761 states and 22885 transitions. Second operand has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:38:32,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:38:32,491 INFO L93 Difference]: Finished difference Result 25235 states and 32616 transitions. [2024-11-13 15:38:32,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-13 15:38:32,492 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) Word has length 356 [2024-11-13 15:38:32,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:38:32,514 INFO L225 Difference]: With dead ends: 25235 [2024-11-13 15:38:32,515 INFO L226 Difference]: Without dead ends: 21317 [2024-11-13 15:38:32,521 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-13 15:38:32,522 INFO L432 NwaCegarLoop]: 937 mSDtfsCounter, 372 mSDsluCounter, 3340 mSDsCounter, 0 mSdLazyCounter, 42 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 372 SdHoareTripleChecker+Valid, 4277 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 42 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 15:38:32,522 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [372 Valid, 4277 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 42 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 15:38:32,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21317 states. [2024-11-13 15:38:32,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21317 to 19405. [2024-11-13 15:38:32,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19405 states, 19089 states have (on average 1.275970454188276) internal successors, (24357), 19089 states have internal predecessors, (24357), 314 states have call successors, (314), 1 states have call predecessors, (314), 1 states have return successors, (314), 314 states have call predecessors, (314), 314 states have call successors, (314) [2024-11-13 15:38:32,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19405 states to 19405 states and 24985 transitions. [2024-11-13 15:38:32,923 INFO L78 Accepts]: Start accepts. Automaton has 19405 states and 24985 transitions. Word has length 356 [2024-11-13 15:38:32,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:38:32,924 INFO L471 AbstractCegarLoop]: Abstraction has 19405 states and 24985 transitions. [2024-11-13 15:38:32,924 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 54.833333333333336) internal successors, (329), 6 states have internal predecessors, (329), 2 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 2 states have call predecessors, (6), 2 states have call successors, (6) [2024-11-13 15:38:32,924 INFO L276 IsEmpty]: Start isEmpty. Operand 19405 states and 24985 transitions. [2024-11-13 15:38:32,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 358 [2024-11-13 15:38:32,945 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:32,945 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:32,945 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57 [2024-11-13 15:38:32,946 INFO L396 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:32,946 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:32,946 INFO L85 PathProgramCache]: Analyzing trace with hash 414587049, now seen corresponding path program 1 times [2024-11-13 15:38:32,946 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 15:38:32,946 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247631900] [2024-11-13 15:38:32,946 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:32,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 15:38:35,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 15:38:35,160 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 15:38:37,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 15:38:37,460 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 15:38:37,460 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-13 15:38:37,462 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-13 15:38:37,463 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58 [2024-11-13 15:38:37,466 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:37,730 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-13 15:38:37,734 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.11 03:38:37 BoogieIcfgContainer [2024-11-13 15:38:37,734 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-13 15:38:37,735 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-13 15:38:37,735 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-13 15:38:37,736 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-13 15:38:37,736 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 03:35:24" (3/4) ... [2024-11-13 15:38:37,739 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-13 15:38:37,739 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-13 15:38:37,740 INFO L158 Benchmark]: Toolchain (without parser) took 197318.08ms. Allocated memory was 117.4MB in the beginning and 2.0GB in the end (delta: 1.9GB). Free memory was 92.2MB in the beginning and 1.3GB in the end (delta: -1.2GB). Peak memory consumption was 707.0MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,740 INFO L158 Benchmark]: CDTParser took 0.74ms. Allocated memory is still 117.4MB. Free memory is still 74.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 15:38:37,744 INFO L158 Benchmark]: CACSL2BoogieTranslator took 584.11ms. Allocated memory is still 117.4MB. Free memory was 92.2MB in the beginning and 63.4MB in the end (delta: 28.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,745 INFO L158 Benchmark]: Boogie Procedure Inliner took 227.93ms. Allocated memory is still 117.4MB. Free memory was 63.4MB in the beginning and 76.4MB in the end (delta: -12.9MB). Peak memory consumption was 50.8MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,745 INFO L158 Benchmark]: Boogie Preprocessor took 315.42ms. Allocated memory is still 117.4MB. Free memory was 76.4MB in the beginning and 71.6MB in the end (delta: 4.7MB). Peak memory consumption was 16.6MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,745 INFO L158 Benchmark]: RCFGBuilder took 2649.56ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 71.5MB in the beginning and 151.5MB in the end (delta: -80.0MB). Peak memory consumption was 112.7MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,745 INFO L158 Benchmark]: TraceAbstraction took 193528.08ms. Allocated memory was 234.9MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 151.5MB in the beginning and 1.3GB in the end (delta: -1.1GB). Peak memory consumption was 637.8MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,745 INFO L158 Benchmark]: Witness Printer took 4.00ms. Allocated memory is still 2.0GB. Free memory was 1.3GB in the beginning and 1.3GB in the end (delta: 171.8kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 15:38:37,746 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.74ms. Allocated memory is still 117.4MB. Free memory is still 74.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 584.11ms. Allocated memory is still 117.4MB. Free memory was 92.2MB in the beginning and 63.4MB in the end (delta: 28.8MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 227.93ms. Allocated memory is still 117.4MB. Free memory was 63.4MB in the beginning and 76.4MB in the end (delta: -12.9MB). Peak memory consumption was 50.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 315.42ms. Allocated memory is still 117.4MB. Free memory was 76.4MB in the beginning and 71.6MB in the end (delta: 4.7MB). Peak memory consumption was 16.6MB. Max. memory is 16.1GB. * RCFGBuilder took 2649.56ms. Allocated memory was 117.4MB in the beginning and 234.9MB in the end (delta: 117.4MB). Free memory was 71.5MB in the beginning and 151.5MB in the end (delta: -80.0MB). Peak memory consumption was 112.7MB. Max. memory is 16.1GB. * TraceAbstraction took 193528.08ms. Allocated memory was 234.9MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 151.5MB in the beginning and 1.3GB in the end (delta: -1.1GB). Peak memory consumption was 637.8MB. Max. memory is 16.1GB. * Witness Printer took 4.00ms. Allocated memory is still 2.0GB. Free memory was 1.3GB in the beginning and 1.3GB in the end (delta: 171.8kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 290, overapproximation of bitwiseOr at line 145, overapproximation of bitwiseOr at line 126, overapproximation of bitwiseAnd at line 146, overapproximation of bitwiseAnd at line 202, overapproximation of bitwiseAnd at line 106, overapproximation of bitwiseAnd at line 384, overapproximation of bitwiseAnd at line 441, overapproximation of bitwiseAnd at line 228, overapproximation of bitwiseAnd at line 210, overapproximation of bitwiseAnd at line 403, overapproximation of bitwiseAnd at line 234, overapproximation of bitwiseAnd at line 365, overapproximation of bitwiseAnd at line 222, overapproximation of bitwiseAnd at line 110, overapproximation of bitwiseAnd at line 299, overapproximation of bitwiseAnd at line 515. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 64); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (64 - 1); [L32] const SORT_11 mask_SORT_11 = (SORT_11)-1 >> (sizeof(SORT_11) * 8 - 5); [L33] const SORT_11 msb_SORT_11 = (SORT_11)1 << (5 - 1); [L35] const SORT_13 mask_SORT_13 = (SORT_13)-1 >> (sizeof(SORT_13) * 8 - 4); [L36] const SORT_13 msb_SORT_13 = (SORT_13)1 << (4 - 1); [L38] const SORT_19 mask_SORT_19 = (SORT_19)-1 >> (sizeof(SORT_19) * 8 - 3); [L39] const SORT_19 msb_SORT_19 = (SORT_19)1 << (3 - 1); [L41] const SORT_40 mask_SORT_40 = (SORT_40)-1 >> (sizeof(SORT_40) * 8 - 2); [L42] const SORT_40 msb_SORT_40 = (SORT_40)1 << (2 - 1); [L44] const SORT_13 var_15 = 8; [L45] const SORT_19 var_20 = 7; [L46] const SORT_19 var_25 = 6; [L47] const SORT_19 var_30 = 5; [L48] const SORT_19 var_35 = 4; [L49] const SORT_40 var_41 = 3; [L50] const SORT_40 var_46 = 2; [L51] const SORT_1 var_51 = 1; [L52] const SORT_13 var_64 = 9; [L53] const SORT_11 var_81 = 0; [L54] const SORT_1 var_111 = 0; [L55] const SORT_3 var_268 = 0; [L57] SORT_1 input_2; [L58] SORT_3 input_4; [L59] SORT_1 input_5; [L60] SORT_1 input_6; [L61] SORT_1 input_7; [L62] SORT_1 input_8; [L63] SORT_3 input_9; [L64] SORT_1 input_109; [L66] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L66] SORT_3 state_10 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L67] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L67] SORT_11 state_12 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L68] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L68] SORT_3 state_18 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L69] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L69] SORT_3 state_24 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L70] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L70] SORT_3 state_29 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L71] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L71] SORT_3 state_34 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L72] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L72] SORT_3 state_39 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L73] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L73] SORT_3 state_45 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L74] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L74] SORT_3 state_50 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L75] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L75] SORT_3 state_55 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L76] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L76] SORT_11 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L77] SORT_1 state_68 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L78] SORT_1 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L79] SORT_11 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L80] EXPR __VERIFIER_nondet_ulong() & mask_SORT_3 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L80] SORT_3 state_87 = __VERIFIER_nondet_ulong() & mask_SORT_3; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L81] SORT_1 state_91 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_11 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L82] SORT_11 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_11; [L84] SORT_1 init_92_arg_1 = var_51; [L85] state_91 = init_92_arg_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_ulong() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_ulong() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_105_arg_0=-256, var_105_arg_1=-1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_107_arg_0=255, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=0, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=0, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=0, var_51=1, var_53=0, var_57=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=18446744073709551615U, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=0] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=1, var_111=0, var_112=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=0, var_114_arg_1=-256, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND FALSE !(!(cond)) [L302] RET __VERIFIER_assert(!(bad_115_arg_0)) [L304] SORT_11 var_137_arg_0 = state_136; [L305] SORT_13 var_137 = var_137_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] EXPR var_137 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L306] var_137 = var_137 & mask_SORT_13 [L307] SORT_13 var_194_arg_0 = var_137; [L308] SORT_13 var_194_arg_1 = var_15; [L309] SORT_1 var_194 = var_194_arg_0 == var_194_arg_1; [L310] SORT_1 var_195_arg_0 = input_6; [L311] SORT_1 var_195_arg_1 = var_194; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_195_arg_0=0, var_195_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] EXPR var_195_arg_0 & var_195_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L312] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L313] EXPR var_195 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L313] var_195 = var_195 & mask_SORT_1 [L314] SORT_1 var_267_arg_0 = var_195; [L315] SORT_3 var_267_arg_1 = input_4; [L316] SORT_3 var_267_arg_2 = state_10; [L317] SORT_3 var_267 = var_267_arg_0 ? var_267_arg_1 : var_267_arg_2; [L318] SORT_1 var_269_arg_0 = input_7; [L319] SORT_3 var_269_arg_1 = var_268; [L320] SORT_3 var_269_arg_2 = var_267; [L321] SORT_3 var_269 = var_269_arg_0 ? var_269_arg_1 : var_269_arg_2; [L322] SORT_3 next_270_arg_1 = var_269; [L323] SORT_1 var_119_arg_0 = input_6; [L324] SORT_1 var_119_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_119_arg_0=0, var_119_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] EXPR var_119_arg_0 | var_119_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L325] SORT_1 var_119 = var_119_arg_0 | var_119_arg_1; [L326] SORT_1 var_120_arg_0 = var_119; [L327] SORT_1 var_120_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120_arg_0=0, var_120_arg_1=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] EXPR var_120_arg_0 | var_120_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L328] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L329] EXPR var_120 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L329] var_120 = var_120 & mask_SORT_1 [L330] SORT_1 var_198_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_198_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] EXPR var_198_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L331] var_198_arg_0 = var_198_arg_0 & mask_SORT_1 [L332] SORT_11 var_198 = var_198_arg_0; [L333] SORT_11 var_199_arg_0 = state_12; [L334] SORT_11 var_199_arg_1 = var_198; [L335] SORT_11 var_199 = var_199_arg_0 + var_199_arg_1; [L336] SORT_1 var_271_arg_0 = var_120; [L337] SORT_11 var_271_arg_1 = var_199; [L338] SORT_11 var_271_arg_2 = state_12; [L339] SORT_11 var_271 = var_271_arg_0 ? var_271_arg_1 : var_271_arg_2; [L340] SORT_1 var_272_arg_0 = input_7; [L341] SORT_11 var_272_arg_1 = var_81; [L342] SORT_11 var_272_arg_2 = var_271; [L343] SORT_11 var_272 = var_272_arg_0 ? var_272_arg_1 : var_272_arg_2; [L344] SORT_11 next_273_arg_1 = var_272; [L345] SORT_19 var_187_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_187_arg_0=7, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] EXPR var_187_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L346] var_187_arg_0 = var_187_arg_0 & mask_SORT_19 [L347] SORT_13 var_187 = var_187_arg_0; [L348] SORT_13 var_188_arg_0 = var_137; [L349] SORT_13 var_188_arg_1 = var_187; [L350] SORT_1 var_188 = var_188_arg_0 == var_188_arg_1; [L351] SORT_1 var_189_arg_0 = input_6; [L352] SORT_1 var_189_arg_1 = var_188; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_189_arg_0=0, var_189_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] EXPR var_189_arg_0 & var_189_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L353] SORT_1 var_189 = var_189_arg_0 & var_189_arg_1; [L354] EXPR var_189 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L354] var_189 = var_189 & mask_SORT_1 [L355] SORT_1 var_274_arg_0 = var_189; [L356] SORT_3 var_274_arg_1 = input_4; [L357] SORT_3 var_274_arg_2 = state_18; [L358] SORT_3 var_274 = var_274_arg_0 ? var_274_arg_1 : var_274_arg_2; [L359] SORT_1 var_275_arg_0 = input_7; [L360] SORT_3 var_275_arg_1 = var_268; [L361] SORT_3 var_275_arg_2 = var_274; [L362] SORT_3 var_275 = var_275_arg_0 ? var_275_arg_1 : var_275_arg_2; [L363] SORT_3 next_276_arg_1 = var_275; [L364] SORT_19 var_180_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_180_arg_0=6, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] EXPR var_180_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L365] var_180_arg_0 = var_180_arg_0 & mask_SORT_19 [L366] SORT_13 var_180 = var_180_arg_0; [L367] SORT_13 var_181_arg_0 = var_137; [L368] SORT_13 var_181_arg_1 = var_180; [L369] SORT_1 var_181 = var_181_arg_0 == var_181_arg_1; [L370] SORT_1 var_182_arg_0 = input_6; [L371] SORT_1 var_182_arg_1 = var_181; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_182_arg_0=0, var_182_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] EXPR var_182_arg_0 & var_182_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L372] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L373] EXPR var_182 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, state_136=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L373] var_182 = var_182 & mask_SORT_1 [L374] SORT_1 var_277_arg_0 = var_182; [L375] SORT_3 var_277_arg_1 = input_4; [L376] SORT_3 var_277_arg_2 = state_24; [L377] SORT_3 var_277 = var_277_arg_0 ? var_277_arg_1 : var_277_arg_2; [L378] SORT_1 var_278_arg_0 = input_7; [L379] SORT_3 var_278_arg_1 = var_268; [L380] SORT_3 var_278_arg_2 = var_277; [L381] SORT_3 var_278 = var_278_arg_0 ? var_278_arg_1 : var_278_arg_2; [L382] SORT_3 next_279_arg_1 = var_278; [L383] SORT_19 var_173_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_173_arg_0=5, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] EXPR var_173_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L384] var_173_arg_0 = var_173_arg_0 & mask_SORT_19 [L385] SORT_13 var_173 = var_173_arg_0; [L386] SORT_13 var_174_arg_0 = var_137; [L387] SORT_13 var_174_arg_1 = var_173; [L388] SORT_1 var_174 = var_174_arg_0 == var_174_arg_1; [L389] SORT_1 var_175_arg_0 = input_6; [L390] SORT_1 var_175_arg_1 = var_174; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_175_arg_0=0, var_175_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] EXPR var_175_arg_0 & var_175_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L391] SORT_1 var_175 = var_175_arg_0 & var_175_arg_1; [L392] EXPR var_175 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, state_136=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L392] var_175 = var_175 & mask_SORT_1 [L393] SORT_1 var_280_arg_0 = var_175; [L394] SORT_3 var_280_arg_1 = input_4; [L395] SORT_3 var_280_arg_2 = state_29; [L396] SORT_3 var_280 = var_280_arg_0 ? var_280_arg_1 : var_280_arg_2; [L397] SORT_1 var_281_arg_0 = input_7; [L398] SORT_3 var_281_arg_1 = var_268; [L399] SORT_3 var_281_arg_2 = var_280; [L400] SORT_3 var_281 = var_281_arg_0 ? var_281_arg_1 : var_281_arg_2; [L401] SORT_3 next_282_arg_1 = var_281; [L402] SORT_19 var_166_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_166_arg_0=4, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] EXPR var_166_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L403] var_166_arg_0 = var_166_arg_0 & mask_SORT_19 [L404] SORT_13 var_166 = var_166_arg_0; [L405] SORT_13 var_167_arg_0 = var_137; [L406] SORT_13 var_167_arg_1 = var_166; [L407] SORT_1 var_167 = var_167_arg_0 == var_167_arg_1; [L408] SORT_1 var_168_arg_0 = input_6; [L409] SORT_1 var_168_arg_1 = var_167; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_168_arg_0=0, var_168_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] EXPR var_168_arg_0 & var_168_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L410] SORT_1 var_168 = var_168_arg_0 & var_168_arg_1; [L411] EXPR var_168 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, state_136=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L411] var_168 = var_168 & mask_SORT_1 [L412] SORT_1 var_283_arg_0 = var_168; [L413] SORT_3 var_283_arg_1 = input_4; [L414] SORT_3 var_283_arg_2 = state_34; [L415] SORT_3 var_283 = var_283_arg_0 ? var_283_arg_1 : var_283_arg_2; [L416] SORT_1 var_284_arg_0 = input_7; [L417] SORT_3 var_284_arg_1 = var_268; [L418] SORT_3 var_284_arg_2 = var_283; [L419] SORT_3 var_284 = var_284_arg_0 ? var_284_arg_1 : var_284_arg_2; [L420] SORT_3 next_285_arg_1 = var_284; [L421] SORT_40 var_159_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_159_arg_0=3, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] EXPR var_159_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L422] var_159_arg_0 = var_159_arg_0 & mask_SORT_40 [L423] SORT_13 var_159 = var_159_arg_0; [L424] SORT_13 var_160_arg_0 = var_137; [L425] SORT_13 var_160_arg_1 = var_159; [L426] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L427] SORT_1 var_161_arg_0 = input_6; [L428] SORT_1 var_161_arg_1 = var_160; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_161_arg_0=0, var_161_arg_1=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] EXPR var_161_arg_0 & var_161_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L429] SORT_1 var_161 = var_161_arg_0 & var_161_arg_1; [L430] EXPR var_161 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, state_136=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L430] var_161 = var_161 & mask_SORT_1 [L431] SORT_1 var_286_arg_0 = var_161; [L432] SORT_3 var_286_arg_1 = input_4; [L433] SORT_3 var_286_arg_2 = state_39; [L434] SORT_3 var_286 = var_286_arg_0 ? var_286_arg_1 : var_286_arg_2; [L435] SORT_1 var_287_arg_0 = input_7; [L436] SORT_3 var_287_arg_1 = var_268; [L437] SORT_3 var_287_arg_2 = var_286; [L438] SORT_3 var_287 = var_287_arg_0 ? var_287_arg_1 : var_287_arg_2; [L439] SORT_3 next_288_arg_1 = var_287; [L440] SORT_40 var_152_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_152_arg_0=2, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] EXPR var_152_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L441] var_152_arg_0 = var_152_arg_0 & mask_SORT_40 [L442] SORT_13 var_152 = var_152_arg_0; [L443] SORT_13 var_153_arg_0 = var_137; [L444] SORT_13 var_153_arg_1 = var_152; [L445] SORT_1 var_153 = var_153_arg_0 == var_153_arg_1; [L446] SORT_1 var_154_arg_0 = input_6; [L447] SORT_1 var_154_arg_1 = var_153; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_154_arg_0=0, var_154_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] EXPR var_154_arg_0 & var_154_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L448] SORT_1 var_154 = var_154_arg_0 & var_154_arg_1; [L449] EXPR var_154 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, state_136=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L449] var_154 = var_154 & mask_SORT_1 [L450] SORT_1 var_289_arg_0 = var_154; [L451] SORT_3 var_289_arg_1 = input_4; [L452] SORT_3 var_289_arg_2 = state_45; [L453] SORT_3 var_289 = var_289_arg_0 ? var_289_arg_1 : var_289_arg_2; [L454] SORT_1 var_290_arg_0 = input_7; [L455] SORT_3 var_290_arg_1 = var_268; [L456] SORT_3 var_290_arg_2 = var_289; [L457] SORT_3 var_290 = var_290_arg_0 ? var_290_arg_1 : var_290_arg_2; [L458] SORT_3 next_291_arg_1 = var_290; [L459] SORT_1 var_145_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_145_arg_0=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] EXPR var_145_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L460] var_145_arg_0 = var_145_arg_0 & mask_SORT_1 [L461] SORT_13 var_145 = var_145_arg_0; [L462] SORT_13 var_146_arg_0 = var_137; [L463] SORT_13 var_146_arg_1 = var_145; [L464] SORT_1 var_146 = var_146_arg_0 == var_146_arg_1; [L465] SORT_1 var_147_arg_0 = input_6; [L466] SORT_1 var_147_arg_1 = var_146; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_147_arg_0=0, var_147_arg_1=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] EXPR var_147_arg_0 & var_147_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L467] SORT_1 var_147 = var_147_arg_0 & var_147_arg_1; [L468] EXPR var_147 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, state_136=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_137=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L468] var_147 = var_147 & mask_SORT_1 [L469] SORT_1 var_292_arg_0 = var_147; [L470] SORT_3 var_292_arg_1 = input_4; [L471] SORT_3 var_292_arg_2 = state_50; [L472] SORT_3 var_292 = var_292_arg_0 ? var_292_arg_1 : var_292_arg_2; [L473] SORT_1 var_293_arg_0 = input_7; [L474] SORT_3 var_293_arg_1 = var_268; [L475] SORT_3 var_293_arg_2 = var_292; [L476] SORT_3 var_293 = var_293_arg_0 ? var_293_arg_1 : var_293_arg_2; [L477] SORT_3 next_294_arg_1 = var_293; [L478] SORT_13 var_138_arg_0 = var_137; [L479] SORT_1 var_138 = var_138_arg_0 != 0; [L480] SORT_1 var_139_arg_0 = var_138; [L481] SORT_1 var_139 = ~var_139_arg_0; [L482] SORT_1 var_140_arg_0 = input_6; [L483] SORT_1 var_140_arg_1 = var_139; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_140_arg_0=0, var_140_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] EXPR var_140_arg_0 & var_140_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L484] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L485] EXPR var_140 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, state_136=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L485] var_140 = var_140 & mask_SORT_1 [L486] SORT_1 var_295_arg_0 = var_140; [L487] SORT_3 var_295_arg_1 = input_4; [L488] SORT_3 var_295_arg_2 = state_55; [L489] SORT_3 var_295 = var_295_arg_0 ? var_295_arg_1 : var_295_arg_2; [L490] SORT_1 var_296_arg_0 = input_7; [L491] SORT_3 var_296_arg_1 = var_268; [L492] SORT_3 var_296_arg_2 = var_295; [L493] SORT_3 var_296 = var_296_arg_0 ? var_296_arg_1 : var_296_arg_2; [L494] SORT_3 next_297_arg_1 = var_296; [L495] SORT_1 var_298_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_298_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] EXPR var_298_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L496] var_298_arg_0 = var_298_arg_0 & mask_SORT_1 [L497] SORT_11 var_298 = var_298_arg_0; [L498] SORT_11 var_299_arg_0 = state_60; [L499] SORT_11 var_299_arg_1 = var_298; [L500] SORT_11 var_299 = var_299_arg_0 + var_299_arg_1; [L501] SORT_1 var_300_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_300_arg_0=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] EXPR var_300_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_299=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L502] var_300_arg_0 = var_300_arg_0 & mask_SORT_1 [L503] SORT_11 var_300 = var_300_arg_0; [L504] SORT_11 var_301_arg_0 = var_299; [L505] SORT_11 var_301_arg_1 = var_300; [L506] SORT_11 var_301 = var_301_arg_0 - var_301_arg_1; [L507] SORT_1 var_302_arg_0 = input_7; [L508] SORT_11 var_302_arg_1 = var_81; [L509] SORT_11 var_302_arg_2 = var_301; [L510] SORT_11 var_302 = var_302_arg_0 ? var_302_arg_1 : var_302_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_302=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] EXPR var_302 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L511] var_302 = var_302 & mask_SORT_11 [L512] SORT_11 next_303_arg_1 = var_302; [L513] SORT_1 var_228_arg_0 = state_68; [L514] SORT_1 var_228 = ~var_228_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=-1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] EXPR var_228 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L515] var_228 = var_228 & mask_SORT_1 [L516] SORT_1 var_224_arg_0 = input_8; [L517] SORT_1 var_224_arg_1 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224_arg_0=0, var_224_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] EXPR var_224_arg_0 & var_224_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L518] SORT_1 var_224 = var_224_arg_0 & var_224_arg_1; [L519] SORT_1 var_225_arg_0 = state_68; [L520] SORT_1 var_225_arg_1 = var_224; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_225_arg_0=0, var_225_arg_1=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] EXPR var_225_arg_0 | var_225_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L521] SORT_1 var_225 = var_225_arg_0 | var_225_arg_1; [L522] SORT_1 var_304_arg_0 = var_228; [L523] SORT_1 var_304_arg_1 = var_225; [L524] SORT_1 var_304_arg_2 = state_68; [L525] SORT_1 var_304 = var_304_arg_0 ? var_304_arg_1 : var_304_arg_2; [L526] SORT_1 var_305_arg_0 = input_7; [L527] SORT_1 var_305_arg_1 = var_111; [L528] SORT_1 var_305_arg_2 = var_304; [L529] SORT_1 var_305 = var_305_arg_0 ? var_305_arg_1 : var_305_arg_2; [L530] SORT_1 next_306_arg_1 = var_305; [L531] SORT_1 var_236_arg_0 = var_85; [L532] SORT_1 var_236_arg_1 = state_69; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_236_arg_0=0, var_236_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] EXPR var_236_arg_0 | var_236_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_5=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, state_136=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L533] SORT_1 var_236 = var_236_arg_0 | var_236_arg_1; [L534] SORT_1 var_307_arg_0 = var_51; [L535] SORT_1 var_307_arg_1 = var_236; [L536] SORT_1 var_307_arg_2 = state_69; [L537] SORT_1 var_307 = var_307_arg_0 ? var_307_arg_1 : var_307_arg_2; [L538] SORT_1 var_308_arg_0 = input_7; [L539] SORT_1 var_308_arg_1 = var_111; [L540] SORT_1 var_308_arg_2 = var_307; [L541] SORT_1 var_308 = var_308_arg_0 ? var_308_arg_1 : var_308_arg_2; [L542] SORT_1 next_309_arg_1 = var_308; [L543] SORT_1 var_248_arg_0 = input_6; [L544] SORT_1 var_248_arg_1 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_248_arg_0=0, var_248_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] EXPR var_248_arg_0 | var_248_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L545] SORT_1 var_248 = var_248_arg_0 | var_248_arg_1; [L546] SORT_1 var_249_arg_0 = var_248; [L547] SORT_1 var_249_arg_1 = input_7; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_249_arg_0=0, var_249_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] EXPR var_249_arg_0 | var_249_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_68=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L548] SORT_1 var_249 = var_249_arg_0 | var_249_arg_1; [L549] SORT_1 var_250_arg_0 = var_249; [L550] SORT_1 var_250_arg_1 = state_68; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_250_arg_0=0, var_250_arg_1=0, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] EXPR var_250_arg_0 | var_250_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L551] SORT_1 var_250 = var_250_arg_0 | var_250_arg_1; [L552] EXPR var_250 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_72=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L552] var_250 = var_250 & mask_SORT_1 [L553] SORT_1 var_310_arg_0 = var_250; [L554] SORT_11 var_310_arg_1 = var_82; [L555] SORT_11 var_310_arg_2 = state_72; [L556] SORT_11 var_310 = var_310_arg_0 ? var_310_arg_1 : var_310_arg_2; [L557] SORT_1 var_311_arg_0 = input_7; [L558] SORT_11 var_311_arg_1 = var_81; [L559] SORT_11 var_311_arg_2 = var_310; [L560] SORT_11 var_311 = var_311_arg_0 ? var_311_arg_1 : var_311_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_311=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] EXPR var_311 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_224=0, var_228=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L561] var_311 = var_311 & mask_SORT_11 [L562] SORT_11 next_312_arg_1 = var_311; [L563] SORT_1 var_233_arg_0 = var_224; [L564] SORT_1 var_233_arg_1 = var_228; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_233_arg_0=0, var_233_arg_1=1, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] EXPR var_233_arg_0 & var_233_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L565] SORT_1 var_233 = var_233_arg_0 & var_233_arg_1; [L566] EXPR var_233 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_4=0, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, state_87=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L566] var_233 = var_233 & mask_SORT_1 [L567] SORT_1 var_313_arg_0 = var_233; [L568] SORT_3 var_313_arg_1 = input_4; [L569] SORT_3 var_313_arg_2 = state_87; [L570] SORT_3 var_313 = var_313_arg_0 ? var_313_arg_1 : var_313_arg_2; [L571] SORT_1 var_314_arg_0 = input_7; [L572] SORT_3 var_314_arg_1 = var_268; [L573] SORT_3 var_314_arg_2 = var_313; [L574] SORT_3 var_314 = var_314_arg_0 ? var_314_arg_1 : var_314_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_314=0, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] EXPR var_314 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L575] var_314 = var_314 & mask_SORT_3 [L576] SORT_3 next_315_arg_1 = var_314; [L577] SORT_1 next_316_arg_1 = var_111; [L578] SORT_1 var_204_arg_0 = input_6; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_204_arg_0=0, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] EXPR var_204_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_7=0, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, next_270_arg_1=0, next_273_arg_1=0, next_276_arg_1=0, next_279_arg_1=0, next_282_arg_1=0, next_285_arg_1=0, next_288_arg_1=0, next_291_arg_1=0, next_294_arg_1=0, next_297_arg_1=0, next_303_arg_1=0, next_306_arg_1=0, next_309_arg_1=0, next_312_arg_1=0, next_315_arg_1=0, next_316_arg_1=0, state_136=0, var_111=0, var_120=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L579] var_204_arg_0 = var_204_arg_0 & mask_SORT_1 [L580] SORT_11 var_204 = var_204_arg_0; [L581] SORT_11 var_205_arg_0 = state_136; [L582] SORT_11 var_205_arg_1 = var_204; [L583] SORT_11 var_205 = var_205_arg_0 + var_205_arg_1; [L584] SORT_1 var_317_arg_0 = var_120; [L585] SORT_11 var_317_arg_1 = var_205; [L586] SORT_11 var_317_arg_2 = state_136; [L587] SORT_11 var_317 = var_317_arg_0 ? var_317_arg_1 : var_317_arg_2; [L588] SORT_1 var_318_arg_0 = input_7; [L589] SORT_11 var_318_arg_1 = var_81; [L590] SORT_11 var_318_arg_2 = var_317; [L591] SORT_11 var_318 = var_318_arg_0 ? var_318_arg_1 : var_318_arg_2; [L592] SORT_11 next_319_arg_1 = var_318; [L594] state_10 = next_270_arg_1 [L595] state_12 = next_273_arg_1 [L596] state_18 = next_276_arg_1 [L597] state_24 = next_279_arg_1 [L598] state_29 = next_282_arg_1 [L599] state_34 = next_285_arg_1 [L600] state_39 = next_288_arg_1 [L601] state_45 = next_291_arg_1 [L602] state_50 = next_294_arg_1 [L603] state_55 = next_297_arg_1 [L604] state_60 = next_303_arg_1 [L605] state_68 = next_306_arg_1 [L606] state_69 = next_309_arg_1 [L607] state_72 = next_312_arg_1 [L608] state_87 = next_315_arg_1 [L609] state_91 = next_316_arg_1 [L610] state_136 = next_319_arg_1 [L88] input_2 = __VERIFIER_nondet_uchar() [L89] input_4 = __VERIFIER_nondet_ulong() [L90] input_5 = __VERIFIER_nondet_uchar() [L91] input_6 = __VERIFIER_nondet_uchar() [L92] input_7 = __VERIFIER_nondet_uchar() [L93] EXPR input_7 & mask_SORT_1 VAL [mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L93] input_7 = input_7 & mask_SORT_1 [L94] input_8 = __VERIFIER_nondet_uchar() [L95] input_9 = __VERIFIER_nondet_ulong() [L96] input_109 = __VERIFIER_nondet_uchar() [L98] SORT_1 var_93_arg_0 = input_7; [L99] SORT_1 var_93_arg_1 = state_91; [L100] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L101] SORT_1 var_94_arg_0 = var_51; [L102] SORT_1 var_94 = ~var_94_arg_0; [L103] SORT_1 var_95_arg_0 = var_93; [L104] SORT_1 var_95_arg_1 = var_94; VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_95_arg_0=0, var_95_arg_1=-2] [L105] EXPR var_95_arg_0 | var_95_arg_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L105] SORT_1 var_95 = var_95_arg_0 | var_95_arg_1; [L106] EXPR var_95 & mask_SORT_1 VAL [input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L106] var_95 = var_95 & mask_SORT_1 [L107] SORT_1 constr_96_arg_0 = var_95; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L108] CALL assume_abort_if_not(constr_96_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L108] RET assume_abort_if_not(constr_96_arg_0) VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L109] SORT_13 var_65_arg_0 = var_64; VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_65_arg_0=9, var_81=0] [L110] EXPR var_65_arg_0 & mask_SORT_13 VAL [constr_96_arg_0=1, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L110] var_65_arg_0 = var_65_arg_0 & mask_SORT_13 [L111] SORT_11 var_65 = var_65_arg_0; [L112] SORT_11 var_66_arg_0 = state_60; [L113] SORT_11 var_66_arg_1 = var_65; [L114] SORT_1 var_66 = var_66_arg_0 == var_66_arg_1; [L115] SORT_1 var_97_arg_0 = var_66; [L116] SORT_1 var_97 = ~var_97_arg_0; [L117] SORT_1 var_98_arg_0 = input_6; [L118] SORT_1 var_98 = ~var_98_arg_0; [L119] SORT_1 var_99_arg_0 = var_97; [L120] SORT_1 var_99_arg_1 = var_98; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_99_arg_0=-1, var_99_arg_1=-1] [L121] EXPR var_99_arg_0 | var_99_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L121] SORT_1 var_99 = var_99_arg_0 | var_99_arg_1; [L122] SORT_1 var_100_arg_0 = var_51; [L123] SORT_1 var_100 = ~var_100_arg_0; [L124] SORT_1 var_101_arg_0 = var_99; [L125] SORT_1 var_101_arg_1 = var_100; VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_101_arg_0=255, var_101_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] EXPR var_101_arg_0 | var_101_arg_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L126] SORT_1 var_101 = var_101_arg_0 | var_101_arg_1; [L127] EXPR var_101 & mask_SORT_1 VAL [constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L127] var_101 = var_101 & mask_SORT_1 [L128] SORT_1 constr_102_arg_0 = var_101; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L129] CALL assume_abort_if_not(constr_102_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L129] RET assume_abort_if_not(constr_102_arg_0) VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L130] SORT_11 var_61_arg_0 = state_60; [L131] SORT_1 var_61 = var_61_arg_0 != 0; [L132] SORT_1 var_62_arg_0 = var_61; [L133] SORT_1 var_62 = ~var_62_arg_0; [L134] SORT_1 var_103_arg_0 = var_62; [L135] SORT_1 var_103 = ~var_103_arg_0; [L136] SORT_1 var_104_arg_0 = input_5; [L137] SORT_1 var_104 = ~var_104_arg_0; [L138] SORT_1 var_105_arg_0 = var_103; [L139] SORT_1 var_105_arg_1 = var_104; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_105_arg_0=-256, var_105_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] EXPR var_105_arg_0 | var_105_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L140] SORT_1 var_105 = var_105_arg_0 | var_105_arg_1; [L141] SORT_1 var_106_arg_0 = var_51; [L142] SORT_1 var_106 = ~var_106_arg_0; [L143] SORT_1 var_107_arg_0 = var_105; [L144] SORT_1 var_107_arg_1 = var_106; VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_107_arg_0=254, var_107_arg_1=-2, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] EXPR var_107_arg_0 | var_107_arg_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L145] SORT_1 var_107 = var_107_arg_0 | var_107_arg_1; [L146] EXPR var_107 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L146] var_107 = var_107 & mask_SORT_1 [L147] SORT_1 constr_108_arg_0 = var_107; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L148] CALL assume_abort_if_not(constr_108_arg_0) VAL [\old(cond)=1] [L22] COND FALSE !(!cond) VAL [\old(cond)=1] [L148] RET assume_abort_if_not(constr_108_arg_0) VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L150] SORT_1 var_112_arg_0 = state_91; [L151] SORT_1 var_112_arg_1 = var_111; [L152] SORT_1 var_112_arg_2 = var_51; [L153] SORT_1 var_112 = var_112_arg_0 ? var_112_arg_1 : var_112_arg_2; [L154] SORT_1 var_70_arg_0 = state_69; [L155] SORT_1 var_70 = ~var_70_arg_0; [L156] SORT_1 var_71_arg_0 = state_68; [L157] SORT_1 var_71_arg_1 = var_70; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_71_arg_0=0, var_71_arg_1=-1, var_81=0] [L158] EXPR var_71_arg_0 & var_71_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L158] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L159] SORT_11 var_73_arg_0 = state_72; [L160] SORT_1 var_73 = var_73_arg_0 != 0; [L161] SORT_1 var_74_arg_0 = var_71; [L162] SORT_1 var_74_arg_1 = var_73; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74_arg_0=0, var_74_arg_1=0, var_81=0] [L163] EXPR var_74_arg_0 & var_74_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0] [L163] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L164] SORT_1 var_75_arg_0 = state_68; [L165] SORT_1 var_75 = ~var_75_arg_0; [L166] SORT_1 var_76_arg_0 = input_6; [L167] SORT_1 var_76_arg_1 = var_75; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_76_arg_0=0, var_76_arg_1=-1, var_81=0] [L168] EXPR var_76_arg_0 & var_76_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L168] SORT_1 var_76 = var_76_arg_0 & var_76_arg_1; [L169] SORT_1 var_77_arg_0 = var_76; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_77_arg_0=0, var_81=0] [L170] EXPR var_77_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L170] var_77_arg_0 = var_77_arg_0 & mask_SORT_1 [L171] SORT_11 var_77 = var_77_arg_0; [L172] SORT_11 var_78_arg_0 = state_72; [L173] SORT_11 var_78_arg_1 = var_77; [L174] SORT_11 var_78 = var_78_arg_0 + var_78_arg_1; [L175] SORT_1 var_79_arg_0 = input_5; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_79_arg_0=1, var_81=0] [L176] EXPR var_79_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_78=0, var_81=0] [L176] var_79_arg_0 = var_79_arg_0 & mask_SORT_1 [L177] SORT_11 var_79 = var_79_arg_0; [L178] SORT_11 var_80_arg_0 = var_78; [L179] SORT_11 var_80_arg_1 = var_79; [L180] SORT_11 var_80 = var_80_arg_0 - var_80_arg_1; [L181] SORT_1 var_82_arg_0 = input_7; [L182] SORT_11 var_82_arg_1 = var_81; [L183] SORT_11 var_82_arg_2 = var_80; [L184] SORT_11 var_82 = var_82_arg_0 ? var_82_arg_1 : var_82_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0, var_82=0] [L185] EXPR var_82 & mask_SORT_11 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_74=0, var_81=0] [L185] var_82 = var_82 & mask_SORT_11 [L186] SORT_11 var_83_arg_0 = var_82; [L187] SORT_1 var_83 = var_83_arg_0 != 0; [L188] SORT_1 var_84_arg_0 = var_83; [L189] SORT_1 var_84 = ~var_84_arg_0; [L190] SORT_1 var_85_arg_0 = var_74; [L191] SORT_1 var_85_arg_1 = var_84; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85_arg_0=0, var_85_arg_1=-1] [L192] EXPR var_85_arg_0 & var_85_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0] [L192] SORT_1 var_85 = var_85_arg_0 & var_85_arg_1; [L193] SORT_1 var_86_arg_0 = var_85; [L194] SORT_1 var_86 = ~var_86_arg_0; [L195] SORT_11 var_14_arg_0 = state_12; [L196] SORT_13 var_14 = var_14_arg_0 >> 0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] EXPR var_14 & mask_SORT_13 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L197] var_14 = var_14 & mask_SORT_13 [L198] SORT_13 var_56_arg_0 = var_14; [L199] SORT_1 var_56 = var_56_arg_0 != 0; [L200] SORT_1 var_57_arg_0 = var_56; [L201] SORT_1 var_57 = ~var_57_arg_0; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=-1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] EXPR var_57 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L202] var_57 = var_57 & mask_SORT_1 [L203] SORT_1 var_52_arg_0 = var_51; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_52_arg_0=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] EXPR var_52_arg_0 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L204] var_52_arg_0 = var_52_arg_0 & mask_SORT_1 [L205] SORT_13 var_52 = var_52_arg_0; [L206] SORT_13 var_53_arg_0 = var_14; [L207] SORT_13 var_53_arg_1 = var_52; [L208] SORT_1 var_53 = var_53_arg_0 == var_53_arg_1; [L209] SORT_40 var_47_arg_0 = var_46; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_47_arg_0=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] EXPR var_47_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L210] var_47_arg_0 = var_47_arg_0 & mask_SORT_40 [L211] SORT_13 var_47 = var_47_arg_0; [L212] SORT_13 var_48_arg_0 = var_14; [L213] SORT_13 var_48_arg_1 = var_47; [L214] SORT_1 var_48 = var_48_arg_0 == var_48_arg_1; [L215] SORT_40 var_42_arg_0 = var_41; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_42_arg_0=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] EXPR var_42_arg_0 & mask_SORT_40 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L216] var_42_arg_0 = var_42_arg_0 & mask_SORT_40 [L217] SORT_13 var_42 = var_42_arg_0; [L218] SORT_13 var_43_arg_0 = var_14; [L219] SORT_13 var_43_arg_1 = var_42; [L220] SORT_1 var_43 = var_43_arg_0 == var_43_arg_1; [L221] SORT_19 var_36_arg_0 = var_35; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_36_arg_0=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] EXPR var_36_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L222] var_36_arg_0 = var_36_arg_0 & mask_SORT_19 [L223] SORT_13 var_36 = var_36_arg_0; [L224] SORT_13 var_37_arg_0 = var_14; [L225] SORT_13 var_37_arg_1 = var_36; [L226] SORT_1 var_37 = var_37_arg_0 == var_37_arg_1; [L227] SORT_19 var_31_arg_0 = var_30; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_31_arg_0=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] EXPR var_31_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L228] var_31_arg_0 = var_31_arg_0 & mask_SORT_19 [L229] SORT_13 var_31 = var_31_arg_0; [L230] SORT_13 var_32_arg_0 = var_14; [L231] SORT_13 var_32_arg_1 = var_31; [L232] SORT_1 var_32 = var_32_arg_0 == var_32_arg_1; [L233] SORT_19 var_26_arg_0 = var_25; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_26_arg_0=6, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] EXPR var_26_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L234] var_26_arg_0 = var_26_arg_0 & mask_SORT_19 [L235] SORT_13 var_26 = var_26_arg_0; [L236] SORT_13 var_27_arg_0 = var_14; [L237] SORT_13 var_27_arg_1 = var_26; [L238] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L239] SORT_19 var_21_arg_0 = var_20; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_21_arg_0=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] EXPR var_21_arg_0 & mask_SORT_19 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_14=0, var_15=8, var_20=7, var_25=6, var_268=0, var_27=0, var_30=5, var_32=1, var_35=4, var_37=0, var_41=3, var_43=0, var_46=2, var_48=1, var_51=1, var_53=0, var_57=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L240] var_21_arg_0 = var_21_arg_0 & mask_SORT_19 [L241] SORT_13 var_21 = var_21_arg_0; [L242] SORT_13 var_22_arg_0 = var_14; [L243] SORT_13 var_22_arg_1 = var_21; [L244] SORT_1 var_22 = var_22_arg_0 == var_22_arg_1; [L245] SORT_13 var_16_arg_0 = var_14; [L246] SORT_13 var_16_arg_1 = var_15; [L247] SORT_1 var_16 = var_16_arg_0 == var_16_arg_1; [L248] SORT_1 var_17_arg_0 = var_16; [L249] SORT_3 var_17_arg_1 = state_10; [L250] SORT_3 var_17_arg_2 = input_9; [L251] SORT_3 var_17 = var_17_arg_0 ? var_17_arg_1 : var_17_arg_2; [L252] SORT_1 var_23_arg_0 = var_22; [L253] SORT_3 var_23_arg_1 = state_18; [L254] SORT_3 var_23_arg_2 = var_17; [L255] SORT_3 var_23 = var_23_arg_0 ? var_23_arg_1 : var_23_arg_2; [L256] SORT_1 var_28_arg_0 = var_27; [L257] SORT_3 var_28_arg_1 = state_24; [L258] SORT_3 var_28_arg_2 = var_23; [L259] SORT_3 var_28 = var_28_arg_0 ? var_28_arg_1 : var_28_arg_2; [L260] SORT_1 var_33_arg_0 = var_32; [L261] SORT_3 var_33_arg_1 = state_29; [L262] SORT_3 var_33_arg_2 = var_28; [L263] SORT_3 var_33 = var_33_arg_0 ? var_33_arg_1 : var_33_arg_2; [L264] SORT_1 var_38_arg_0 = var_37; [L265] SORT_3 var_38_arg_1 = state_34; [L266] SORT_3 var_38_arg_2 = var_33; [L267] SORT_3 var_38 = var_38_arg_0 ? var_38_arg_1 : var_38_arg_2; [L268] SORT_1 var_44_arg_0 = var_43; [L269] SORT_3 var_44_arg_1 = state_39; [L270] SORT_3 var_44_arg_2 = var_38; [L271] SORT_3 var_44 = var_44_arg_0 ? var_44_arg_1 : var_44_arg_2; [L272] SORT_1 var_49_arg_0 = var_48; [L273] SORT_3 var_49_arg_1 = state_45; [L274] SORT_3 var_49_arg_2 = var_44; [L275] SORT_3 var_49 = var_49_arg_0 ? var_49_arg_1 : var_49_arg_2; [L276] SORT_1 var_54_arg_0 = var_53; [L277] SORT_3 var_54_arg_1 = state_50; [L278] SORT_3 var_54_arg_2 = var_49; [L279] SORT_3 var_54 = var_54_arg_0 ? var_54_arg_1 : var_54_arg_2; [L280] SORT_1 var_58_arg_0 = var_57; [L281] SORT_3 var_58_arg_1 = state_55; [L282] SORT_3 var_58_arg_2 = var_54; [L283] SORT_3 var_58 = var_58_arg_0 ? var_58_arg_1 : var_58_arg_2; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_58=0, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] EXPR var_58 & mask_SORT_3 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_86=-1] [L284] var_58 = var_58 & mask_SORT_3 [L285] SORT_3 var_88_arg_0 = state_87; [L286] SORT_3 var_88_arg_1 = var_58; [L287] SORT_1 var_88 = var_88_arg_0 == var_88_arg_1; [L288] SORT_1 var_89_arg_0 = var_86; [L289] SORT_1 var_89_arg_1 = var_88; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0, var_89_arg_0=-1, var_89_arg_1=1] [L290] EXPR var_89_arg_0 | var_89_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, state_91=0, var_111=0, var_112=1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L290] SORT_1 var_89 = var_89_arg_0 | var_89_arg_1; [L291] SORT_1 var_110_arg_0 = state_91; [L292] SORT_1 var_110_arg_1 = input_109; [L293] SORT_1 var_110_arg_2 = var_89; [L294] SORT_1 var_110 = var_110_arg_0 ? var_110_arg_1 : var_110_arg_2; [L295] SORT_1 var_113_arg_0 = var_110; [L296] SORT_1 var_113 = ~var_113_arg_0; [L297] SORT_1 var_114_arg_0 = var_112; [L298] SORT_1 var_114_arg_1 = var_113; VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_114_arg_0=1, var_114_arg_1=-1, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] EXPR var_114_arg_0 & var_114_arg_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L299] SORT_1 var_114 = var_114_arg_0 & var_114_arg_1; [L300] EXPR var_114 & mask_SORT_1 VAL [constr_102_arg_0=1, constr_108_arg_0=1, constr_96_arg_0=1, input_5=1, input_6=0, input_7=1, mask_SORT_11=31, mask_SORT_13=15, mask_SORT_19=7, mask_SORT_1=1, mask_SORT_3=-1, mask_SORT_40=3, state_10=0, state_12=0, state_136=0, state_18=0, state_24=0, state_29=0, state_34=0, state_39=0, state_45=0, state_50=0, state_55=0, state_60=0, state_68=0, state_69=0, state_72=0, state_87=0, var_111=0, var_15=8, var_20=7, var_25=6, var_268=0, var_30=5, var_35=4, var_41=3, var_46=2, var_51=1, var_64=9, var_81=0, var_82=0, var_85=0] [L300] var_114 = var_114 & mask_SORT_1 [L301] SORT_1 bad_115_arg_0 = var_114; [L302] CALL __VERIFIER_assert(!(bad_115_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 2 procedures, 392 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 193.2s, OverallIterations: 59, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 47.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 52394 SdHoareTripleChecker+Valid, 34.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 52303 mSDsluCounter, 167840 SdHoareTripleChecker+Invalid, 29.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 135148 mSDsCounter, 238 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 52491 IncrementalHoareTripleChecker+Invalid, 52729 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 238 mSolverCounterUnsat, 32692 mSDtfsCounter, 52491 mSolverCounterSat, 0.7s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 7239 GetRequests, 6542 SyntacticMatches, 0 SemanticMatches, 697 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11254 ImplicationChecksByTransitivity, 14.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=19405occurred in iteration=58, InterpolantAutomatonStates: 528, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.4s AutomataMinimizationTime, 58 MinimizatonAttempts, 33379 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 2.6s SsaConstructionTime, 40.5s SatisfiabilityAnalysisTime, 75.4s InterpolantComputationTime, 20135 NumberOfCodeBlocks, 20135 NumberOfCodeBlocksAsserted, 71 NumberOfCheckSat, 21474 ConstructedInterpolants, 0 QuantifiedInterpolants, 115171 SizeOfPredicates, 48 NumberOfNonLiveVariables, 24893 ConjunctsInSsa, 584 ConjunctsInUnsatCore, 75 InterpolantComputations, 54 PerfectInterpolantSequences, 7225/8341 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-13 15:38:37,801 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 15:38:40,450 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 15:38:40,581 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-13 15:38:40,587 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 15:38:40,588 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 15:38:40,612 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 15:38:40,613 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 15:38:40,613 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 15:38:40,613 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 15:38:40,614 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 15:38:40,614 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 15:38:40,614 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 15:38:40,614 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 15:38:40,614 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 15:38:40,615 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 15:38:40,615 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 15:38:40,615 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 15:38:40,615 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 15:38:40,615 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 15:38:40,615 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 15:38:40,616 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 15:38:40,617 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 15:38:40,617 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 15:38:40,617 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 15:38:40,617 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 15:38:40,617 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 15:38:40,617 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 15:38:40,617 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 15:38:40,618 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> dcf39230c24eb915e747e88202e73a35b6e85db9fcbfa83adc9e68e89fc807d5 [2024-11-13 15:38:40,933 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 15:38:40,941 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 15:38:40,943 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 15:38:40,945 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 15:38:40,945 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 15:38:40,947 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c Unable to find full path for "g++" [2024-11-13 15:38:42,955 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 15:38:43,213 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 15:38:43,214 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-13 15:38:43,224 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/7736a83f2/54a3a72bb76e4a43a06f68b558318822/FLAGd0cdbba61 [2024-11-13 15:38:43,522 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/data/7736a83f2/54a3a72bb76e4a43a06f68b558318822 [2024-11-13 15:38:43,524 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 15:38:43,526 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 15:38:43,527 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 15:38:43,527 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 15:38:43,532 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 15:38:43,532 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 03:38:43" (1/1) ... [2024-11-13 15:38:43,533 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46e1ca30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:43, skipping insertion in model container [2024-11-13 15:38:43,534 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 03:38:43" (1/1) ... [2024-11-13 15:38:43,583 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 15:38:43,778 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-13 15:38:44,028 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 15:38:44,044 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 15:38:44,058 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c[1279,1292] [2024-11-13 15:38:44,161 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 15:38:44,176 INFO L204 MainTranslator]: Completed translation [2024-11-13 15:38:44,176 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44 WrapperNode [2024-11-13 15:38:44,177 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 15:38:44,178 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 15:38:44,178 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 15:38:44,178 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 15:38:44,185 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,212 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,261 INFO L138 Inliner]: procedures = 17, calls = 11, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 638 [2024-11-13 15:38:44,262 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 15:38:44,262 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 15:38:44,262 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 15:38:44,263 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 15:38:44,271 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,272 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,283 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,319 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 15:38:44,319 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,320 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,336 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,340 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,343 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,345 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,351 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 15:38:44,356 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 15:38:44,356 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 15:38:44,356 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 15:38:44,357 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (1/1) ... [2024-11-13 15:38:44,367 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 15:38:44,381 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:38:44,393 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 15:38:44,420 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 15:38:44,445 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 15:38:44,445 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-13 15:38:44,445 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 15:38:44,446 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 15:38:44,446 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 15:38:44,446 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 15:38:44,651 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 15:38:44,654 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 15:38:45,453 INFO L? ?]: Removed 198 outVars from TransFormulas that were not future-live. [2024-11-13 15:38:45,453 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 15:38:45,464 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 15:38:45,464 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 15:38:45,465 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 03:38:45 BoogieIcfgContainer [2024-11-13 15:38:45,465 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 15:38:45,467 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 15:38:45,468 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 15:38:45,475 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 15:38:45,476 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 03:38:43" (1/3) ... [2024-11-13 15:38:45,476 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3483fd59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 03:38:45, skipping insertion in model container [2024-11-13 15:38:45,476 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 03:38:44" (2/3) ... [2024-11-13 15:38:45,477 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3483fd59 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 03:38:45, skipping insertion in model container [2024-11-13 15:38:45,477 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 03:38:45" (3/3) ... [2024-11-13 15:38:45,478 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c [2024-11-13 15:38:45,494 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 15:38:45,497 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.circular_pointer_top_w64_d8_e0.c that has 2 procedures, 20 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 15:38:45,557 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 15:38:45,574 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@f41bf95, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 15:38:45,574 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 15:38:45,578 INFO L276 IsEmpty]: Start isEmpty. Operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 15:38:45,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2024-11-13 15:38:45,587 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:45,587 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:45,588 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:45,593 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:45,595 INFO L85 PathProgramCache]: Analyzing trace with hash 1676994902, now seen corresponding path program 1 times [2024-11-13 15:38:45,608 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 15:38:45,608 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [31633875] [2024-11-13 15:38:45,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:45,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:38:45,609 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:38:45,612 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:38:45,616 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 15:38:45,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:45,997 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-13 15:38:46,006 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:46,367 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-11-13 15:38:46,367 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:38:46,591 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 15:38:46,592 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [31633875] [2024-11-13 15:38:46,592 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [31633875] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:38:46,592 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [1741932271] [2024-11-13 15:38:46,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:46,592 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 15:38:46,593 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 15:38:46,597 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 15:38:46,598 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Waiting until timeout for monitored process [2024-11-13 15:38:47,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:47,166 INFO L255 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-13 15:38:47,177 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:47,292 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-13 15:38:47,292 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 15:38:47,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [1741932271] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 15:38:47,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-13 15:38:47,293 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [7] total 7 [2024-11-13 15:38:47,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812022075] [2024-11-13 15:38:47,297 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 15:38:47,301 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 15:38:47,301 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 15:38:47,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 15:38:47,323 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:38:47,325 INFO L87 Difference]: Start difference. First operand has 20 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:38:47,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:38:47,464 INFO L93 Difference]: Finished difference Result 43 states and 63 transitions. [2024-11-13 15:38:47,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 15:38:47,466 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 23 [2024-11-13 15:38:47,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:38:47,473 INFO L225 Difference]: With dead ends: 43 [2024-11-13 15:38:47,473 INFO L226 Difference]: Without dead ends: 25 [2024-11-13 15:38:47,476 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2024-11-13 15:38:47,479 INFO L432 NwaCegarLoop]: 14 mSDtfsCounter, 0 mSDsluCounter, 24 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 38 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 15:38:47,480 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 38 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 15:38:47,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2024-11-13 15:38:47,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2024-11-13 15:38:47,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 17 states have (on average 1.0588235294117647) internal successors, (18), 17 states have internal predecessors, (18), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 15:38:47,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 30 transitions. [2024-11-13 15:38:47,532 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 30 transitions. Word has length 23 [2024-11-13 15:38:47,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:38:47,533 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 30 transitions. [2024-11-13 15:38:47,533 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 1 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-13 15:38:47,534 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 30 transitions. [2024-11-13 15:38:47,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2024-11-13 15:38:47,535 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:47,536 INFO L215 NwaCegarLoop]: trace histogram [6, 6, 6, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2024-11-13 15:38:47,557 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 15:38:47,742 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (3)] Ended with exit code 0 [2024-11-13 15:38:47,939 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 15:38:47,940 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:47,940 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:47,941 INFO L85 PathProgramCache]: Analyzing trace with hash -1294995197, now seen corresponding path program 1 times [2024-11-13 15:38:47,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 15:38:47,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1209783280] [2024-11-13 15:38:47,943 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:47,943 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:38:47,943 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:38:47,945 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:38:47,948 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 15:38:48,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:48,397 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 43 conjuncts are in the unsatisfiable core [2024-11-13 15:38:48,410 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:49,148 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 15:38:49,149 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:38:49,373 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 15:38:49,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1209783280] [2024-11-13 15:38:49,374 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1209783280] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:38:49,374 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [287009819] [2024-11-13 15:38:49,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 15:38:49,374 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 15:38:49,375 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 15:38:49,376 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 15:38:49,379 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Waiting until timeout for monitored process [2024-11-13 15:38:50,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 15:38:50,260 INFO L255 TraceCheckSpWp]: Trace formula consists of 486 conjuncts, 40 conjuncts are in the unsatisfiable core [2024-11-13 15:38:50,276 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:50,716 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 23 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2024-11-13 15:38:50,717 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:38:50,894 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [287009819] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:38:50,894 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 15:38:50,894 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 10 [2024-11-13 15:38:50,894 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1687802727] [2024-11-13 15:38:50,894 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 15:38:50,895 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-11-13 15:38:50,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 15:38:50,896 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-13 15:38:50,896 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2024-11-13 15:38:50,896 INFO L87 Difference]: Start difference. First operand 25 states and 30 transitions. Second operand has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:38:51,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:38:51,393 INFO L93 Difference]: Finished difference Result 36 states and 44 transitions. [2024-11-13 15:38:51,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2024-11-13 15:38:51,394 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) Word has length 44 [2024-11-13 15:38:51,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:38:51,395 INFO L225 Difference]: With dead ends: 36 [2024-11-13 15:38:51,395 INFO L226 Difference]: Without dead ends: 34 [2024-11-13 15:38:51,396 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 83 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2024-11-13 15:38:51,396 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 7 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 76 SdHoareTripleChecker+Invalid, 139 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 15:38:51,397 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 76 Invalid, 139 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 15:38:51,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-13 15:38:51,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2024-11-13 15:38:51,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 23 states have (on average 1.0434782608695652) internal successors, (24), 23 states have internal predecessors, (24), 9 states have call successors, (9), 1 states have call predecessors, (9), 1 states have return successors, (9), 9 states have call predecessors, (9), 9 states have call successors, (9) [2024-11-13 15:38:51,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 42 transitions. [2024-11-13 15:38:51,405 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 42 transitions. Word has length 44 [2024-11-13 15:38:51,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:38:51,406 INFO L471 AbstractCegarLoop]: Abstraction has 34 states and 42 transitions. [2024-11-13 15:38:51,406 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 2.4444444444444446) internal successors, (22), 10 states have internal predecessors, (22), 3 states have call successors, (6), 1 states have call predecessors, (6), 2 states have return successors, (6), 2 states have call predecessors, (6), 3 states have call successors, (6) [2024-11-13 15:38:51,406 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 42 transitions. [2024-11-13 15:38:51,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-13 15:38:51,408 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:38:51,408 INFO L215 NwaCegarLoop]: trace histogram [9, 9, 9, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1] [2024-11-13 15:38:51,430 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-13 15:38:51,617 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (5)] Ended with exit code 0 [2024-11-13 15:38:51,812 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 15:38:51,813 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:38:51,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:38:51,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1531864950, now seen corresponding path program 2 times [2024-11-13 15:38:51,814 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 15:38:51,815 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [569202934] [2024-11-13 15:38:51,815 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 15:38:51,815 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:38:51,815 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:38:51,817 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:38:51,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 15:38:52,511 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 15:38:52,512 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 15:38:52,523 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 88 conjuncts are in the unsatisfiable core [2024-11-13 15:38:52,538 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:38:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 15:38:57,438 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:39:02,678 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse1 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse4 (= (_ bv0 8) ((_ extract 7 0) (bvand .cse1 (_ bv255 32))))) (.cse11 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse10 (= ((_ extract 7 0) (bvand .cse1 (_ bv254 32))) (_ bv0 8))) (.cse14 (= |c_ULTIMATE.start_main_~state_91~0#1| (_ bv0 8)))) (let ((.cse0 (or (forall ((|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_110_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_17|))))))))))) (_ bv0 8))) .cse14)) (.cse3 (not .cse14)) (.cse2 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse9 (not .cse10)) (.cse8 (not .cse11)) (.cse6 (not .cse4)) (.cse5 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_55~0#1|)))) (and (or (and .cse0 (or (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse2)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))) (_ bv0 8))) .cse3)) (let ((.cse7 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 64))) (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (and (or (and (or .cse4 .cse5) (or .cse6 .cse7)) .cse8) (or (and (or .cse9 .cse7) (or .cse10 .cse5)) .cse11)))) (or (and .cse0 (or .cse3 (forall ((|v_ULTIMATE.start_main_~var_85_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_114_arg_0~0#1_19| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_74_arg_1~0#1_17| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_17| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse1 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_17|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_17|) .cse2)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_17|))))))))))))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_114_arg_0~0#1_19|)))))))))) (let ((.cse12 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_15| (_ BitVec 64))) (not (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_15|))))) (.cse13 (not .cse5))) (and (or (and (or .cse9 .cse12) (or .cse10 .cse13)) .cse11) (or .cse8 (and (or .cse6 .cse12) (or .cse4 .cse13)))))))))) is different from false [2024-11-13 15:39:03,090 INFO L136 FreeRefinementEngine]: Strategy FOX found an infeasible trace [2024-11-13 15:39:03,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [569202934] [2024-11-13 15:39:03,090 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [569202934] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:39:03,090 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleCvc4 [849016407] [2024-11-13 15:39:03,090 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 15:39:03,091 INFO L173 SolverBuilder]: Constructing external solver with command: cvc4 --incremental --print-success --lang smt [2024-11-13 15:39:03,091 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 [2024-11-13 15:39:03,093 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (exit command is (exit), workingDir is null) [2024-11-13 15:39:03,094 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Waiting until timeout for monitored process [2024-11-13 15:39:04,244 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 15:39:04,244 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 15:39:04,276 INFO L255 TraceCheckSpWp]: Trace formula consists of 710 conjuncts, 87 conjuncts are in the unsatisfiable core [2024-11-13 15:39:04,288 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:39:26,967 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 12 proven. 55 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2024-11-13 15:39:26,967 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 15:39:35,733 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse4 ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_1~0#1|))) (let ((.cse6 ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_68~0#1|)) (.cse2 (forall ((|v_ULTIMATE.start_main_~var_110_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~var_111~0#1|))) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_110_arg_1~0#1_21|))))))))))))))) (let ((.cse3 (and (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse6)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|)))))))) (_ bv0 8))) .cse2))) (let ((.cse5 (= (_ bv0 32) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |c_ULTIMATE.start_main_~mask_SORT_13~0#1|) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |c_ULTIMATE.start_main_~state_12~0#1|)))))))) (.cse1 (let ((.cse7 (= |c_ULTIMATE.start_main_~state_87~0#1| (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |c_ULTIMATE.start_main_~state_55~0#1|)))) (and (or (and .cse2 (forall ((|v_ULTIMATE.start_main_~var_74_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_112_arg_2~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_71_arg_1~0#1_21| (_ BitVec 8)) (|v_ULTIMATE.start_main_~var_85_arg_1~0#1_21| (_ BitVec 8))) (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) ((_ extract 7 0) (bvor (_ bv1 32) ((_ zero_extend 24) ((_ extract 7 0) (bvnot ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_74_arg_1~0#1_21|) ((_ zero_extend 24) ((_ extract 7 0) (bvand ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_71_arg_1~0#1_21|) .cse6)))))) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_85_arg_1~0#1_21|))))))))))))))) ((_ zero_extend 24) ((_ extract 7 0) ((_ zero_extend 24) |v_ULTIMATE.start_main_~var_112_arg_2~0#1_21|))))))))))) (not .cse7)) (or .cse7 .cse3))))) (and (or (let ((.cse0 (= ((_ extract 7 0) (bvand .cse4 (_ bv254 32))) (_ bv0 8)))) (and (or .cse0 .cse1) (or (not .cse0) (and (or .cse2 (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 64))) (not (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_87~0#1|)))) (or (forall ((|v_ULTIMATE.start_main_~var_58_arg_2~0#1_19| (_ BitVec 64))) (= (bvand |c_ULTIMATE.start_main_~mask_SORT_3~0#1| |v_ULTIMATE.start_main_~var_58_arg_2~0#1_19|) |c_ULTIMATE.start_main_~state_87~0#1|)) .cse3))))) .cse5) (or (= (_ bv0 8) ((_ extract 7 0) (bvand .cse4 (_ bv255 32)))) (not .cse5) .cse1)))))) is different from false [2024-11-13 15:39:37,038 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleCvc4 [849016407] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 15:39:37,039 INFO L185 FreeRefinementEngine]: Found 0 perfect and 2 imperfect interpolant sequences. [2024-11-13 15:39:37,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 15 [2024-11-13 15:39:37,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635529670] [2024-11-13 15:39:37,039 INFO L85 oduleStraightlineAll]: Using 2 imperfect interpolants to construct interpolant automaton [2024-11-13 15:39:37,040 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-11-13 15:39:37,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy FOX [2024-11-13 15:39:37,041 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-13 15:39:37,041 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=203, Unknown=4, NotChecked=58, Total=306 [2024-11-13 15:39:37,041 INFO L87 Difference]: Start difference. First operand 34 states and 42 transitions. Second operand has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-13 15:40:13,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 15:40:13,648 INFO L93 Difference]: Finished difference Result 46 states and 57 transitions. [2024-11-13 15:40:13,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-13 15:40:13,648 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) Word has length 65 [2024-11-13 15:40:13,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 15:40:13,649 INFO L225 Difference]: With dead ends: 46 [2024-11-13 15:40:13,649 INFO L226 Difference]: Without dead ends: 44 [2024-11-13 15:40:13,651 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 52.9s TimeCoverageRelationStatistics Valid=110, Invalid=540, Unknown=8, NotChecked=98, Total=756 [2024-11-13 15:40:13,652 INFO L432 NwaCegarLoop]: 12 mSDtfsCounter, 15 mSDsluCounter, 75 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 5.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 87 SdHoareTripleChecker+Invalid, 191 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 5.3s IncrementalHoareTripleChecker+Time [2024-11-13 15:40:13,652 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [15 Valid, 87 Invalid, 191 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 5.3s Time] [2024-11-13 15:40:13,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2024-11-13 15:40:13,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2024-11-13 15:40:13,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 29 states have (on average 1.0344827586206897) internal successors, (30), 29 states have internal predecessors, (30), 12 states have call successors, (12), 1 states have call predecessors, (12), 1 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 15:40:13,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 54 transitions. [2024-11-13 15:40:13,668 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 54 transitions. Word has length 65 [2024-11-13 15:40:13,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 15:40:13,668 INFO L471 AbstractCegarLoop]: Abstraction has 43 states and 54 transitions. [2024-11-13 15:40:13,669 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 12 states have (on average 2.8333333333333335) internal successors, (34), 15 states have internal predecessors, (34), 7 states have call successors, (13), 1 states have call predecessors, (13), 2 states have return successors, (13), 6 states have call predecessors, (13), 7 states have call successors, (13) [2024-11-13 15:40:13,669 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 54 transitions. [2024-11-13 15:40:13,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2024-11-13 15:40:13,671 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 15:40:13,671 INFO L215 NwaCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1] [2024-11-13 15:40:13,690 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-13 15:40:13,882 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt (7)] Ended with exit code 0 [2024-11-13 15:40:14,075 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/cvc4 --incremental --print-success --lang smt [2024-11-13 15:40:14,076 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 15:40:14,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 15:40:14,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1616345373, now seen corresponding path program 3 times [2024-11-13 15:40:14,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy FOX [2024-11-13 15:40:14,078 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [814938836] [2024-11-13 15:40:14,078 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 15:40:14,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 15:40:14,078 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 15:40:14,080 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 15:40:14,082 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_426d5afa-00f9-49a2-a2a4-02f1d76e9865/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 15:40:16,432 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2024-11-13 15:40:16,432 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 15:40:16,443 INFO L255 TraceCheckSpWp]: Trace formula consists of 885 conjuncts, 250 conjuncts are in the unsatisfiable core [2024-11-13 15:40:16,469 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 15:43:18,157 WARN L286 SmtUtils]: Spent 12.52s on a formula simplification that was a NOOP. DAG size: 414 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 15:43:46,291 WARN L286 SmtUtils]: Spent 12.84s on a formula simplification that was a NOOP. DAG size: 424 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 15:44:18,586 WARN L286 SmtUtils]: Spent 12.75s on a formula simplification that was a NOOP. DAG size: 417 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 15:45:35,236 WARN L286 SmtUtils]: Spent 13.04s on a formula simplification that was a NOOP. DAG size: 404 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 15:46:20,423 WARN L286 SmtUtils]: Spent 12.58s on a formula simplification that was a NOOP. DAG size: 390 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate) [2024-11-13 15:47:20,586 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 63 proven. 96 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2024-11-13 15:47:20,586 INFO L311 TraceCheckSpWp]: Computing backward predicates...