./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 826ab2ba Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/config/AutomizerReach.xml -i ../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf --- Real Ultimate output --- This is Ultimate 0.3.0-dev-826ab2b [2024-11-13 13:17:05,930 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-13 13:17:06,031 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-13 13:17:06,035 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-13 13:17:06,039 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-13 13:17:06,075 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-13 13:17:06,076 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-13 13:17:06,076 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-13 13:17:06,077 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-13 13:17:06,077 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-13 13:17:06,077 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-13 13:17:06,077 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-13 13:17:06,077 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-13 13:17:06,077 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-13 13:17:06,079 INFO L153 SettingsManager]: * Use SBE=true [2024-11-13 13:17:06,079 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-13 13:17:06,079 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-13 13:17:06,079 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-13 13:17:06,080 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-13 13:17:06,080 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-13 13:17:06,080 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-13 13:17:06,080 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-13 13:17:06,081 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-13 13:17:06,082 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-13 13:17:06,082 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-13 13:17:06,082 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-13 13:17:06,082 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-13 13:17:06,082 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:17:06,082 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-13 13:17:06,083 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-13 13:17:06,083 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-13 13:17:06,083 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-13 13:17:06,083 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-13 13:17:06,083 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-13 13:17:06,084 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-13 13:17:06,084 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-13 13:17:06,084 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-13 13:17:06,084 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf [2024-11-13 13:17:06,448 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-13 13:17:06,461 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-13 13:17:06,464 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-13 13:17:06,466 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-13 13:17:06,466 INFO L274 PluginConnector]: CDTParser initialized [2024-11-13 13:17:06,468 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/../../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c Unable to find full path for "g++" [2024-11-13 13:17:08,515 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-13 13:17:08,799 INFO L384 CDTParser]: Found 1 translation units. [2024-11-13 13:17:08,800 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2024-11-13 13:17:08,812 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/data/90b1504a1/e47d890a6b8a4b87b8ac93bcf0c53f33/FLAG042ea16a2 [2024-11-13 13:17:09,118 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/data/90b1504a1/e47d890a6b8a4b87b8ac93bcf0c53f33 [2024-11-13 13:17:09,121 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-13 13:17:09,122 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-13 13:17:09,124 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-13 13:17:09,124 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-13 13:17:09,128 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-13 13:17:09,129 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,130 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@62e42b60 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09, skipping insertion in model container [2024-11-13 13:17:09,130 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,145 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-13 13:17:09,310 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2024-11-13 13:17:09,335 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:17:09,345 INFO L200 MainTranslator]: Completed pre-run [2024-11-13 13:17:09,355 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2024-11-13 13:17:09,361 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-13 13:17:09,374 INFO L204 MainTranslator]: Completed translation [2024-11-13 13:17:09,375 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09 WrapperNode [2024-11-13 13:17:09,375 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-13 13:17:09,376 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-13 13:17:09,376 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-13 13:17:09,376 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-13 13:17:09,382 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,387 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,402 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2024-11-13 13:17:09,403 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-13 13:17:09,403 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-13 13:17:09,403 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-13 13:17:09,403 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-13 13:17:09,411 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,411 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,416 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,431 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-13 13:17:09,431 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,431 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,435 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,438 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,442 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,443 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,444 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-13 13:17:09,445 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-13 13:17:09,445 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-13 13:17:09,445 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-13 13:17:09,450 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (1/1) ... [2024-11-13 13:17:09,459 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-13 13:17:09,476 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:09,490 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-13 13:17:09,494 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-13 13:17:09,527 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-13 13:17:09,527 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-13 13:17:09,527 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-13 13:17:09,527 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-13 13:17:09,527 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-13 13:17:09,527 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-13 13:17:09,528 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2024-11-13 13:17:09,528 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2024-11-13 13:17:09,588 INFO L238 CfgBuilder]: Building ICFG [2024-11-13 13:17:09,590 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-13 13:17:09,763 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2024-11-13 13:17:09,763 INFO L287 CfgBuilder]: Performing block encoding [2024-11-13 13:17:09,775 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-13 13:17:09,775 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-13 13:17:09,776 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:17:09 BoogieIcfgContainer [2024-11-13 13:17:09,776 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-13 13:17:09,781 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-13 13:17:09,781 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-13 13:17:09,786 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-13 13:17:09,787 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.11 01:17:09" (1/3) ... [2024-11-13 13:17:09,788 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71ebde7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:17:09, skipping insertion in model container [2024-11-13 13:17:09,789 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.11 01:17:09" (2/3) ... [2024-11-13 13:17:09,789 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@71ebde7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.11 01:17:09, skipping insertion in model container [2024-11-13 13:17:09,789 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:17:09" (3/3) ... [2024-11-13 13:17:09,790 INFO L112 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound100.c [2024-11-13 13:17:09,810 INFO L217 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-13 13:17:09,814 INFO L154 ceAbstractionStarter]: Applying trace abstraction to ICFG fermat2-ll_unwindbound100.c that has 3 procedures, 25 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2024-11-13 13:17:09,889 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-13 13:17:09,909 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@2f10e1a1, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-13 13:17:09,909 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-13 13:17:09,915 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-13 13:17:09,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2024-11-13 13:17:09,923 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:09,924 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:09,925 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:09,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:09,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1928678447, now seen corresponding path program 1 times [2024-11-13 13:17:09,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:09,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570944728] [2024-11-13 13:17:09,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:09,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:10,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,093 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:10,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,106 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:10,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,128 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:10,129 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:10,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570944728] [2024-11-13 13:17:10,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1570944728] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:10,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:10,132 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-13 13:17:10,137 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394843927] [2024-11-13 13:17:10,138 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:10,143 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-13 13:17:10,144 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:10,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-13 13:17:10,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 13:17:10,170 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-13 13:17:10,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:10,193 INFO L93 Difference]: Finished difference Result 47 states and 64 transitions. [2024-11-13 13:17:10,194 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-13 13:17:10,195 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2024-11-13 13:17:10,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:10,202 INFO L225 Difference]: With dead ends: 47 [2024-11-13 13:17:10,203 INFO L226 Difference]: Without dead ends: 21 [2024-11-13 13:17:10,206 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-13 13:17:10,212 INFO L432 NwaCegarLoop]: 29 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:10,214 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:17:10,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2024-11-13 13:17:10,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2024-11-13 13:17:10,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:17:10,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2024-11-13 13:17:10,257 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 18 [2024-11-13 13:17:10,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:10,258 INFO L471 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2024-11-13 13:17:10,259 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 5.0) internal successors, (10), 2 states have internal predecessors, (10), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2024-11-13 13:17:10,259 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2024-11-13 13:17:10,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-13 13:17:10,261 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:10,261 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:10,262 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-13 13:17:10,262 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:10,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:10,264 INFO L85 PathProgramCache]: Analyzing trace with hash 1693786994, now seen corresponding path program 1 times [2024-11-13 13:17:10,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:10,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [903624625] [2024-11-13 13:17:10,264 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:10,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:10,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,490 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:10,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,509 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:10,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,536 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:10,536 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:10,536 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [903624625] [2024-11-13 13:17:10,536 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [903624625] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:10,536 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:10,537 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-13 13:17:10,537 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1017344349] [2024-11-13 13:17:10,537 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:10,538 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-13 13:17:10,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:10,540 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-13 13:17:10,540 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:17:10,540 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-13 13:17:10,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:10,571 INFO L93 Difference]: Finished difference Result 30 states and 34 transitions. [2024-11-13 13:17:10,571 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-13 13:17:10,572 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-13 13:17:10,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:10,572 INFO L225 Difference]: With dead ends: 30 [2024-11-13 13:17:10,573 INFO L226 Difference]: Without dead ends: 23 [2024-11-13 13:17:10,573 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-13 13:17:10,574 INFO L432 NwaCegarLoop]: 23 mSDtfsCounter, 5 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:10,574 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 57 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-13 13:17:10,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2024-11-13 13:17:10,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2024-11-13 13:17:10,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 16 states have (on average 1.25) internal successors, (20), 17 states have internal predecessors, (20), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:17:10,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 27 transitions. [2024-11-13 13:17:10,580 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 27 transitions. Word has length 19 [2024-11-13 13:17:10,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:10,581 INFO L471 AbstractCegarLoop]: Abstraction has 23 states and 27 transitions. [2024-11-13 13:17:10,581 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-13 13:17:10,581 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 27 transitions. [2024-11-13 13:17:10,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2024-11-13 13:17:10,582 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:10,582 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:10,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-13 13:17:10,582 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:10,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:10,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1695574454, now seen corresponding path program 1 times [2024-11-13 13:17:10,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:10,583 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875542166] [2024-11-13 13:17:10,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:10,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:10,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 13:17:10,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1856747795] [2024-11-13 13:17:10,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:10,659 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:10,659 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:10,663 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:10,666 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-13 13:17:10,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:10,766 INFO L255 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-13 13:17:10,773 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:11,127 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:11,127 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-13 13:17:11,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:11,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875542166] [2024-11-13 13:17:11,128 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2024-11-13 13:17:11,129 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1856747795] [2024-11-13 13:17:11,129 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1856747795] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-13 13:17:11,129 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-13 13:17:11,130 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-13 13:17:11,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7552278] [2024-11-13 13:17:11,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-13 13:17:11,131 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-13 13:17:11,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:11,132 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-13 13:17:11,133 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-13 13:17:11,133 INFO L87 Difference]: Start difference. First operand 23 states and 27 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-13 13:17:15,036 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.83s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2024-11-13 13:17:15,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:15,077 INFO L93 Difference]: Finished difference Result 35 states and 42 transitions. [2024-11-13 13:17:15,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-13 13:17:15,078 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2024-11-13 13:17:15,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:15,082 INFO L225 Difference]: With dead ends: 35 [2024-11-13 13:17:15,082 INFO L226 Difference]: Without dead ends: 33 [2024-11-13 13:17:15,082 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-13 13:17:15,083 INFO L432 NwaCegarLoop]: 20 mSDtfsCounter, 5 mSDsluCounter, 55 mSDsCounter, 0 mSdLazyCounter, 31 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 3.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 75 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 31 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 3.9s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:15,083 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 75 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 31 Invalid, 0 Unknown, 0 Unchecked, 3.9s Time] [2024-11-13 13:17:15,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2024-11-13 13:17:15,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 32. [2024-11-13 13:17:15,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 24 states have internal predecessors, (30), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2024-11-13 13:17:15,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 39 transitions. [2024-11-13 13:17:15,102 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 39 transitions. Word has length 19 [2024-11-13 13:17:15,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:15,102 INFO L471 AbstractCegarLoop]: Abstraction has 32 states and 39 transitions. [2024-11-13 13:17:15,102 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2024-11-13 13:17:15,102 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 39 transitions. [2024-11-13 13:17:15,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2024-11-13 13:17:15,103 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:15,103 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:15,128 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-13 13:17:15,304 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:15,304 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:15,304 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:15,304 INFO L85 PathProgramCache]: Analyzing trace with hash -659008770, now seen corresponding path program 1 times [2024-11-13 13:17:15,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:15,305 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612453140] [2024-11-13 13:17:15,305 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:15,305 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:15,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:15,672 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:15,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:15,680 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:15,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:15,694 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:15,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:15,811 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:15,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:15,812 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612453140] [2024-11-13 13:17:15,813 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612453140] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:15,813 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1018375477] [2024-11-13 13:17:15,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:15,813 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:15,813 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:15,815 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:15,819 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-13 13:17:15,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:15,877 INFO L255 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 10 conjuncts are in the unsatisfiable core [2024-11-13 13:17:15,879 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:16,001 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:16,001 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:16,217 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:16,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1018375477] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:16,217 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:16,217 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 12 [2024-11-13 13:17:16,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074398855] [2024-11-13 13:17:16,217 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:16,219 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-11-13 13:17:16,219 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:16,220 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-13 13:17:16,220 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2024-11-13 13:17:16,220 INFO L87 Difference]: Start difference. First operand 32 states and 39 transitions. Second operand has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-13 13:17:16,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:16,365 INFO L93 Difference]: Finished difference Result 39 states and 45 transitions. [2024-11-13 13:17:16,367 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-13 13:17:16,367 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) Word has length 25 [2024-11-13 13:17:16,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:16,368 INFO L225 Difference]: With dead ends: 39 [2024-11-13 13:17:16,368 INFO L226 Difference]: Without dead ends: 34 [2024-11-13 13:17:16,368 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 50 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2024-11-13 13:17:16,369 INFO L432 NwaCegarLoop]: 18 mSDtfsCounter, 8 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 8 SdHoareTripleChecker+Valid, 95 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:16,369 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [8 Valid, 95 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:17:16,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2024-11-13 13:17:16,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 25. [2024-11-13 13:17:16,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 18 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-13 13:17:16,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2024-11-13 13:17:16,386 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 25 [2024-11-13 13:17:16,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:16,386 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2024-11-13 13:17:16,387 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-13 13:17:16,387 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2024-11-13 13:17:16,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-13 13:17:16,388 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:16,388 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:16,409 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-13 13:17:16,589 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,3 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:16,589 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:16,589 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:16,590 INFO L85 PathProgramCache]: Analyzing trace with hash -526392068, now seen corresponding path program 1 times [2024-11-13 13:17:16,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:16,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949821885] [2024-11-13 13:17:16,590 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:16,590 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:16,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:16,725 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:16,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:16,732 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:16,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:16,739 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:16,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:16,745 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:16,745 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:16,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949821885] [2024-11-13 13:17:16,745 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949821885] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:16,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [932615387] [2024-11-13 13:17:16,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:16,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:16,745 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:16,747 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:16,749 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-13 13:17:16,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:16,810 INFO L255 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-13 13:17:16,812 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:16,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:16,884 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:16,976 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:16,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [932615387] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:16,976 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:16,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 5] total 8 [2024-11-13 13:17:16,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1707332380] [2024-11-13 13:17:16,976 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:16,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-13 13:17:16,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:16,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-13 13:17:16,978 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-13 13:17:16,978 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) [2024-11-13 13:17:17,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:17,109 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2024-11-13 13:17:17,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-13 13:17:17,110 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) Word has length 28 [2024-11-13 13:17:17,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:17,111 INFO L225 Difference]: With dead ends: 57 [2024-11-13 13:17:17,111 INFO L226 Difference]: Without dead ends: 52 [2024-11-13 13:17:17,111 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2024-11-13 13:17:17,112 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 16 mSDsluCounter, 74 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:17,115 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 96 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:17:17,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2024-11-13 13:17:17,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2024-11-13 13:17:17,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 39 states have internal predecessors, (44), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2024-11-13 13:17:17,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2024-11-13 13:17:17,165 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 28 [2024-11-13 13:17:17,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:17,166 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2024-11-13 13:17:17,167 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 5 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 4 states have call predecessors, (9), 4 states have call successors, (9) [2024-11-13 13:17:17,167 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2024-11-13 13:17:17,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2024-11-13 13:17:17,169 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:17,170 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:17,190 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-11-13 13:17:17,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:17,374 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:17,374 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:17,374 INFO L85 PathProgramCache]: Analyzing trace with hash -635631118, now seen corresponding path program 2 times [2024-11-13 13:17:17,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:17,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40649830] [2024-11-13 13:17:17,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:17,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:17,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,614 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:17,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,623 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:17,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,635 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:17,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,643 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2024-11-13 13:17:17,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,655 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2024-11-13 13:17:17,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,668 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2024-11-13 13:17:17,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:17,675 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-13 13:17:17,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:17,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40649830] [2024-11-13 13:17:17,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [40649830] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:17,676 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [471306201] [2024-11-13 13:17:17,676 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-13 13:17:17,676 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:17,676 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:17,680 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:17,681 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-13 13:17:17,820 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-13 13:17:17,820 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:17:17,821 INFO L255 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-13 13:17:17,824 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:17,962 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:17,962 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:18,187 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2024-11-13 13:17:18,188 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [471306201] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:18,188 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:18,189 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8] total 14 [2024-11-13 13:17:18,190 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326818761] [2024-11-13 13:17:18,190 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:18,190 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2024-11-13 13:17:18,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:18,191 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2024-11-13 13:17:18,191 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=111, Unknown=0, NotChecked=0, Total=182 [2024-11-13 13:17:18,192 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-13 13:17:18,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:18,520 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2024-11-13 13:17:18,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-13 13:17:18,521 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) Word has length 55 [2024-11-13 13:17:18,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:18,522 INFO L225 Difference]: With dead ends: 111 [2024-11-13 13:17:18,523 INFO L226 Difference]: Without dead ends: 106 [2024-11-13 13:17:18,523 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=184, Invalid=322, Unknown=0, NotChecked=0, Total=506 [2024-11-13 13:17:18,524 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 56 mSDsluCounter, 90 mSDsCounter, 0 mSdLazyCounter, 45 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 112 SdHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 45 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:18,524 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [56 Valid, 112 Invalid, 50 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 45 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-13 13:17:18,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2024-11-13 13:17:18,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2024-11-13 13:17:18,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 81 states have (on average 1.1358024691358024) internal successors, (92), 81 states have internal predecessors, (92), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2024-11-13 13:17:18,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2024-11-13 13:17:18,557 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 55 [2024-11-13 13:17:18,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:18,557 INFO L471 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2024-11-13 13:17:18,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 4.714285714285714) internal successors, (66), 14 states have internal predecessors, (66), 11 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 10 states have call predecessors, (18), 10 states have call successors, (18) [2024-11-13 13:17:18,558 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2024-11-13 13:17:18,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2024-11-13 13:17:18,560 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:18,560 INFO L215 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:18,566 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-13 13:17:18,764 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2024-11-13 13:17:18,764 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:18,764 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:18,764 INFO L85 PathProgramCache]: Analyzing trace with hash 355109810, now seen corresponding path program 3 times [2024-11-13 13:17:18,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:18,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581710442] [2024-11-13 13:17:18,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:18,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:18,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,451 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:19,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,456 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:19,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,472 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:19,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,478 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2024-11-13 13:17:19,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,485 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2024-11-13 13:17:19,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,497 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2024-11-13 13:17:19,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,504 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2024-11-13 13:17:19,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,511 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:19,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,516 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 13:17:19,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,526 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:19,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,533 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:17:19,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,539 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-13 13:17:19,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:19,546 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-11-13 13:17:19,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:19,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581710442] [2024-11-13 13:17:19,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1581710442] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:19,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [730473365] [2024-11-13 13:17:19,548 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-13 13:17:19,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:19,549 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:19,551 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:19,554 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-13 13:17:20,422 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-13 13:17:20,422 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:17:20,424 INFO L255 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-13 13:17:20,429 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:20,652 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:20,652 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:21,089 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2024-11-13 13:17:21,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [730473365] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:21,090 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:21,090 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 14] total 26 [2024-11-13 13:17:21,090 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [980746444] [2024-11-13 13:17:21,090 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:21,091 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-13 13:17:21,091 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:21,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-13 13:17:21,093 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=281, Invalid=369, Unknown=0, NotChecked=0, Total=650 [2024-11-13 13:17:21,093 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) [2024-11-13 13:17:21,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:21,812 INFO L93 Difference]: Finished difference Result 219 states and 253 transitions. [2024-11-13 13:17:21,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-13 13:17:21,813 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) Word has length 109 [2024-11-13 13:17:21,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:21,820 INFO L225 Difference]: With dead ends: 219 [2024-11-13 13:17:21,820 INFO L226 Difference]: Without dead ends: 214 [2024-11-13 13:17:21,822 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 274 GetRequests, 229 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=796, Invalid=1366, Unknown=0, NotChecked=0, Total=2162 [2024-11-13 13:17:21,823 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 188 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 93 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 188 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 117 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 93 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:21,823 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [188 Valid, 188 Invalid, 117 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 93 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-13 13:17:21,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2024-11-13 13:17:21,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2024-11-13 13:17:21,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 165 states have (on average 1.1393939393939394) internal successors, (188), 165 states have internal predecessors, (188), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2024-11-13 13:17:21,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 237 transitions. [2024-11-13 13:17:21,899 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 237 transitions. Word has length 109 [2024-11-13 13:17:21,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:21,899 INFO L471 AbstractCegarLoop]: Abstraction has 214 states and 237 transitions. [2024-11-13 13:17:21,900 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 5.076923076923077) internal successors, (132), 26 states have internal predecessors, (132), 23 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 22 states have call predecessors, (36), 22 states have call successors, (36) [2024-11-13 13:17:21,900 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 237 transitions. [2024-11-13 13:17:21,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-11-13 13:17:21,907 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:21,908 INFO L215 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:21,914 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-13 13:17:22,108 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2024-11-13 13:17:22,108 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:22,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:22,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1998512334, now seen corresponding path program 4 times [2024-11-13 13:17:22,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:22,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015584228] [2024-11-13 13:17:22,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:22,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:22,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,867 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:23,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,873 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:23,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,880 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:23,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,888 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2024-11-13 13:17:23,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,893 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2024-11-13 13:17:23,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,898 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2024-11-13 13:17:23,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,904 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2024-11-13 13:17:23,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,910 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:23,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,915 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 13:17:23,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,920 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:23,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,926 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:17:23,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,932 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-13 13:17:23,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,938 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 105 [2024-11-13 13:17:23,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,943 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2024-11-13 13:17:23,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,949 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-13 13:17:23,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,955 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-13 13:17:23,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,961 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 141 [2024-11-13 13:17:23,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,966 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 150 [2024-11-13 13:17:23,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,972 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-13 13:17:23,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,979 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 168 [2024-11-13 13:17:23,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,984 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 177 [2024-11-13 13:17:23,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,990 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-13 13:17:23,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:23,996 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-13 13:17:23,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:24,001 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 204 [2024-11-13 13:17:24,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:24,009 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-11-13 13:17:24,009 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:24,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015584228] [2024-11-13 13:17:24,010 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1015584228] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:24,010 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1775719702] [2024-11-13 13:17:24,010 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-13 13:17:24,012 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:24,012 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:24,016 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:24,017 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-13 13:17:24,203 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-13 13:17:24,203 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:17:24,207 INFO L255 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 47 conjuncts are in the unsatisfiable core [2024-11-13 13:17:24,224 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:24,672 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:24,672 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:26,072 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2024-11-13 13:17:26,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1775719702] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:26,072 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:26,073 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25, 26] total 50 [2024-11-13 13:17:26,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34226529] [2024-11-13 13:17:26,073 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:26,074 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 50 states [2024-11-13 13:17:26,074 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:26,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2024-11-13 13:17:26,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1133, Invalid=1317, Unknown=0, NotChecked=0, Total=2450 [2024-11-13 13:17:26,078 INFO L87 Difference]: Start difference. First operand 214 states and 237 transitions. Second operand has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 46 states have call predecessors, (72), 46 states have call successors, (72) [2024-11-13 13:17:28,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:28,214 INFO L93 Difference]: Finished difference Result 435 states and 505 transitions. [2024-11-13 13:17:28,214 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-13 13:17:28,215 INFO L78 Accepts]: Start accepts. Automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 46 states have call predecessors, (72), 46 states have call successors, (72) Word has length 217 [2024-11-13 13:17:28,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:28,223 INFO L225 Difference]: With dead ends: 435 [2024-11-13 13:17:28,224 INFO L226 Difference]: Without dead ends: 430 [2024-11-13 13:17:28,228 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 550 GetRequests, 457 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1288 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=3316, Invalid=5614, Unknown=0, NotChecked=0, Total=8930 [2024-11-13 13:17:28,228 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 354 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 192 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 354 SdHoareTripleChecker+Valid, 352 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 192 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:28,229 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [354 Valid, 352 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 192 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-13 13:17:28,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2024-11-13 13:17:28,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2024-11-13 13:17:28,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 333 states have (on average 1.1411411411411412) internal successors, (380), 333 states have internal predecessors, (380), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2024-11-13 13:17:28,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 477 transitions. [2024-11-13 13:17:28,331 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 477 transitions. Word has length 217 [2024-11-13 13:17:28,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:28,334 INFO L471 AbstractCegarLoop]: Abstraction has 430 states and 477 transitions. [2024-11-13 13:17:28,335 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 50 states, 50 states have (on average 5.28) internal successors, (264), 50 states have internal predecessors, (264), 47 states have call successors, (73), 25 states have call predecessors, (73), 24 states have return successors, (72), 46 states have call predecessors, (72), 46 states have call successors, (72) [2024-11-13 13:17:28,335 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 477 transitions. [2024-11-13 13:17:28,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 434 [2024-11-13 13:17:28,349 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:28,349 INFO L215 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:28,370 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-13 13:17:28,553 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable7 [2024-11-13 13:17:28,553 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:28,554 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:28,554 INFO L85 PathProgramCache]: Analyzing trace with hash -1504934350, now seen corresponding path program 5 times [2024-11-13 13:17:28,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:28,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153840306] [2024-11-13 13:17:28,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:28,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:28,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,061 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:17:34,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,066 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:17:34,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,071 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:17:34,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,075 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2024-11-13 13:17:34,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,080 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2024-11-13 13:17:34,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,084 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2024-11-13 13:17:34,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,090 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2024-11-13 13:17:34,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,093 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:17:34,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,098 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 13:17:34,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,102 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:17:34,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,106 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:17:34,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,112 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-13 13:17:34,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,116 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 105 [2024-11-13 13:17:34,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,123 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2024-11-13 13:17:34,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,127 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-13 13:17:34,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,131 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-13 13:17:34,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,135 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 141 [2024-11-13 13:17:34,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,140 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 150 [2024-11-13 13:17:34,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,148 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-13 13:17:34,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,152 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 168 [2024-11-13 13:17:34,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,159 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 177 [2024-11-13 13:17:34,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,164 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-13 13:17:34,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,168 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-13 13:17:34,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,173 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 204 [2024-11-13 13:17:34,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,178 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 213 [2024-11-13 13:17:34,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,182 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 222 [2024-11-13 13:17:34,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,187 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 231 [2024-11-13 13:17:34,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,193 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240 [2024-11-13 13:17:34,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,197 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 13:17:34,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,202 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258 [2024-11-13 13:17:34,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,207 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267 [2024-11-13 13:17:34,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 13:17:34,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,216 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 13:17:34,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,222 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 294 [2024-11-13 13:17:34,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,227 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 303 [2024-11-13 13:17:34,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,231 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 312 [2024-11-13 13:17:34,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,235 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 321 [2024-11-13 13:17:34,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,241 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 330 [2024-11-13 13:17:34,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,246 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 339 [2024-11-13 13:17:34,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,250 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348 [2024-11-13 13:17:34,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,257 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357 [2024-11-13 13:17:34,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,262 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:17:34,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,266 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 375 [2024-11-13 13:17:34,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,272 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 384 [2024-11-13 13:17:34,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,278 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 393 [2024-11-13 13:17:34,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,283 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 402 [2024-11-13 13:17:34,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,288 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 411 [2024-11-13 13:17:34,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,293 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 420 [2024-11-13 13:17:34,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:17:34,305 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2024-11-13 13:17:34,305 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:17:34,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153840306] [2024-11-13 13:17:34,305 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1153840306] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:17:34,305 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [536936486] [2024-11-13 13:17:34,305 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-13 13:17:34,305 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:34,305 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:17:34,307 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:17:34,312 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-13 13:17:36,421 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-13 13:17:36,421 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:17:36,433 INFO L255 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 95 conjuncts are in the unsatisfiable core [2024-11-13 13:17:36,443 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:17:37,123 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:17:37,123 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:17:40,745 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2024-11-13 13:17:40,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [536936486] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:17:40,746 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:17:40,746 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 49, 50] total 98 [2024-11-13 13:17:40,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079961187] [2024-11-13 13:17:40,746 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:17:40,748 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 98 states [2024-11-13 13:17:40,748 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:17:40,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2024-11-13 13:17:40,755 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4565, Invalid=4941, Unknown=0, NotChecked=0, Total=9506 [2024-11-13 13:17:40,756 INFO L87 Difference]: Start difference. First operand 430 states and 477 transitions. Second operand has 98 states, 98 states have (on average 5.387755102040816) internal successors, (528), 98 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2024-11-13 13:17:47,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:17:47,535 INFO L93 Difference]: Finished difference Result 867 states and 1009 transitions. [2024-11-13 13:17:47,535 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-11-13 13:17:47,536 INFO L78 Accepts]: Start accepts. Automaton has has 98 states, 98 states have (on average 5.387755102040816) internal successors, (528), 98 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) Word has length 433 [2024-11-13 13:17:47,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:17:47,545 INFO L225 Difference]: With dead ends: 867 [2024-11-13 13:17:47,548 INFO L226 Difference]: Without dead ends: 862 [2024-11-13 13:17:47,557 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 1102 GetRequests, 913 SyntacticMatches, 0 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5452 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=13540, Invalid=22750, Unknown=0, NotChecked=0, Total=36290 [2024-11-13 13:17:47,558 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 761 mSDsluCounter, 638 mSDsCounter, 0 mSdLazyCounter, 384 mSolverCounterSat, 81 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 761 SdHoareTripleChecker+Valid, 660 SdHoareTripleChecker+Invalid, 465 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 81 IncrementalHoareTripleChecker+Valid, 384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:17:47,559 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [761 Valid, 660 Invalid, 465 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [81 Valid, 384 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:17:47,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 862 states. [2024-11-13 13:17:47,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 862 to 862. [2024-11-13 13:17:47,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 862 states, 669 states have (on average 1.1420029895366217) internal successors, (764), 669 states have internal predecessors, (764), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2024-11-13 13:17:47,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 862 states to 862 states and 957 transitions. [2024-11-13 13:17:47,724 INFO L78 Accepts]: Start accepts. Automaton has 862 states and 957 transitions. Word has length 433 [2024-11-13 13:17:47,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:17:47,725 INFO L471 AbstractCegarLoop]: Abstraction has 862 states and 957 transitions. [2024-11-13 13:17:47,726 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 98 states, 98 states have (on average 5.387755102040816) internal successors, (528), 98 states have internal predecessors, (528), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2024-11-13 13:17:47,726 INFO L276 IsEmpty]: Start isEmpty. Operand 862 states and 957 transitions. [2024-11-13 13:17:47,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 866 [2024-11-13 13:17:47,751 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:17:47,751 INFO L215 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 94, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:17:47,759 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2024-11-13 13:17:47,955 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:17:47,955 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:17:47,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:17:47,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1302090802, now seen corresponding path program 6 times [2024-11-13 13:17:47,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:17:47,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049461597] [2024-11-13 13:17:47,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:17:47,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:17:48,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,123 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 2 [2024-11-13 13:18:04,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,126 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 7 [2024-11-13 13:18:04,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,128 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 15 [2024-11-13 13:18:04,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,131 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 24 [2024-11-13 13:18:04,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,133 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 33 [2024-11-13 13:18:04,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,135 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 42 [2024-11-13 13:18:04,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,138 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 51 [2024-11-13 13:18:04,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,141 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 60 [2024-11-13 13:18:04,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,144 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 69 [2024-11-13 13:18:04,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,148 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 78 [2024-11-13 13:18:04,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,152 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 87 [2024-11-13 13:18:04,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,157 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 96 [2024-11-13 13:18:04,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,161 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 105 [2024-11-13 13:18:04,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,164 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 114 [2024-11-13 13:18:04,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,168 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 123 [2024-11-13 13:18:04,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,171 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 132 [2024-11-13 13:18:04,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,174 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 141 [2024-11-13 13:18:04,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,179 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 150 [2024-11-13 13:18:04,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,183 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 159 [2024-11-13 13:18:04,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,188 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 168 [2024-11-13 13:18:04,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,192 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 177 [2024-11-13 13:18:04,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,195 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 186 [2024-11-13 13:18:04,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,199 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 195 [2024-11-13 13:18:04,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,202 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 204 [2024-11-13 13:18:04,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,205 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 213 [2024-11-13 13:18:04,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,208 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 222 [2024-11-13 13:18:04,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,212 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 231 [2024-11-13 13:18:04,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,215 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 240 [2024-11-13 13:18:04,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,218 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 249 [2024-11-13 13:18:04,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,222 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 258 [2024-11-13 13:18:04,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,225 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 267 [2024-11-13 13:18:04,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,229 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 276 [2024-11-13 13:18:04,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,232 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 285 [2024-11-13 13:18:04,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,235 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 294 [2024-11-13 13:18:04,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,239 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 303 [2024-11-13 13:18:04,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,242 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 312 [2024-11-13 13:18:04,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,246 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 321 [2024-11-13 13:18:04,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,249 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 330 [2024-11-13 13:18:04,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,253 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 339 [2024-11-13 13:18:04,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,256 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 348 [2024-11-13 13:18:04,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,259 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 357 [2024-11-13 13:18:04,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,263 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 366 [2024-11-13 13:18:04,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,266 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 375 [2024-11-13 13:18:04,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,269 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 384 [2024-11-13 13:18:04,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,273 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 393 [2024-11-13 13:18:04,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,276 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 402 [2024-11-13 13:18:04,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,280 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 411 [2024-11-13 13:18:04,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,283 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 420 [2024-11-13 13:18:04,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,286 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 429 [2024-11-13 13:18:04,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,290 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 438 [2024-11-13 13:18:04,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,293 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 447 [2024-11-13 13:18:04,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,297 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 456 [2024-11-13 13:18:04,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,300 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 465 [2024-11-13 13:18:04,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,304 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 474 [2024-11-13 13:18:04,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,307 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 483 [2024-11-13 13:18:04,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,310 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 492 [2024-11-13 13:18:04,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,314 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 501 [2024-11-13 13:18:04,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,317 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 510 [2024-11-13 13:18:04,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,321 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 519 [2024-11-13 13:18:04,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,324 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 528 [2024-11-13 13:18:04,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,328 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 537 [2024-11-13 13:18:04,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,331 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 546 [2024-11-13 13:18:04,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,335 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 555 [2024-11-13 13:18:04,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,339 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 564 [2024-11-13 13:18:04,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,342 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 573 [2024-11-13 13:18:04,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,346 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 582 [2024-11-13 13:18:04,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,350 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 591 [2024-11-13 13:18:04,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,352 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 600 [2024-11-13 13:18:04,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,355 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 609 [2024-11-13 13:18:04,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,358 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 618 [2024-11-13 13:18:04,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,362 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 627 [2024-11-13 13:18:04,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,366 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 636 [2024-11-13 13:18:04,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,370 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 645 [2024-11-13 13:18:04,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,374 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 654 [2024-11-13 13:18:04,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,378 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 663 [2024-11-13 13:18:04,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,382 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 672 [2024-11-13 13:18:04,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,386 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 681 [2024-11-13 13:18:04,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,390 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 690 [2024-11-13 13:18:04,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,394 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 699 [2024-11-13 13:18:04,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,397 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 708 [2024-11-13 13:18:04,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,401 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 717 [2024-11-13 13:18:04,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,405 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 726 [2024-11-13 13:18:04,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,409 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 735 [2024-11-13 13:18:04,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,416 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 744 [2024-11-13 13:18:04,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,420 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 753 [2024-11-13 13:18:04,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,424 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 762 [2024-11-13 13:18:04,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,429 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 771 [2024-11-13 13:18:04,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,434 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 780 [2024-11-13 13:18:04,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,438 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 789 [2024-11-13 13:18:04,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,441 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 798 [2024-11-13 13:18:04,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,444 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 807 [2024-11-13 13:18:04,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,448 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 816 [2024-11-13 13:18:04,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,452 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 825 [2024-11-13 13:18:04,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,456 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 834 [2024-11-13 13:18:04,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,461 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 843 [2024-11-13 13:18:04,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,465 INFO L368 atingTraceCheckCraig]: Compute interpolants for subsequence at non-pending call position 852 [2024-11-13 13:18:04,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-13 13:18:04,481 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2024-11-13 13:18:04,481 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-13 13:18:04,481 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049461597] [2024-11-13 13:18:04,482 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1049461597] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-13 13:18:04,482 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2005340346] [2024-11-13 13:18:04,482 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-13 13:18:04,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:04,482 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:18:04,484 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:18:04,486 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-13 13:18:08,800 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2024-11-13 13:18:08,800 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-13 13:18:08,841 INFO L255 TraceCheckSpWp]: Trace formula consists of 1945 conjuncts, 191 conjuncts are in the unsatisfiable core [2024-11-13 13:18:08,856 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-13 13:18:10,271 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 39527 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-13 13:18:10,275 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-13 13:18:15,738 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2024-11-13 13:18:15,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2005340346] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-13 13:18:15,738 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-13 13:18:15,739 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [98, 97, 98] total 104 [2024-11-13 13:18:15,739 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [42886465] [2024-11-13 13:18:15,739 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-13 13:18:15,741 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 104 states [2024-11-13 13:18:15,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-13 13:18:15,746 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2024-11-13 13:18:15,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5156, Invalid=5556, Unknown=0, NotChecked=0, Total=10712 [2024-11-13 13:18:15,748 INFO L87 Difference]: Start difference. First operand 862 states and 957 transitions. Second operand has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 101 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 100 states have call predecessors, (199), 100 states have call successors, (199) [2024-11-13 13:18:22,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-13 13:18:22,694 INFO L93 Difference]: Finished difference Result 921 states and 1027 transitions. [2024-11-13 13:18:22,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2024-11-13 13:18:22,695 INFO L78 Accepts]: Start accepts. Automaton has has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 101 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 100 states have call predecessors, (199), 100 states have call successors, (199) Word has length 865 [2024-11-13 13:18:22,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-13 13:18:22,701 INFO L225 Difference]: With dead ends: 921 [2024-11-13 13:18:22,701 INFO L226 Difference]: Without dead ends: 916 [2024-11-13 13:18:22,706 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 2116 GetRequests, 1825 SyntacticMatches, 90 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9505 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=15349, Invalid=25657, Unknown=0, NotChecked=0, Total=41006 [2024-11-13 13:18:22,706 INFO L432 NwaCegarLoop]: 22 mSDtfsCounter, 467 mSDsluCounter, 634 mSDsCounter, 0 mSdLazyCounter, 405 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 467 SdHoareTripleChecker+Valid, 656 SdHoareTripleChecker+Invalid, 412 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 405 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2024-11-13 13:18:22,707 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [467 Valid, 656 Invalid, 412 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 405 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2024-11-13 13:18:22,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 916 states. [2024-11-13 13:18:22,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 916 to 916. [2024-11-13 13:18:22,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 916 states, 711 states have (on average 1.1420534458509142) internal successors, (812), 711 states have internal predecessors, (812), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2024-11-13 13:18:22,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 916 states to 916 states and 1017 transitions. [2024-11-13 13:18:22,822 INFO L78 Accepts]: Start accepts. Automaton has 916 states and 1017 transitions. Word has length 865 [2024-11-13 13:18:22,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-13 13:18:22,824 INFO L471 AbstractCegarLoop]: Abstraction has 916 states and 1017 transitions. [2024-11-13 13:18:22,824 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 104 states, 104 states have (on average 6.730769230769231) internal successors, (700), 104 states have internal predecessors, (700), 101 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 100 states have call predecessors, (199), 100 states have call successors, (199) [2024-11-13 13:18:22,825 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 1017 transitions. [2024-11-13 13:18:22,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 920 [2024-11-13 13:18:22,858 INFO L207 NwaCegarLoop]: Found error trace [2024-11-13 13:18:22,859 INFO L215 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 100, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-13 13:18:22,871 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-13 13:18:23,059 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2024-11-13 13:18:23,060 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-13 13:18:23,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-13 13:18:23,060 INFO L85 PathProgramCache]: Analyzing trace with hash 1227073010, now seen corresponding path program 7 times [2024-11-13 13:18:23,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-13 13:18:23,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950521565] [2024-11-13 13:18:23,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-13 13:18:23,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-13 13:18:24,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unknown [2024-11-13 13:18:24,070 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1692327269] [2024-11-13 13:18:24,070 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-13 13:18:24,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:24,071 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 [2024-11-13 13:18:24,074 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-13 13:18:24,080 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-13 13:18:24,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 13:18:24,587 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-13 13:18:24,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-13 13:18:25,186 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-13 13:18:25,186 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-13 13:18:25,187 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-13 13:18:25,213 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2024-11-13 13:18:25,390 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-13 13:18:25,393 INFO L407 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1] [2024-11-13 13:18:25,750 INFO L173 ceAbstractionStarter]: Computing trace abstraction results [2024-11-13 13:18:25,758 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.11 01:18:25 BoogieIcfgContainer [2024-11-13 13:18:25,758 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-13 13:18:25,759 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-13 13:18:25,759 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-13 13:18:25,759 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-13 13:18:25,760 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.11 01:17:09" (3/4) ... [2024-11-13 13:18:25,764 INFO L136 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-13 13:18:26,052 INFO L149 WitnessManager]: Wrote witness to /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/witness.graphml [2024-11-13 13:18:26,053 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-13 13:18:26,054 INFO L158 Benchmark]: Toolchain (without parser) took 76931.67ms. Allocated memory was 117.4MB in the beginning and 1.3GB in the end (delta: 1.2GB). Free memory was 92.4MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 77.1MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,055 INFO L158 Benchmark]: CDTParser took 1.07ms. Allocated memory is still 117.4MB. Free memory is still 74.7MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 13:18:26,056 INFO L158 Benchmark]: CACSL2BoogieTranslator took 251.82ms. Allocated memory is still 117.4MB. Free memory was 92.4MB in the beginning and 81.2MB in the end (delta: 11.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,057 INFO L158 Benchmark]: Boogie Procedure Inliner took 26.95ms. Allocated memory is still 117.4MB. Free memory was 81.2MB in the beginning and 80.1MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-13 13:18:26,057 INFO L158 Benchmark]: Boogie Preprocessor took 41.05ms. Allocated memory is still 117.4MB. Free memory was 80.1MB in the beginning and 78.8MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,058 INFO L158 Benchmark]: RCFGBuilder took 331.07ms. Allocated memory is still 117.4MB. Free memory was 78.8MB in the beginning and 68.3MB in the end (delta: 10.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,058 INFO L158 Benchmark]: TraceAbstraction took 75977.29ms. Allocated memory was 117.4MB in the beginning and 1.3GB in the end (delta: 1.2GB). Free memory was 67.9MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 765.0MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,059 INFO L158 Benchmark]: Witness Printer took 294.26ms. Allocated memory is still 1.3GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2024-11-13 13:18:26,061 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 1.07ms. Allocated memory is still 117.4MB. Free memory is still 74.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 251.82ms. Allocated memory is still 117.4MB. Free memory was 92.4MB in the beginning and 81.2MB in the end (delta: 11.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 26.95ms. Allocated memory is still 117.4MB. Free memory was 81.2MB in the beginning and 80.1MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 41.05ms. Allocated memory is still 117.4MB. Free memory was 80.1MB in the beginning and 78.8MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 331.07ms. Allocated memory is still 117.4MB. Free memory was 78.8MB in the beginning and 68.3MB in the end (delta: 10.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * TraceAbstraction took 75977.29ms. Allocated memory was 117.4MB in the beginning and 1.3GB in the end (delta: 1.2GB). Free memory was 67.9MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 765.0MB. Max. memory is 16.1GB. * Witness Printer took 294.26ms. Allocated memory is still 1.3GB. Free memory was 1.2GB in the beginning and 1.2GB in the end (delta: 25.2MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; VAL [counter=0] [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=25010003, R=5002, counter=0] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=25010003, R=5002, counter=0] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=25010003, counter=0, r=10001, u=10005, v=1] [L34] EXPR counter++ VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=1, r=10000, u=10005, v=3] [L34] EXPR counter++ VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=2, r=9997, u=10005, v=5] [L34] EXPR counter++ VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=3, r=9992, u=10005, v=7] [L34] EXPR counter++ VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=4, r=9985, u=10005, v=9] [L34] EXPR counter++ VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=5, r=9976, u=10005, v=11] [L34] EXPR counter++ VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=6, r=9965, u=10005, v=13] [L34] EXPR counter++ VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=7, r=9952, u=10005, v=15] [L34] EXPR counter++ VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=8, r=9937, u=10005, v=17] [L34] EXPR counter++ VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=9, r=9920, u=10005, v=19] [L34] EXPR counter++ VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=10, r=9901, u=10005, v=21] [L34] EXPR counter++ VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=11, r=9880, u=10005, v=23] [L34] EXPR counter++ VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=12, r=9857, u=10005, v=25] [L34] EXPR counter++ VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=13, r=9832, u=10005, v=27] [L34] EXPR counter++ VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=14, r=9805, u=10005, v=29] [L34] EXPR counter++ VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=15, r=9776, u=10005, v=31] [L34] EXPR counter++ VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=16, r=9745, u=10005, v=33] [L34] EXPR counter++ VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=17, r=9712, u=10005, v=35] [L34] EXPR counter++ VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=18, r=9677, u=10005, v=37] [L34] EXPR counter++ VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=19, r=9640, u=10005, v=39] [L34] EXPR counter++ VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=20, r=9601, u=10005, v=41] [L34] EXPR counter++ VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=21, r=9560, u=10005, v=43] [L34] EXPR counter++ VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=22, r=9517, u=10005, v=45] [L34] EXPR counter++ VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=23, r=9472, u=10005, v=47] [L34] EXPR counter++ VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=24, r=9425, u=10005, v=49] [L34] EXPR counter++ VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=25, r=9376, u=10005, v=51] [L34] EXPR counter++ VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=26, r=9325, u=10005, v=53] [L34] EXPR counter++ VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=27, r=9272, u=10005, v=55] [L34] EXPR counter++ VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=28, r=9217, u=10005, v=57] [L34] EXPR counter++ VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=29, r=9160, u=10005, v=59] [L34] EXPR counter++ VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=30, r=9101, u=10005, v=61] [L34] EXPR counter++ VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=31, r=9040, u=10005, v=63] [L34] EXPR counter++ VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=32, r=8977, u=10005, v=65] [L34] EXPR counter++ VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=33, r=8912, u=10005, v=67] [L34] EXPR counter++ VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=34, r=8845, u=10005, v=69] [L34] EXPR counter++ VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=35, r=8776, u=10005, v=71] [L34] EXPR counter++ VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=36, r=8705, u=10005, v=73] [L34] EXPR counter++ VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=37, r=8632, u=10005, v=75] [L34] EXPR counter++ VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=38, r=8557, u=10005, v=77] [L34] EXPR counter++ VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=39, r=8480, u=10005, v=79] [L34] EXPR counter++ VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=40, r=8401, u=10005, v=81] [L34] EXPR counter++ VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=41, r=8320, u=10005, v=83] [L34] EXPR counter++ VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=42, r=8237, u=10005, v=85] [L34] EXPR counter++ VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=43, r=8152, u=10005, v=87] [L34] EXPR counter++ VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=44, r=8065, u=10005, v=89] [L34] EXPR counter++ VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=45, r=7976, u=10005, v=91] [L34] EXPR counter++ VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=46, r=7885, u=10005, v=93] [L34] EXPR counter++ VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=47, r=7792, u=10005, v=95] [L34] EXPR counter++ VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=48, r=7697, u=10005, v=97] [L34] EXPR counter++ VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=49, r=7600, u=10005, v=99] [L34] EXPR counter++ VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=50, r=7501, u=10005, v=101] [L34] EXPR counter++ VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=51] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=51, r=7400, u=10005, v=103] [L34] EXPR counter++ VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=52] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=52, r=7297, u=10005, v=105] [L34] EXPR counter++ VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=53] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=53, r=7192, u=10005, v=107] [L34] EXPR counter++ VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=54] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=54, r=7085, u=10005, v=109] [L34] EXPR counter++ VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=55] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=55, r=6976, u=10005, v=111] [L34] EXPR counter++ VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=56] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=56, r=6865, u=10005, v=113] [L34] EXPR counter++ VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=57] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=57, r=6752, u=10005, v=115] [L34] EXPR counter++ VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=58] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=58, r=6637, u=10005, v=117] [L34] EXPR counter++ VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=59] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=59, r=6520, u=10005, v=119] [L34] EXPR counter++ VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=60] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=60, r=6401, u=10005, v=121] [L34] EXPR counter++ VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=61] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=61, r=6280, u=10005, v=123] [L34] EXPR counter++ VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=62] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=62, r=6157, u=10005, v=125] [L34] EXPR counter++ VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=63] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=63, r=6032, u=10005, v=127] [L34] EXPR counter++ VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=64] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=64, r=5905, u=10005, v=129] [L34] EXPR counter++ VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=65] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=65, r=5776, u=10005, v=131] [L34] EXPR counter++ VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=66] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=66, r=5645, u=10005, v=133] [L34] EXPR counter++ VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=67] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=67, r=5512, u=10005, v=135] [L34] EXPR counter++ VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=68] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=68, r=5377, u=10005, v=137] [L34] EXPR counter++ VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=69] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=69, r=5240, u=10005, v=139] [L34] EXPR counter++ VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=70] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=70, r=5101, u=10005, v=141] [L34] EXPR counter++ VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=71] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=71, r=4960, u=10005, v=143] [L34] EXPR counter++ VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=72] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=72, r=4817, u=10005, v=145] [L34] EXPR counter++ VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=73] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=73, r=4672, u=10005, v=147] [L34] EXPR counter++ VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=74] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=74, r=4525, u=10005, v=149] [L34] EXPR counter++ VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=75] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=75, r=4376, u=10005, v=151] [L34] EXPR counter++ VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=76] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=76, r=4225, u=10005, v=153] [L34] EXPR counter++ VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=77] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=77, r=4072, u=10005, v=155] [L34] EXPR counter++ VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=78] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=78, r=3917, u=10005, v=157] [L34] EXPR counter++ VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=79] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=79, r=3760, u=10005, v=159] [L34] EXPR counter++ VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=80] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=80, r=3601, u=10005, v=161] [L34] EXPR counter++ VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=81] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=81, r=3440, u=10005, v=163] [L34] EXPR counter++ VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=82] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=82, r=3277, u=10005, v=165] [L34] EXPR counter++ VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=83] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=83, r=3112, u=10005, v=167] [L34] EXPR counter++ VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=84] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=84, r=2945, u=10005, v=169] [L34] EXPR counter++ VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=85] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=85, r=2776, u=10005, v=171] [L34] EXPR counter++ VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=86] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=86, r=2605, u=10005, v=173] [L34] EXPR counter++ VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=87] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=87, r=2432, u=10005, v=175] [L34] EXPR counter++ VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=88] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=88, r=2257, u=10005, v=177] [L34] EXPR counter++ VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=89] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=89, r=2080, u=10005, v=179] [L34] EXPR counter++ VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=90] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=90, r=1901, u=10005, v=181] [L34] EXPR counter++ VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=91] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=91, r=1720, u=10005, v=183] [L34] EXPR counter++ VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=92] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=92, r=1537, u=10005, v=185] [L34] EXPR counter++ VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=93] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=93, r=1352, u=10005, v=187] [L34] EXPR counter++ VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=94] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=94, r=1165, u=10005, v=189] [L34] EXPR counter++ VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=95] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=95, r=976, u=10005, v=191] [L34] EXPR counter++ VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=96] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=96, r=785, u=10005, v=193] [L34] EXPR counter++ VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=97] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=97, r=592, u=10005, v=195] [L34] EXPR counter++ VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=98] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=98, r=397, u=10005, v=197] [L34] EXPR counter++ VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=99] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=99, r=200, u=10005, v=199] [L34] EXPR counter++ VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=100] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=100, r=1, u=10005, v=201] [L34] EXPR counter++ VAL [A=25010003, counter=101, r=1, u=10005, v=201] [L34] COND FALSE !(counter++<100) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=101] [L12] COND TRUE !(cond) VAL [\old(cond)=0, counter=101] [L14] reach_error() VAL [\old(cond)=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 25 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 75.5s, OverallIterations: 11, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.1s, AutomataDifference: 21.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1861 SdHoareTripleChecker+Valid, 6.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1860 mSDsluCounter, 2320 SdHoareTripleChecker+Invalid, 5.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 2098 mSDsCounter, 160 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1231 IncrementalHoareTripleChecker+Invalid, 1391 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 160 mSolverCounterUnsat, 222 mSDtfsCounter, 1231 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 4342 GetRequests, 3675 SyntacticMatches, 92 SemanticMatches, 575 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16621 ImplicationChecksByTransitivity, 26.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=916occurred in iteration=10, InterpolantAutomatonStates: 583, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 10 MinimizatonAttempts, 10 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 9.6s SatisfiabilityAnalysisTime, 40.2s InterpolantComputationTime, 5377 NumberOfCodeBlocks, 5377 NumberOfCodeBlocksAsserted, 172 NumberOfCheckSat, 5228 ConstructedInterpolants, 0 QuantifiedInterpolants, 12589 SizeOfPredicates, 179 NumberOfNonLiveVariables, 4071 ConjunctsInSsa, 391 ConjunctsInUnsatCore, 24 InterpolantComputations, 3 PerfectInterpolantSequences, 46665/155802 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-13 13:18:26,104 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_cf8e8eda-1a06-47f2-b939-400c322af21f/bin/uautomizer-verify-qhAvR1uOyd/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE