./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c7c6ca5d Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 --- Real Ultimate output --- This is Ultimate 0.2.5-?-c7c6ca5-m [2024-11-09 15:46:59,945 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-09 15:47:00,031 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-09 15:47:00,035 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-09 15:47:00,036 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-09 15:47:00,064 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-09 15:47:00,064 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-09 15:47:00,064 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-09 15:47:00,065 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-09 15:47:00,067 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-09 15:47:00,068 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-09 15:47:00,068 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-09 15:47:00,069 INFO L153 SettingsManager]: * Use SBE=true [2024-11-09 15:47:00,069 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-09 15:47:00,070 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-09 15:47:00,070 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-09 15:47:00,070 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-09 15:47:00,070 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-09 15:47:00,071 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-09 15:47:00,071 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-09 15:47:00,071 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-09 15:47:00,072 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-09 15:47:00,072 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-09 15:47:00,072 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-09 15:47:00,072 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-09 15:47:00,073 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-09 15:47:00,073 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-09 15:47:00,073 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-09 15:47:00,073 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-09 15:47:00,073 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-09 15:47:00,074 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-09 15:47:00,074 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-09 15:47:00,074 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-09 15:47:00,074 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-09 15:47:00,075 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-09 15:47:00,075 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-09 15:47:00,075 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-09 15:47:00,075 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-09 15:47:00,076 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-09 15:47:00,076 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 [2024-11-09 15:47:00,292 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-09 15:47:00,314 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-09 15:47:00,317 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-09 15:47:00,318 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-09 15:47:00,319 INFO L274 PluginConnector]: CDTParser initialized [2024-11-09 15:47:00,319 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-09 15:47:01,794 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-09 15:47:01,966 INFO L384 CDTParser]: Found 1 translation units. [2024-11-09 15:47:01,966 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-09 15:47:01,973 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8aaf378bd/3f604b722e21420b9f7e3b8fbeb26a65/FLAGdd7dcdd23 [2024-11-09 15:47:01,989 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8aaf378bd/3f604b722e21420b9f7e3b8fbeb26a65 [2024-11-09 15:47:01,993 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-09 15:47:01,995 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-09 15:47:01,998 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-09 15:47:01,998 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-09 15:47:02,006 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-09 15:47:02,007 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 03:47:01" (1/1) ... [2024-11-09 15:47:02,010 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4ff92f03 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02, skipping insertion in model container [2024-11-09 15:47:02,010 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 09.11 03:47:01" (1/1) ... [2024-11-09 15:47:02,030 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-09 15:47:02,191 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-09 15:47:02,199 INFO L200 MainTranslator]: Completed pre-run [2024-11-09 15:47:02,212 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-09 15:47:02,226 INFO L204 MainTranslator]: Completed translation [2024-11-09 15:47:02,226 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02 WrapperNode [2024-11-09 15:47:02,226 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-09 15:47:02,227 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-09 15:47:02,227 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-09 15:47:02,227 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-09 15:47:02,234 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,240 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,254 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 65 [2024-11-09 15:47:02,254 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-09 15:47:02,255 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-09 15:47:02,255 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-09 15:47:02,256 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-09 15:47:02,265 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,265 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,266 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,278 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [1, 2]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [0, 1]. [2024-11-09 15:47:02,278 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,278 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,283 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,286 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,287 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,288 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,289 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-09 15:47:02,290 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-09 15:47:02,290 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-09 15:47:02,290 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-09 15:47:02,291 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (1/1) ... [2024-11-09 15:47:02,296 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:02,307 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:02,319 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:02,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-09 15:47:02,359 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-09 15:47:02,359 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-09 15:47:02,360 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-09 15:47:02,360 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-09 15:47:02,361 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-09 15:47:02,361 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-09 15:47:02,361 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-09 15:47:02,361 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-09 15:47:02,418 INFO L238 CfgBuilder]: Building ICFG [2024-11-09 15:47:02,419 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-09 15:47:02,594 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2024-11-09 15:47:02,594 INFO L287 CfgBuilder]: Performing block encoding [2024-11-09 15:47:02,630 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-09 15:47:02,631 INFO L316 CfgBuilder]: Removed 3 assume(true) statements. [2024-11-09 15:47:02,632 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 03:47:02 BoogieIcfgContainer [2024-11-09 15:47:02,632 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-09 15:47:02,633 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-09 15:47:02,633 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-09 15:47:02,638 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-09 15:47:02,639 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:47:02,639 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 09.11 03:47:01" (1/3) ... [2024-11-09 15:47:02,640 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26bbe64c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 03:47:02, skipping insertion in model container [2024-11-09 15:47:02,640 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:47:02,640 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 09.11 03:47:02" (2/3) ... [2024-11-09 15:47:02,641 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@26bbe64c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 09.11 03:47:02, skipping insertion in model container [2024-11-09 15:47:02,641 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-09 15:47:02,641 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 09.11 03:47:02" (3/3) ... [2024-11-09 15:47:02,643 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration.c [2024-11-09 15:47:02,697 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-09 15:47:02,698 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-09 15:47:02,699 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-09 15:47:02,699 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-09 15:47:02,699 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-09 15:47:02,699 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-09 15:47:02,700 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-09 15:47:02,700 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-09 15:47:02,704 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:02,718 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-09 15:47:02,718 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:02,718 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:02,721 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-09 15:47:02,722 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-09 15:47:02,722 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-09 15:47:02,722 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:02,723 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-09 15:47:02,723 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:02,723 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:02,724 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-09 15:47:02,724 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-09 15:47:02,729 INFO L745 eck$LassoCheckResult]: Stem: 15#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 16#L26-3true [2024-11-09 15:47:02,729 INFO L747 eck$LassoCheckResult]: Loop: 16#L26-3true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8#L17-3true assume !(foo_~i~0#1 <= foo_~size#1); 9#L17-4true foo_#res#1 := foo_~i~0#1; 3#foo_returnLabel#1true main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 14#L26-2true main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16#L26-3true [2024-11-09 15:47:02,733 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:02,734 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-09 15:47:02,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:02,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348085799] [2024-11-09 15:47:02,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:02,742 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:02,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:02,850 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:02,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:02,877 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:02,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:02,882 INFO L85 PathProgramCache]: Analyzing trace with hash 38364915, now seen corresponding path program 1 times [2024-11-09 15:47:02,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:02,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365009703] [2024-11-09 15:47:02,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:02,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:02,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:02,909 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:02,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:02,924 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:02,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:02,926 INFO L85 PathProgramCache]: Analyzing trace with hash 1809804401, now seen corresponding path program 1 times [2024-11-09 15:47:02,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:02,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097038905] [2024-11-09 15:47:02,926 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:02,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:02,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:03,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:03,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:03,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097038905] [2024-11-09 15:47:03,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2097038905] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-09 15:47:03,111 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-09 15:47:03,111 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-09 15:47:03,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207753855] [2024-11-09 15:47:03,112 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-09 15:47:03,233 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:03,265 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-09 15:47:03,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-09 15:47:03,268 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:03,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:03,341 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2024-11-09 15:47:03,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 33 transitions. [2024-11-09 15:47:03,344 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2024-11-09 15:47:03,347 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 23 states and 26 transitions. [2024-11-09 15:47:03,347 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-09 15:47:03,348 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-09 15:47:03,348 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 26 transitions. [2024-11-09 15:47:03,348 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:03,348 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 26 transitions. [2024-11-09 15:47:03,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 26 transitions. [2024-11-09 15:47:03,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 14. [2024-11-09 15:47:03,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:03,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2024-11-09 15:47:03,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-09 15:47:03,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-09 15:47:03,376 INFO L425 stractBuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-09 15:47:03,376 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-09 15:47:03,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2024-11-09 15:47:03,377 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-09 15:47:03,377 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:03,377 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:03,377 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-09 15:47:03,377 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:47:03,378 INFO L745 eck$LassoCheckResult]: Stem: 68#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 69#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 71#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 70#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 59#L17-2 [2024-11-09 15:47:03,378 INFO L747 eck$LassoCheckResult]: Loop: 59#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 60#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 59#L17-2 [2024-11-09 15:47:03,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,378 INFO L85 PathProgramCache]: Analyzing trace with hash 925771, now seen corresponding path program 1 times [2024-11-09 15:47:03,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237043347] [2024-11-09 15:47:03,379 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,410 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:03,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,432 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:03,433 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,433 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 1 times [2024-11-09 15:47:03,433 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895525184] [2024-11-09 15:47:03,434 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,434 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,446 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:03,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,453 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:03,457 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,457 INFO L85 PathProgramCache]: Analyzing trace with hash 889666569, now seen corresponding path program 1 times [2024-11-09 15:47:03,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974858654] [2024-11-09 15:47:03,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:03,611 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:03,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:03,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974858654] [2024-11-09 15:47:03,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [974858654] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:03,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [963068699] [2024-11-09 15:47:03,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:03,613 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:03,616 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:03,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-09 15:47:03,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:03,677 INFO L255 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:47:03,679 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:03,752 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:03,754 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-09 15:47:03,754 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [963068699] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-09 15:47:03,754 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-09 15:47:03,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 7 [2024-11-09 15:47:03,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186976474] [2024-11-09 15:47:03,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-09 15:47:03,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:03,820 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-09 15:47:03,820 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-09 15:47:03,821 INFO L87 Difference]: Start difference. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 5 states, 4 states have (on average 1.5) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:03,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:03,906 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2024-11-09 15:47:03,906 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 24 transitions. [2024-11-09 15:47:03,907 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-09 15:47:03,909 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 24 transitions. [2024-11-09 15:47:03,909 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-09 15:47:03,910 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-09 15:47:03,910 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 24 transitions. [2024-11-09 15:47:03,910 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:03,910 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 24 transitions. [2024-11-09 15:47:03,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 24 transitions. [2024-11-09 15:47:03,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 16. [2024-11-09 15:47:03,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.125) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:03,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2024-11-09 15:47:03,913 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-09 15:47:03,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-09 15:47:03,914 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-09 15:47:03,914 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-09 15:47:03,914 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 18 transitions. [2024-11-09 15:47:03,915 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-09 15:47:03,916 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:03,916 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:03,916 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-09 15:47:03,916 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-09 15:47:03,916 INFO L745 eck$LassoCheckResult]: Stem: 136#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 138#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 127#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 128#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 139#L17-4 [2024-11-09 15:47:03,917 INFO L747 eck$LassoCheckResult]: Loop: 139#L17-4 foo_#res#1 := foo_~i~0#1; 129#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 130#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 134#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 141#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 139#L17-4 [2024-11-09 15:47:03,917 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,921 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 1 times [2024-11-09 15:47:03,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917655444] [2024-11-09 15:47:03,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,922 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,940 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:03,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,960 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:03,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,961 INFO L85 PathProgramCache]: Analyzing trace with hash 51595455, now seen corresponding path program 2 times [2024-11-09 15:47:03,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504550775] [2024-11-09 15:47:03,961 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,970 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:03,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:03,976 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:03,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:03,977 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432377, now seen corresponding path program 1 times [2024-11-09 15:47:03,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:03,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969321923] [2024-11-09 15:47:03,978 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:03,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:03,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:04,103 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:04,104 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:04,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969321923] [2024-11-09 15:47:04,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [969321923] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:04,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1941564814] [2024-11-09 15:47:04,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:04,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:04,106 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:04,130 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:04,132 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-09 15:47:04,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:04,188 INFO L255 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:47:04,189 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:04,235 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:04,235 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:04,295 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:04,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1941564814] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:04,297 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:04,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-09 15:47:04,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1886732015] [2024-11-09 15:47:04,297 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:04,407 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:04,407 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-09 15:47:04,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-09 15:47:04,409 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. cyclomatic complexity: 4 Second operand has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:04,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:04,520 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2024-11-09 15:47:04,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 27 transitions. [2024-11-09 15:47:04,521 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-09 15:47:04,523 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 27 transitions. [2024-11-09 15:47:04,524 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2024-11-09 15:47:04,524 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-09 15:47:04,525 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 27 transitions. [2024-11-09 15:47:04,525 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:04,525 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 27 transitions. [2024-11-09 15:47:04,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 27 transitions. [2024-11-09 15:47:04,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 19. [2024-11-09 15:47:04,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:04,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2024-11-09 15:47:04,528 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-11-09 15:47:04,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-09 15:47:04,529 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-11-09 15:47:04,529 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-09 15:47:04,529 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2024-11-09 15:47:04,530 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-09 15:47:04,530 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:04,530 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:04,530 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-09 15:47:04,531 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1, 1, 1, 1] [2024-11-09 15:47:04,531 INFO L745 eck$LassoCheckResult]: Stem: 257#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 258#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 259#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 260#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 261#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 264#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 262#L17-4 [2024-11-09 15:47:04,531 INFO L747 eck$LassoCheckResult]: Loop: 262#L17-4 foo_#res#1 := foo_~i~0#1; 250#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 251#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 255#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 248#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 266#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 265#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 262#L17-4 [2024-11-09 15:47:04,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:04,531 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 2 times [2024-11-09 15:47:04,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:04,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184235986] [2024-11-09 15:47:04,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:04,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:04,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,542 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:04,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,553 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:04,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:04,553 INFO L85 PathProgramCache]: Analyzing trace with hash 1121476027, now seen corresponding path program 1 times [2024-11-09 15:47:04,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:04,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279430165] [2024-11-09 15:47:04,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:04,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:04,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,565 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:04,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,574 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:04,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:04,574 INFO L85 PathProgramCache]: Analyzing trace with hash -1242740619, now seen corresponding path program 2 times [2024-11-09 15:47:04,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:04,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57856503] [2024-11-09 15:47:04,575 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:04,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:04,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,596 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:04,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:04,620 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:04,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2024-11-09 15:47:05,065 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2024-11-09 15:47:05,137 INFO L204 LassoAnalysis]: Preferences: [2024-11-09 15:47:05,138 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-09 15:47:05,138 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-09 15:47:05,138 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-09 15:47:05,138 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-09 15:47:05,138 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:05,138 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-09 15:47:05,139 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-09 15:47:05,139 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration4_Lasso [2024-11-09 15:47:05,139 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-09 15:47:05,139 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-09 15:47:05,155 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,167 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,169 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,172 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,174 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,176 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,178 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,181 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,183 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,406 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,409 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,411 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,413 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,415 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:05,715 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-09 15:47:05,719 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-09 15:47:05,721 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:05,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:05,723 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:05,725 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-09 15:47:05,726 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:05,739 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:05,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:05,740 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:05,740 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:05,745 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:05,745 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:05,750 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-09 15:47:05,757 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-11-09 15:47:05,758 INFO L444 ModelExtractionUtils]: 3 out of 7 variables were initially zero. Simplification set additionally 1 variables to zero. [2024-11-09 15:47:05,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:05,759 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:05,761 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:05,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-09 15:47:05,764 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-09 15:47:05,781 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-09 15:47:05,782 INFO L474 LassoAnalysis]: Proved termination. [2024-11-09 15:47:05,783 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 1 Supporting invariants [] [2024-11-09 15:47:05,800 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-09 15:47:05,823 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2024-11-09 15:47:05,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:05,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:05,862 INFO L255 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:47:05,863 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:05,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:05,888 INFO L255 TraceCheckSpWp]: Trace formula consists of 52 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-09 15:47:05,889 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:06,007 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:06,011 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2024-11-09 15:47:06,012 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4 Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:06,119 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 40 states and 46 transitions. Complement of second has 13 states. [2024-11-09 15:47:06,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 1 stem states 5 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:06,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:06,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2024-11-09 15:47:06,124 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 6 letters. Loop has 9 letters. [2024-11-09 15:47:06,125 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:06,125 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 15 letters. Loop has 9 letters. [2024-11-09 15:47:06,125 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:06,125 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 6 letters. Loop has 18 letters. [2024-11-09 15:47:06,126 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:06,126 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 46 transitions. [2024-11-09 15:47:06,127 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-09 15:47:06,131 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 46 transitions. [2024-11-09 15:47:06,131 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-09 15:47:06,131 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-09 15:47:06,131 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 46 transitions. [2024-11-09 15:47:06,131 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:06,131 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 46 transitions. [2024-11-09 15:47:06,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 46 transitions. [2024-11-09 15:47:06,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 34. [2024-11-09 15:47:06,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 33 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:06,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 40 transitions. [2024-11-09 15:47:06,136 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 40 transitions. [2024-11-09 15:47:06,136 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 40 transitions. [2024-11-09 15:47:06,136 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-09 15:47:06,136 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 40 transitions. [2024-11-09 15:47:06,137 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:06,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:06,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:06,139 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:47:06,139 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-09 15:47:06,139 INFO L745 eck$LassoCheckResult]: Stem: 425#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 426#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 429#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 439#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 438#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 435#L17-4 foo_#res#1 := foo_~i~0#1; 415#foo_returnLabel#1 [2024-11-09 15:47:06,140 INFO L747 eck$LassoCheckResult]: Loop: 415#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 416#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 422#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 433#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 444#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 443#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 411#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 427#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 441#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 431#L17-4 foo_#res#1 := foo_~i~0#1; 415#foo_returnLabel#1 [2024-11-09 15:47:06,140 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:06,140 INFO L85 PathProgramCache]: Analyzing trace with hash 1809859825, now seen corresponding path program 1 times [2024-11-09 15:47:06,140 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:06,140 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736424024] [2024-11-09 15:47:06,140 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:06,140 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:06,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:06,154 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:06,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:06,166 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:06,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:06,167 INFO L85 PathProgramCache]: Analyzing trace with hash 961271861, now seen corresponding path program 2 times [2024-11-09 15:47:06,170 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:06,170 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405412608] [2024-11-09 15:47:06,170 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:06,170 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:06,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:06,183 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:06,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:06,200 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:06,203 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:06,203 INFO L85 PathProgramCache]: Analyzing trace with hash 132390213, now seen corresponding path program 3 times [2024-11-09 15:47:06,203 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:06,204 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244237102] [2024-11-09 15:47:06,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:06,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:06,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:06,317 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:06,318 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:06,318 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244237102] [2024-11-09 15:47:06,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [244237102] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:06,318 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [661864698] [2024-11-09 15:47:06,318 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-09 15:47:06,318 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:06,319 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:06,320 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:06,324 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-09 15:47:06,387 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-09 15:47:06,388 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:06,389 INFO L255 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-09 15:47:06,391 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:06,460 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:06,460 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:06,513 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:06,514 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [661864698] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:06,514 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:06,514 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2024-11-09 15:47:06,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491075954] [2024-11-09 15:47:06,515 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:06,622 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:06,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 32 [2024-11-09 15:47:06,816 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:06,817 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-09 15:47:06,817 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2024-11-09 15:47:06,817 INFO L87 Difference]: Start difference. First operand 34 states and 40 transitions. cyclomatic complexity: 9 Second operand has 12 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 12 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:06,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:06,940 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2024-11-09 15:47:06,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 68 transitions. [2024-11-09 15:47:06,942 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:06,946 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 56 states and 63 transitions. [2024-11-09 15:47:06,946 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2024-11-09 15:47:06,946 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2024-11-09 15:47:06,946 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 63 transitions. [2024-11-09 15:47:06,946 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:06,946 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 63 transitions. [2024-11-09 15:47:06,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 63 transitions. [2024-11-09 15:47:06,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 45. [2024-11-09 15:47:06,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.1333333333333333) internal successors, (51), 44 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:06,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2024-11-09 15:47:06,950 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-09 15:47:06,950 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-09 15:47:06,951 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-09 15:47:06,951 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-09 15:47:06,951 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 51 transitions. [2024-11-09 15:47:06,952 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:06,952 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:06,952 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:06,953 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-09 15:47:06,953 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-09 15:47:06,953 INFO L745 eck$LassoCheckResult]: Stem: 649#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 650#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 651#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 654#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 664#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 659#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 656#L17-4 foo_#res#1 := foo_~i~0#1; 639#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 640#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 646#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 648#L26-4 main_~i~1#1 := 0; 643#L29-3 [2024-11-09 15:47:06,953 INFO L747 eck$LassoCheckResult]: Loop: 643#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 644#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 645#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 643#L29-3 [2024-11-09 15:47:06,953 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:06,954 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432331, now seen corresponding path program 1 times [2024-11-09 15:47:06,954 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:06,954 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085062664] [2024-11-09 15:47:06,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:06,954 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:06,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:07,014 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:07,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:07,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085062664] [2024-11-09 15:47:07,015 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1085062664] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:07,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [402187038] [2024-11-09 15:47:07,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:07,016 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:07,016 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:07,018 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:07,019 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-09 15:47:07,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:07,075 INFO L255 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-09 15:47:07,076 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:07,089 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:07,090 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:07,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-09 15:47:07,122 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [402187038] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:07,122 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:07,122 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-09 15:47:07,122 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1906164548] [2024-11-09 15:47:07,122 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:07,122 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:07,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:07,123 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 1 times [2024-11-09 15:47:07,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:07,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246035959] [2024-11-09 15:47:07,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:07,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:07,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,127 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:07,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,129 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:07,167 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:07,168 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-09 15:47:07,168 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2024-11-09 15:47:07,168 INFO L87 Difference]: Start difference. First operand 45 states and 51 transitions. cyclomatic complexity: 9 Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:07,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:07,235 INFO L93 Difference]: Finished difference Result 85 states and 95 transitions. [2024-11-09 15:47:07,235 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 95 transitions. [2024-11-09 15:47:07,236 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-09 15:47:07,237 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 82 states and 92 transitions. [2024-11-09 15:47:07,237 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2024-11-09 15:47:07,237 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2024-11-09 15:47:07,237 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 92 transitions. [2024-11-09 15:47:07,237 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:07,237 INFO L218 hiAutomatonCegarLoop]: Abstraction has 82 states and 92 transitions. [2024-11-09 15:47:07,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 92 transitions. [2024-11-09 15:47:07,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 66. [2024-11-09 15:47:07,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1363636363636365) internal successors, (75), 65 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:07,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 75 transitions. [2024-11-09 15:47:07,245 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-09 15:47:07,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-09 15:47:07,246 INFO L425 stractBuchiCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-09 15:47:07,246 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-09 15:47:07,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 75 transitions. [2024-11-09 15:47:07,247 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-09 15:47:07,247 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:07,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:07,249 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 3, 2, 2, 2, 2, 1, 1] [2024-11-09 15:47:07,249 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:47:07,249 INFO L745 eck$LassoCheckResult]: Stem: 851#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 852#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 855#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 885#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 883#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 858#L17-4 foo_#res#1 := foo_~i~0#1; 859#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 899#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 856#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 902#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 900#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 898#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 879#L17-4 foo_#res#1 := foo_~i~0#1; 837#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 838#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 848#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 841#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 897#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 892#L17-2 [2024-11-09 15:47:07,252 INFO L747 eck$LassoCheckResult]: Loop: 892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 892#L17-2 [2024-11-09 15:47:07,252 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:07,252 INFO L85 PathProgramCache]: Analyzing trace with hash 1084446665, now seen corresponding path program 4 times [2024-11-09 15:47:07,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:07,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772828809] [2024-11-09 15:47:07,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:07,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:07,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,280 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:07,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,297 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:07,297 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:07,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 2 times [2024-11-09 15:47:07,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:07,297 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295433232] [2024-11-09 15:47:07,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:07,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:07,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,305 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:07,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:07,307 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:07,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:07,307 INFO L85 PathProgramCache]: Analyzing trace with hash -1523807225, now seen corresponding path program 5 times [2024-11-09 15:47:07,307 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:07,307 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173568326] [2024-11-09 15:47:07,308 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:07,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:07,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:07,464 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 4 proven. 48 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-09 15:47:07,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:07,465 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173568326] [2024-11-09 15:47:07,465 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [173568326] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:07,466 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [493340186] [2024-11-09 15:47:07,466 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-09 15:47:07,466 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:07,466 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:07,468 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:07,469 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-09 15:47:07,549 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-09 15:47:07,550 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:07,551 INFO L255 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-09 15:47:07,552 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:07,694 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-09 15:47:07,694 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:07,821 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-09 15:47:07,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [493340186] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:07,823 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:07,823 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 18 [2024-11-09 15:47:07,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758373606] [2024-11-09 15:47:07,824 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:07,868 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:07,869 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-09 15:47:07,869 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2024-11-09 15:47:07,869 INFO L87 Difference]: Start difference. First operand 66 states and 75 transitions. cyclomatic complexity: 13 Second operand has 19 states, 18 states have (on average 2.611111111111111) internal successors, (47), 19 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:08,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:08,132 INFO L93 Difference]: Finished difference Result 80 states and 88 transitions. [2024-11-09 15:47:08,132 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 88 transitions. [2024-11-09 15:47:08,133 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:08,134 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 80 states and 88 transitions. [2024-11-09 15:47:08,134 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2024-11-09 15:47:08,134 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2024-11-09 15:47:08,134 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 88 transitions. [2024-11-09 15:47:08,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:08,134 INFO L218 hiAutomatonCegarLoop]: Abstraction has 80 states and 88 transitions. [2024-11-09 15:47:08,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 88 transitions. [2024-11-09 15:47:08,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 68. [2024-11-09 15:47:08,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1176470588235294) internal successors, (76), 67 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:08,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 76 transitions. [2024-11-09 15:47:08,144 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-09 15:47:08,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-09 15:47:08,145 INFO L425 stractBuchiCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-09 15:47:08,145 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-09 15:47:08,145 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 76 transitions. [2024-11-09 15:47:08,146 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:08,147 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:08,147 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:08,148 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 3, 3, 1, 1] [2024-11-09 15:47:08,148 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-09 15:47:08,148 INFO L745 eck$LassoCheckResult]: Stem: 1192#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1193#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1196#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1231#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1227#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1198#L17-4 foo_#res#1 := foo_~i~0#1; 1183#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1184#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1190#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1197#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1240#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1233#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1229#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1225#L17-4 foo_#res#1 := foo_~i~0#1; 1226#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1243#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1242#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1239#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1236#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1232#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1228#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1224#L17-4 foo_#res#1 := foo_~i~0#1; 1181#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1182#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1220#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1201#L17-3 [2024-11-09 15:47:08,148 INFO L747 eck$LassoCheckResult]: Loop: 1201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1218#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1214#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1209#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1208#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1205#L17-4 foo_#res#1 := foo_~i~0#1; 1203#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1202#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1200#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1201#L17-3 [2024-11-09 15:47:08,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:08,149 INFO L85 PathProgramCache]: Analyzing trace with hash 203385399, now seen corresponding path program 6 times [2024-11-09 15:47:08,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:08,150 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905011036] [2024-11-09 15:47:08,150 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:08,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:08,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:08,324 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 15 proven. 33 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-09 15:47:08,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:08,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905011036] [2024-11-09 15:47:08,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1905011036] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:08,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1617674064] [2024-11-09 15:47:08,324 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-09 15:47:08,324 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:08,325 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:08,327 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:08,328 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-09 15:47:08,407 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2024-11-09 15:47:08,407 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:08,408 INFO L255 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-09 15:47:08,410 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:08,494 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-09 15:47:08,494 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:08,580 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-09 15:47:08,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1617674064] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:08,581 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:08,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2024-11-09 15:47:08,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1575910387] [2024-11-09 15:47:08,581 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:08,581 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:08,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:08,582 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 3 times [2024-11-09 15:47:08,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:08,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [916939343] [2024-11-09 15:47:08,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:08,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:08,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:08,592 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:08,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:08,599 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:08,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:08,883 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-11-09 15:47:08,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2024-11-09 15:47:08,884 INFO L87 Difference]: Start difference. First operand 68 states and 76 transitions. cyclomatic complexity: 11 Second operand has 15 states, 15 states have (on average 3.066666666666667) internal successors, (46), 15 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:09,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:09,073 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2024-11-09 15:47:09,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 78 transitions. [2024-11-09 15:47:09,074 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-09 15:47:09,075 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 52 states and 54 transitions. [2024-11-09 15:47:09,075 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2024-11-09 15:47:09,075 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-09 15:47:09,075 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2024-11-09 15:47:09,075 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:09,076 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 54 transitions. [2024-11-09 15:47:09,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2024-11-09 15:47:09,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2024-11-09 15:47:09,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:09,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2024-11-09 15:47:09,080 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-09 15:47:09,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-09 15:47:09,081 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-09 15:47:09,081 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-09 15:47:09,081 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2024-11-09 15:47:09,081 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-09 15:47:09,081 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:09,081 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:09,082 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-09 15:47:09,082 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-09 15:47:09,082 INFO L745 eck$LassoCheckResult]: Stem: 1520#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1521#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1522#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1554#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1553#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1552#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1551#L17-4 foo_#res#1 := foo_~i~0#1; 1513#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1514#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1518#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1524#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1511#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1512#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1523#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1555#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1525#L17-4 foo_#res#1 := foo_~i~0#1; 1526#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1550#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1549#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1548#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1547#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1545#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1543#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1542#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1541#L17-4 foo_#res#1 := foo_~i~0#1; 1540#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1539#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1538#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1528#L17-3 [2024-11-09 15:47:09,082 INFO L747 eck$LassoCheckResult]: Loop: 1528#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1537#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1536#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1535#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1534#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1533#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1532#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1531#L17-4 foo_#res#1 := foo_~i~0#1; 1530#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1529#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1527#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1528#L17-3 [2024-11-09 15:47:09,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:09,083 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 7 times [2024-11-09 15:47:09,083 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:09,083 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859721098] [2024-11-09 15:47:09,083 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:09,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:09,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:09,105 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:09,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:09,131 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:09,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:09,132 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 4 times [2024-11-09 15:47:09,132 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:09,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1583367067] [2024-11-09 15:47:09,136 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:09,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:09,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:09,150 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:09,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:09,156 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:09,157 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:09,157 INFO L85 PathProgramCache]: Analyzing trace with hash -1101563419, now seen corresponding path program 8 times [2024-11-09 15:47:09,157 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:09,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025780817] [2024-11-09 15:47:09,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:09,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:09,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:09,410 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 49 proven. 79 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:09,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:09,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025780817] [2024-11-09 15:47:09,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2025780817] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:09,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2018222258] [2024-11-09 15:47:09,411 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-09 15:47:09,411 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:09,412 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:09,413 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:09,415 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-09 15:47:09,506 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-09 15:47:09,507 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:09,508 INFO L255 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-09 15:47:09,510 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:09,616 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:09,616 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:09,738 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:09,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2018222258] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:09,738 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:09,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2024-11-09 15:47:09,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1973657109] [2024-11-09 15:47:09,739 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:10,028 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:10,029 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-09 15:47:10,029 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2024-11-09 15:47:10,029 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 4 Second operand has 19 states, 19 states have (on average 3.1052631578947367) internal successors, (59), 19 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:10,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:10,410 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2024-11-09 15:47:10,410 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2024-11-09 15:47:10,411 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-09 15:47:10,412 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 59 transitions. [2024-11-09 15:47:10,412 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-09 15:47:10,412 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2024-11-09 15:47:10,412 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 59 transitions. [2024-11-09 15:47:10,412 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:10,412 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 59 transitions. [2024-11-09 15:47:10,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 59 transitions. [2024-11-09 15:47:10,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 47. [2024-11-09 15:47:10,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0425531914893618) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:10,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2024-11-09 15:47:10,417 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-09 15:47:10,418 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-09 15:47:10,418 INFO L425 stractBuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-09 15:47:10,418 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-09 15:47:10,419 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2024-11-09 15:47:10,419 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2024-11-09 15:47:10,419 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:10,419 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:10,420 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-09 15:47:10,420 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2024-11-09 15:47:10,420 INFO L745 eck$LassoCheckResult]: Stem: 1907#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1908#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1909#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1910#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1911#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1941#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1939#L17-4 foo_#res#1 := foo_~i~0#1; 1938#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1904#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1905#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1943#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1897#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1898#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1942#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1940#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1912#L17-4 foo_#res#1 := foo_~i~0#1; 1899#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1900#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1937#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1935#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1933#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1930#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1929#L17-4 foo_#res#1 := foo_~i~0#1; 1928#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1927#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1926#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1914#L17-3 [2024-11-09 15:47:10,420 INFO L747 eck$LassoCheckResult]: Loop: 1914#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1925#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1924#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1923#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1921#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1920#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1919#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1918#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1917#L17-4 foo_#res#1 := foo_~i~0#1; 1916#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1915#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1913#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1914#L17-3 [2024-11-09 15:47:10,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:10,421 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 9 times [2024-11-09 15:47:10,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:10,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1708910188] [2024-11-09 15:47:10,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:10,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:10,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,451 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:10,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,473 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:10,474 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:10,474 INFO L85 PathProgramCache]: Analyzing trace with hash 879476375, now seen corresponding path program 5 times [2024-11-09 15:47:10,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:10,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276656579] [2024-11-09 15:47:10,474 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:10,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:10,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,487 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:10,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:10,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:10,497 INFO L85 PathProgramCache]: Analyzing trace with hash -389338205, now seen corresponding path program 10 times [2024-11-09 15:47:10,498 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:10,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102618304] [2024-11-09 15:47:10,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:10,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:10,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,526 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:10,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:10,560 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:11,932 INFO L204 LassoAnalysis]: Preferences: [2024-11-09 15:47:11,933 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-09 15:47:11,933 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-09 15:47:11,933 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-09 15:47:11,933 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-09 15:47:11,933 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:11,933 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-09 15:47:11,933 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-09 15:47:11,933 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration10_Lasso [2024-11-09 15:47:11,933 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-09 15:47:11,933 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-09 15:47:11,935 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,937 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,943 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,945 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,947 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,948 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,950 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,952 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,954 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,956 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:11,957 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:12,214 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:12,219 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:12,652 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-09 15:47:12,652 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-09 15:47:12,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,652 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,656 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,657 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-09 15:47:12,658 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,671 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,671 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,672 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,672 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,672 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,673 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,673 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,675 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,689 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-09 15:47:12,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,690 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,692 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,693 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-09 15:47:12,694 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,706 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,706 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,706 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,706 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,706 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,708 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,708 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,713 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,728 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:12,728 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,729 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,732 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,733 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-09 15:47:12,735 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,746 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,747 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,747 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,747 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,747 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,747 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,748 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,751 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,765 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-09 15:47:12,766 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,766 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,768 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,769 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-09 15:47:12,770 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,782 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,782 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,782 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,782 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,783 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,783 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,783 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,786 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,801 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-09 15:47:12,801 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,801 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,804 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,805 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-09 15:47:12,806 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,819 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,819 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,820 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,820 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,820 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,820 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,820 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,823 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,837 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:12,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,837 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,838 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,840 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-09 15:47:12,841 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,852 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,852 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,852 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,852 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,852 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,853 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,853 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,854 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,864 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:12,864 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,864 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,865 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,866 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-09 15:47:12,866 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,876 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,876 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,876 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,876 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,876 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,876 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,876 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,877 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,887 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-11-09 15:47:12,888 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,888 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,889 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,891 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-09 15:47:12,891 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,904 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,904 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,904 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,904 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,904 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,908 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,908 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,909 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,924 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:12,924 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,924 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,926 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,929 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-09 15:47:12,930 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,942 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,942 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:12,943 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,943 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,943 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,943 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:12,943 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:12,946 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,959 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:12,960 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,960 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,961 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,962 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-09 15:47:12,963 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:12,972 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:12,972 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:12,972 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:12,972 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:12,974 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:12,974 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:12,979 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:12,992 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Ended with exit code 0 [2024-11-09 15:47:12,993 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:12,993 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:12,994 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:12,995 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-09 15:47:12,996 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:13,007 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:13,007 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-09 15:47:13,008 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:13,008 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:13,008 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:13,008 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-09 15:47:13,008 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-09 15:47:13,009 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:13,019 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:13,020 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:13,020 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:13,021 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:13,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-09 15:47:13,023 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:13,033 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:13,033 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:13,033 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:13,033 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:13,035 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:13,035 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:13,038 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:13,048 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2024-11-09 15:47:13,049 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:13,049 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:13,050 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:13,050 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-11-09 15:47:13,051 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:13,062 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:13,062 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:13,062 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:13,062 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:13,065 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:13,065 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:13,071 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:13,085 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Ended with exit code 0 [2024-11-09 15:47:13,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:13,085 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:13,087 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:13,088 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-09 15:47:13,089 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:13,101 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:13,102 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:13,102 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:13,102 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:13,104 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:13,104 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:13,108 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:13,123 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2024-11-09 15:47:13,123 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:13,123 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:13,125 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:13,126 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-09 15:47:13,127 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:13,139 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:13,140 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:13,140 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:13,140 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:13,153 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:13,153 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:13,175 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-09 15:47:13,217 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2024-11-09 15:47:13,217 INFO L444 ModelExtractionUtils]: 15 out of 31 variables were initially zero. Simplification set additionally 10 variables to zero. [2024-11-09 15:47:13,217 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:13,217 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:13,219 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:13,220 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-09 15:47:13,221 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-09 15:47:13,233 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-09 15:47:13,233 INFO L474 LassoAnalysis]: Proved termination. [2024-11-09 15:47:13,233 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~size#1, ULTIMATE.start_foo_~i~0#1) = -2*ULTIMATE.start_foo_~size#1 + 2*ULTIMATE.start_foo_~i~0#1 + 7 Supporting invariants [1*ULTIMATE.start_main_~i~1#1 - 3 >= 0] [2024-11-09 15:47:13,244 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:13,264 INFO L156 tatePredicateManager]: 6 out of 7 supporting invariants were superfluous and have been removed [2024-11-09 15:47:13,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:13,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:13,325 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:47:13,326 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:13,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:13,459 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-09 15:47:13,460 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:13,577 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-11-09 15:47:13,617 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:13,618 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.5 stem predicates 7 loop predicates [2024-11-09 15:47:13,618 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:13,635 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 47 states and 49 transitions. Complement of second has 4 states. [2024-11-09 15:47:13,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 2 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:13,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:13,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3 transitions. [2024-11-09 15:47:13,636 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 3 transitions. Stem has 30 letters. Loop has 13 letters. [2024-11-09 15:47:13,637 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:13,637 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-09 15:47:13,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:13,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:13,697 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:47:13,698 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:13,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:13,828 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-09 15:47:13,828 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:13,949 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:13,949 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.5 stem predicates 7 loop predicates [2024-11-09 15:47:13,949 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:13,966 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 47 states and 49 transitions. Complement of second has 4 states. [2024-11-09 15:47:13,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 2 stem states 0 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:13,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:13,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 3 transitions. [2024-11-09 15:47:13,967 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 3 transitions. Stem has 30 letters. Loop has 13 letters. [2024-11-09 15:47:13,968 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:13,968 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-09 15:47:13,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:14,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:14,022 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-09 15:47:14,023 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:14,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:14,148 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-09 15:47:14,149 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:14,273 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:14,274 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.5 stem predicates 7 loop predicates [2024-11-09 15:47:14,274 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:14,471 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 77 states and 82 transitions. Complement of second has 23 states. [2024-11-09 15:47:14,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 14 states 5 stem states 7 non-accepting loop states 2 accepting loop states [2024-11-09 15:47:14,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13 states, 13 states have (on average 2.8461538461538463) internal successors, (37), 13 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:14,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 62 transitions. [2024-11-09 15:47:14,473 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 14 states and 62 transitions. Stem has 30 letters. Loop has 13 letters. [2024-11-09 15:47:14,473 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:14,473 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 14 states and 62 transitions. Stem has 43 letters. Loop has 13 letters. [2024-11-09 15:47:14,474 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:14,474 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 14 states and 62 transitions. Stem has 30 letters. Loop has 26 letters. [2024-11-09 15:47:14,474 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:14,474 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 82 transitions. [2024-11-09 15:47:14,475 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 32 [2024-11-09 15:47:14,475 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 76 states and 81 transitions. [2024-11-09 15:47:14,475 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59 [2024-11-09 15:47:14,475 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 63 [2024-11-09 15:47:14,475 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 81 transitions. [2024-11-09 15:47:14,476 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:14,476 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 81 transitions. [2024-11-09 15:47:14,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 81 transitions. [2024-11-09 15:47:14,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 66. [2024-11-09 15:47:14,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.0757575757575757) internal successors, (71), 65 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:14,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 71 transitions. [2024-11-09 15:47:14,478 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 71 transitions. [2024-11-09 15:47:14,478 INFO L425 stractBuchiCegarLoop]: Abstraction has 66 states and 71 transitions. [2024-11-09 15:47:14,478 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-09 15:47:14,479 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 71 transitions. [2024-11-09 15:47:14,479 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 31 [2024-11-09 15:47:14,479 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:14,479 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:14,480 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-09 15:47:14,480 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 1, 1, 1, 1, 1] [2024-11-09 15:47:14,480 INFO L745 eck$LassoCheckResult]: Stem: 2636#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2637#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2641#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2642#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2687#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2685#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2643#L17-4 foo_#res#1 := foo_~i~0#1; 2626#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2627#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2633#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2638#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2622#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2623#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2686#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2684#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2683#L17-4 foo_#res#1 := foo_~i~0#1; 2682#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2681#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2680#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2679#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2678#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2677#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2676#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2674#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2672#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2670#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2668#L17-4 foo_#res#1 := foo_~i~0#1; 2666#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2660#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2657#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2656#L17-3 [2024-11-09 15:47:14,480 INFO L747 eck$LassoCheckResult]: Loop: 2656#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2640#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2675#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2673#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2671#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2669#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2667#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2665#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2662#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2663#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2664#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2655#L17-4 foo_#res#1 := foo_~i~0#1; 2654#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2652#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2653#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2656#L17-3 [2024-11-09 15:47:14,480 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:14,480 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 11 times [2024-11-09 15:47:14,480 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:14,480 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [525246997] [2024-11-09 15:47:14,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:14,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:14,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:14,498 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:14,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:14,512 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:14,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:14,513 INFO L85 PathProgramCache]: Analyzing trace with hash 719391701, now seen corresponding path program 6 times [2024-11-09 15:47:14,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:14,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70385615] [2024-11-09 15:47:14,513 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:14,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:14,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:14,523 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:14,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:14,531 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:14,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:14,532 INFO L85 PathProgramCache]: Analyzing trace with hash 1159292385, now seen corresponding path program 12 times [2024-11-09 15:47:14,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:14,532 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627435154] [2024-11-09 15:47:14,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:14,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:14,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:14,840 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 46 proven. 128 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:14,841 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:14,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627435154] [2024-11-09 15:47:14,841 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627435154] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:14,841 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [927084490] [2024-11-09 15:47:14,841 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-09 15:47:14,841 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:14,841 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:14,843 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:14,844 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2024-11-09 15:47:15,033 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2024-11-09 15:47:15,034 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:15,035 INFO L255 TraceCheckSpWp]: Trace formula consists of 277 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-09 15:47:15,036 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:15,171 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 53 proven. 121 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:15,171 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:15,303 INFO L134 CoverageAnalysis]: Checked inductivity of 188 backedges. 53 proven. 121 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-09 15:47:15,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [927084490] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:15,303 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:15,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 22 [2024-11-09 15:47:15,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [582329003] [2024-11-09 15:47:15,303 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:15,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:15,646 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-09 15:47:15,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=353, Unknown=0, NotChecked=0, Total=462 [2024-11-09 15:47:15,647 INFO L87 Difference]: Start difference. First operand 66 states and 71 transitions. cyclomatic complexity: 7 Second operand has 22 states, 22 states have (on average 3.0454545454545454) internal successors, (67), 22 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:15,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:15,929 INFO L93 Difference]: Finished difference Result 101 states and 107 transitions. [2024-11-09 15:47:15,929 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 107 transitions. [2024-11-09 15:47:15,930 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 31 [2024-11-09 15:47:15,931 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 101 states and 107 transitions. [2024-11-09 15:47:15,931 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2024-11-09 15:47:15,931 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2024-11-09 15:47:15,931 INFO L73 IsDeterministic]: Start isDeterministic. Operand 101 states and 107 transitions. [2024-11-09 15:47:15,931 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:15,931 INFO L218 hiAutomatonCegarLoop]: Abstraction has 101 states and 107 transitions. [2024-11-09 15:47:15,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states and 107 transitions. [2024-11-09 15:47:15,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 75. [2024-11-09 15:47:15,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 75 states have (on average 1.08) internal successors, (81), 74 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:15,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 81 transitions. [2024-11-09 15:47:15,938 INFO L240 hiAutomatonCegarLoop]: Abstraction has 75 states and 81 transitions. [2024-11-09 15:47:15,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2024-11-09 15:47:15,939 INFO L425 stractBuchiCegarLoop]: Abstraction has 75 states and 81 transitions. [2024-11-09 15:47:15,940 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-09 15:47:15,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 81 transitions. [2024-11-09 15:47:15,940 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 31 [2024-11-09 15:47:15,943 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:15,943 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:15,944 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2024-11-09 15:47:15,944 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-09 15:47:15,944 INFO L745 eck$LassoCheckResult]: Stem: 3121#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3122#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3126#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3172#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3170#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3168#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3167#L17-4 foo_#res#1 := foo_~i~0#1; 3165#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3117#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3118#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3127#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3175#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3173#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3171#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3169#L17-4 foo_#res#1 := foo_~i~0#1; 3166#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3164#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3162#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3160#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3158#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3154#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3150#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3149#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3146#L17-4 foo_#res#1 := foo_~i~0#1; 3144#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3142#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3140#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3139#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3106#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3107#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3123#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3180#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3179#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3177#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3176#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3128#L17-4 foo_#res#1 := foo_~i~0#1; 3110#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3111#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3130#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 3120#L26-4 main_~i~1#1 := 0; 3114#L29-3 [2024-11-09 15:47:15,944 INFO L747 eck$LassoCheckResult]: Loop: 3114#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#1(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 3115#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 3116#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3114#L29-3 [2024-11-09 15:47:15,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:15,944 INFO L85 PathProgramCache]: Analyzing trace with hash 815417503, now seen corresponding path program 2 times [2024-11-09 15:47:15,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:15,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [610764010] [2024-11-09 15:47:15,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:15,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:15,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:16,078 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:16,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:16,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [610764010] [2024-11-09 15:47:16,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [610764010] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:16,079 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1010011471] [2024-11-09 15:47:16,079 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-09 15:47:16,079 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:16,079 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:16,081 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:16,082 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2024-11-09 15:47:16,196 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-09 15:47:16,196 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:16,197 INFO L255 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-09 15:47:16,199 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:16,256 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:16,256 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:16,388 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:16,389 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1010011471] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:16,389 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:16,389 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-09 15:47:16,389 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992212343] [2024-11-09 15:47:16,389 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:16,390 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:16,391 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:16,391 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 2 times [2024-11-09 15:47:16,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:16,391 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389453412] [2024-11-09 15:47:16,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:16,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:16,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,396 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:16,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,400 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:16,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:16,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-09 15:47:16,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2024-11-09 15:47:16,439 INFO L87 Difference]: Start difference. First operand 75 states and 81 transitions. cyclomatic complexity: 8 Second operand has 13 states, 13 states have (on average 4.923076923076923) internal successors, (64), 13 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:16,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:16,682 INFO L93 Difference]: Finished difference Result 278 states and 297 transitions. [2024-11-09 15:47:16,682 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 278 states and 297 transitions. [2024-11-09 15:47:16,683 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 41 [2024-11-09 15:47:16,685 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 278 states to 246 states and 265 transitions. [2024-11-09 15:47:16,685 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 156 [2024-11-09 15:47:16,685 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 156 [2024-11-09 15:47:16,685 INFO L73 IsDeterministic]: Start isDeterministic. Operand 246 states and 265 transitions. [2024-11-09 15:47:16,685 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:16,685 INFO L218 hiAutomatonCegarLoop]: Abstraction has 246 states and 265 transitions. [2024-11-09 15:47:16,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states and 265 transitions. [2024-11-09 15:47:16,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 206. [2024-11-09 15:47:16,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 206 states have (on average 1.0922330097087378) internal successors, (225), 205 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:16,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 225 transitions. [2024-11-09 15:47:16,691 INFO L240 hiAutomatonCegarLoop]: Abstraction has 206 states and 225 transitions. [2024-11-09 15:47:16,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-09 15:47:16,695 INFO L425 stractBuchiCegarLoop]: Abstraction has 206 states and 225 transitions. [2024-11-09 15:47:16,695 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-09 15:47:16,695 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 206 states and 225 transitions. [2024-11-09 15:47:16,696 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 41 [2024-11-09 15:47:16,696 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:16,696 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:16,697 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 14, 5, 4, 4, 4, 4, 1, 1] [2024-11-09 15:47:16,697 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:47:16,697 INFO L745 eck$LassoCheckResult]: Stem: 3755#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3756#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3759#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3942#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3940#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3938#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3762#L17-4 foo_#res#1 := foo_~i~0#1; 3745#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3746#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3752#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3757#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3741#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3742#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3941#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3939#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3936#L17-4 foo_#res#1 := foo_~i~0#1; 3935#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3934#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3933#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3927#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3926#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3925#L17-4 foo_#res#1 := foo_~i~0#1; 3924#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3923#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3922#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3920#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3918#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3913#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3912#L17-4 foo_#res#1 := foo_~i~0#1; 3911#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3910#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3760#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3907#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3903#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3899#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3894#L17-2 [2024-11-09 15:47:16,697 INFO L747 eck$LassoCheckResult]: Loop: 3894#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3894#L17-2 [2024-11-09 15:47:16,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:16,698 INFO L85 PathProgramCache]: Analyzing trace with hash 303539911, now seen corresponding path program 13 times [2024-11-09 15:47:16,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:16,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200812954] [2024-11-09 15:47:16,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:16,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:16,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,731 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:16,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,778 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:16,778 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:16,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 3 times [2024-11-09 15:47:16,779 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:16,779 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266846228] [2024-11-09 15:47:16,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:16,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:16,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:16,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:16,784 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:16,785 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:16,785 INFO L85 PathProgramCache]: Analyzing trace with hash -355921019, now seen corresponding path program 14 times [2024-11-09 15:47:16,785 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:16,785 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [522311168] [2024-11-09 15:47:16,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:16,785 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:16,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:17,058 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 16 proven. 277 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:17,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:17,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [522311168] [2024-11-09 15:47:17,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [522311168] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:17,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1787228433] [2024-11-09 15:47:17,058 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-09 15:47:17,058 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:17,059 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:17,060 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:17,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2024-11-09 15:47:17,188 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-09 15:47:17,188 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:17,190 INFO L255 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-09 15:47:17,191 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:17,353 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 25 proven. 268 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:17,354 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:17,466 INFO L134 CoverageAnalysis]: Checked inductivity of 323 backedges. 25 proven. 268 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-09 15:47:17,466 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1787228433] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:17,466 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:17,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 20 [2024-11-09 15:47:17,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756807839] [2024-11-09 15:47:17,467 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:17,498 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:17,498 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2024-11-09 15:47:17,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=313, Unknown=0, NotChecked=0, Total=420 [2024-11-09 15:47:17,499 INFO L87 Difference]: Start difference. First operand 206 states and 225 transitions. cyclomatic complexity: 26 Second operand has 21 states, 20 states have (on average 3.25) internal successors, (65), 21 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:17,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:17,801 INFO L93 Difference]: Finished difference Result 221 states and 239 transitions. [2024-11-09 15:47:17,801 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 221 states and 239 transitions. [2024-11-09 15:47:17,802 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 39 [2024-11-09 15:47:17,804 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 221 states to 221 states and 239 transitions. [2024-11-09 15:47:17,804 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2024-11-09 15:47:17,804 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2024-11-09 15:47:17,804 INFO L73 IsDeterministic]: Start isDeterministic. Operand 221 states and 239 transitions. [2024-11-09 15:47:17,805 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:17,805 INFO L218 hiAutomatonCegarLoop]: Abstraction has 221 states and 239 transitions. [2024-11-09 15:47:17,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states and 239 transitions. [2024-11-09 15:47:17,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 206. [2024-11-09 15:47:17,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 206 states, 206 states have (on average 1.087378640776699) internal successors, (224), 205 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:17,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 224 transitions. [2024-11-09 15:47:17,813 INFO L240 hiAutomatonCegarLoop]: Abstraction has 206 states and 224 transitions. [2024-11-09 15:47:17,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2024-11-09 15:47:17,814 INFO L425 stractBuchiCegarLoop]: Abstraction has 206 states and 224 transitions. [2024-11-09 15:47:17,814 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-09 15:47:17,814 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 206 states and 224 transitions. [2024-11-09 15:47:17,815 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 39 [2024-11-09 15:47:17,815 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:17,815 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:17,816 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [19, 18, 6, 5, 5, 5, 5, 1, 1] [2024-11-09 15:47:17,816 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:47:17,816 INFO L745 eck$LassoCheckResult]: Stem: 4566#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4567#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4568#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4743#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4757#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4738#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4573#L17-4 foo_#res#1 := foo_~i~0#1; 4556#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4557#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4563#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4571#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4742#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4741#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4739#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4740#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4754#L17-4 foo_#res#1 := foo_~i~0#1; 4752#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4750#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4748#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4746#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4552#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4553#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4756#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4755#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4753#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4751#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4749#L17-4 foo_#res#1 := foo_~i~0#1; 4747#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4745#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4744#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4569#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4554#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4555#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4570#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4736#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4734#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4733#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4732#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4731#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4574#L17-4 foo_#res#1 := foo_~i~0#1; 4558#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4559#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4564#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4572#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4724#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4722#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4720#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4718#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4716#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4714#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4712#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4710#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4708#L17-4 foo_#res#1 := foo_~i~0#1; 4707#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4706#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4704#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4702#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4701#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4703#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4699#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4697#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4695#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4693#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4691#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4688#L17-2 [2024-11-09 15:47:17,816 INFO L747 eck$LassoCheckResult]: Loop: 4688#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4687#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4688#L17-2 [2024-11-09 15:47:17,817 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:17,817 INFO L85 PathProgramCache]: Analyzing trace with hash 1235684469, now seen corresponding path program 15 times [2024-11-09 15:47:17,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:17,817 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1884937384] [2024-11-09 15:47:17,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:17,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:17,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:18,107 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 256 proven. 172 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-09 15:47:18,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:18,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1884937384] [2024-11-09 15:47:18,107 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1884937384] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:18,107 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628753855] [2024-11-09 15:47:18,107 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-09 15:47:18,108 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:18,108 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:18,109 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:18,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2024-11-09 15:47:18,261 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-09 15:47:18,261 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:18,263 INFO L255 TraceCheckSpWp]: Trace formula consists of 325 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-09 15:47:18,264 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:18,405 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 302 proven. 126 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-09 15:47:18,405 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:18,518 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 302 proven. 126 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2024-11-09 15:47:18,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1628753855] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:18,519 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:18,519 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 19 [2024-11-09 15:47:18,519 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852561242] [2024-11-09 15:47:18,519 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:18,519 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:18,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:18,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 4 times [2024-11-09 15:47:18,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:18,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966483533] [2024-11-09 15:47:18,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:18,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:18,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:18,524 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:18,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:18,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:18,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:18,577 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-09 15:47:18,578 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2024-11-09 15:47:18,578 INFO L87 Difference]: Start difference. First operand 206 states and 224 transitions. cyclomatic complexity: 24 Second operand has 19 states, 19 states have (on average 3.526315789473684) internal successors, (67), 19 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:18,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:18,902 INFO L93 Difference]: Finished difference Result 194 states and 201 transitions. [2024-11-09 15:47:18,903 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 194 states and 201 transitions. [2024-11-09 15:47:18,904 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 27 [2024-11-09 15:47:18,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 194 states to 154 states and 160 transitions. [2024-11-09 15:47:18,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 141 [2024-11-09 15:47:18,905 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2024-11-09 15:47:18,906 INFO L73 IsDeterministic]: Start isDeterministic. Operand 154 states and 160 transitions. [2024-11-09 15:47:18,907 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-09 15:47:18,908 INFO L218 hiAutomatonCegarLoop]: Abstraction has 154 states and 160 transitions. [2024-11-09 15:47:18,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states and 160 transitions. [2024-11-09 15:47:18,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 137. [2024-11-09 15:47:18,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 137 states have (on average 1.0437956204379562) internal successors, (143), 136 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:18,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2024-11-09 15:47:18,917 INFO L240 hiAutomatonCegarLoop]: Abstraction has 137 states and 143 transitions. [2024-11-09 15:47:18,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-09 15:47:18,918 INFO L425 stractBuchiCegarLoop]: Abstraction has 137 states and 143 transitions. [2024-11-09 15:47:18,918 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-09 15:47:18,918 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 137 states and 143 transitions. [2024-11-09 15:47:18,919 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 26 [2024-11-09 15:47:18,919 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:18,919 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:18,920 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [20, 19, 6, 5, 5, 5, 5, 1, 1] [2024-11-09 15:47:18,920 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-09 15:47:18,920 INFO L745 eck$LassoCheckResult]: Stem: 5399#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 5400#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 5401#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5524#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5522#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5403#L17-4 foo_#res#1 := foo_~i~0#1; 5392#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 5393#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5397#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5390#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5391#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5525#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5523#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5521#L17-4 foo_#res#1 := foo_~i~0#1; 5520#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 5519#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5518#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5517#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5516#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5515#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5514#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5513#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5512#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5511#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5510#L17-4 foo_#res#1 := foo_~i~0#1; 5509#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 5508#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5507#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5506#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5505#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5504#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5503#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5502#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5501#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5500#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5499#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5498#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5497#L17-4 foo_#res#1 := foo_~i~0#1; 5496#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 5495#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5494#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5493#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5492#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5491#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5490#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5489#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5488#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5487#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5486#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5485#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5484#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5483#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 5482#L17-4 foo_#res#1 := foo_~i~0#1; 5481#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 5480#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 5479#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 5478#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5477#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5476#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5475#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5474#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5473#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5472#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5471#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5470#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5469#L17-2 [2024-11-09 15:47:18,923 INFO L747 eck$LassoCheckResult]: Loop: 5469#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 5468#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 5469#L17-2 [2024-11-09 15:47:18,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:18,923 INFO L85 PathProgramCache]: Analyzing trace with hash 205571191, now seen corresponding path program 16 times [2024-11-09 15:47:18,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:18,924 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115340396] [2024-11-09 15:47:18,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:18,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:18,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:18,976 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:19,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:19,020 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:19,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:19,020 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 5 times [2024-11-09 15:47:19,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:19,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706098602] [2024-11-09 15:47:19,021 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:19,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:19,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:19,026 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:19,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:19,029 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:19,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:19,030 INFO L85 PathProgramCache]: Analyzing trace with hash -14580427, now seen corresponding path program 17 times [2024-11-09 15:47:19,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:19,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136406841] [2024-11-09 15:47:19,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:19,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:19,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:19,090 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:19,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:19,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:24,862 WARN L286 SmtUtils]: Spent 5.68s on a formula simplification. DAG size of input: 527 DAG size of output: 353 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2024-11-09 15:47:25,059 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 10 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 46 [2024-11-09 15:47:25,165 INFO L204 LassoAnalysis]: Preferences: [2024-11-09 15:47:25,165 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-09 15:47:25,165 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-09 15:47:25,165 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-09 15:47:25,165 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-09 15:47:25,165 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,165 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-09 15:47:25,165 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-09 15:47:25,165 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration15_Lasso [2024-11-09 15:47:25,165 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-09 15:47:25,165 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-09 15:47:25,167 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,434 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,436 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,437 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,439 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,440 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,441 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,443 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,445 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,447 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,449 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,450 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,452 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,453 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,454 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-09 15:47:25,711 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-09 15:47:25,711 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-09 15:47:25,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,715 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,717 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-09 15:47:25,717 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,728 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,729 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,729 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,729 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,730 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,730 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,733 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,745 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2024-11-09 15:47:25,746 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,746 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,747 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,747 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-09 15:47:25,748 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,757 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,758 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,758 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,758 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,759 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,759 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,761 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,771 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2024-11-09 15:47:25,772 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,773 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,774 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,775 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-09 15:47:25,776 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,786 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,786 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,786 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,786 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,788 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,788 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,791 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,802 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:25,802 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,802 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,803 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,804 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-11-09 15:47:25,805 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,814 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,814 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,815 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,815 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,816 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,816 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,818 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,828 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:25,828 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,830 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,830 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-11-09 15:47:25,831 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,841 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,841 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,841 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,841 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,842 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,842 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,844 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,854 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Ended with exit code 0 [2024-11-09 15:47:25,855 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,855 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,856 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,857 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-11-09 15:47:25,857 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,867 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,867 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,867 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,867 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,868 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,868 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,871 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,880 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Ended with exit code 0 [2024-11-09 15:47:25,881 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,881 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,882 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,883 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-11-09 15:47:25,883 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,893 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,893 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,893 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,893 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,896 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,896 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,899 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,911 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2024-11-09 15:47:25,911 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,911 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,912 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,913 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-11-09 15:47:25,913 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,924 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,924 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,924 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,924 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,927 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,927 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,932 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,947 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2024-11-09 15:47:25,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,947 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,949 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,950 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2024-11-09 15:47:25,951 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,964 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,964 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,964 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,964 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,966 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,966 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:25,972 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:25,985 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:25,985 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:25,985 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:25,986 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:25,987 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-11-09 15:47:25,988 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:25,998 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:25,998 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:25,998 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:25,998 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:25,999 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:25,999 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:26,002 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:26,013 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:26,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:26,013 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:26,014 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:26,015 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2024-11-09 15:47:26,015 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:26,025 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:26,025 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:26,025 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:26,026 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:26,027 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:26,027 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:26,030 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:26,039 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:26,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:26,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:26,041 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:26,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2024-11-09 15:47:26,042 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:26,052 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:26,052 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:26,052 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:26,052 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:26,053 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:26,053 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:26,055 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:26,065 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:26,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:26,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:26,066 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:26,067 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-11-09 15:47:26,068 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:26,077 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:26,077 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:26,077 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:26,077 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:26,079 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:26,079 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:26,082 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-09 15:47:26,092 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2024-11-09 15:47:26,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:26,093 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:26,094 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:26,095 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-11-09 15:47:26,095 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-09 15:47:26,105 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-09 15:47:26,106 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-09 15:47:26,106 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-09 15:47:26,106 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-09 15:47:26,111 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-09 15:47:26,111 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-09 15:47:26,122 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-09 15:47:26,153 INFO L443 ModelExtractionUtils]: Simplification made 15 calls to the SMT solver. [2024-11-09 15:47:26,153 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 13 variables to zero. [2024-11-09 15:47:26,153 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-09 15:47:26,153 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:26,154 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-09 15:47:26,156 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-11-09 15:47:26,156 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-09 15:47:26,166 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-09 15:47:26,167 INFO L474 LassoAnalysis]: Proved termination. [2024-11-09 15:47:26,167 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~i~0#1, ULTIMATE.start_foo_~size#1) = -1*ULTIMATE.start_foo_~i~0#1 + 1*ULTIMATE.start_foo_~size#1 Supporting invariants [] [2024-11-09 15:47:26,177 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:26,187 INFO L156 tatePredicateManager]: 7 out of 7 supporting invariants were superfluous and have been removed [2024-11-09 15:47:26,197 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:26,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,258 INFO L255 TraceCheckSpWp]: Trace formula consists of 402 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,259 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,336 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2024-11-09 15:47:26,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,353 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,353 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,360 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:26,360 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-09 15:47:26,360 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,371 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 138 states and 144 transitions. Complement of second has 5 states. [2024-11-09 15:47:26,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:26,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5 transitions. [2024-11-09 15:47:26,373 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 67 letters. Loop has 2 letters. [2024-11-09 15:47:26,373 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:26,374 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-09 15:47:26,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:26,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,465 INFO L255 TraceCheckSpWp]: Trace formula consists of 402 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,466 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,548 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,548 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:26,557 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-09 15:47:26,558 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,570 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 138 states and 144 transitions. Complement of second has 5 states. [2024-11-09 15:47:26,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:26,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 5 transitions. [2024-11-09 15:47:26,572 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 5 transitions. Stem has 67 letters. Loop has 2 letters. [2024-11-09 15:47:26,572 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:26,572 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-09 15:47:26,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:26,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,650 INFO L255 TraceCheckSpWp]: Trace formula consists of 402 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,651 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:26,722 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2024-11-09 15:47:26,722 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:26,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-09 15:47:26,729 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-09 15:47:26,729 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12 Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,742 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 137 states and 143 transitions. cyclomatic complexity: 12. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 177 states and 183 transitions. Complement of second has 4 states. [2024-11-09 15:47:26,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-09 15:47:26,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 3 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 17 transitions. [2024-11-09 15:47:26,744 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 17 transitions. Stem has 67 letters. Loop has 2 letters. [2024-11-09 15:47:26,744 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:26,744 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 17 transitions. Stem has 69 letters. Loop has 2 letters. [2024-11-09 15:47:26,745 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:26,745 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 17 transitions. Stem has 67 letters. Loop has 4 letters. [2024-11-09 15:47:26,746 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-09 15:47:26,746 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 177 states and 183 transitions. [2024-11-09 15:47:26,747 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 19 [2024-11-09 15:47:26,748 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 177 states to 142 states and 148 transitions. [2024-11-09 15:47:26,748 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 67 [2024-11-09 15:47:26,748 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 97 [2024-11-09 15:47:26,748 INFO L73 IsDeterministic]: Start isDeterministic. Operand 142 states and 148 transitions. [2024-11-09 15:47:26,748 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:26,748 INFO L218 hiAutomatonCegarLoop]: Abstraction has 142 states and 148 transitions. [2024-11-09 15:47:26,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states and 148 transitions. [2024-11-09 15:47:26,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 137. [2024-11-09 15:47:26,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 137 states have (on average 1.0437956204379562) internal successors, (143), 136 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:26,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2024-11-09 15:47:26,752 INFO L240 hiAutomatonCegarLoop]: Abstraction has 137 states and 143 transitions. [2024-11-09 15:47:26,752 INFO L425 stractBuchiCegarLoop]: Abstraction has 137 states and 143 transitions. [2024-11-09 15:47:26,752 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-09 15:47:26,752 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 137 states and 143 transitions. [2024-11-09 15:47:26,753 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 18 [2024-11-09 15:47:26,753 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:26,753 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:26,755 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [35, 35, 10, 9, 9, 9, 9, 1, 1] [2024-11-09 15:47:26,755 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 5, 1, 1, 1, 1, 1] [2024-11-09 15:47:26,755 INFO L745 eck$LassoCheckResult]: Stem: 6669#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6670#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 6671#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6791#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6790#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6789#L17-4 foo_#res#1 := foo_~i~0#1; 6662#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6663#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6667#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6672#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6658#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6659#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6794#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6792#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6674#L17-4 foo_#res#1 := foo_~i~0#1; 6675#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6788#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6787#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6786#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6785#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6784#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6783#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6782#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6781#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6780#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6779#L17-4 foo_#res#1 := foo_~i~0#1; 6778#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6777#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6776#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6775#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6774#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6773#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6772#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6770#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6769#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6768#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6767#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6766#L17-4 foo_#res#1 := foo_~i~0#1; 6765#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6764#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6763#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6762#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6761#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6760#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6759#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6758#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6757#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6755#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6754#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6753#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6752#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6751#L17-4 foo_#res#1 := foo_~i~0#1; 6750#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6749#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6748#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6747#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6746#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6745#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6660#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6661#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6673#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6744#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6743#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6742#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6741#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6740#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6739#L17-4 foo_#res#1 := foo_~i~0#1; 6738#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6737#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6736#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6735#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6734#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6733#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6732#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6731#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6730#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6729#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6728#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6727#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6726#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6725#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6724#L17-4 foo_#res#1 := foo_~i~0#1; 6723#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6722#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6721#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6720#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6719#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6718#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6717#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6716#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6715#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6714#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6713#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6712#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6711#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6710#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6709#L17-4 foo_#res#1 := foo_~i~0#1; 6708#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6707#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6706#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6704#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6703#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6702#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6701#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6700#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6699#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6698#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6697#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6696#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6695#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6694#L17-4 foo_#res#1 := foo_~i~0#1; 6693#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6692#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6691#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6677#L17-3 [2024-11-09 15:47:26,756 INFO L747 eck$LassoCheckResult]: Loop: 6677#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6690#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6689#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6688#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6687#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6686#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6685#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6684#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6683#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6682#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6681#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6680#L17-4 foo_#res#1 := foo_~i~0#1; 6679#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6678#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6676#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6677#L17-3 [2024-11-09 15:47:26,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:26,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1797637133, now seen corresponding path program 18 times [2024-11-09 15:47:26,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:26,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1547286588] [2024-11-09 15:47:26,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:26,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:26,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:27,313 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 705 proven. 102 refuted. 0 times theorem prover too weak. 887 trivial. 0 not checked. [2024-11-09 15:47:27,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:27,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1547286588] [2024-11-09 15:47:27,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1547286588] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:27,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1187682305] [2024-11-09 15:47:27,314 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-09 15:47:27,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:27,314 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:27,316 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:27,318 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2024-11-09 15:47:27,648 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2024-11-09 15:47:27,648 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:27,651 INFO L255 TraceCheckSpWp]: Trace formula consists of 593 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-09 15:47:27,653 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:27,985 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 1161 proven. 403 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2024-11-09 15:47:27,985 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:28,216 INFO L134 CoverageAnalysis]: Checked inductivity of 1694 backedges. 1161 proven. 403 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2024-11-09 15:47:28,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1187682305] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:28,217 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:28,217 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 32 [2024-11-09 15:47:28,217 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559911387] [2024-11-09 15:47:28,217 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:28,217 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:28,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:28,218 INFO L85 PathProgramCache]: Analyzing trace with hash 719391701, now seen corresponding path program 7 times [2024-11-09 15:47:28,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:28,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524815244] [2024-11-09 15:47:28,218 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:28,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:28,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:28,231 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:28,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:28,239 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:28,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:28,559 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-11-09 15:47:28,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=790, Unknown=0, NotChecked=0, Total=992 [2024-11-09 15:47:28,560 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. cyclomatic complexity: 12 Second operand has 32 states, 32 states have (on average 4.03125) internal successors, (129), 32 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:29,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:29,734 INFO L93 Difference]: Finished difference Result 199 states and 205 transitions. [2024-11-09 15:47:29,734 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 199 states and 205 transitions. [2024-11-09 15:47:29,736 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2024-11-09 15:47:29,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 199 states to 188 states and 194 transitions. [2024-11-09 15:47:29,736 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 121 [2024-11-09 15:47:29,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 121 [2024-11-09 15:47:29,737 INFO L73 IsDeterministic]: Start isDeterministic. Operand 188 states and 194 transitions. [2024-11-09 15:47:29,737 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:29,737 INFO L218 hiAutomatonCegarLoop]: Abstraction has 188 states and 194 transitions. [2024-11-09 15:47:29,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states and 194 transitions. [2024-11-09 15:47:29,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 159. [2024-11-09 15:47:29,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 159 states have (on average 1.0377358490566038) internal successors, (165), 158 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:29,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 165 transitions. [2024-11-09 15:47:29,741 INFO L240 hiAutomatonCegarLoop]: Abstraction has 159 states and 165 transitions. [2024-11-09 15:47:29,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2024-11-09 15:47:29,742 INFO L425 stractBuchiCegarLoop]: Abstraction has 159 states and 165 transitions. [2024-11-09 15:47:29,742 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-09 15:47:29,743 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 159 states and 165 transitions. [2024-11-09 15:47:29,743 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-09 15:47:29,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:29,744 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:29,746 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [42, 42, 10, 9, 9, 9, 9, 1, 1] [2024-11-09 15:47:29,746 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 1, 1, 1, 1, 1] [2024-11-09 15:47:29,747 INFO L745 eck$LassoCheckResult]: Stem: 7844#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7845#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7848#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7990#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7988#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7850#L17-4 foo_#res#1 := foo_~i~0#1; 7851#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7946#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7849#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7846#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7833#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7834#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7989#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7987#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7986#L17-4 foo_#res#1 := foo_~i~0#1; 7947#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7948#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7985#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7984#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7983#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7982#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7981#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7979#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7978#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7977#L17-4 foo_#res#1 := foo_~i~0#1; 7976#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7975#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7974#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7972#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7970#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7969#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7968#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7966#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7965#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7964#L17-4 foo_#res#1 := foo_~i~0#1; 7963#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7962#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7961#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7960#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7959#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7957#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7956#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7955#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7954#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7953#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7952#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7951#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7950#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7949#L17-4 foo_#res#1 := foo_~i~0#1; 7837#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7838#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7842#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7944#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7835#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7836#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7943#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7942#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7941#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7940#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7939#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7938#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7937#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7936#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7935#L17-4 foo_#res#1 := foo_~i~0#1; 7934#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7933#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7932#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7931#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7930#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7929#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7928#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7927#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7926#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7925#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7924#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7923#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7922#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7920#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7919#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7918#L17-4 foo_#res#1 := foo_~i~0#1; 7917#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7916#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7915#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7914#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7913#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7912#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7911#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7910#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7909#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7907#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7905#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7904#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7903#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7902#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7901#L17-4 foo_#res#1 := foo_~i~0#1; 7900#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7899#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7898#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7896#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7894#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7890#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7888#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7886#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7882#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7880#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7879#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7878#L17-4 foo_#res#1 := foo_~i~0#1; 7877#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7876#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7875#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7853#L17-3 [2024-11-09 15:47:29,748 INFO L747 eck$LassoCheckResult]: Loop: 7853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7874#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7872#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7870#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7868#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7866#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7864#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7862#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7860#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7858#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7857#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7856#L17-4 foo_#res#1 := foo_~i~0#1; 7855#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7854#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7852#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7853#L17-3 [2024-11-09 15:47:29,748 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:29,748 INFO L85 PathProgramCache]: Analyzing trace with hash -1964353619, now seen corresponding path program 19 times [2024-11-09 15:47:29,749 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:29,749 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371590785] [2024-11-09 15:47:29,749 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:29,749 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:29,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:30,391 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1440 proven. 137 refuted. 0 times theorem prover too weak. 712 trivial. 0 not checked. [2024-11-09 15:47:30,392 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:30,392 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371590785] [2024-11-09 15:47:30,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371590785] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:30,392 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301447456] [2024-11-09 15:47:30,392 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-09 15:47:30,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:30,392 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:30,394 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:30,396 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2024-11-09 15:47:30,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:30,624 INFO L255 TraceCheckSpWp]: Trace formula consists of 758 conjuncts, 17 conjuncts are in the unsatisfiable core [2024-11-09 15:47:30,626 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:30,862 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1594 proven. 351 refuted. 0 times theorem prover too weak. 344 trivial. 0 not checked. [2024-11-09 15:47:30,862 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:31,124 INFO L134 CoverageAnalysis]: Checked inductivity of 2289 backedges. 1594 proven. 351 refuted. 0 times theorem prover too weak. 344 trivial. 0 not checked. [2024-11-09 15:47:31,125 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1301447456] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:31,125 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:31,125 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 16] total 36 [2024-11-09 15:47:31,125 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517139214] [2024-11-09 15:47:31,125 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:31,125 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:31,125 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:31,125 INFO L85 PathProgramCache]: Analyzing trace with hash 392009165, now seen corresponding path program 8 times [2024-11-09 15:47:31,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:31,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123581618] [2024-11-09 15:47:31,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:31,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:31,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:31,141 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:31,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:31,157 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:32,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:32,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2024-11-09 15:47:32,237 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=234, Invalid=1026, Unknown=0, NotChecked=0, Total=1260 [2024-11-09 15:47:32,237 INFO L87 Difference]: Start difference. First operand 159 states and 165 transitions. cyclomatic complexity: 12 Second operand has 36 states, 36 states have (on average 3.138888888888889) internal successors, (113), 36 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:33,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:33,275 INFO L93 Difference]: Finished difference Result 189 states and 198 transitions. [2024-11-09 15:47:33,275 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 189 states and 198 transitions. [2024-11-09 15:47:33,276 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-09 15:47:33,277 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 189 states to 187 states and 196 transitions. [2024-11-09 15:47:33,277 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 115 [2024-11-09 15:47:33,277 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 115 [2024-11-09 15:47:33,277 INFO L73 IsDeterministic]: Start isDeterministic. Operand 187 states and 196 transitions. [2024-11-09 15:47:33,277 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:33,277 INFO L218 hiAutomatonCegarLoop]: Abstraction has 187 states and 196 transitions. [2024-11-09 15:47:33,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states and 196 transitions. [2024-11-09 15:47:33,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 163. [2024-11-09 15:47:33,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 163 states have (on average 1.0368098159509203) internal successors, (169), 162 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:33,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 169 transitions. [2024-11-09 15:47:33,280 INFO L240 hiAutomatonCegarLoop]: Abstraction has 163 states and 169 transitions. [2024-11-09 15:47:33,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-09 15:47:33,282 INFO L425 stractBuchiCegarLoop]: Abstraction has 163 states and 169 transitions. [2024-11-09 15:47:33,282 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-09 15:47:33,282 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 163 states and 169 transitions. [2024-11-09 15:47:33,283 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-09 15:47:33,284 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:33,284 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:33,285 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [44, 44, 10, 9, 9, 9, 9, 1, 1] [2024-11-09 15:47:33,287 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 1, 1, 1, 1, 1] [2024-11-09 15:47:33,287 INFO L745 eck$LassoCheckResult]: Stem: 9089#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 9090#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 9093#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9240#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9239#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9237#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9095#L17-4 foo_#res#1 := foo_~i~0#1; 9096#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9195#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9094#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9091#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9078#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9238#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9236#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9235#L17-4 foo_#res#1 := foo_~i~0#1; 9196#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9197#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9234#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9232#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9231#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9230#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9229#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9228#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9227#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9226#L17-4 foo_#res#1 := foo_~i~0#1; 9225#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9224#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9223#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9221#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9219#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9217#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9215#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9214#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9213#L17-4 foo_#res#1 := foo_~i~0#1; 9212#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9211#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9210#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9209#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9208#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9206#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9205#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9204#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9202#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9201#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9200#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9199#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9198#L17-4 foo_#res#1 := foo_~i~0#1; 9082#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9083#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9087#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9193#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9080#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9192#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9190#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9189#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9188#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9187#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9186#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9185#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9184#L17-4 foo_#res#1 := foo_~i~0#1; 9183#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9182#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9181#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9180#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9179#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9177#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9176#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9175#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9174#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9173#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9172#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9171#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9170#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9169#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9168#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9167#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9166#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9165#L17-4 foo_#res#1 := foo_~i~0#1; 9164#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9163#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9162#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9161#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9160#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9159#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9158#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9157#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9156#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9155#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9154#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9153#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9152#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9151#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9150#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9149#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9148#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9147#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9146#L17-4 foo_#res#1 := foo_~i~0#1; 9145#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9144#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9143#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9142#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9141#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9139#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9138#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9137#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9136#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9135#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9134#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9133#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9132#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9131#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9130#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9129#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9128#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9127#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9126#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9125#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9124#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9123#L17-4 foo_#res#1 := foo_~i~0#1; 9122#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9121#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9120#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9098#L17-3 [2024-11-09 15:47:33,287 INFO L747 eck$LassoCheckResult]: Loop: 9098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9119#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9118#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9117#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9116#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9115#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9114#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9113#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9112#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9111#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9110#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9109#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9108#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9107#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9106#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9105#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9104#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 9103#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 9102#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 9101#L17-4 foo_#res#1 := foo_~i~0#1; 9100#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 9099#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 9097#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 9098#L17-3 [2024-11-09 15:47:33,288 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:33,288 INFO L85 PathProgramCache]: Analyzing trace with hash 1653069805, now seen corresponding path program 20 times [2024-11-09 15:47:33,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:33,288 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031107078] [2024-11-09 15:47:33,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:33,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:33,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:33,872 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1609 proven. 643 refuted. 0 times theorem prover too weak. 225 trivial. 0 not checked. [2024-11-09 15:47:33,872 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:33,872 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1031107078] [2024-11-09 15:47:33,872 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1031107078] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:33,872 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [463512478] [2024-11-09 15:47:33,873 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-09 15:47:33,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:33,873 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:33,875 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:33,876 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2024-11-09 15:47:34,101 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-09 15:47:34,102 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:34,104 INFO L255 TraceCheckSpWp]: Trace formula consists of 780 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-09 15:47:34,107 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:34,329 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1727 proven. 525 refuted. 0 times theorem prover too weak. 225 trivial. 0 not checked. [2024-11-09 15:47:34,329 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:34,548 INFO L134 CoverageAnalysis]: Checked inductivity of 2477 backedges. 1727 proven. 525 refuted. 0 times theorem prover too weak. 225 trivial. 0 not checked. [2024-11-09 15:47:34,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [463512478] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:34,548 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:34,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18] total 28 [2024-11-09 15:47:34,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13008491] [2024-11-09 15:47:34,549 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:34,549 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-09 15:47:34,549 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:34,549 INFO L85 PathProgramCache]: Analyzing trace with hash 392009165, now seen corresponding path program 9 times [2024-11-09 15:47:34,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:34,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453938166] [2024-11-09 15:47:34,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:34,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:34,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:34,567 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:34,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:34,582 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:35,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:35,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2024-11-09 15:47:35,531 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=566, Unknown=0, NotChecked=0, Total=756 [2024-11-09 15:47:35,532 INFO L87 Difference]: Start difference. First operand 163 states and 169 transitions. cyclomatic complexity: 12 Second operand has 28 states, 28 states have (on average 3.607142857142857) internal successors, (101), 28 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:36,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:36,219 INFO L93 Difference]: Finished difference Result 191 states and 198 transitions. [2024-11-09 15:47:36,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 191 states and 198 transitions. [2024-11-09 15:47:36,220 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-09 15:47:36,221 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 191 states to 190 states and 197 transitions. [2024-11-09 15:47:36,221 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 118 [2024-11-09 15:47:36,221 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 118 [2024-11-09 15:47:36,221 INFO L73 IsDeterministic]: Start isDeterministic. Operand 190 states and 197 transitions. [2024-11-09 15:47:36,221 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:36,221 INFO L218 hiAutomatonCegarLoop]: Abstraction has 190 states and 197 transitions. [2024-11-09 15:47:36,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states and 197 transitions. [2024-11-09 15:47:36,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 165. [2024-11-09 15:47:36,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 165 states have (on average 1.0363636363636364) internal successors, (171), 164 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:36,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 171 transitions. [2024-11-09 15:47:36,224 INFO L240 hiAutomatonCegarLoop]: Abstraction has 165 states and 171 transitions. [2024-11-09 15:47:36,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2024-11-09 15:47:36,225 INFO L425 stractBuchiCegarLoop]: Abstraction has 165 states and 171 transitions. [2024-11-09 15:47:36,225 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-09 15:47:36,225 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 165 states and 171 transitions. [2024-11-09 15:47:36,226 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 26 [2024-11-09 15:47:36,227 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:36,227 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:36,228 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2024-11-09 15:47:36,231 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [9, 9, 1, 1, 1, 1, 1] [2024-11-09 15:47:36,231 INFO L745 eck$LassoCheckResult]: Stem: 10358#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10359#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 10362#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10511#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10510#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10508#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10364#L17-4 foo_#res#1 := foo_~i~0#1; 10365#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10466#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10363#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10347#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10348#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10509#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10507#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10506#L17-4 foo_#res#1 := foo_~i~0#1; 10467#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10468#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10505#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10504#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10503#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10502#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10501#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10500#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10499#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10498#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10497#L17-4 foo_#res#1 := foo_~i~0#1; 10496#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10495#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10494#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10493#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10492#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10491#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10490#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10489#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10488#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10487#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10486#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10485#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10484#L17-4 foo_#res#1 := foo_~i~0#1; 10483#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10482#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10481#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10480#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10479#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10478#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10477#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10476#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10475#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10474#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10473#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10472#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10471#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10470#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10469#L17-4 foo_#res#1 := foo_~i~0#1; 10351#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10352#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10356#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10465#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10464#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10361#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10349#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10350#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10463#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10462#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10461#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10460#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10459#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10458#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10457#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10456#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10455#L17-4 foo_#res#1 := foo_~i~0#1; 10454#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10453#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10452#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10451#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10450#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10449#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10448#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10447#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10446#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10445#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10444#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10443#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10442#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10441#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10440#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10439#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10438#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10437#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10436#L17-4 foo_#res#1 := foo_~i~0#1; 10435#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10434#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10433#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10432#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10431#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10429#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10428#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10427#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10426#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10425#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10424#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10423#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10422#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10421#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10420#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10419#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10418#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10417#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10416#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10415#L17-4 foo_#res#1 := foo_~i~0#1; 10414#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10413#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10412#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10411#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10410#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10409#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10408#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10407#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10406#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10405#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10404#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10403#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10402#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10401#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10400#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10399#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10398#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10397#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10396#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10395#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10394#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10393#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10392#L17-4 foo_#res#1 := foo_~i~0#1; 10391#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10390#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10389#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10367#L17-3 [2024-11-09 15:47:36,231 INFO L747 eck$LassoCheckResult]: Loop: 10367#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10388#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10387#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10386#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10384#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10382#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10381#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10380#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10379#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10378#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10377#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10376#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10375#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10374#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10373#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10372#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10371#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10370#L17-4 foo_#res#1 := foo_~i~0#1; 10369#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10368#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10366#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10367#L17-3 [2024-11-09 15:47:36,232 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:36,232 INFO L85 PathProgramCache]: Analyzing trace with hash -1066401937, now seen corresponding path program 21 times [2024-11-09 15:47:36,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:36,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243709114] [2024-11-09 15:47:36,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:36,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:36,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:36,322 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:36,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:36,408 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:36,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:36,409 INFO L85 PathProgramCache]: Analyzing trace with hash 392009165, now seen corresponding path program 10 times [2024-11-09 15:47:36,409 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:36,409 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [780164614] [2024-11-09 15:47:36,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:36,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:36,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:36,422 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:36,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:36,433 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:36,434 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:36,435 INFO L85 PathProgramCache]: Analyzing trace with hash 537533087, now seen corresponding path program 22 times [2024-11-09 15:47:36,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:36,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630526710] [2024-11-09 15:47:36,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:36,436 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:36,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-09 15:47:37,247 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2241 proven. 1111 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-09 15:47:37,248 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-09 15:47:37,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630526710] [2024-11-09 15:47:37,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [630526710] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-09 15:47:37,248 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1473013262] [2024-11-09 15:47:37,248 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-09 15:47:37,248 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-09 15:47:37,248 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-09 15:47:37,250 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-09 15:47:37,253 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2024-11-09 15:47:37,524 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-09 15:47:37,524 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-09 15:47:37,527 INFO L255 TraceCheckSpWp]: Trace formula consists of 918 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-09 15:47:37,530 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-09 15:47:37,929 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2326 proven. 1026 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-09 15:47:37,929 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-09 15:47:38,364 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 2326 proven. 1026 refuted. 0 times theorem prover too weak. 285 trivial. 0 not checked. [2024-11-09 15:47:38,364 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1473013262] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-09 15:47:38,365 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-09 15:47:38,365 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 43 [2024-11-09 15:47:38,365 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735866738] [2024-11-09 15:47:38,365 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-09 15:47:39,348 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-09 15:47:39,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2024-11-09 15:47:39,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=394, Invalid=1412, Unknown=0, NotChecked=0, Total=1806 [2024-11-09 15:47:39,350 INFO L87 Difference]: Start difference. First operand 165 states and 171 transitions. cyclomatic complexity: 12 Second operand has 43 states, 43 states have (on average 3.186046511627907) internal successors, (137), 43 states have internal predecessors, (137), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:40,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-09 15:47:40,734 INFO L93 Difference]: Finished difference Result 205 states and 216 transitions. [2024-11-09 15:47:40,734 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 205 states and 216 transitions. [2024-11-09 15:47:40,735 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 30 [2024-11-09 15:47:40,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 205 states to 204 states and 215 transitions. [2024-11-09 15:47:40,736 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 124 [2024-11-09 15:47:40,736 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 124 [2024-11-09 15:47:40,736 INFO L73 IsDeterministic]: Start isDeterministic. Operand 204 states and 215 transitions. [2024-11-09 15:47:40,736 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-09 15:47:40,736 INFO L218 hiAutomatonCegarLoop]: Abstraction has 204 states and 215 transitions. [2024-11-09 15:47:40,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states and 215 transitions. [2024-11-09 15:47:40,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 167. [2024-11-09 15:47:40,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167 states, 167 states have (on average 1.035928143712575) internal successors, (173), 166 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-09 15:47:40,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 173 transitions. [2024-11-09 15:47:40,739 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167 states and 173 transitions. [2024-11-09 15:47:40,740 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2024-11-09 15:47:40,740 INFO L425 stractBuchiCegarLoop]: Abstraction has 167 states and 173 transitions. [2024-11-09 15:47:40,740 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-09 15:47:40,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167 states and 173 transitions. [2024-11-09 15:47:40,741 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28 [2024-11-09 15:47:40,741 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-09 15:47:40,741 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-09 15:47:40,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [45, 45, 10, 9, 9, 9, 9, 1, 1] [2024-11-09 15:47:40,743 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [10, 10, 1, 1, 1, 1, 1] [2024-11-09 15:47:40,743 INFO L745 eck$LassoCheckResult]: Stem: 11855#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 11856#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 11860#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11858#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11963#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12007#L17-4 foo_#res#1 := foo_~i~0#1; 12006#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11852#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11853#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12009#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11843#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11844#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12008#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11962#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11861#L17-4 foo_#res#1 := foo_~i~0#1; 11847#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11848#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12005#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12004#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12003#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12002#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12001#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12000#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11999#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11998#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11997#L17-4 foo_#res#1 := foo_~i~0#1; 11996#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11995#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11994#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11993#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11992#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11990#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11988#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11987#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11986#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11985#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11984#L17-4 foo_#res#1 := foo_~i~0#1; 11983#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11982#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11981#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11979#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11977#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11976#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11975#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11974#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11973#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11972#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11971#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11970#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11969#L17-4 foo_#res#1 := foo_~i~0#1; 11968#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11967#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11966#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11965#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11964#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11845#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11846#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11961#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11960#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11959#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11957#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11956#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11955#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11954#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11953#L17-4 foo_#res#1 := foo_~i~0#1; 11952#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11951#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11950#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11948#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11946#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11944#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11943#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11942#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11940#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11939#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11938#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11936#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11935#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11934#L17-4 foo_#res#1 := foo_~i~0#1; 11933#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11932#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11931#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11927#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11926#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11925#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11924#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11923#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11921#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11920#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11919#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11917#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11916#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11915#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11914#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11913#L17-4 foo_#res#1 := foo_~i~0#1; 11912#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11911#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11910#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11906#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11904#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11902#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11900#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11899#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11898#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11896#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11894#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11891#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11890#L17-4 foo_#res#1 := foo_~i~0#1; 11889#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11888#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11887#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11863#L17-3 [2024-11-09 15:47:40,743 INFO L747 eck$LassoCheckResult]: Loop: 11863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11886#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11882#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11880#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11878#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11877#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11876#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11874#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11872#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11870#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#0(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 11868#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 11867#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 11866#L17-4 foo_#res#1 := foo_~i~0#1; 11865#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#1(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 11864#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 11862#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 11863#L17-3 [2024-11-09 15:47:40,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:40,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1066401937, now seen corresponding path program 23 times [2024-11-09 15:47:40,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:40,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342594376] [2024-11-09 15:47:40,744 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:40,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:40,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:40,814 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:40,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:40,916 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:40,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:40,916 INFO L85 PathProgramCache]: Analyzing trace with hash 414838155, now seen corresponding path program 11 times [2024-11-09 15:47:40,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:40,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140043472] [2024-11-09 15:47:40,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:40,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:40,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:40,934 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:40,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:40,949 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-09 15:47:40,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-09 15:47:40,949 INFO L85 PathProgramCache]: Analyzing trace with hash -1470593571, now seen corresponding path program 24 times [2024-11-09 15:47:40,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-09 15:47:40,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331946052] [2024-11-09 15:47:40,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-09 15:47:40,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-09 15:47:41,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:41,029 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-09 15:47:41,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-09 15:47:41,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace