./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 3289d67d Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-3289d67-m [2024-11-17 08:07:00,275 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-17 08:07:00,358 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2024-11-17 08:07:00,363 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-17 08:07:00,365 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-17 08:07:00,365 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2024-11-17 08:07:00,394 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-17 08:07:00,396 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-17 08:07:00,397 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-17 08:07:00,398 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-17 08:07:00,399 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-17 08:07:00,399 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-17 08:07:00,400 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-17 08:07:00,400 INFO L153 SettingsManager]: * Use SBE=true [2024-11-17 08:07:00,402 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-17 08:07:00,403 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-17 08:07:00,403 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-17 08:07:00,403 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-17 08:07:00,404 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-17 08:07:00,405 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-17 08:07:00,405 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-17 08:07:00,408 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-17 08:07:00,408 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-17 08:07:00,408 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-17 08:07:00,409 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-17 08:07:00,409 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-17 08:07:00,409 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-17 08:07:00,410 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-17 08:07:00,410 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-17 08:07:00,410 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-17 08:07:00,411 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-17 08:07:00,411 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-17 08:07:00,411 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2024-11-17 08:07:00,412 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-17 08:07:00,412 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-17 08:07:00,413 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-17 08:07:00,413 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-17 08:07:00,413 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe [2024-11-17 08:07:00,685 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-17 08:07:00,707 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-17 08:07:00,711 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-17 08:07:00,713 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-17 08:07:00,713 INFO L274 PluginConnector]: CDTParser initialized [2024-11-17 08:07:00,715 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-17 08:07:02,202 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-17 08:07:02,398 INFO L384 CDTParser]: Found 1 translation units. [2024-11-17 08:07:02,399 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-17 08:07:02,416 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f2432d6d8/6c5c967630424f2590a5d9cefe7c3f20/FLAG73462865f [2024-11-17 08:07:02,431 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f2432d6d8/6c5c967630424f2590a5d9cefe7c3f20 [2024-11-17 08:07:02,434 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-17 08:07:02,436 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-17 08:07:02,437 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-17 08:07:02,438 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-17 08:07:02,443 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-17 08:07:02,443 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,444 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5ee3c66e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02, skipping insertion in model container [2024-11-17 08:07:02,444 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,483 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-17 08:07:02,777 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-17 08:07:02,789 INFO L200 MainTranslator]: Completed pre-run [2024-11-17 08:07:02,827 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-17 08:07:02,853 INFO L204 MainTranslator]: Completed translation [2024-11-17 08:07:02,853 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02 WrapperNode [2024-11-17 08:07:02,853 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-17 08:07:02,854 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-17 08:07:02,855 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-17 08:07:02,855 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-17 08:07:02,862 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,878 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,892 INFO L138 Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 31 [2024-11-17 08:07:02,893 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-17 08:07:02,893 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-17 08:07:02,893 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-17 08:07:02,894 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-17 08:07:02,904 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,904 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,907 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,917 INFO L175 MemorySlicer]: Split 7 memory accesses to 2 slices as follows [4, 3]. 57 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 3 writes are split as follows [2, 1]. [2024-11-17 08:07:02,917 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,917 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,922 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,923 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,924 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,925 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,927 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-17 08:07:02,929 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2024-11-17 08:07:02,929 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2024-11-17 08:07:02,929 INFO L274 PluginConnector]: IcfgBuilder initialized [2024-11-17 08:07:02,930 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (1/1) ... [2024-11-17 08:07:02,938 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-17 08:07:02,951 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:02,970 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-17 08:07:02,979 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-17 08:07:03,030 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-17 08:07:03,030 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-17 08:07:03,031 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-17 08:07:03,032 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-17 08:07:03,032 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-17 08:07:03,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-17 08:07:03,032 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-17 08:07:03,032 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-17 08:07:03,158 INFO L256 CfgBuilder]: Building ICFG [2024-11-17 08:07:03,159 INFO L286 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-17 08:07:03,247 INFO L? ?]: Removed 4 outVars from TransFormulas that were not future-live. [2024-11-17 08:07:03,248 INFO L307 CfgBuilder]: Performing block encoding [2024-11-17 08:07:03,261 INFO L331 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-17 08:07:03,262 INFO L336 CfgBuilder]: Removed 0 assume(true) statements. [2024-11-17 08:07:03,262 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.11 08:07:03 BoogieIcfgContainer [2024-11-17 08:07:03,263 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2024-11-17 08:07:03,264 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-17 08:07:03,264 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-17 08:07:03,270 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-17 08:07:03,271 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-17 08:07:03,271 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.11 08:07:02" (1/3) ... [2024-11-17 08:07:03,272 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a2c4da4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.11 08:07:03, skipping insertion in model container [2024-11-17 08:07:03,272 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-17 08:07:03,273 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 08:07:02" (2/3) ... [2024-11-17 08:07:03,274 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a2c4da4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.11 08:07:03, skipping insertion in model container [2024-11-17 08:07:03,274 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-17 08:07:03,275 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.11 08:07:03" (3/3) ... [2024-11-17 08:07:03,276 INFO L332 chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i [2024-11-17 08:07:03,341 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-17 08:07:03,341 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-17 08:07:03,341 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-17 08:07:03,341 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-17 08:07:03,342 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-17 08:07:03,343 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-17 08:07:03,343 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-17 08:07:03,343 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-17 08:07:03,354 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:03,375 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-17 08:07:03,376 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:03,376 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:03,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:03,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-17 08:07:03,397 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-17 08:07:03,397 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:03,400 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-17 08:07:03,400 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:03,400 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:03,400 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:03,400 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-17 08:07:03,412 INFO L745 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 10#L549true [2024-11-17 08:07:03,412 INFO L747 eck$LassoCheckResult]: Loop: 10#L549true assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 9#L551true assume !true; 11#L554true call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 10#L549true [2024-11-17 08:07:03,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:03,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 1 times [2024-11-17 08:07:03,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:03,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680709992] [2024-11-17 08:07:03,432 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:03,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:03,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:03,593 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:03,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:03,624 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:03,626 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:03,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1322586, now seen corresponding path program 1 times [2024-11-17 08:07:03,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:03,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558065238] [2024-11-17 08:07:03,627 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:03,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:03,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:03,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:03,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:03,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558065238] [2024-11-17 08:07:03,676 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1558065238] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-17 08:07:03,676 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-17 08:07:03,676 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-17 08:07:03,676 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1612973284] [2024-11-17 08:07:03,677 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-17 08:07:03,681 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:03,682 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:03,709 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-17 08:07:03,710 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-17 08:07:03,711 INFO L87 Difference]: Start difference. First operand has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:03,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:03,715 INFO L93 Difference]: Finished difference Result 11 states and 12 transitions. [2024-11-17 08:07:03,716 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions. [2024-11-17 08:07:03,717 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-17 08:07:03,719 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions. [2024-11-17 08:07:03,720 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-17 08:07:03,720 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2024-11-17 08:07:03,721 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions. [2024-11-17 08:07:03,721 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:03,721 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-17 08:07:03,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions. [2024-11-17 08:07:03,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2024-11-17 08:07:03,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:03,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2024-11-17 08:07:03,741 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-17 08:07:03,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-17 08:07:03,745 INFO L425 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2024-11-17 08:07:03,745 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-17 08:07:03,745 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2024-11-17 08:07:03,746 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2024-11-17 08:07:03,746 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:03,746 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:03,746 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:03,746 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-17 08:07:03,746 INFO L745 eck$LassoCheckResult]: Stem: 32#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 33#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 34#L549 [2024-11-17 08:07:03,747 INFO L747 eck$LassoCheckResult]: Loop: 34#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 34#L549 [2024-11-17 08:07:03,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:03,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 2 times [2024-11-17 08:07:03,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:03,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [876995976] [2024-11-17 08:07:03,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:03,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:03,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:03,761 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:03,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:03,770 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:03,770 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:03,771 INFO L85 PathProgramCache]: Analyzing trace with hash 40999269, now seen corresponding path program 1 times [2024-11-17 08:07:03,771 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:03,771 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853830605] [2024-11-17 08:07:03,771 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:03,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:03,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:03,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:03,946 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:03,946 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853830605] [2024-11-17 08:07:03,947 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [853830605] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-17 08:07:03,948 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-17 08:07:03,948 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-17 08:07:03,948 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1573316926] [2024-11-17 08:07:03,948 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-17 08:07:03,948 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:03,948 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:03,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-17 08:07:03,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-17 08:07:03,950 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:03,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:03,999 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2024-11-17 08:07:03,999 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2024-11-17 08:07:04,000 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-11-17 08:07:04,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2024-11-17 08:07:04,000 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2024-11-17 08:07:04,000 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2024-11-17 08:07:04,001 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2024-11-17 08:07:04,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:04,001 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-17 08:07:04,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2024-11-17 08:07:04,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2024-11-17 08:07:04,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:04,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2024-11-17 08:07:04,003 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-17 08:07:04,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-17 08:07:04,005 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2024-11-17 08:07:04,006 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-17 08:07:04,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2024-11-17 08:07:04,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2024-11-17 08:07:04,009 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:04,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:04,011 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:04,011 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1] [2024-11-17 08:07:04,011 INFO L745 eck$LassoCheckResult]: Stem: 57#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 58#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 59#L549 [2024-11-17 08:07:04,011 INFO L747 eck$LassoCheckResult]: Loop: 59#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 60#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 61#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 59#L549 [2024-11-17 08:07:04,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:04,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 3 times [2024-11-17 08:07:04,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:04,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [274804849] [2024-11-17 08:07:04,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:04,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:04,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:04,036 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:04,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:04,049 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:04,050 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:04,050 INFO L85 PathProgramCache]: Analyzing trace with hash 745656358, now seen corresponding path program 1 times [2024-11-17 08:07:04,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:04,050 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [247975400] [2024-11-17 08:07:04,050 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:04,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:04,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:04,334 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:04,335 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:04,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [247975400] [2024-11-17 08:07:04,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [247975400] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:07:04,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1388424921] [2024-11-17 08:07:04,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:04,336 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:07:04,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:04,339 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:07:04,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-17 08:07:04,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:04,401 INFO L255 TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-17 08:07:04,404 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-17 08:07:04,454 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-17 08:07:04,485 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:04,515 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:04,515 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-17 08:07:04,577 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:04,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1388424921] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-17 08:07:04,581 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-17 08:07:04,581 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10 [2024-11-17 08:07:04,581 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1456895664] [2024-11-17 08:07:04,581 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-17 08:07:04,582 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:04,582 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:04,582 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-11-17 08:07:04,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2024-11-17 08:07:04,583 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:04,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:04,656 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2024-11-17 08:07:04,656 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2024-11-17 08:07:04,657 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-11-17 08:07:04,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2024-11-17 08:07:04,657 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-17 08:07:04,657 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2024-11-17 08:07:04,658 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2024-11-17 08:07:04,658 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:04,658 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-17 08:07:04,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2024-11-17 08:07:04,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2024-11-17 08:07:04,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:04,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2024-11-17 08:07:04,661 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-17 08:07:04,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-17 08:07:04,664 INFO L425 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-17 08:07:04,664 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-17 08:07:04,664 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2024-11-17 08:07:04,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 13 [2024-11-17 08:07:04,667 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:04,667 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:04,668 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:04,668 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1] [2024-11-17 08:07:04,668 INFO L745 eck$LassoCheckResult]: Stem: 136#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 137#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 138#L549 [2024-11-17 08:07:04,668 INFO L747 eck$LassoCheckResult]: Loop: 138#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 140#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 141#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 138#L549 [2024-11-17 08:07:04,669 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:04,669 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 4 times [2024-11-17 08:07:04,669 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:04,669 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559654238] [2024-11-17 08:07:04,669 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:04,669 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:04,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:04,682 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:04,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:04,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:04,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:04,695 INFO L85 PathProgramCache]: Analyzing trace with hash 551987945, now seen corresponding path program 2 times [2024-11-17 08:07:04,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:04,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603099522] [2024-11-17 08:07:04,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:04,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:04,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:05,195 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:05,196 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:05,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [603099522] [2024-11-17 08:07:05,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [603099522] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:07:05,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1357868188] [2024-11-17 08:07:05,197 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-17 08:07:05,197 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:07:05,197 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:05,217 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:07:05,219 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-17 08:07:05,292 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-17 08:07:05,293 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-17 08:07:05,294 INFO L255 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-17 08:07:05,297 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-17 08:07:05,303 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-17 08:07:05,320 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:05,347 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:05,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:05,392 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:05,414 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:05,414 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-17 08:07:05,527 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:05,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1357868188] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-17 08:07:05,528 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-17 08:07:05,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8] total 22 [2024-11-17 08:07:05,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425474185] [2024-11-17 08:07:05,528 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-17 08:07:05,529 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:05,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:05,531 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-17 08:07:05,532 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=297, Unknown=0, NotChecked=0, Total=462 [2024-11-17 08:07:05,533 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand has 22 states, 22 states have (on average 1.5) internal successors, (33), 22 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:05,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:05,761 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-11-17 08:07:05,761 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-11-17 08:07:05,762 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-17 08:07:05,762 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-11-17 08:07:05,762 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27 [2024-11-17 08:07:05,763 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2024-11-17 08:07:05,763 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-11-17 08:07:05,763 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:05,763 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-17 08:07:05,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-11-17 08:07:05,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2024-11-17 08:07:05,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:05,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2024-11-17 08:07:05,769 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-17 08:07:05,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2024-11-17 08:07:05,770 INFO L425 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-17 08:07:05,770 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-17 08:07:05,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2024-11-17 08:07:05,771 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 25 [2024-11-17 08:07:05,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:05,772 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:05,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:05,772 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1] [2024-11-17 08:07:05,773 INFO L745 eck$LassoCheckResult]: Stem: 293#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 294#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 295#L549 [2024-11-17 08:07:05,773 INFO L747 eck$LassoCheckResult]: Loop: 295#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 291#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 292#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 297#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 317#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 315#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 313#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 311#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 309#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 307#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 305#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 303#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 301#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 300#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 299#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 295#L549 [2024-11-17 08:07:05,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:05,773 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 5 times [2024-11-17 08:07:05,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:05,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34298118] [2024-11-17 08:07:05,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:05,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:05,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:05,782 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:05,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:05,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:05,788 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:05,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1878717871, now seen corresponding path program 3 times [2024-11-17 08:07:05,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:05,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959795150] [2024-11-17 08:07:05,789 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:05,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:05,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:07,006 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:07,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:07,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959795150] [2024-11-17 08:07:07,007 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959795150] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:07:07,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [148869296] [2024-11-17 08:07:07,007 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-17 08:07:07,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:07:07,007 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:07,009 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:07:07,011 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-17 08:07:07,127 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-17 08:07:07,128 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-17 08:07:07,129 INFO L255 TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-17 08:07:07,132 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-17 08:07:07,136 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-17 08:07:07,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,224 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,251 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,299 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,325 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,369 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:07,390 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:07,390 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-17 08:07:07,682 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:07,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [148869296] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-17 08:07:07,683 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-17 08:07:07,683 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 14, 14] total 46 [2024-11-17 08:07:07,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290530246] [2024-11-17 08:07:07,683 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-17 08:07:07,684 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:07,684 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:07,684 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2024-11-17 08:07:07,686 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1344, Unknown=0, NotChecked=0, Total=2070 [2024-11-17 08:07:07,686 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand has 46 states, 46 states have (on average 1.5) internal successors, (69), 46 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:08,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:08,244 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2024-11-17 08:07:08,245 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2024-11-17 08:07:08,246 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-17 08:07:08,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2024-11-17 08:07:08,247 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 51 [2024-11-17 08:07:08,248 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 51 [2024-11-17 08:07:08,249 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2024-11-17 08:07:08,249 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:08,250 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-17 08:07:08,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2024-11-17 08:07:08,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2024-11-17 08:07:08,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:08,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2024-11-17 08:07:08,255 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-17 08:07:08,256 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2024-11-17 08:07:08,257 INFO L425 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2024-11-17 08:07:08,257 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-17 08:07:08,264 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2024-11-17 08:07:08,265 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 49 [2024-11-17 08:07:08,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:08,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:08,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:08,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1] [2024-11-17 08:07:08,268 INFO L745 eck$LassoCheckResult]: Stem: 606#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 607#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 608#L549 [2024-11-17 08:07:08,269 INFO L747 eck$LassoCheckResult]: Loop: 608#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 604#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 605#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 609#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 610#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 611#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 654#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 653#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 652#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 651#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 650#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 649#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 648#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 647#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 646#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 645#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 644#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 643#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 642#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 641#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 640#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 639#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 638#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 637#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 636#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 635#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 634#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 633#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 632#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 631#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 630#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 629#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 628#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 627#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 626#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 625#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 624#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 623#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 622#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 621#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 620#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 619#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 618#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 617#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 616#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 615#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 614#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 613#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 612#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 608#L549 [2024-11-17 08:07:08,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:08,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 6 times [2024-11-17 08:07:08,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:08,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901719460] [2024-11-17 08:07:08,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:08,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:08,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:08,275 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:08,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:08,280 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:08,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:08,281 INFO L85 PathProgramCache]: Analyzing trace with hash -1594286021, now seen corresponding path program 4 times [2024-11-17 08:07:08,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:08,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [326942880] [2024-11-17 08:07:08,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:08,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:08,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:11,088 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:11,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:11,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [326942880] [2024-11-17 08:07:11,089 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [326942880] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:07:11,089 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [523648955] [2024-11-17 08:07:11,089 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-17 08:07:11,089 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:07:11,089 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:11,095 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:07:11,098 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-17 08:07:11,346 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-17 08:07:11,347 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-17 08:07:11,350 INFO L255 TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-11-17 08:07:11,355 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-17 08:07:11,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-17 08:07:11,372 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,401 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,432 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,493 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,522 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,554 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,587 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,642 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,696 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,726 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,756 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,791 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,915 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,948 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:11,979 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:12,014 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:12,047 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:12,048 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-17 08:07:13,021 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:13,021 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [523648955] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-17 08:07:13,021 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-17 08:07:13,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 26, 26] total 94 [2024-11-17 08:07:13,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1330881491] [2024-11-17 08:07:13,022 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-17 08:07:13,023 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:13,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:13,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 94 interpolants. [2024-11-17 08:07:13,028 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3036, Invalid=5706, Unknown=0, NotChecked=0, Total=8742 [2024-11-17 08:07:13,028 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand has 94 states, 94 states have (on average 1.5) internal successors, (141), 94 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:14,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:14,479 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2024-11-17 08:07:14,479 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2024-11-17 08:07:14,480 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-11-17 08:07:14,481 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2024-11-17 08:07:14,481 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 99 [2024-11-17 08:07:14,482 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 99 [2024-11-17 08:07:14,482 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2024-11-17 08:07:14,482 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:14,482 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-17 08:07:14,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2024-11-17 08:07:14,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2024-11-17 08:07:14,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:14,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2024-11-17 08:07:14,488 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-17 08:07:14,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2024-11-17 08:07:14,489 INFO L425 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2024-11-17 08:07:14,490 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-17 08:07:14,490 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2024-11-17 08:07:14,491 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 97 [2024-11-17 08:07:14,491 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:14,491 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:14,492 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:14,492 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1] [2024-11-17 08:07:14,494 INFO L745 eck$LassoCheckResult]: Stem: 1231#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1232#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1233#L549 [2024-11-17 08:07:14,494 INFO L747 eck$LassoCheckResult]: Loop: 1233#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1229#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1230#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1234#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1235#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1236#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1327#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1325#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1323#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1321#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1319#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1317#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1315#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1313#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1312#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1311#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1310#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1309#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1307#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1306#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1305#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1304#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1303#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1302#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1301#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1300#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1299#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1298#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1297#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1296#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1295#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1294#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1293#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1292#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1291#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1290#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1289#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1288#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1287#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1286#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1285#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1284#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1283#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1282#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1281#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1280#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1279#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1278#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1277#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1276#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1275#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1274#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1273#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1272#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1271#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1270#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1269#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1268#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1267#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1266#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1265#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1264#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1263#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1262#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1261#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1260#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1259#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1258#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1257#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1256#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1255#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1254#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1253#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1252#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1251#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1250#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1249#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1248#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1247#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1246#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1245#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1244#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1243#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1242#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1241#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1240#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1239#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1238#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1237#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1233#L549 [2024-11-17 08:07:14,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:14,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 7 times [2024-11-17 08:07:14,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:14,498 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030142157] [2024-11-17 08:07:14,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:14,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:14,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:14,504 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:14,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:14,507 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:14,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:14,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1098528429, now seen corresponding path program 5 times [2024-11-17 08:07:14,509 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:14,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941245542] [2024-11-17 08:07:14,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:14,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:14,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:07:22,282 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:22,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:07:22,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [941245542] [2024-11-17 08:07:22,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [941245542] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:07:22,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [680010520] [2024-11-17 08:07:22,283 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-17 08:07:22,284 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:07:22,284 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:07:22,286 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:07:22,288 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-17 08:07:40,854 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-17 08:07:40,854 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-17 08:07:40,866 INFO L255 TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 96 conjuncts are in the unsatisfiable core [2024-11-17 08:07:40,876 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-17 08:07:40,879 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-11-17 08:07:40,885 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:40,917 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:40,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:40,989 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,018 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,080 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,110 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,142 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,172 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,214 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,257 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,328 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,361 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,395 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,534 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,567 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,655 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,692 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,733 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,774 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,820 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,856 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,892 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,927 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:41,966 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,008 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,088 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,132 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,183 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,275 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,359 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,450 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,533 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,575 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,616 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2024-11-17 08:07:42,657 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:42,658 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-17 08:07:45,282 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:07:45,282 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [680010520] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-17 08:07:45,282 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-17 08:07:45,282 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 50, 50] total 190 [2024-11-17 08:07:45,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [533157452] [2024-11-17 08:07:45,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-17 08:07:45,283 INFO L762 eck$LassoCheckResult]: loop already infeasible [2024-11-17 08:07:45,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-17 08:07:45,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 190 interpolants. [2024-11-17 08:07:45,300 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12408, Invalid=23502, Unknown=0, NotChecked=0, Total=35910 [2024-11-17 08:07:45,301 INFO L87 Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand has 190 states, 190 states have (on average 1.5) internal successors, (285), 190 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:50,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-17 08:07:50,129 INFO L93 Difference]: Finished difference Result 195 states and 196 transitions. [2024-11-17 08:07:50,129 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions. [2024-11-17 08:07:50,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-11-17 08:07:50,132 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions. [2024-11-17 08:07:50,132 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 195 [2024-11-17 08:07:50,133 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 195 [2024-11-17 08:07:50,133 INFO L73 IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions. [2024-11-17 08:07:50,134 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-17 08:07:50,134 INFO L218 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-17 08:07:50,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions. [2024-11-17 08:07:50,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195. [2024-11-17 08:07:50,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-17 08:07:50,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions. [2024-11-17 08:07:50,147 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-17 08:07:50,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2024-11-17 08:07:50,148 INFO L425 stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions. [2024-11-17 08:07:50,150 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-17 08:07:50,150 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions. [2024-11-17 08:07:50,151 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 193 [2024-11-17 08:07:50,151 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-17 08:07:50,151 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-17 08:07:50,153 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-17 08:07:50,154 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1] [2024-11-17 08:07:50,154 INFO L745 eck$LassoCheckResult]: Stem: 2480#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2481#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2482#L549 [2024-11-17 08:07:50,154 INFO L747 eck$LassoCheckResult]: Loop: 2482#L549 assume true;call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2478#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2479#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2483#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2484#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2485#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2672#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2671#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2670#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2669#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2668#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2667#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2666#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2665#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2664#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2663#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2662#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2661#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2660#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2659#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2658#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2657#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2656#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2655#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2654#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2653#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2652#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2651#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2650#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2649#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2648#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2647#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2646#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2645#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2644#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2643#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2642#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2641#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2640#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2639#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2638#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2637#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2636#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2635#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2634#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2633#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2632#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2631#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2630#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2629#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2628#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2627#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2626#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2625#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2624#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2623#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2622#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2621#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2620#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2619#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2618#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2617#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2616#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2615#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2614#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2613#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2612#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2611#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2610#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2609#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2608#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2607#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2606#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2605#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2604#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2603#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2602#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2601#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2600#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2599#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2598#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2597#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2596#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2595#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2594#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2593#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2592#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2591#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2590#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2589#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2588#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2587#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2586#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2585#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2584#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2583#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2582#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2581#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2580#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2579#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2578#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2577#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2576#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2575#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2574#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2573#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2572#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2571#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2570#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2569#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2568#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2567#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2566#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2565#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2564#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2563#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2562#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2561#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2560#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2559#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2558#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2557#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2556#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2555#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2554#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2553#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2552#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2551#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2550#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2549#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2548#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2547#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2546#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2545#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2544#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2543#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2542#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2541#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2540#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2539#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2538#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2537#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2536#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2535#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2534#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2533#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2532#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2531#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2530#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2529#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2528#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2527#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2526#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2525#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2524#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2523#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2522#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2521#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2520#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2519#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2518#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2517#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2516#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2515#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2514#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2513#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2512#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2511#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2510#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2509#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2508#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2507#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2506#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2505#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2504#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2503#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2502#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2501#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2500#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2499#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2498#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2497#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2496#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2495#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2494#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2493#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2492#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2491#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2490#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2489#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2488#L551 assume true;call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2487#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2486#L554 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2482#L549 [2024-11-17 08:07:50,155 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:50,155 INFO L85 PathProgramCache]: Analyzing trace with hash 1472, now seen corresponding path program 8 times [2024-11-17 08:07:50,155 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:50,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889672335] [2024-11-17 08:07:50,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:50,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:50,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:50,159 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-17 08:07:50,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-17 08:07:50,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-17 08:07:50,162 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-17 08:07:50,162 INFO L85 PathProgramCache]: Analyzing trace with hash -676303997, now seen corresponding path program 6 times [2024-11-17 08:07:50,162 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-17 08:07:50,162 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1868485246] [2024-11-17 08:07:50,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-17 08:07:50,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-17 08:07:50,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-17 08:08:15,333 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-17 08:08:15,333 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-17 08:08:15,333 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1868485246] [2024-11-17 08:08:15,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1868485246] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-17 08:08:15,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1592291573] [2024-11-17 08:08:15,334 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-17 08:08:15,334 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-17 08:08:15,334 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-17 08:08:15,335 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-17 08:08:15,336 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process