./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 3289d67d
Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 67499ec0709cfdcc368630c5b1d94f26157589b8bf16f22cf5d62554760c6dd7
--- Real Ultimate output ---
This is Ultimate 0.2.5-tmp.fs.icfgbuilder-eval-3289d67-m
[2024-11-17 09:19:26,989 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-17 09:19:27,061 INFO  L114        SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf
[2024-11-17 09:19:27,065 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-17 09:19:27,066 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-17 09:19:27,066 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG
[2024-11-17 09:19:27,088 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-17 09:19:27,088 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-17 09:19:27,089 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-17 09:19:27,089 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-17 09:19:27,090 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-17 09:19:27,090 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-17 09:19:27,091 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-17 09:19:27,094 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-17 09:19:27,094 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2024-11-17 09:19:27,095 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2024-11-17 09:19:27,095 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2024-11-17 09:19:27,095 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2024-11-17 09:19:27,096 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2024-11-17 09:19:27,096 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2024-11-17 09:19:27,096 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-17 09:19:27,100 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2024-11-17 09:19:27,101 INFO  L153        SettingsManager]:  * sizeof long=4
[2024-11-17 09:19:27,101 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2024-11-17 09:19:27,101 INFO  L153        SettingsManager]:  * sizeof POINTER=4
[2024-11-17 09:19:27,101 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-17 09:19:27,102 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2024-11-17 09:19:27,102 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2024-11-17 09:19:27,102 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2024-11-17 09:19:27,102 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-17 09:19:27,103 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2024-11-17 09:19:27,103 INFO  L153        SettingsManager]:  * sizeof long double=12
[2024-11-17 09:19:27,105 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-17 09:19:27,105 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2024-11-17 09:19:27,105 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-17 09:19:27,106 INFO  L151        SettingsManager]: Preferences of IcfgBuilder differ from their defaults:
[2024-11-17 09:19:27,106 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-17 09:19:27,106 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-17 09:19:27,106 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2024-11-17 09:19:27,107 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2024-11-17 09:19:27,107 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 67499ec0709cfdcc368630c5b1d94f26157589b8bf16f22cf5d62554760c6dd7
[2024-11-17 09:19:27,387 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-17 09:19:27,415 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-17 09:19:27,418 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-17 09:19:27,419 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-17 09:19:27,420 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-17 09:19:27,421 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i
[2024-11-17 09:19:28,918 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-17 09:19:29,190 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-17 09:19:29,191 INFO  L180              CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SAX_test7-1.i
[2024-11-17 09:19:29,208 INFO  L427              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/70098be24/505103fb43344e7480fdaa7abf6d98d1/FLAG066407d82
[2024-11-17 09:19:29,222 INFO  L435              CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/70098be24/505103fb43344e7480fdaa7abf6d98d1
[2024-11-17 09:19:29,225 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-17 09:19:29,226 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-17 09:19:29,230 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-17 09:19:29,230 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-17 09:19:29,236 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-17 09:19:29,236 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:29,237 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2677c650 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29, skipping insertion in model container
[2024-11-17 09:19:29,237 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:29,295 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-17 09:19:29,816 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-17 09:19:29,834 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-17 09:19:29,931 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-17 09:19:29,974 INFO  L204         MainTranslator]: Completed translation
[2024-11-17 09:19:29,974 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29 WrapperNode
[2024-11-17 09:19:29,975 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-17 09:19:29,976 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-17 09:19:29,976 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-17 09:19:29,976 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-17 09:19:29,983 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,018 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,083 INFO  L138                Inliner]: procedures = 176, calls = 272, calls flagged for inlining = 5, calls inlined = 4, statements flattened = 1397
[2024-11-17 09:19:30,087 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-17 09:19:30,091 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-17 09:19:30,091 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-17 09:19:30,091 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-17 09:19:30,103 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,103 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,122 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,196 INFO  L175           MemorySlicer]: Split 253 memory accesses to 3 slices as follows [2, 217, 34]. 86 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 54 writes are split as follows [0, 50, 4].
[2024-11-17 09:19:30,197 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,197 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,236 INFO  L184        PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,238 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,242 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,250 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,263 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-17 09:19:30,264 INFO  L112        PluginConnector]: ------------------------IcfgBuilder----------------------------
[2024-11-17 09:19:30,264 INFO  L270        PluginConnector]: Initializing IcfgBuilder...
[2024-11-17 09:19:30,264 INFO  L274        PluginConnector]: IcfgBuilder initialized
[2024-11-17 09:19:30,264 INFO  L184        PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (1/1) ...
[2024-11-17 09:19:30,271 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-17 09:19:30,283 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-17 09:19:30,301 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-17 09:19:30,304 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2024-11-17 09:19:30,380 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#0
[2024-11-17 09:19:30,380 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#1
[2024-11-17 09:19:30,380 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#2
[2024-11-17 09:19:30,381 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#0
[2024-11-17 09:19:30,381 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#1
[2024-11-17 09:19:30,381 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#2
[2024-11-17 09:19:30,381 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0
[2024-11-17 09:19:30,381 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1
[2024-11-17 09:19:30,385 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2
[2024-11-17 09:19:30,385 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0
[2024-11-17 09:19:30,385 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1
[2024-11-17 09:19:30,385 INFO  L138     BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#0
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#1
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure write~$Pointer$#2
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#0
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#1
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure read~$Pointer$#2
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2024-11-17 09:19:30,386 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-17 09:19:30,387 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#1
[2024-11-17 09:19:30,387 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#2
[2024-11-17 09:19:30,387 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-17 09:19:30,387 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-17 09:19:30,619 INFO  L256             CfgBuilder]: Building ICFG
[2024-11-17 09:19:30,621 INFO  L286             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-17 09:19:31,997 INFO  L1250  $ProcedureCfgBuilder]: dead code at ProgramPoint L713: call ULTIMATE.dealloc(main_~#i~0#1.base, main_~#i~0#1.offset);havoc main_~#i~0#1.base, main_~#i~0#1.offset;
[2024-11-17 09:19:32,093 INFO  L?                        ?]: Removed 310 outVars from TransFormulas that were not future-live.
[2024-11-17 09:19:32,093 INFO  L307             CfgBuilder]: Performing block encoding
[2024-11-17 09:19:32,147 INFO  L331             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-17 09:19:32,148 INFO  L336             CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-17 09:19:32,148 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.11 09:19:32 BoogieIcfgContainer
[2024-11-17 09:19:32,148 INFO  L131        PluginConnector]: ------------------------ END IcfgBuilder----------------------------
[2024-11-17 09:19:32,149 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2024-11-17 09:19:32,149 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2024-11-17 09:19:32,155 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2024-11-17 09:19:32,156 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-17 09:19:32,157 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.11 09:19:29" (1/3) ...
[2024-11-17 09:19:32,158 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@46f1fc2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.11 09:19:32, skipping insertion in model container
[2024-11-17 09:19:32,158 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-17 09:19:32,158 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.11 09:19:29" (2/3) ...
[2024-11-17 09:19:32,160 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@46f1fc2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.11 09:19:32, skipping insertion in model container
[2024-11-17 09:19:32,160 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-17 09:19:32,160 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 17.11 09:19:32" (3/3) ...
[2024-11-17 09:19:32,162 INFO  L332   chiAutomizerObserver]: Analyzing ICFG uthash_SAX_test7-1.i
[2024-11-17 09:19:32,226 INFO  L300   stractBuchiCegarLoop]: Interprodecural is true
[2024-11-17 09:19:32,226 INFO  L301   stractBuchiCegarLoop]: Hoare is None
[2024-11-17 09:19:32,226 INFO  L302   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2024-11-17 09:19:32,227 INFO  L303   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2024-11-17 09:19:32,227 INFO  L304   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2024-11-17 09:19:32,227 INFO  L305   stractBuchiCegarLoop]: Difference is false
[2024-11-17 09:19:32,227 INFO  L306   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2024-11-17 09:19:32,227 INFO  L310   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2024-11-17 09:19:32,232 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 401 states, 396 states have (on average 1.6136363636363635) internal successors, (639), 396 states have internal predecessors, (639), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:32,273 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 389
[2024-11-17 09:19:32,273 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:32,273 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:32,279 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:32,280 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:32,280 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2024-11-17 09:19:32,282 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 401 states, 396 states have (on average 1.6136363636363635) internal successors, (639), 396 states have internal predecessors, (639), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:32,293 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 389
[2024-11-17 09:19:32,294 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:32,294 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:32,294 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:32,294 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:32,299 INFO  L745   eck$LassoCheckResult]: Stem: 388#ULTIMATE.startENTRYtrue assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 38#ULTIMATE.init_returnLabel#1true assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 214#L715true 
[2024-11-17 09:19:32,300 INFO  L747   eck$LassoCheckResult]: Loop: 214#L715true assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 312#L715-2true assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 30#L717true assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false; 230#L720true call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 252#L722true assume !true; 171#L715-1true call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 214#L715true 
[2024-11-17 09:19:32,305 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:32,305 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 1 times
[2024-11-17 09:19:32,315 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:32,316 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741362935]
[2024-11-17 09:19:32,316 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:32,316 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:32,469 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:32,470 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:32,492 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:32,528 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:32,531 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:32,531 INFO  L85        PathProgramCache]: Analyzing trace with hash 267894095, now seen corresponding path program 1 times
[2024-11-17 09:19:32,532 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:32,532 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953145082]
[2024-11-17 09:19:32,532 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:32,532 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:32,579 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:32,659 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:32,659 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:32,660 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953145082]
[2024-11-17 09:19:32,660 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [953145082] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:32,660 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:32,661 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-17 09:19:32,661 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1719996546]
[2024-11-17 09:19:32,662 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:32,670 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:32,671 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:32,705 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-17 09:19:32,706 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-17 09:19:32,708 INFO  L87              Difference]: Start difference. First operand  has 401 states, 396 states have (on average 1.6136363636363635) internal successors, (639), 396 states have internal predecessors, (639), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Second operand  has 2 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:32,826 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:32,826 INFO  L93              Difference]: Finished difference Result 399 states and 572 transitions.
[2024-11-17 09:19:32,828 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 399 states and 572 transitions.
[2024-11-17 09:19:32,836 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 383
[2024-11-17 09:19:32,847 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 399 states to 390 states and 563 transitions.
[2024-11-17 09:19:32,848 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 390
[2024-11-17 09:19:32,850 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 390
[2024-11-17 09:19:32,850 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 390 states and 563 transitions.
[2024-11-17 09:19:32,853 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:32,854 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 390 states and 563 transitions.
[2024-11-17 09:19:32,872 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 390 states and 563 transitions.
[2024-11-17 09:19:32,904 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 390.
[2024-11-17 09:19:32,906 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 390 states, 386 states have (on average 1.4430051813471503) internal successors, (557), 385 states have internal predecessors, (557), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:32,908 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 563 transitions.
[2024-11-17 09:19:32,909 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 390 states and 563 transitions.
[2024-11-17 09:19:32,910 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2024-11-17 09:19:32,913 INFO  L425   stractBuchiCegarLoop]: Abstraction has 390 states and 563 transitions.
[2024-11-17 09:19:32,914 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2024-11-17 09:19:32,914 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 390 states and 563 transitions.
[2024-11-17 09:19:32,917 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 383
[2024-11-17 09:19:32,918 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:32,918 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:32,920 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:32,920 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:32,921 INFO  L745   eck$LassoCheckResult]: Stem: 1196#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 885#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 886#L715 
[2024-11-17 09:19:32,922 INFO  L747   eck$LassoCheckResult]: Loop: 886#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1118#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 870#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 871#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 1133#L722 assume true;havoc main_~_ha_hashv~0#1; 839#L722-73 assume true; 840#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 947#L722-156 assume true; 1009#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1011#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 952#L722-154 assume main_#t~switch29#1;call main_#t~mem30#1 := read~int#1(main_~_hj_key~0#1.base, 10 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 16777216 * (main_#t~mem30#1 % 256 % 4294967296); 862#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 863#L722-152 assume main_#t~switch29#1;call main_#t~mem31#1 := read~int#1(main_~_hj_key~0#1.base, 9 + main_~_hj_key~0#1.offset, 1);main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 + 65536 * (main_#t~mem31#1 % 256 % 4294967296); 1111#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 898#L722-150 assume !main_#t~switch29#1; 899#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 969#L722-148 assume main_#t~switch29#1;call main_#t~mem33#1 := read~int#1(main_~_hj_key~0#1.base, 7 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 16777216 * (main_#t~mem33#1 % 256 % 4294967296); 970#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1025#L722-146 assume main_#t~switch29#1;call main_#t~mem34#1 := read~int#1(main_~_hj_key~0#1.base, 6 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 65536 * (main_#t~mem34#1 % 256 % 4294967296); 1026#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1141#L722-144 assume main_#t~switch29#1;call main_#t~mem35#1 := read~int#1(main_~_hj_key~0#1.base, 5 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + 256 * (main_#t~mem35#1 % 256 % 4294967296); 1053#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 997#L722-142 assume main_#t~switch29#1;call main_#t~mem36#1 := read~int#1(main_~_hj_key~0#1.base, 4 + main_~_hj_key~0#1.offset, 1);main_~_hj_j~0#1 := main_~_hj_j~0#1 + (if main_#t~mem36#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem36#1 % 256 % 4294967296 else main_#t~mem36#1 % 256 % 4294967296 - 4294967296); 998#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 944#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 940#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 941#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 864#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 832#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 833#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1109#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 965#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 966#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1134#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 843#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1004#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 982#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 983#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 908#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1079#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 878#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1123#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1041#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1062#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1027#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1028#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 856#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1192#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1137#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1160#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1095#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 1159#L722-79 assume true; 1143#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1144#L722-76 assume true; 1148#L722-74 assume true; 1116#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1117#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1092#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1093#L722-71 assume true; 1138#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1146#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1154#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 1086#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 1087#L722-55 assume true; 1121#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1078#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 816#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 817#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1051#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1052#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 905#L722-9 assume true; 906#L722-7 havoc main_~_ha_bkt~0#1; 953#L722-6 assume true; 911#L722-4 assume true; 912#L722-2 havoc main_~_ha_hashv~0#1; 1139#L722-1 assume true; 1077#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 886#L715 
[2024-11-17 09:19:32,927 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:32,927 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 2 times
[2024-11-17 09:19:32,927 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:32,927 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85612811]
[2024-11-17 09:19:32,928 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:32,928 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:32,952 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:32,953 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:32,964 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:32,983 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:32,984 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:32,984 INFO  L85        PathProgramCache]: Analyzing trace with hash -1228076414, now seen corresponding path program 1 times
[2024-11-17 09:19:32,985 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:32,985 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990613306]
[2024-11-17 09:19:32,989 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:32,989 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:33,075 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:33,450 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:33,452 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:33,452 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990613306]
[2024-11-17 09:19:33,452 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [990613306] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:33,452 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:33,453 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-17 09:19:33,453 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488551990]
[2024-11-17 09:19:33,453 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:33,454 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:33,454 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:33,454 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-17 09:19:33,454 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-17 09:19:33,455 INFO  L87              Difference]: Start difference. First operand 390 states and 563 transitions. cyclomatic complexity: 176 Second operand  has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:33,693 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:33,693 INFO  L93              Difference]: Finished difference Result 393 states and 559 transitions.
[2024-11-17 09:19:33,693 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 393 states and 559 transitions.
[2024-11-17 09:19:33,699 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 386
[2024-11-17 09:19:33,703 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 393 states to 393 states and 559 transitions.
[2024-11-17 09:19:33,703 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 393
[2024-11-17 09:19:33,704 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 393
[2024-11-17 09:19:33,706 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 393 states and 559 transitions.
[2024-11-17 09:19:33,707 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:33,708 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 393 states and 559 transitions.
[2024-11-17 09:19:33,708 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 393 states and 559 transitions.
[2024-11-17 09:19:33,729 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 390.
[2024-11-17 09:19:33,730 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 390 states, 386 states have (on average 1.4248704663212435) internal successors, (550), 385 states have internal predecessors, (550), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:33,735 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 556 transitions.
[2024-11-17 09:19:33,735 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 390 states and 556 transitions.
[2024-11-17 09:19:33,736 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-17 09:19:33,736 INFO  L425   stractBuchiCegarLoop]: Abstraction has 390 states and 556 transitions.
[2024-11-17 09:19:33,737 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2024-11-17 09:19:33,737 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 390 states and 556 transitions.
[2024-11-17 09:19:33,738 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 383
[2024-11-17 09:19:33,738 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:33,738 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:33,741 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:33,742 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:33,742 INFO  L745   eck$LassoCheckResult]: Stem: 1988#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 1677#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1678#L715 
[2024-11-17 09:19:33,742 INFO  L747   eck$LassoCheckResult]: Loop: 1678#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 1910#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 1662#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 1663#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 1925#L722 assume true;havoc main_~_ha_hashv~0#1; 1631#L722-73 assume true; 1632#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 1739#L722-156 assume true; 1801#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 1803#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 1744#L722-154 assume !main_#t~switch29#1; 1654#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 1655#L722-152 assume !main_#t~switch29#1; 1903#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 1690#L722-150 assume !main_#t~switch29#1; 1691#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 1761#L722-148 assume !main_#t~switch29#1; 1762#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 1817#L722-146 assume !main_#t~switch29#1; 1818#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 1933#L722-144 assume !main_#t~switch29#1; 1845#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 1789#L722-142 assume !main_#t~switch29#1; 1790#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 1736#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 1732#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 1733#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 1656#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 1624#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 1625#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 1901#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 1757#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 1758#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1926#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 1635#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1796#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 1774#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1775#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 1700#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1871#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 1670#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1915#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 1833#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1854#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 1819#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 1820#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 1648#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 1984#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 1929#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 1952#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 1887#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 1951#L722-79 assume true; 1935#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 1936#L722-76 assume true; 1940#L722-74 assume true; 1908#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 1909#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 1884#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 1885#L722-71 assume true; 1930#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 1938#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 1946#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 1878#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 1879#L722-55 assume true; 1913#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 1870#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 1608#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 1609#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 1843#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 1844#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 1697#L722-9 assume true; 1698#L722-7 havoc main_~_ha_bkt~0#1; 1745#L722-6 assume true; 1703#L722-4 assume true; 1704#L722-2 havoc main_~_ha_hashv~0#1; 1931#L722-1 assume true; 1869#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 1678#L715 
[2024-11-17 09:19:33,743 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:33,743 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 3 times
[2024-11-17 09:19:33,744 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:33,744 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150308548]
[2024-11-17 09:19:33,744 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:33,744 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:33,778 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:33,780 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:33,792 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:33,802 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:33,805 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:33,805 INFO  L85        PathProgramCache]: Analyzing trace with hash -94254648, now seen corresponding path program 1 times
[2024-11-17 09:19:33,805 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:33,806 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1853018657]
[2024-11-17 09:19:33,806 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:33,806 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:34,096 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:34,572 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:34,572 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:34,572 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1853018657]
[2024-11-17 09:19:34,573 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1853018657] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:34,574 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:34,574 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-17 09:19:34,574 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861941162]
[2024-11-17 09:19:34,574 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:34,574 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:34,575 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:34,575 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-17 09:19:34,576 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2024-11-17 09:19:34,576 INFO  L87              Difference]: Start difference. First operand 390 states and 556 transitions. cyclomatic complexity: 169 Second operand  has 6 states, 6 states have (on average 12.833333333333334) internal successors, (77), 6 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:35,420 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:35,420 INFO  L93              Difference]: Finished difference Result 426 states and 601 transitions.
[2024-11-17 09:19:35,420 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 601 transitions.
[2024-11-17 09:19:35,424 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 419
[2024-11-17 09:19:35,427 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 426 states and 601 transitions.
[2024-11-17 09:19:35,427 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 426
[2024-11-17 09:19:35,428 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 426
[2024-11-17 09:19:35,428 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 426 states and 601 transitions.
[2024-11-17 09:19:35,429 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:35,429 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 426 states and 601 transitions.
[2024-11-17 09:19:35,430 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 426 states and 601 transitions.
[2024-11-17 09:19:35,443 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 421.
[2024-11-17 09:19:35,445 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 421 states, 417 states have (on average 1.410071942446043) internal successors, (588), 416 states have internal predecessors, (588), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:35,446 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 421 states to 421 states and 594 transitions.
[2024-11-17 09:19:35,447 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 421 states and 594 transitions.
[2024-11-17 09:19:35,447 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-17 09:19:35,449 INFO  L425   stractBuchiCegarLoop]: Abstraction has 421 states and 594 transitions.
[2024-11-17 09:19:35,449 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2024-11-17 09:19:35,449 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 421 states and 594 transitions.
[2024-11-17 09:19:35,452 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 414
[2024-11-17 09:19:35,453 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:35,453 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:35,454 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:35,455 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:35,456 INFO  L745   eck$LassoCheckResult]: Stem: 2819#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 2505#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2506#L715 
[2024-11-17 09:19:35,456 INFO  L747   eck$LassoCheckResult]: Loop: 2506#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 2740#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 2492#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 2493#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 2754#L722 assume true;havoc main_~_ha_hashv~0#1; 2463#L722-73 assume true; 2464#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 2726#L722-156 assume true; 2847#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 2846#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 2845#L722-154 assume !main_#t~switch29#1; 2844#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 2843#L722-152 assume !main_#t~switch29#1; 2842#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 2841#L722-150 assume !main_#t~switch29#1; 2840#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 2839#L722-148 assume !main_#t~switch29#1; 2838#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 2837#L722-146 assume !main_#t~switch29#1; 2836#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 2761#L722-144 assume !main_#t~switch29#1; 2673#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 2617#L722-142 assume !main_#t~switch29#1; 2618#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 2564#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 2560#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 2561#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 2479#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 2480#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 2828#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 2827#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 2826#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 2825#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2824#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 2791#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2624#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 2625#L722-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1; 2602#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2603#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 2528#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2699#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 2498#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2744#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 2661#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2682#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 2647#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 2648#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 2475#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 2815#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 2758#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 2781#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 2715#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 2780#L722-79 assume true; 2764#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 2765#L722-76 assume true; 2769#L722-74 assume true; 2737#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 2738#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 2712#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 2713#L722-71 assume true; 2759#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 2767#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 2775#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 2706#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 2707#L722-55 assume true; 2742#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 2698#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 2435#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 2436#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 2671#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 2672#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 2525#L722-9 assume true; 2526#L722-7 havoc main_~_ha_bkt~0#1; 2573#L722-6 assume true; 2531#L722-4 assume true; 2532#L722-2 havoc main_~_ha_hashv~0#1; 2760#L722-1 assume true; 2697#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 2506#L715 
[2024-11-17 09:19:35,457 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:35,457 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 4 times
[2024-11-17 09:19:35,457 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:35,457 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876397628]
[2024-11-17 09:19:35,457 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:35,458 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:35,471 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:35,472 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:35,480 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:35,486 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:35,487 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:35,487 INFO  L85        PathProgramCache]: Analyzing trace with hash -150095637, now seen corresponding path program 1 times
[2024-11-17 09:19:35,488 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:35,488 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925255645]
[2024-11-17 09:19:35,488 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:35,489 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:35,575 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:35,879 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:35,879 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:35,879 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925255645]
[2024-11-17 09:19:35,879 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925255645] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:35,879 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:35,880 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-17 09:19:35,880 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1391871946]
[2024-11-17 09:19:35,880 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:35,880 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:35,880 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:35,881 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-17 09:19:35,881 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-17 09:19:35,881 INFO  L87              Difference]: Start difference. First operand 421 states and 594 transitions. cyclomatic complexity: 176 Second operand  has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:36,590 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:36,591 INFO  L93              Difference]: Finished difference Result 434 states and 613 transitions.
[2024-11-17 09:19:36,591 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 434 states and 613 transitions.
[2024-11-17 09:19:36,594 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 427
[2024-11-17 09:19:36,596 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 434 states to 434 states and 613 transitions.
[2024-11-17 09:19:36,596 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 434
[2024-11-17 09:19:36,597 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 434
[2024-11-17 09:19:36,597 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 434 states and 613 transitions.
[2024-11-17 09:19:36,598 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:36,598 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 434 states and 613 transitions.
[2024-11-17 09:19:36,598 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 434 states and 613 transitions.
[2024-11-17 09:19:36,602 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 431.
[2024-11-17 09:19:36,603 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 431 states, 427 states have (on average 1.4121779859484778) internal successors, (603), 426 states have internal predecessors, (603), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:36,605 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 609 transitions.
[2024-11-17 09:19:36,605 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 431 states and 609 transitions.
[2024-11-17 09:19:36,606 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-17 09:19:36,606 INFO  L425   stractBuchiCegarLoop]: Abstraction has 431 states and 609 transitions.
[2024-11-17 09:19:36,606 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 5 ============
[2024-11-17 09:19:36,607 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 609 transitions.
[2024-11-17 09:19:36,608 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 424
[2024-11-17 09:19:36,608 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:36,608 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:36,609 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:36,609 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:36,609 INFO  L745   eck$LassoCheckResult]: Stem: 3689#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 3369#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3370#L715 
[2024-11-17 09:19:36,610 INFO  L747   eck$LassoCheckResult]: Loop: 3370#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 3606#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 3354#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 3355#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 3621#L722 assume true;havoc main_~_ha_hashv~0#1; 3328#L722-73 assume true; 3329#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 3593#L722-156 assume true; 3494#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 3496#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 3435#L722-154 assume !main_#t~switch29#1; 3352#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 3353#L722-152 assume !main_#t~switch29#1; 3600#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 3383#L722-150 assume !main_#t~switch29#1; 3384#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 3453#L722-148 assume !main_#t~switch29#1; 3454#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 3513#L722-146 assume !main_#t~switch29#1; 3514#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 3630#L722-144 assume !main_#t~switch29#1; 3536#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 3480#L722-142 assume !main_#t~switch29#1; 3481#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 3427#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 3423#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 3424#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 3705#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 3704#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 3703#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 3702#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 3701#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 3700#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3697#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 3325#L722-132 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := main_~_hj_i~0#1; 3327#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3660#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 3555#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3691#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 3565#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3566#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 3362#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3611#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 3524#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3545#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 3508#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 3509#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 3331#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 3684#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 3627#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 3651#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 3582#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 3650#L722-79 assume true; 3633#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 3634#L722-76 assume true; 3638#L722-74 assume true; 3604#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 3605#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 3579#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 3580#L722-71 assume true; 3628#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 3636#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 3643#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 3573#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 3574#L722-55 assume true; 3609#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 3564#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 3300#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 3301#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 3534#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 3535#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 3389#L722-9 assume true; 3390#L722-7 havoc main_~_ha_bkt~0#1; 3436#L722-6 assume true; 3394#L722-4 assume true; 3395#L722-2 havoc main_~_ha_hashv~0#1; 3629#L722-1 assume true; 3563#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 3370#L715 
[2024-11-17 09:19:36,610 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:36,611 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 5 times
[2024-11-17 09:19:36,611 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:36,611 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478170970]
[2024-11-17 09:19:36,611 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:36,611 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:36,620 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:36,621 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:36,625 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:36,630 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:36,631 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:36,631 INFO  L85        PathProgramCache]: Analyzing trace with hash -1792534830, now seen corresponding path program 1 times
[2024-11-17 09:19:36,631 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:36,631 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019640507]
[2024-11-17 09:19:36,631 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:36,632 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:36,731 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:37,027 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:37,028 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:37,028 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019640507]
[2024-11-17 09:19:37,028 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1019640507] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:37,028 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:37,028 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-17 09:19:37,028 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044680134]
[2024-11-17 09:19:37,029 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:37,029 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:37,029 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:37,029 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-17 09:19:37,029 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-17 09:19:37,030 INFO  L87              Difference]: Start difference. First operand 431 states and 609 transitions. cyclomatic complexity: 181 Second operand  has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:37,329 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:37,329 INFO  L93              Difference]: Finished difference Result 434 states and 612 transitions.
[2024-11-17 09:19:37,329 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 434 states and 612 transitions.
[2024-11-17 09:19:37,332 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 427
[2024-11-17 09:19:37,335 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 434 states to 434 states and 612 transitions.
[2024-11-17 09:19:37,335 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 434
[2024-11-17 09:19:37,336 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 434
[2024-11-17 09:19:37,336 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 434 states and 612 transitions.
[2024-11-17 09:19:37,336 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:37,337 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 434 states and 612 transitions.
[2024-11-17 09:19:37,337 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 434 states and 612 transitions.
[2024-11-17 09:19:37,342 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 431.
[2024-11-17 09:19:37,342 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 431 states, 427 states have (on average 1.4098360655737705) internal successors, (602), 426 states have internal predecessors, (602), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:37,344 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 431 states to 431 states and 608 transitions.
[2024-11-17 09:19:37,344 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 431 states and 608 transitions.
[2024-11-17 09:19:37,345 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-17 09:19:37,345 INFO  L425   stractBuchiCegarLoop]: Abstraction has 431 states and 608 transitions.
[2024-11-17 09:19:37,345 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 6 ============
[2024-11-17 09:19:37,346 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 431 states and 608 transitions.
[2024-11-17 09:19:37,347 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 424
[2024-11-17 09:19:37,347 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:37,347 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:37,348 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:37,348 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:37,349 INFO  L745   eck$LassoCheckResult]: Stem: 4558#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 4240#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4241#L715 
[2024-11-17 09:19:37,349 INFO  L747   eck$LassoCheckResult]: Loop: 4241#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 4478#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 4225#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 4226#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 4493#L722 assume true;havoc main_~_ha_hashv~0#1; 4195#L722-73 assume true; 4196#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 4465#L722-156 assume true; 4365#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 4367#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 4306#L722-154 assume !main_#t~switch29#1; 4217#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 4218#L722-152 assume !main_#t~switch29#1; 4471#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 4253#L722-150 assume !main_#t~switch29#1; 4254#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 4323#L722-148 assume !main_#t~switch29#1; 4324#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 4379#L722-146 assume !main_#t~switch29#1; 4380#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 4502#L722-144 assume !main_#t~switch29#1; 4407#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 4351#L722-142 assume !main_#t~switch29#1; 4352#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 4298#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 4294#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 4295#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 4219#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 4188#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 4189#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 4469#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 4320#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 4321#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4494#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 4197#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 4198#L722-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := 0; 4422#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4531#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 4426#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4560#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 4437#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4438#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 4233#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4483#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 4395#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4419#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 4381#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 4382#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 4211#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 4554#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 4498#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 4521#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 4454#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 4520#L722-79 assume true; 4504#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 4505#L722-76 assume true; 4509#L722-74 assume true; 4476#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 4477#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 4451#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 4452#L722-71 assume true; 4499#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 4507#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 4515#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 4445#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 4446#L722-55 assume true; 4481#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 4436#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 4172#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 4173#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 4405#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 4406#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 4260#L722-9 assume true; 4261#L722-7 havoc main_~_ha_bkt~0#1; 4307#L722-6 assume true; 4265#L722-4 assume true; 4266#L722-2 havoc main_~_ha_hashv~0#1; 4500#L722-1 assume true; 4435#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 4241#L715 
[2024-11-17 09:19:37,349 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:37,350 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 6 times
[2024-11-17 09:19:37,350 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:37,350 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1448683936]
[2024-11-17 09:19:37,350 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:37,350 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:37,360 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:37,360 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:37,364 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:37,370 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:37,370 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:37,371 INFO  L85        PathProgramCache]: Analyzing trace with hash -522825883, now seen corresponding path program 1 times
[2024-11-17 09:19:37,371 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:37,371 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472853673]
[2024-11-17 09:19:37,371 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:37,371 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:37,428 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:37,739 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:37,739 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:37,742 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472853673]
[2024-11-17 09:19:37,742 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472853673] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:37,742 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:37,742 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2024-11-17 09:19:37,742 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [690548813]
[2024-11-17 09:19:37,742 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:37,743 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:37,743 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:37,743 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2024-11-17 09:19:37,744 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30
[2024-11-17 09:19:37,744 INFO  L87              Difference]: Start difference. First operand 431 states and 608 transitions. cyclomatic complexity: 180 Second operand  has 6 states, 6 states have (on average 13.166666666666666) internal successors, (79), 6 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:38,250 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:38,250 INFO  L93              Difference]: Finished difference Result 434 states and 611 transitions.
[2024-11-17 09:19:38,250 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 434 states and 611 transitions.
[2024-11-17 09:19:38,254 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 427
[2024-11-17 09:19:38,257 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 434 states to 434 states and 611 transitions.
[2024-11-17 09:19:38,257 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 434
[2024-11-17 09:19:38,257 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 434
[2024-11-17 09:19:38,258 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 434 states and 611 transitions.
[2024-11-17 09:19:38,259 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:38,259 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 434 states and 611 transitions.
[2024-11-17 09:19:38,259 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 434 states and 611 transitions.
[2024-11-17 09:19:38,264 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 434.
[2024-11-17 09:19:38,265 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 434 states, 430 states have (on average 1.4069767441860466) internal successors, (605), 429 states have internal predecessors, (605), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:38,266 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 611 transitions.
[2024-11-17 09:19:38,266 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 434 states and 611 transitions.
[2024-11-17 09:19:38,267 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. 
[2024-11-17 09:19:38,269 INFO  L425   stractBuchiCegarLoop]: Abstraction has 434 states and 611 transitions.
[2024-11-17 09:19:38,269 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 7 ============
[2024-11-17 09:19:38,269 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 434 states and 611 transitions.
[2024-11-17 09:19:38,270 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 427
[2024-11-17 09:19:38,271 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:38,271 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:38,272 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:38,272 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:38,273 INFO  L745   eck$LassoCheckResult]: Stem: 5430#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 5114#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5115#L715 
[2024-11-17 09:19:38,273 INFO  L747   eck$LassoCheckResult]: Loop: 5115#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 5349#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 5099#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 5100#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 5364#L722 assume true;havoc main_~_ha_hashv~0#1; 5069#L722-73 assume true; 5070#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 5336#L722-156 assume true; 5237#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 5239#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 5180#L722-154 assume !main_#t~switch29#1; 5091#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 5092#L722-152 assume !main_#t~switch29#1; 5342#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 5127#L722-150 assume !main_#t~switch29#1; 5128#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 5197#L722-148 assume !main_#t~switch29#1; 5198#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 5253#L722-146 assume !main_#t~switch29#1; 5254#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 5373#L722-144 assume !main_#t~switch29#1; 5281#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 5225#L722-142 assume !main_#t~switch29#1; 5226#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 5172#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 5168#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 5169#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 5093#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 5062#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 5063#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 5340#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 5193#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 5194#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5365#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 5366#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5471#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 5470#L722-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1; 5210#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5211#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 5395#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 5308#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5309#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 5107#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5354#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 5269#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5290#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 5255#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 5256#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5085#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 5425#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 5369#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 5393#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 5325#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 5392#L722-79 assume true; 5375#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 5376#L722-76 assume true; 5381#L722-74 assume true; 5347#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 5348#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 5322#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 5323#L722-71 assume true; 5370#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 5379#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 5387#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 5316#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 5317#L722-55 assume true; 5352#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 5307#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 5046#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 5047#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 5279#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 5280#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 5134#L722-9 assume true; 5135#L722-7 havoc main_~_ha_bkt~0#1; 5181#L722-6 assume true; 5139#L722-4 assume true; 5140#L722-2 havoc main_~_ha_hashv~0#1; 5371#L722-1 assume true; 5306#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 5115#L715 
[2024-11-17 09:19:38,274 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:38,274 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 7 times
[2024-11-17 09:19:38,274 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:38,274 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791982631]
[2024-11-17 09:19:38,274 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:38,275 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:38,284 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:38,284 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:38,289 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:38,295 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:38,295 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:38,298 INFO  L85        PathProgramCache]: Analyzing trace with hash 113836673, now seen corresponding path program 1 times
[2024-11-17 09:19:38,298 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:38,298 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [834757616]
[2024-11-17 09:19:38,298 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:38,298 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:38,369 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:38,850 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:38,851 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:38,851 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [834757616]
[2024-11-17 09:19:38,851 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [834757616] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:38,851 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:38,851 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:19:38,852 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2074435582]
[2024-11-17 09:19:38,852 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:38,852 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:38,852 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:38,852 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:19:38,852 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:19:38,853 INFO  L87              Difference]: Start difference. First operand 434 states and 611 transitions. cyclomatic complexity: 180 Second operand  has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:39,964 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:39,965 INFO  L93              Difference]: Finished difference Result 448 states and 629 transitions.
[2024-11-17 09:19:39,965 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 448 states and 629 transitions.
[2024-11-17 09:19:39,967 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 441
[2024-11-17 09:19:39,970 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 448 states to 448 states and 629 transitions.
[2024-11-17 09:19:39,970 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 448
[2024-11-17 09:19:39,971 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 448
[2024-11-17 09:19:39,971 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 448 states and 629 transitions.
[2024-11-17 09:19:39,971 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:39,971 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 448 states and 629 transitions.
[2024-11-17 09:19:39,972 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 448 states and 629 transitions.
[2024-11-17 09:19:39,976 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 448 to 442.
[2024-11-17 09:19:39,977 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 442 states, 438 states have (on average 1.404109589041096) internal successors, (615), 437 states have internal predecessors, (615), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:39,978 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 442 states to 442 states and 621 transitions.
[2024-11-17 09:19:39,978 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 442 states and 621 transitions.
[2024-11-17 09:19:39,979 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 
[2024-11-17 09:19:39,980 INFO  L425   stractBuchiCegarLoop]: Abstraction has 442 states and 621 transitions.
[2024-11-17 09:19:39,980 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 8 ============
[2024-11-17 09:19:39,980 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 442 states and 621 transitions.
[2024-11-17 09:19:39,982 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 435
[2024-11-17 09:19:39,982 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:39,982 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:39,983 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:39,983 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:39,983 INFO  L745   eck$LassoCheckResult]: Stem: 6340#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 6014#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6015#L715 
[2024-11-17 09:19:39,984 INFO  L747   eck$LassoCheckResult]: Loop: 6015#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 6251#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 5999#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 6000#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 6267#L722 assume true;havoc main_~_ha_hashv~0#1; 5969#L722-73 assume true; 5970#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 6238#L722-156 assume true; 6378#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 6377#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 6376#L722-154 assume !main_#t~switch29#1; 6375#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 6374#L722-152 assume !main_#t~switch29#1; 6373#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 6372#L722-150 assume !main_#t~switch29#1; 6371#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 6370#L722-148 assume !main_#t~switch29#1; 6336#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 6154#L722-146 assume !main_#t~switch29#1; 6155#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 6277#L722-144 assume !main_#t~switch29#1; 6182#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 6126#L722-142 assume !main_#t~switch29#1; 6127#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 6364#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 6068#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 6069#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 6360#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 6359#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 6358#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 6357#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 6356#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 6355#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6354#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 6353#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6352#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 6351#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6350#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 6349#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 6348#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6347#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 6313#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6342#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 6007#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6256#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 6170#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6191#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 6156#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 6157#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 5985#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 6332#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 6273#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 6297#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 6227#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 6296#L722-79 assume true; 6279#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 6280#L722-76 assume true; 6285#L722-74 assume true; 6249#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 6250#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 6224#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 6225#L722-71 assume true; 6274#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 6283#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 6291#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 6218#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 6219#L722-55 assume true; 6254#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 6209#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 5946#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 5947#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 6180#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 6181#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 6034#L722-9 assume true; 6035#L722-7 havoc main_~_ha_bkt~0#1; 6082#L722-6 assume true; 6039#L722-4 assume true; 6040#L722-2 havoc main_~_ha_hashv~0#1; 6275#L722-1 assume true; 6208#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 6015#L715 
[2024-11-17 09:19:39,985 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:39,985 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 8 times
[2024-11-17 09:19:39,985 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:39,985 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623906013]
[2024-11-17 09:19:39,985 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:39,985 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:39,996 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:39,996 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:40,001 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:40,007 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:40,007 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:40,007 INFO  L85        PathProgramCache]: Analyzing trace with hash 1489809036, now seen corresponding path program 1 times
[2024-11-17 09:19:40,008 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:40,008 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [538317406]
[2024-11-17 09:19:40,008 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:40,008 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:40,305 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:41,049 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:41,049 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:41,049 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [538317406]
[2024-11-17 09:19:41,049 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [538317406] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:41,049 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:41,049 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13
[2024-11-17 09:19:41,049 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057654056]
[2024-11-17 09:19:41,050 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:41,050 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:41,050 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:41,050 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2024-11-17 09:19:41,050 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2024-11-17 09:19:41,050 INFO  L87              Difference]: Start difference. First operand 442 states and 621 transitions. cyclomatic complexity: 182 Second operand  has 13 states, 13 states have (on average 6.153846153846154) internal successors, (80), 13 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:44,143 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:44,143 INFO  L93              Difference]: Finished difference Result 542 states and 763 transitions.
[2024-11-17 09:19:44,143 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 542 states and 763 transitions.
[2024-11-17 09:19:44,147 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 535
[2024-11-17 09:19:44,150 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 542 states to 542 states and 763 transitions.
[2024-11-17 09:19:44,150 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 542
[2024-11-17 09:19:44,151 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 542
[2024-11-17 09:19:44,151 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 542 states and 763 transitions.
[2024-11-17 09:19:44,151 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:44,151 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 542 states and 763 transitions.
[2024-11-17 09:19:44,152 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 542 states and 763 transitions.
[2024-11-17 09:19:44,159 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 542 to 448.
[2024-11-17 09:19:44,159 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 448 states, 444 states have (on average 1.4031531531531531) internal successors, (623), 443 states have internal predecessors, (623), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:44,161 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 629 transitions.
[2024-11-17 09:19:44,161 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 448 states and 629 transitions.
[2024-11-17 09:19:44,162 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. 
[2024-11-17 09:19:44,162 INFO  L425   stractBuchiCegarLoop]: Abstraction has 448 states and 629 transitions.
[2024-11-17 09:19:44,163 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 9 ============
[2024-11-17 09:19:44,163 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 448 states and 629 transitions.
[2024-11-17 09:19:44,165 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 441
[2024-11-17 09:19:44,165 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:44,165 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:44,166 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:44,166 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:44,166 INFO  L745   eck$LassoCheckResult]: Stem: 7360#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7019#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7020#L715 
[2024-11-17 09:19:44,167 INFO  L747   eck$LassoCheckResult]: Loop: 7020#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7262#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 7004#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7005#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 7279#L722 assume true;havoc main_~_ha_hashv~0#1; 6973#L722-73 assume true; 6974#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 7249#L722-156 assume true; 7145#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 7147#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 7086#L722-154 assume !main_#t~switch29#1; 7087#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 7384#L722-152 assume !main_#t~switch29#1; 7321#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 7322#L722-150 assume !main_#t~switch29#1; 7214#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 7104#L722-148 assume !main_#t~switch29#1; 7105#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 7161#L722-146 assume !main_#t~switch29#1; 7162#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 7382#L722-144 assume !main_#t~switch29#1; 7189#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 7190#L722-142 assume !main_#t~switch29#1; 7381#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 7077#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 7078#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 7380#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 6997#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 6998#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 7379#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 7324#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 7325#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 7330#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7280#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 6975#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 6976#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7375#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 7374#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7372#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 7140#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7365#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 7328#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7364#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7012#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7363#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 7177#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7362#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 7163#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 7164#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 6989#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 7352#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 7284#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 7309#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 7238#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 7308#L722-79 assume true; 7291#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 7292#L722-76 assume true; 7296#L722-74 assume true; 7260#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 7261#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 7235#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 7236#L722-71 assume true; 7285#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 7294#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 7303#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 7229#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 7230#L722-55 assume true; 7265#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 7219#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 6950#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 6951#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 7187#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 7188#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7039#L722-9 assume true; 7040#L722-7 havoc main_~_ha_bkt~0#1; 7088#L722-6 assume true; 7044#L722-4 assume true; 7045#L722-2 havoc main_~_ha_hashv~0#1; 7286#L722-1 assume true; 7218#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 7020#L715 
[2024-11-17 09:19:44,167 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:44,167 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 9 times
[2024-11-17 09:19:44,167 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:44,168 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725954460]
[2024-11-17 09:19:44,168 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:44,168 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:44,177 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:44,177 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:44,181 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:44,186 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:44,187 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:44,187 INFO  L85        PathProgramCache]: Analyzing trace with hash -1496046501, now seen corresponding path program 1 times
[2024-11-17 09:19:44,188 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:44,188 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1265730970]
[2024-11-17 09:19:44,188 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:44,188 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:44,370 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:44,659 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:44,659 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:44,660 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1265730970]
[2024-11-17 09:19:44,660 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1265730970] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:44,660 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:44,660 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-17 09:19:44,660 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603562385]
[2024-11-17 09:19:44,660 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:44,660 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:44,660 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:44,661 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-17 09:19:44,661 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-17 09:19:44,661 INFO  L87              Difference]: Start difference. First operand 448 states and 629 transitions. cyclomatic complexity: 184 Second operand  has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:45,413 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:45,413 INFO  L93              Difference]: Finished difference Result 455 states and 638 transitions.
[2024-11-17 09:19:45,413 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 455 states and 638 transitions.
[2024-11-17 09:19:45,417 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 448
[2024-11-17 09:19:45,419 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 455 states to 455 states and 638 transitions.
[2024-11-17 09:19:45,419 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 455
[2024-11-17 09:19:45,420 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 455
[2024-11-17 09:19:45,420 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 455 states and 638 transitions.
[2024-11-17 09:19:45,420 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:45,420 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 455 states and 638 transitions.
[2024-11-17 09:19:45,421 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 455 states and 638 transitions.
[2024-11-17 09:19:45,425 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 455 to 448.
[2024-11-17 09:19:45,426 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 448 states, 444 states have (on average 1.4031531531531531) internal successors, (623), 443 states have internal predecessors, (623), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:45,427 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 629 transitions.
[2024-11-17 09:19:45,427 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 448 states and 629 transitions.
[2024-11-17 09:19:45,428 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-17 09:19:45,429 INFO  L425   stractBuchiCegarLoop]: Abstraction has 448 states and 629 transitions.
[2024-11-17 09:19:45,429 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 10 ============
[2024-11-17 09:19:45,429 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 448 states and 629 transitions.
[2024-11-17 09:19:45,431 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 441
[2024-11-17 09:19:45,431 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:45,431 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:45,432 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:45,432 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:45,432 INFO  L745   eck$LassoCheckResult]: Stem: 8254#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 7933#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 7934#L715 
[2024-11-17 09:19:45,432 INFO  L747   eck$LassoCheckResult]: Loop: 7934#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8170#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 7918#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 7919#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 8186#L722 assume true;havoc main_~_ha_hashv~0#1; 7888#L722-73 assume true; 7889#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 8157#L722-156 assume true; 8056#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8058#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 7999#L722-154 assume !main_#t~switch29#1; 7910#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 7911#L722-152 assume !main_#t~switch29#1; 8163#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 7946#L722-150 assume !main_#t~switch29#1; 7947#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 8016#L722-148 assume !main_#t~switch29#1; 8017#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 8072#L722-146 assume !main_#t~switch29#1; 8073#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 8195#L722-144 assume !main_#t~switch29#1; 8100#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 8044#L722-142 assume !main_#t~switch29#1; 8045#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 7991#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 7987#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 7988#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 7912#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 7881#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 7882#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 8161#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 8012#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 8013#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8187#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 7890#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 7891#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8114#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 8199#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8303#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 8029#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8030#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 8253#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 8230#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8258#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 7926#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8257#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 8088#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8256#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 8076#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 8077#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 7904#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8249#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 8191#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 8215#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 8146#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 8214#L722-79 assume true; 8197#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 8198#L722-76 assume true; 8203#L722-74 assume true; 8168#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 8169#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 8143#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 8144#L722-71 assume true; 8192#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 8201#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 8209#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 8137#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 8138#L722-55 assume true; 8173#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 8128#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 7865#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 7866#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 8098#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 8099#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 7953#L722-9 assume true; 7954#L722-7 havoc main_~_ha_bkt~0#1; 8000#L722-6 assume true; 7958#L722-4 assume true; 7959#L722-2 havoc main_~_ha_hashv~0#1; 8193#L722-1 assume true; 8127#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 7934#L715 
[2024-11-17 09:19:45,433 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:45,433 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 10 times
[2024-11-17 09:19:45,433 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:45,433 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907785947]
[2024-11-17 09:19:45,433 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:45,433 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:45,442 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:45,442 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:45,446 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:45,450 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:45,452 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:45,452 INFO  L85        PathProgramCache]: Analyzing trace with hash 1339032849, now seen corresponding path program 1 times
[2024-11-17 09:19:45,452 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:45,452 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498076938]
[2024-11-17 09:19:45,452 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:45,453 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:45,577 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:45,884 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:45,884 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:45,885 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498076938]
[2024-11-17 09:19:45,885 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1498076938] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:45,885 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:45,885 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:19:45,886 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1088030776]
[2024-11-17 09:19:45,886 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:45,887 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:45,887 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:45,888 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:19:45,888 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:19:45,889 INFO  L87              Difference]: Start difference. First operand 448 states and 629 transitions. cyclomatic complexity: 184 Second operand  has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:47,032 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:47,033 INFO  L93              Difference]: Finished difference Result 468 states and 655 transitions.
[2024-11-17 09:19:47,033 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 468 states and 655 transitions.
[2024-11-17 09:19:47,035 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 461
[2024-11-17 09:19:47,038 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 468 states to 468 states and 655 transitions.
[2024-11-17 09:19:47,038 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 468
[2024-11-17 09:19:47,038 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 468
[2024-11-17 09:19:47,038 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 468 states and 655 transitions.
[2024-11-17 09:19:47,039 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:47,039 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 468 states and 655 transitions.
[2024-11-17 09:19:47,040 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 468 states and 655 transitions.
[2024-11-17 09:19:47,044 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 451.
[2024-11-17 09:19:47,044 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 451 states, 447 states have (on average 1.4026845637583893) internal successors, (627), 446 states have internal predecessors, (627), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:47,046 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 633 transitions.
[2024-11-17 09:19:47,046 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 451 states and 633 transitions.
[2024-11-17 09:19:47,047 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:19:47,047 INFO  L425   stractBuchiCegarLoop]: Abstraction has 451 states and 633 transitions.
[2024-11-17 09:19:47,047 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 11 ============
[2024-11-17 09:19:47,048 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 451 states and 633 transitions.
[2024-11-17 09:19:47,049 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 444
[2024-11-17 09:19:47,049 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:47,049 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:47,050 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:47,050 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:47,050 INFO  L745   eck$LassoCheckResult]: Stem: 9193#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 8865#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 8866#L715 
[2024-11-17 09:19:47,051 INFO  L747   eck$LassoCheckResult]: Loop: 8866#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9104#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 8850#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 8851#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 9121#L722 assume true;havoc main_~_ha_hashv~0#1; 8820#L722-73 assume true; 8821#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 9091#L722-156 assume true; 8988#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 8990#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 9176#L722-154 assume !main_#t~switch29#1; 9237#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 9236#L722-152 assume !main_#t~switch29#1; 9235#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 8878#L722-150 assume !main_#t~switch29#1; 8879#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 8948#L722-148 assume !main_#t~switch29#1; 8949#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 9004#L722-146 assume !main_#t~switch29#1; 9005#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 9185#L722-144 assume !main_#t~switch29#1; 9032#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 9033#L722-142 assume !main_#t~switch29#1; 9229#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 8923#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 8919#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 8920#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 8844#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 8813#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 8814#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 9095#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 8944#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 8945#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9216#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 8822#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 8823#L722-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := 0; 9048#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 8983#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 8984#L722-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1; 9212#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9210#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9203#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 9167#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9197#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 8858#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9196#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9020#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9195#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 9008#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9009#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 8836#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 9189#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 9127#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9152#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 9080#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 9151#L722-79 assume true; 9134#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 9135#L722-76 assume true; 9140#L722-74 assume true; 9102#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 9103#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 9077#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 9078#L722-71 assume true; 9128#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 9138#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 9146#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 9071#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 9072#L722-55 assume true; 9107#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9062#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 8797#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 8798#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 9030#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 9031#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 8885#L722-9 assume true; 8886#L722-7 havoc main_~_ha_bkt~0#1; 8932#L722-6 assume true; 8890#L722-4 assume true; 8891#L722-2 havoc main_~_ha_hashv~0#1; 9129#L722-1 assume true; 9061#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 8866#L715 
[2024-11-17 09:19:47,051 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:47,051 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 11 times
[2024-11-17 09:19:47,051 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:47,051 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735258475]
[2024-11-17 09:19:47,051 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:47,051 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:47,059 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:47,060 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:47,064 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:47,071 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:47,071 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:47,071 INFO  L85        PathProgramCache]: Analyzing trace with hash 573740254, now seen corresponding path program 1 times
[2024-11-17 09:19:47,071 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:47,072 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030611335]
[2024-11-17 09:19:47,072 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:47,072 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:47,126 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:47,474 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:47,474 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:47,474 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030611335]
[2024-11-17 09:19:47,475 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030611335] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:47,475 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:47,475 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:19:47,475 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [39206032]
[2024-11-17 09:19:47,475 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:47,475 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:47,476 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:47,476 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:19:47,476 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:19:47,476 INFO  L87              Difference]: Start difference. First operand 451 states and 633 transitions. cyclomatic complexity: 185 Second operand  has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:48,186 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:48,186 INFO  L93              Difference]: Finished difference Result 464 states and 649 transitions.
[2024-11-17 09:19:48,186 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 464 states and 649 transitions.
[2024-11-17 09:19:48,189 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 457
[2024-11-17 09:19:48,191 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 464 states to 464 states and 649 transitions.
[2024-11-17 09:19:48,192 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 464
[2024-11-17 09:19:48,192 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 464
[2024-11-17 09:19:48,192 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 464 states and 649 transitions.
[2024-11-17 09:19:48,193 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:48,193 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 464 states and 649 transitions.
[2024-11-17 09:19:48,194 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 464 states and 649 transitions.
[2024-11-17 09:19:48,198 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 464 to 451.
[2024-11-17 09:19:48,199 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 451 states, 447 states have (on average 1.4026845637583893) internal successors, (627), 446 states have internal predecessors, (627), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:48,200 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 633 transitions.
[2024-11-17 09:19:48,200 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 451 states and 633 transitions.
[2024-11-17 09:19:48,201 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 
[2024-11-17 09:19:48,201 INFO  L425   stractBuchiCegarLoop]: Abstraction has 451 states and 633 transitions.
[2024-11-17 09:19:48,201 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 12 ============
[2024-11-17 09:19:48,201 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 451 states and 633 transitions.
[2024-11-17 09:19:48,203 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 444
[2024-11-17 09:19:48,204 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:48,204 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:48,208 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:48,208 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:48,208 INFO  L745   eck$LassoCheckResult]: Stem: 10110#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 9793#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 9794#L715 
[2024-11-17 09:19:48,208 INFO  L747   eck$LassoCheckResult]: Loop: 9794#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10030#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 9778#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 9779#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 10046#L722 assume true;havoc main_~_ha_hashv~0#1; 9747#L722-73 assume true; 9748#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10017#L722-156 assume true; 10165#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10164#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 10163#L722-154 assume !main_#t~switch29#1; 10162#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 10161#L722-152 assume !main_#t~switch29#1; 10160#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 10159#L722-150 assume !main_#t~switch29#1; 10158#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 10157#L722-148 assume !main_#t~switch29#1; 10156#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 10155#L722-146 assume !main_#t~switch29#1; 10154#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 10153#L722-144 assume !main_#t~switch29#1; 10152#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 10151#L722-142 assume !main_#t~switch29#1; 10150#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 10149#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 10148#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 10147#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 10146#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 10145#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 10144#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 10143#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 10142#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 10139#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10136#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 10134#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10132#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 10130#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10128#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 10126#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 10125#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10124#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 10122#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10117#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10035#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10036#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 9976#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 9970#L722-103 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 9971#L722-102 assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1; 9937#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 9938#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 9764#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10106#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10050#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10073#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10006#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 10072#L722-79 assume true; 10056#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10057#L722-76 assume true; 10061#L722-74 assume true; 10028#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10029#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 10003#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 10004#L722-71 assume true; 10051#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 10059#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 10067#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 9997#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 9998#L722-55 assume true; 10033#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 9988#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 9724#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 9725#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 9959#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 9960#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 9813#L722-9 assume true; 9814#L722-7 havoc main_~_ha_bkt~0#1; 9860#L722-6 assume true; 9818#L722-4 assume true; 9819#L722-2 havoc main_~_ha_hashv~0#1; 10052#L722-1 assume true; 9987#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 9794#L715 
[2024-11-17 09:19:48,209 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:48,209 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 12 times
[2024-11-17 09:19:48,209 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:48,209 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1854104541]
[2024-11-17 09:19:48,209 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:48,209 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:48,230 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:48,230 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:48,234 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:48,243 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:48,244 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:48,244 INFO  L85        PathProgramCache]: Analyzing trace with hash 1908050827, now seen corresponding path program 1 times
[2024-11-17 09:19:48,244 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:48,244 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456579907]
[2024-11-17 09:19:48,244 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:48,245 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:48,400 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:49,294 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:49,294 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:49,295 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456579907]
[2024-11-17 09:19:49,295 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456579907] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:49,296 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:49,296 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:19:49,296 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1210472795]
[2024-11-17 09:19:49,296 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:49,296 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:49,297 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:49,299 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:19:49,299 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:19:49,300 INFO  L87              Difference]: Start difference. First operand 451 states and 633 transitions. cyclomatic complexity: 185 Second operand  has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:50,167 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:50,167 INFO  L93              Difference]: Finished difference Result 447 states and 627 transitions.
[2024-11-17 09:19:50,167 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 447 states and 627 transitions.
[2024-11-17 09:19:50,170 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 440
[2024-11-17 09:19:50,173 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 447 states to 447 states and 627 transitions.
[2024-11-17 09:19:50,173 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 447
[2024-11-17 09:19:50,174 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 447
[2024-11-17 09:19:50,174 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 447 states and 627 transitions.
[2024-11-17 09:19:50,175 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:50,175 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 447 states and 627 transitions.
[2024-11-17 09:19:50,176 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 447 states and 627 transitions.
[2024-11-17 09:19:50,181 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 447 to 445.
[2024-11-17 09:19:50,182 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 445 states, 441 states have (on average 1.401360544217687) internal successors, (618), 440 states have internal predecessors, (618), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:50,184 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 445 states to 445 states and 624 transitions.
[2024-11-17 09:19:50,184 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 445 states and 624 transitions.
[2024-11-17 09:19:50,185 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. 
[2024-11-17 09:19:50,187 INFO  L425   stractBuchiCegarLoop]: Abstraction has 445 states and 624 transitions.
[2024-11-17 09:19:50,187 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 13 ============
[2024-11-17 09:19:50,187 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 445 states and 624 transitions.
[2024-11-17 09:19:50,189 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 438
[2024-11-17 09:19:50,189 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:50,189 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:50,190 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:50,190 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:50,191 INFO  L745   eck$LassoCheckResult]: Stem: 11023#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 10706#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10707#L715 
[2024-11-17 09:19:50,191 INFO  L747   eck$LassoCheckResult]: Loop: 10707#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 10942#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 10693#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 10694#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 10956#L722 assume true;havoc main_~_ha_hashv~0#1; 10665#L722-73 assume true; 10666#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 10928#L722-156 assume true; 10832#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 10834#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 10772#L722-154 assume !main_#t~switch29#1; 10682#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 10683#L722-152 assume !main_#t~switch29#1; 10934#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 10719#L722-150 assume !main_#t~switch29#1; 10720#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 10789#L722-148 assume !main_#t~switch29#1; 10790#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 10845#L722-146 assume !main_#t~switch29#1; 10846#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 10964#L722-144 assume !main_#t~switch29#1; 10873#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 10817#L722-142 assume !main_#t~switch29#1; 10818#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 10764#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 10760#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 10761#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 10681#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 10654#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 10655#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 10932#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 10785#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 10786#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10957#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 10661#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10662#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 10887#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 10969#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11037#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11035#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 11034#L722-125 assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := 0; 11030#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11028#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 11000#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11025#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 10699#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 10946#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 10861#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10882#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 10849#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 10850#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 10677#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11019#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 10961#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 10985#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 10917#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 10984#L722-79 assume true; 10967#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 10968#L722-76 assume true; 10973#L722-74 assume true; 10939#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 10940#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 10914#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 10915#L722-71 assume true; 10962#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 10971#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 10979#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 10908#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 10909#L722-55 assume true; 10944#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 10899#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 10638#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 10639#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 10871#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 10872#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 10726#L722-9 assume true; 10727#L722-7 havoc main_~_ha_bkt~0#1; 10773#L722-6 assume true; 10731#L722-4 assume true; 10732#L722-2 havoc main_~_ha_hashv~0#1; 10963#L722-1 assume true; 10898#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 10707#L715 
[2024-11-17 09:19:50,192 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:50,192 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 13 times
[2024-11-17 09:19:50,192 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:50,192 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672967351]
[2024-11-17 09:19:50,192 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:50,193 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:50,206 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:50,207 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:50,212 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:50,219 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:50,221 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:50,221 INFO  L85        PathProgramCache]: Analyzing trace with hash 638060440, now seen corresponding path program 1 times
[2024-11-17 09:19:50,222 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:50,222 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186240462]
[2024-11-17 09:19:50,222 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:50,222 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:50,362 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:50,622 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:50,624 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:50,624 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186240462]
[2024-11-17 09:19:50,625 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1186240462] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:50,625 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:50,625 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-17 09:19:50,625 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167308626]
[2024-11-17 09:19:50,625 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:50,625 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:50,625 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:50,626 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-17 09:19:50,626 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-17 09:19:50,626 INFO  L87              Difference]: Start difference. First operand 445 states and 624 transitions. cyclomatic complexity: 182 Second operand  has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:51,434 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:51,434 INFO  L93              Difference]: Finished difference Result 450 states and 630 transitions.
[2024-11-17 09:19:51,435 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 450 states and 630 transitions.
[2024-11-17 09:19:51,437 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 443
[2024-11-17 09:19:51,439 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 450 states to 450 states and 630 transitions.
[2024-11-17 09:19:51,440 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 450
[2024-11-17 09:19:51,440 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 450
[2024-11-17 09:19:51,441 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 450 states and 630 transitions.
[2024-11-17 09:19:51,442 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:51,442 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 450 states and 630 transitions.
[2024-11-17 09:19:51,443 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 450 states and 630 transitions.
[2024-11-17 09:19:51,447 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 449.
[2024-11-17 09:19:51,447 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 449 states, 445 states have (on average 1.4) internal successors, (623), 444 states have internal predecessors, (623), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:51,449 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 629 transitions.
[2024-11-17 09:19:51,449 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 449 states and 629 transitions.
[2024-11-17 09:19:51,450 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-17 09:19:51,450 INFO  L425   stractBuchiCegarLoop]: Abstraction has 449 states and 629 transitions.
[2024-11-17 09:19:51,451 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 14 ============
[2024-11-17 09:19:51,451 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 449 states and 629 transitions.
[2024-11-17 09:19:51,452 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 442
[2024-11-17 09:19:51,453 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:51,453 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:51,453 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:51,453 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:51,453 INFO  L745   eck$LassoCheckResult]: Stem: 11932#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 11611#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11612#L715 
[2024-11-17 09:19:51,455 INFO  L747   eck$LassoCheckResult]: Loop: 11612#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 11848#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 11596#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 11597#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 11863#L722 assume true;havoc main_~_ha_hashv~0#1; 11570#L722-73 assume true; 11571#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 11835#L722-156 assume true; 11737#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 11739#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 11677#L722-154 assume !main_#t~switch29#1; 11594#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 11595#L722-152 assume !main_#t~switch29#1; 11842#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 11624#L722-150 assume !main_#t~switch29#1; 11625#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 11694#L722-148 assume !main_#t~switch29#1; 11695#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 11750#L722-146 assume !main_#t~switch29#1; 11751#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 11871#L722-144 assume !main_#t~switch29#1; 11778#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 11722#L722-142 assume !main_#t~switch29#1; 11723#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 11669#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 11665#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 11666#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 11589#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 11561#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 11562#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 11840#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 11690#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 11691#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11865#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 11568#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 11569#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 11792#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 11876#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11981#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 11796#L722-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1; 11797#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11983#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 11982#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 11906#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11934#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 11604#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11853#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 11766#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11787#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 11754#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 11755#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 11573#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 11925#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 11868#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 11892#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 11824#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 11891#L722-79 assume true; 11874#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 11875#L722-76 assume true; 11880#L722-74 assume true; 11846#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 11847#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 11821#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 11822#L722-71 assume true; 11869#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 11878#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 11884#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 11815#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 11816#L722-55 assume true; 11851#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 11806#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 11543#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 11544#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 11776#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 11777#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 11631#L722-9 assume true; 11632#L722-7 havoc main_~_ha_bkt~0#1; 11678#L722-6 assume true; 11636#L722-4 assume true; 11637#L722-2 havoc main_~_ha_hashv~0#1; 11870#L722-1 assume true; 11805#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 11612#L715 
[2024-11-17 09:19:51,456 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:51,456 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 14 times
[2024-11-17 09:19:51,456 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:51,456 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107954871]
[2024-11-17 09:19:51,456 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:51,457 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:51,467 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:51,471 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:51,475 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:51,480 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:51,483 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:51,483 INFO  L85        PathProgramCache]: Analyzing trace with hash 1611596884, now seen corresponding path program 1 times
[2024-11-17 09:19:51,483 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:51,483 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1014883196]
[2024-11-17 09:19:51,483 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:51,483 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:51,784 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:52,089 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:52,089 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:52,089 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1014883196]
[2024-11-17 09:19:52,089 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1014883196] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:52,089 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:52,090 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2024-11-17 09:19:52,090 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1287052155]
[2024-11-17 09:19:52,090 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:52,090 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:52,090 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:52,091 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-17 09:19:52,091 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2024-11-17 09:19:52,091 INFO  L87              Difference]: Start difference. First operand 449 states and 629 transitions. cyclomatic complexity: 183 Second operand  has 7 states, 7 states have (on average 11.714285714285714) internal successors, (82), 7 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:52,827 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:52,827 INFO  L93              Difference]: Finished difference Result 456 states and 635 transitions.
[2024-11-17 09:19:52,827 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 456 states and 635 transitions.
[2024-11-17 09:19:52,830 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 449
[2024-11-17 09:19:52,834 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 456 states to 456 states and 635 transitions.
[2024-11-17 09:19:52,834 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 456
[2024-11-17 09:19:52,835 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 456
[2024-11-17 09:19:52,835 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 456 states and 635 transitions.
[2024-11-17 09:19:52,836 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:52,836 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 456 states and 635 transitions.
[2024-11-17 09:19:52,836 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 456 states and 635 transitions.
[2024-11-17 09:19:52,842 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 449.
[2024-11-17 09:19:52,843 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 449 states, 445 states have (on average 1.397752808988764) internal successors, (622), 444 states have internal predecessors, (622), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:52,844 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 628 transitions.
[2024-11-17 09:19:52,845 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 449 states and 628 transitions.
[2024-11-17 09:19:52,845 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. 
[2024-11-17 09:19:52,845 INFO  L425   stractBuchiCegarLoop]: Abstraction has 449 states and 628 transitions.
[2024-11-17 09:19:52,845 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 15 ============
[2024-11-17 09:19:52,846 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 449 states and 628 transitions.
[2024-11-17 09:19:52,847 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 442
[2024-11-17 09:19:52,847 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:52,847 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:52,848 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:52,848 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:52,848 INFO  L745   eck$LassoCheckResult]: Stem: 12852#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 12526#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12527#L715 
[2024-11-17 09:19:52,849 INFO  L747   eck$LassoCheckResult]: Loop: 12527#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 12765#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 12511#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 12512#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 12780#L722 assume true;havoc main_~_ha_hashv~0#1; 12485#L722-73 assume true; 12486#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 12751#L722-156 assume true; 12889#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 12836#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 12592#L722-154 assume !main_#t~switch29#1; 12505#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 12506#L722-152 assume !main_#t~switch29#1; 12886#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 12885#L722-150 assume !main_#t~switch29#1; 12884#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 12883#L722-148 assume !main_#t~switch29#1; 12882#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 12881#L722-146 assume !main_#t~switch29#1; 12880#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 12879#L722-144 assume !main_#t~switch29#1; 12694#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 12637#L722-142 assume !main_#t~switch29#1; 12638#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 12584#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 12580#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 12581#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 12874#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 12873#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 12872#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 12823#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 12605#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 12606#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12870#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 12483#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 12484#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 12708#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 12865#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12862#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 12859#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12858#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 12857#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 12723#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12724#L722-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 12675#L722-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise44#1 := main_~_hj_i~0#1; 12521#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12771#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 12685#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12706#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 12671#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 12672#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 12488#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 12847#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 12786#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 12811#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 12740#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 12810#L722-79 assume true; 12793#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 12794#L722-76 assume true; 12799#L722-74 assume true; 12763#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 12764#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 12737#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 12738#L722-71 assume true; 12787#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 12797#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 12803#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 12731#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 12732#L722-55 assume true; 12768#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 12722#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 12458#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 12459#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 12692#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 12693#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 12546#L722-9 assume true; 12547#L722-7 havoc main_~_ha_bkt~0#1; 12593#L722-6 assume true; 12551#L722-4 assume true; 12552#L722-2 havoc main_~_ha_hashv~0#1; 12788#L722-1 assume true; 12721#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 12527#L715 
[2024-11-17 09:19:52,849 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:52,850 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 15 times
[2024-11-17 09:19:52,850 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:52,850 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153652499]
[2024-11-17 09:19:52,850 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:52,850 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:52,864 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:52,864 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:52,870 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:52,878 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:52,878 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:52,878 INFO  L85        PathProgramCache]: Analyzing trace with hash -670772812, now seen corresponding path program 1 times
[2024-11-17 09:19:52,879 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:52,879 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373999188]
[2024-11-17 09:19:52,879 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:52,879 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:53,010 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:53,321 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:53,321 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:53,321 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373999188]
[2024-11-17 09:19:53,321 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373999188] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:53,321 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:53,321 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-17 09:19:53,322 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1004894145]
[2024-11-17 09:19:53,322 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:53,322 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:53,322 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:53,322 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-17 09:19:53,322 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90
[2024-11-17 09:19:53,323 INFO  L87              Difference]: Start difference. First operand 449 states and 628 transitions. cyclomatic complexity: 182 Second operand  has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:54,347 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:54,347 INFO  L93              Difference]: Finished difference Result 466 states and 651 transitions.
[2024-11-17 09:19:54,348 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 466 states and 651 transitions.
[2024-11-17 09:19:54,350 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 459
[2024-11-17 09:19:54,352 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 466 states to 466 states and 651 transitions.
[2024-11-17 09:19:54,353 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 466
[2024-11-17 09:19:54,353 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 466
[2024-11-17 09:19:54,353 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 466 states and 651 transitions.
[2024-11-17 09:19:54,354 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:54,354 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 466 states and 651 transitions.
[2024-11-17 09:19:54,355 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 466 states and 651 transitions.
[2024-11-17 09:19:54,358 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 459.
[2024-11-17 09:19:54,359 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 459 states, 455 states have (on average 1.3956043956043955) internal successors, (635), 454 states have internal predecessors, (635), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:54,361 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 641 transitions.
[2024-11-17 09:19:54,361 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 459 states and 641 transitions.
[2024-11-17 09:19:54,362 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:19:54,362 INFO  L425   stractBuchiCegarLoop]: Abstraction has 459 states and 641 transitions.
[2024-11-17 09:19:54,362 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 16 ============
[2024-11-17 09:19:54,362 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 459 states and 641 transitions.
[2024-11-17 09:19:54,364 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 452
[2024-11-17 09:19:54,364 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:54,364 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:54,364 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:54,365 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:54,365 INFO  L745   eck$LassoCheckResult]: Stem: 13779#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 13454#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13455#L715 
[2024-11-17 09:19:54,365 INFO  L747   eck$LassoCheckResult]: Loop: 13455#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 13692#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 13439#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 13440#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 13708#L722 assume true;havoc main_~_ha_hashv~0#1; 13409#L722-73 assume true; 13410#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 13678#L722-156 assume true; 13836#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 13835#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 13834#L722-154 assume !main_#t~switch29#1; 13833#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 13684#L722-152 assume !main_#t~switch29#1; 13685#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 13467#L722-150 assume !main_#t~switch29#1; 13468#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 13537#L722-148 assume !main_#t~switch29#1; 13538#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 13593#L722-146 assume !main_#t~switch29#1; 13594#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 13825#L722-144 assume !main_#t~switch29#1; 13824#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 13823#L722-142 assume !main_#t~switch29#1; 13706#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 13512#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 13508#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 13509#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 13435#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 13402#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 13403#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 13682#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 13534#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 13535#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13709#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 13710#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13573#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 13574#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13640#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 13645#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 13778#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13797#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 13794#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 13793#L722-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := 0; 13787#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13784#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 13447#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13781#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 13610#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13634#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 13597#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 13598#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 13425#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 13774#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 13713#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 13737#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 13667#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 13736#L722-79 assume true; 13719#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 13720#L722-76 assume true; 13725#L722-74 assume true; 13690#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 13691#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 13664#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 13665#L722-71 assume true; 13714#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 13723#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 13731#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 13658#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 13659#L722-55 assume true; 13695#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 13648#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 13386#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 13387#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 13620#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 13621#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 13474#L722-9 assume true; 13475#L722-7 havoc main_~_ha_bkt~0#1; 13521#L722-6 assume true; 13479#L722-4 assume true; 13480#L722-2 havoc main_~_ha_hashv~0#1; 13715#L722-1 assume true; 13647#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 13455#L715 
[2024-11-17 09:19:54,366 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:54,366 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 16 times
[2024-11-17 09:19:54,366 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:54,366 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542057043]
[2024-11-17 09:19:54,366 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:54,367 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:54,375 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:54,376 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:54,379 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:54,384 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:54,385 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:54,385 INFO  L85        PathProgramCache]: Analyzing trace with hash 439130089, now seen corresponding path program 1 times
[2024-11-17 09:19:54,385 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:54,385 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983886344]
[2024-11-17 09:19:54,385 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:54,386 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:54,586 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:55,184 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:55,184 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:55,185 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [983886344]
[2024-11-17 09:19:55,185 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [983886344] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:55,185 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:55,185 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13
[2024-11-17 09:19:55,185 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156948411]
[2024-11-17 09:19:55,185 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:55,186 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:55,186 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:55,186 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2024-11-17 09:19:55,186 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156
[2024-11-17 09:19:55,186 INFO  L87              Difference]: Start difference. First operand 459 states and 641 transitions. cyclomatic complexity: 185 Second operand  has 13 states, 13 states have (on average 6.3076923076923075) internal successors, (82), 13 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:56,596 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:56,596 INFO  L93              Difference]: Finished difference Result 513 states and 720 transitions.
[2024-11-17 09:19:56,596 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 513 states and 720 transitions.
[2024-11-17 09:19:56,600 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 506
[2024-11-17 09:19:56,603 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 513 states to 513 states and 720 transitions.
[2024-11-17 09:19:56,603 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 513
[2024-11-17 09:19:56,604 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 513
[2024-11-17 09:19:56,604 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 513 states and 720 transitions.
[2024-11-17 09:19:56,605 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:56,605 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 513 states and 720 transitions.
[2024-11-17 09:19:56,606 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 513 states and 720 transitions.
[2024-11-17 09:19:56,611 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 513 to 467.
[2024-11-17 09:19:56,612 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 467 states, 463 states have (on average 1.3952483801295896) internal successors, (646), 462 states have internal predecessors, (646), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:56,614 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 652 transitions.
[2024-11-17 09:19:56,614 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 467 states and 652 transitions.
[2024-11-17 09:19:56,615 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. 
[2024-11-17 09:19:56,615 INFO  L425   stractBuchiCegarLoop]: Abstraction has 467 states and 652 transitions.
[2024-11-17 09:19:56,616 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 17 ============
[2024-11-17 09:19:56,616 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 467 states and 652 transitions.
[2024-11-17 09:19:56,618 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 460
[2024-11-17 09:19:56,618 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:56,618 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:56,619 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:56,619 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:56,619 INFO  L745   eck$LassoCheckResult]: Stem: 14768#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 14443#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 14444#L715 
[2024-11-17 09:19:56,620 INFO  L747   eck$LassoCheckResult]: Loop: 14444#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 14684#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 14428#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 14429#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 14699#L722 assume true;havoc main_~_ha_hashv~0#1; 14397#L722-73 assume true; 14398#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 14671#L722-156 assume true; 14567#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 14569#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 14751#L722-154 assume !main_#t~switch29#1; 14804#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 14803#L722-152 assume !main_#t~switch29#1; 14802#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 14456#L722-150 assume !main_#t~switch29#1; 14457#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 14801#L722-148 assume !main_#t~switch29#1; 14800#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 14799#L722-146 assume !main_#t~switch29#1; 14798#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 14707#L722-144 assume !main_#t~switch29#1; 14612#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 14554#L722-142 assume !main_#t~switch29#1; 14555#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 14501#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 14497#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 14498#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 14422#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 14390#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 14391#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 14675#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 14740#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 14787#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14785#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 14784#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14783#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 14782#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 14781#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 14780#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 14779#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14778#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 14777#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 14642#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14643#L722-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 14816#L722-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise44#1 := main_~_hj_i~0#1; 14436#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14807#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 14600#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14770#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 14587#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 14588#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 14414#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 14764#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 14703#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 14727#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 14660#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 14726#L722-79 assume true; 14709#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 14710#L722-76 assume true; 14715#L722-74 assume true; 14682#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 14683#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 14657#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 14658#L722-71 assume true; 14704#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 14713#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 14721#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 14651#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 14652#L722-55 assume true; 14687#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 14641#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 14374#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 14375#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 14610#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 14611#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 14463#L722-9 assume true; 14464#L722-7 havoc main_~_ha_bkt~0#1; 14510#L722-6 assume true; 14468#L722-4 assume true; 14469#L722-2 havoc main_~_ha_hashv~0#1; 14705#L722-1 assume true; 14640#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 14444#L715 
[2024-11-17 09:19:56,620 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:56,620 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 17 times
[2024-11-17 09:19:56,620 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:56,621 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011068481]
[2024-11-17 09:19:56,621 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:56,621 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:56,632 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:56,633 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:56,637 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:56,644 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:56,645 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:56,645 INFO  L85        PathProgramCache]: Analyzing trace with hash -301755483, now seen corresponding path program 1 times
[2024-11-17 09:19:56,645 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:56,645 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400800245]
[2024-11-17 09:19:56,645 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:56,645 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:56,775 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:57,282 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:57,282 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:57,283 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400800245]
[2024-11-17 09:19:57,283 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1400800245] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:57,283 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:57,283 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:19:57,283 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1383234462]
[2024-11-17 09:19:57,283 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:57,283 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:57,283 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:57,284 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:19:57,284 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:19:57,284 INFO  L87              Difference]: Start difference. First operand 467 states and 652 transitions. cyclomatic complexity: 188 Second operand  has 9 states, 9 states have (on average 9.11111111111111) internal successors, (82), 9 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:19:58,449 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:19:58,449 INFO  L93              Difference]: Finished difference Result 473 states and 657 transitions.
[2024-11-17 09:19:58,449 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 473 states and 657 transitions.
[2024-11-17 09:19:58,452 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 466
[2024-11-17 09:19:58,458 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 473 states to 473 states and 657 transitions.
[2024-11-17 09:19:58,461 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 473
[2024-11-17 09:19:58,462 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 473
[2024-11-17 09:19:58,462 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 473 states and 657 transitions.
[2024-11-17 09:19:58,462 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:19:58,463 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 473 states and 657 transitions.
[2024-11-17 09:19:58,464 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 473 states and 657 transitions.
[2024-11-17 09:19:58,469 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 473 to 467.
[2024-11-17 09:19:58,470 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 467 states, 463 states have (on average 1.3930885529157668) internal successors, (645), 462 states have internal predecessors, (645), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:19:58,474 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 651 transitions.
[2024-11-17 09:19:58,474 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 467 states and 651 transitions.
[2024-11-17 09:19:58,475 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:19:58,475 INFO  L425   stractBuchiCegarLoop]: Abstraction has 467 states and 651 transitions.
[2024-11-17 09:19:58,475 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 18 ============
[2024-11-17 09:19:58,475 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 467 states and 651 transitions.
[2024-11-17 09:19:58,477 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 460
[2024-11-17 09:19:58,478 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:19:58,478 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:19:58,478 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:19:58,478 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:19:58,479 INFO  L745   eck$LassoCheckResult]: Stem: 15728#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 15402#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 15403#L715 
[2024-11-17 09:19:58,479 INFO  L747   eck$LassoCheckResult]: Loop: 15403#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 15641#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 15387#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 15388#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 15658#L722 assume true;havoc main_~_ha_hashv~0#1; 15357#L722-73 assume true; 15358#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 15628#L722-156 assume true; 15676#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 15792#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 15791#L722-154 assume !main_#t~switch29#1; 15790#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 15789#L722-152 assume !main_#t~switch29#1; 15788#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 15787#L722-150 assume !main_#t~switch29#1; 15786#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 15785#L722-148 assume !main_#t~switch29#1; 15784#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 15783#L722-146 assume !main_#t~switch29#1; 15782#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 15781#L722-144 assume !main_#t~switch29#1; 15780#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 15779#L722-142 assume !main_#t~switch29#1; 15656#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 15460#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 15456#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 15457#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 15381#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 15350#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 15351#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 15632#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 15481#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 15482#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15659#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 15660#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15745#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 15744#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 15743#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 15742#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 15741#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15740#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 15738#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 15737#L722-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 15425#L722-118 havoc main_#t~bitwise43#1;assume main_#t~bitwise43#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 15702#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15765#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 15395#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15731#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 15557#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15730#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 15545#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 15546#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 15373#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 15723#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 15663#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 15688#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 15617#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 15687#L722-79 assume true; 15669#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 15670#L722-76 assume true; 15675#L722-74 assume true; 15639#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 15640#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 15614#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 15615#L722-71 assume true; 15664#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 15673#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 15682#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 15608#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 15609#L722-55 assume true; 15644#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 15598#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 15334#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 15335#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 15567#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 15568#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 15422#L722-9 assume true; 15423#L722-7 havoc main_~_ha_bkt~0#1; 15469#L722-6 assume true; 15427#L722-4 assume true; 15428#L722-2 havoc main_~_ha_hashv~0#1; 15665#L722-1 assume true; 15597#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 15403#L715 
[2024-11-17 09:19:58,480 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:58,480 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 18 times
[2024-11-17 09:19:58,480 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:58,480 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007498112]
[2024-11-17 09:19:58,480 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:58,480 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:58,491 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:58,491 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:19:58,495 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:19:58,501 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:19:58,501 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:19:58,502 INFO  L85        PathProgramCache]: Analyzing trace with hash 521122522, now seen corresponding path program 1 times
[2024-11-17 09:19:58,502 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:19:58,502 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730103235]
[2024-11-17 09:19:58,502 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:19:58,502 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:19:58,735 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:19:59,622 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:19:59,623 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:19:59,623 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730103235]
[2024-11-17 09:19:59,623 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730103235] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:19:59,623 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:19:59,623 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18
[2024-11-17 09:19:59,623 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728041915]
[2024-11-17 09:19:59,624 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:19:59,624 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:19:59,624 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:19:59,624 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2024-11-17 09:19:59,625 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306
[2024-11-17 09:19:59,625 INFO  L87              Difference]: Start difference. First operand 467 states and 651 transitions. cyclomatic complexity: 187 Second operand  has 18 states, 18 states have (on average 4.611111111111111) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:01,944 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:01,944 INFO  L93              Difference]: Finished difference Result 581 states and 814 transitions.
[2024-11-17 09:20:01,944 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 581 states and 814 transitions.
[2024-11-17 09:20:01,947 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 574
[2024-11-17 09:20:01,950 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 581 states to 581 states and 814 transitions.
[2024-11-17 09:20:01,950 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 581
[2024-11-17 09:20:01,951 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 581
[2024-11-17 09:20:01,951 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 581 states and 814 transitions.
[2024-11-17 09:20:01,952 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:01,952 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 581 states and 814 transitions.
[2024-11-17 09:20:01,953 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 581 states and 814 transitions.
[2024-11-17 09:20:01,957 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 480.
[2024-11-17 09:20:01,958 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 480 states, 476 states have (on average 1.3928571428571428) internal successors, (663), 475 states have internal predecessors, (663), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:01,959 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 480 states to 480 states and 669 transitions.
[2024-11-17 09:20:01,959 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 480 states and 669 transitions.
[2024-11-17 09:20:01,959 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. 
[2024-11-17 09:20:01,960 INFO  L425   stractBuchiCegarLoop]: Abstraction has 480 states and 669 transitions.
[2024-11-17 09:20:01,960 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 19 ============
[2024-11-17 09:20:01,960 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 480 states and 669 transitions.
[2024-11-17 09:20:01,961 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 473
[2024-11-17 09:20:01,961 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:01,961 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:01,962 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:01,962 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:01,962 INFO  L745   eck$LassoCheckResult]: Stem: 16802#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 16480#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 16481#L715 
[2024-11-17 09:20:01,963 INFO  L747   eck$LassoCheckResult]: Loop: 16481#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 16718#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 16465#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 16466#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 16733#L722 assume true;havoc main_~_ha_hashv~0#1; 16434#L722-73 assume true; 16435#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 16705#L722-156 assume true; 16848#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 16847#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 16846#L722-154 assume !main_#t~switch29#1; 16845#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 16844#L722-152 assume !main_#t~switch29#1; 16843#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 16842#L722-150 assume !main_#t~switch29#1; 16671#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 16564#L722-148 assume !main_#t~switch29#1; 16565#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 16800#L722-146 assume !main_#t~switch29#1; 16839#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 16838#L722-144 assume !main_#t~switch29#1; 16837#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 16836#L722-142 assume !main_#t~switch29#1; 16835#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 16834#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 16534#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 16535#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 16833#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 16832#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 16831#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 16772#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 16773#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 16830#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16828#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 16827#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16826#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 16825#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 16824#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 16823#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 16822#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16821#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 16820#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 16818#L722-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := 0; 16819#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16852#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 16851#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16850#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 16849#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16658#L722-103 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 16659#L722-102 assume 0 == main_~_hj_j~0#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise46#1 := main_~_ha_hashv~0#1; 16625#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 16626#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 16451#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 16795#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 16737#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 16805#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 16694#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 16759#L722-79 assume true; 16743#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 16744#L722-76 assume true; 16748#L722-74 assume true; 16716#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 16717#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 16691#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 16692#L722-71 assume true; 16738#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 16746#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 16754#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 16685#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 16686#L722-55 assume true; 16721#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 16676#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 16411#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 16412#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 16647#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 16648#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 16500#L722-9 assume true; 16501#L722-7 havoc main_~_ha_bkt~0#1; 16548#L722-6 assume true; 16505#L722-4 assume true; 16506#L722-2 havoc main_~_ha_hashv~0#1; 16739#L722-1 assume true; 16675#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 16481#L715 
[2024-11-17 09:20:01,963 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:01,963 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 19 times
[2024-11-17 09:20:01,963 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:01,963 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821703838]
[2024-11-17 09:20:01,963 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:01,964 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:01,972 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:01,972 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:01,975 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:01,981 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:01,981 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:01,981 INFO  L85        PathProgramCache]: Analyzing trace with hash -598225458, now seen corresponding path program 1 times
[2024-11-17 09:20:01,982 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:01,982 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1831775197]
[2024-11-17 09:20:01,982 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:01,982 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:02,224 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:03,237 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:03,238 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:03,238 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1831775197]
[2024-11-17 09:20:03,238 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1831775197] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:03,238 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:03,239 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17
[2024-11-17 09:20:03,239 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1358388293]
[2024-11-17 09:20:03,239 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:03,240 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:03,240 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:03,241 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants.
[2024-11-17 09:20:03,241 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272
[2024-11-17 09:20:03,241 INFO  L87              Difference]: Start difference. First operand 480 states and 669 transitions. cyclomatic complexity: 192 Second operand  has 17 states, 17 states have (on average 4.882352941176471) internal successors, (83), 17 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:04,957 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:04,958 INFO  L93              Difference]: Finished difference Result 498 states and 696 transitions.
[2024-11-17 09:20:04,958 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 498 states and 696 transitions.
[2024-11-17 09:20:04,960 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 491
[2024-11-17 09:20:04,962 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 498 states to 498 states and 696 transitions.
[2024-11-17 09:20:04,962 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 498
[2024-11-17 09:20:04,963 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 498
[2024-11-17 09:20:04,963 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 498 states and 696 transitions.
[2024-11-17 09:20:04,964 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:04,964 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 498 states and 696 transitions.
[2024-11-17 09:20:04,965 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 498 states and 696 transitions.
[2024-11-17 09:20:04,969 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 485.
[2024-11-17 09:20:04,970 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 485 states, 481 states have (on average 1.392931392931393) internal successors, (670), 480 states have internal predecessors, (670), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:04,971 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 485 states to 485 states and 676 transitions.
[2024-11-17 09:20:04,971 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 485 states and 676 transitions.
[2024-11-17 09:20:04,972 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. 
[2024-11-17 09:20:04,972 INFO  L425   stractBuchiCegarLoop]: Abstraction has 485 states and 676 transitions.
[2024-11-17 09:20:04,972 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 20 ============
[2024-11-17 09:20:04,972 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 485 states and 676 transitions.
[2024-11-17 09:20:04,974 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 478
[2024-11-17 09:20:04,974 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:04,974 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:04,975 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:04,975 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:04,975 INFO  L745   eck$LassoCheckResult]: Stem: 17798#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 17478#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 17479#L715 
[2024-11-17 09:20:04,975 INFO  L747   eck$LassoCheckResult]: Loop: 17479#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 17715#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 17463#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 17464#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 17731#L722 assume true;havoc main_~_ha_hashv~0#1; 17432#L722-73 assume true; 17433#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 17702#L722-156 assume true; 17881#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 17879#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 17877#L722-154 assume !main_#t~switch29#1; 17876#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 17875#L722-152 assume !main_#t~switch29#1; 17874#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 17873#L722-150 assume !main_#t~switch29#1; 17872#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 17871#L722-148 assume !main_#t~switch29#1; 17870#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 17869#L722-146 assume !main_#t~switch29#1; 17866#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 17865#L722-144 assume !main_#t~switch29#1; 17864#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 17863#L722-142 assume !main_#t~switch29#1; 17861#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 17859#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 17858#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 17856#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 17854#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 17852#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 17851#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 17850#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 17849#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 17848#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17844#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 17842#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17840#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 17838#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 17835#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 17833#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 17831#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17829#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 17828#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 17826#L722-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := 0; 17827#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17867#L722-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 17812#L722-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise44#1 := main_~_hj_i~0#1; 17471#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17807#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 17634#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17804#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 17652#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 17802#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 17449#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 17801#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 17735#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 17800#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 17691#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 17757#L722-79 assume true; 17741#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 17742#L722-76 assume true; 17746#L722-74 assume true; 17713#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 17714#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 17688#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 17689#L722-71 assume true; 17736#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 17744#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 17752#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 17682#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 17683#L722-55 assume true; 17718#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 17673#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 17409#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 17410#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 17644#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 17645#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 17498#L722-9 assume true; 17499#L722-7 havoc main_~_ha_bkt~0#1; 17545#L722-6 assume true; 17503#L722-4 assume true; 17504#L722-2 havoc main_~_ha_hashv~0#1; 17737#L722-1 assume true; 17672#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 17479#L715 
[2024-11-17 09:20:04,976 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:04,976 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 20 times
[2024-11-17 09:20:04,976 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:04,976 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147616751]
[2024-11-17 09:20:04,976 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:04,976 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:04,986 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:04,987 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:04,990 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:04,997 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:04,997 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:04,997 INFO  L85        PathProgramCache]: Analyzing trace with hash 1497012700, now seen corresponding path program 1 times
[2024-11-17 09:20:04,997 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:04,997 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776556543]
[2024-11-17 09:20:04,997 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:04,998 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:05,113 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:05,384 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:05,384 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:05,384 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776556543]
[2024-11-17 09:20:05,384 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [776556543] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:05,384 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:05,385 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2024-11-17 09:20:05,385 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640756258]
[2024-11-17 09:20:05,385 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:05,385 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:05,385 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:05,386 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2024-11-17 09:20:05,386 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56
[2024-11-17 09:20:05,386 INFO  L87              Difference]: Start difference. First operand 485 states and 676 transitions. cyclomatic complexity: 194 Second operand  has 8 states, 8 states have (on average 10.375) internal successors, (83), 8 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:17,697 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2024-11-17 09:20:17,823 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:17,823 INFO  L93              Difference]: Finished difference Result 583 states and 814 transitions.
[2024-11-17 09:20:17,823 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 583 states and 814 transitions.
[2024-11-17 09:20:17,826 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 576
[2024-11-17 09:20:17,828 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 583 states to 583 states and 814 transitions.
[2024-11-17 09:20:17,828 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 583
[2024-11-17 09:20:17,829 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 583
[2024-11-17 09:20:17,829 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 583 states and 814 transitions.
[2024-11-17 09:20:17,830 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:17,830 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 583 states and 814 transitions.
[2024-11-17 09:20:17,831 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 583 states and 814 transitions.
[2024-11-17 09:20:17,836 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 583 to 491.
[2024-11-17 09:20:17,837 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 491 states, 487 states have (on average 1.3921971252566736) internal successors, (678), 486 states have internal predecessors, (678), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:17,838 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 491 states to 491 states and 684 transitions.
[2024-11-17 09:20:17,838 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 491 states and 684 transitions.
[2024-11-17 09:20:17,838 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. 
[2024-11-17 09:20:17,839 INFO  L425   stractBuchiCegarLoop]: Abstraction has 491 states and 684 transitions.
[2024-11-17 09:20:17,839 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 21 ============
[2024-11-17 09:20:17,839 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 491 states and 684 transitions.
[2024-11-17 09:20:17,841 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 484
[2024-11-17 09:20:17,841 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:17,841 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:17,841 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:17,842 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:17,842 INFO  L745   eck$LassoCheckResult]: Stem: 18886#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 18558#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 18559#L715 
[2024-11-17 09:20:17,842 INFO  L747   eck$LassoCheckResult]: Loop: 18559#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 18798#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 18543#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 18544#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 18813#L722 assume true;havoc main_~_ha_hashv~0#1; 18513#L722-73 assume true; 18514#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 18785#L722-156 assume true; 18939#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 18938#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 18937#L722-154 assume !main_#t~switch29#1; 18936#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 18935#L722-152 assume !main_#t~switch29#1; 18934#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 18933#L722-150 assume !main_#t~switch29#1; 18932#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 18931#L722-148 assume !main_#t~switch29#1; 18930#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 18929#L722-146 assume !main_#t~switch29#1; 18928#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 18927#L722-144 assume !main_#t~switch29#1; 18926#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 18925#L722-142 assume !main_#t~switch29#1; 18924#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 18923#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 18922#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 18921#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 18920#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 18919#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 18918#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 18917#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 18916#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 18915#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 18914#L722-133 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise41#1 := main_~_ha_hashv~0#1 % 4294967296 / 8192; 18913#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 18912#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 18911#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 18910#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 18909#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 18908#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 18907#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 18905#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 18903#L722-119 assume main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := 0; 18904#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 18946#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 18947#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 18942#L722-109 assume !(0 == main_~_hj_j~0#1 % 4294967296); 18878#L722-108 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1; 18713#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 18742#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 18701#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 18702#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 18529#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 18948#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 18818#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 18889#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 18774#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 18841#L722-79 assume true; 18824#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 18825#L722-76 assume true; 18829#L722-74 assume true; 18796#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 18797#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 18771#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 18772#L722-71 assume true; 18819#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 18827#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 18835#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 18765#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 18766#L722-55 assume true; 18801#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 18754#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 18490#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 18491#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 18723#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 18724#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 18578#L722-9 assume true; 18579#L722-7 havoc main_~_ha_bkt~0#1; 18625#L722-6 assume true; 18583#L722-4 assume true; 18584#L722-2 havoc main_~_ha_hashv~0#1; 18820#L722-1 assume true; 18753#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 18559#L715 
[2024-11-17 09:20:17,843 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:17,843 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 21 times
[2024-11-17 09:20:17,843 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:17,843 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588408074]
[2024-11-17 09:20:17,843 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:17,843 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:17,852 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:17,852 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:17,856 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:17,862 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:17,862 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:17,862 INFO  L85        PathProgramCache]: Analyzing trace with hash 2015756981, now seen corresponding path program 1 times
[2024-11-17 09:20:17,863 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:17,863 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454238455]
[2024-11-17 09:20:17,863 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:17,863 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:17,973 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:18,469 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:18,470 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:18,470 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454238455]
[2024-11-17 09:20:18,470 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [454238455] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:18,470 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:18,470 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13
[2024-11-17 09:20:18,470 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [562251048]
[2024-11-17 09:20:18,470 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:18,471 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:18,471 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:18,471 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2024-11-17 09:20:18,471 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156
[2024-11-17 09:20:18,472 INFO  L87              Difference]: Start difference. First operand 491 states and 684 transitions. cyclomatic complexity: 196 Second operand  has 13 states, 13 states have (on average 6.384615384615385) internal successors, (83), 13 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:19,567 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:19,567 INFO  L93              Difference]: Finished difference Result 502 states and 698 transitions.
[2024-11-17 09:20:19,568 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 502 states and 698 transitions.
[2024-11-17 09:20:19,569 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 495
[2024-11-17 09:20:19,571 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 502 states to 502 states and 698 transitions.
[2024-11-17 09:20:19,572 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 502
[2024-11-17 09:20:19,572 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 502
[2024-11-17 09:20:19,572 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 502 states and 698 transitions.
[2024-11-17 09:20:19,573 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:19,573 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 502 states and 698 transitions.
[2024-11-17 09:20:19,574 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 502 states and 698 transitions.
[2024-11-17 09:20:19,578 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 496.
[2024-11-17 09:20:19,578 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 496 states, 492 states have (on average 1.3922764227642277) internal successors, (685), 491 states have internal predecessors, (685), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:19,579 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 691 transitions.
[2024-11-17 09:20:19,580 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 496 states and 691 transitions.
[2024-11-17 09:20:19,580 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. 
[2024-11-17 09:20:19,581 INFO  L425   stractBuchiCegarLoop]: Abstraction has 496 states and 691 transitions.
[2024-11-17 09:20:19,581 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 22 ============
[2024-11-17 09:20:19,581 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 496 states and 691 transitions.
[2024-11-17 09:20:19,582 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 489
[2024-11-17 09:20:19,582 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:19,582 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:19,583 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:19,583 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:19,583 INFO  L745   eck$LassoCheckResult]: Stem: 19895#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 19568#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 19569#L715 
[2024-11-17 09:20:19,584 INFO  L747   eck$LassoCheckResult]: Loop: 19569#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 19808#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 19553#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 19554#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 19824#L722 assume true;havoc main_~_ha_hashv~0#1; 19522#L722-73 assume true; 19523#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 19795#L722-156 assume true; 19971#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 19970#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 19969#L722-154 assume !main_#t~switch29#1; 19968#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 19967#L722-152 assume !main_#t~switch29#1; 19966#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 19965#L722-150 assume !main_#t~switch29#1; 19964#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 19963#L722-148 assume !main_#t~switch29#1; 19962#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 19961#L722-146 assume !main_#t~switch29#1; 19960#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 19959#L722-144 assume !main_#t~switch29#1; 19957#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 19955#L722-142 assume !main_#t~switch29#1; 19953#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 19951#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 19949#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 19947#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 19945#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 19944#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 19943#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 19942#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 19941#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 19940#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 19938#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 19936#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 19934#L722-131 assume main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise41#1 := 0; 19862#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 19688#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 19689#L722-126 assume 0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := main_~_hj_j~0#1; 19974#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 19973#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 19972#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 19929#L722-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 19921#L722-118 havoc main_#t~bitwise43#1;assume main_#t~bitwise43#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 19919#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 19917#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 19561#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 19905#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 19724#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 19903#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 19812#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 19901#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 19539#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 19900#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 19828#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 19899#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 19784#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 19851#L722-79 assume true; 19834#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 19835#L722-76 assume true; 19839#L722-74 assume true; 19806#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 19807#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 19781#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 19782#L722-71 assume true; 19829#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 19837#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 19845#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 19775#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 19776#L722-55 assume true; 19811#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 19765#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 19499#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 19500#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 19734#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 19735#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 19588#L722-9 assume true; 19589#L722-7 havoc main_~_ha_bkt~0#1; 19636#L722-6 assume true; 19594#L722-4 assume true; 19595#L722-2 havoc main_~_ha_hashv~0#1; 19830#L722-1 assume true; 19764#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 19569#L715 
[2024-11-17 09:20:19,584 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:19,584 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 22 times
[2024-11-17 09:20:19,585 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:19,585 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [917843794]
[2024-11-17 09:20:19,585 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:19,585 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:19,594 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:19,594 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:19,597 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:19,602 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:19,603 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:19,603 INFO  L85        PathProgramCache]: Analyzing trace with hash 959711032, now seen corresponding path program 1 times
[2024-11-17 09:20:19,603 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:19,603 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982571914]
[2024-11-17 09:20:19,603 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:19,603 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:19,698 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:20,244 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:20,245 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:20,245 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982571914]
[2024-11-17 09:20:20,245 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982571914] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:20,245 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:20,245 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-17 09:20:20,245 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792222651]
[2024-11-17 09:20:20,245 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:20,246 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:20,246 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:20,246 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-17 09:20:20,247 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90
[2024-11-17 09:20:20,247 INFO  L87              Difference]: Start difference. First operand 496 states and 691 transitions. cyclomatic complexity: 198 Second operand  has 10 states, 10 states have (on average 8.3) internal successors, (83), 10 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:22,212 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.20s for a HTC check with result INVALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2024-11-17 09:20:22,475 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:22,475 INFO  L93              Difference]: Finished difference Result 511 states and 711 transitions.
[2024-11-17 09:20:22,475 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 511 states and 711 transitions.
[2024-11-17 09:20:22,477 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 504
[2024-11-17 09:20:22,479 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 511 states to 511 states and 711 transitions.
[2024-11-17 09:20:22,479 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 511
[2024-11-17 09:20:22,479 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 511
[2024-11-17 09:20:22,479 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 511 states and 711 transitions.
[2024-11-17 09:20:22,480 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:22,480 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 511 states and 711 transitions.
[2024-11-17 09:20:22,481 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 511 states and 711 transitions.
[2024-11-17 09:20:22,488 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 511 to 503.
[2024-11-17 09:20:22,489 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 503 states, 499 states have (on average 1.3887775551102204) internal successors, (693), 498 states have internal predecessors, (693), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:22,493 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 503 states to 503 states and 699 transitions.
[2024-11-17 09:20:22,493 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 503 states and 699 transitions.
[2024-11-17 09:20:22,497 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:20:22,497 INFO  L425   stractBuchiCegarLoop]: Abstraction has 503 states and 699 transitions.
[2024-11-17 09:20:22,497 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 23 ============
[2024-11-17 09:20:22,497 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 503 states and 699 transitions.
[2024-11-17 09:20:22,499 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 496
[2024-11-17 09:20:22,499 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:22,499 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:22,499 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:22,499 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:22,500 INFO  L745   eck$LassoCheckResult]: Stem: 20916#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 20587#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 20588#L715 
[2024-11-17 09:20:22,500 INFO  L747   eck$LassoCheckResult]: Loop: 20588#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 20827#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 20572#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 20573#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 20843#L722 assume true;havoc main_~_ha_hashv~0#1; 20542#L722-73 assume true; 20543#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 20814#L722-156 assume true; 20982#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 20980#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 20979#L722-154 assume !main_#t~switch29#1; 20978#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 20977#L722-152 assume !main_#t~switch29#1; 20976#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 20975#L722-150 assume !main_#t~switch29#1; 20974#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 20973#L722-148 assume !main_#t~switch29#1; 20972#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 20971#L722-146 assume !main_#t~switch29#1; 20970#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 20969#L722-144 assume !main_#t~switch29#1; 20968#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 20967#L722-142 assume !main_#t~switch29#1; 20966#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 20965#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 20964#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 20963#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 20962#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 20961#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 20960#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 20959#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 20958#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 20955#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 20953#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 20544#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 20545#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 20769#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 20857#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 21002#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 21001#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 21000#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 20999#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 20785#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 20786#L722-115 assume !(0 == main_~_hj_i~0#1 % 4294967296); 20790#L722-114 assume 0 == main_~_ha_hashv~0#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise44#1 := main_~_hj_i~0#1; 20734#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 20833#L722-109 assume !(0 == main_~_hj_j~0#1 % 4294967296); 20918#L722-108 assume 0 == 65536 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise45#1 := main_~_hj_j~0#1; 20743#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 20923#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 20831#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 20921#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 20558#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 20920#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 20849#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 20919#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 20803#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 20873#L722-79 assume true; 20855#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 20856#L722-76 assume true; 20861#L722-74 assume true; 20825#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 20826#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 20800#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 20801#L722-71 assume true; 20850#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 20859#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 20867#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 20794#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 20795#L722-55 assume true; 20830#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 20784#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 20519#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 20520#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 20753#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 20754#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 20607#L722-9 assume true; 20608#L722-7 havoc main_~_ha_bkt~0#1; 20654#L722-6 assume true; 20612#L722-4 assume true; 20613#L722-2 havoc main_~_ha_hashv~0#1; 20851#L722-1 assume true; 20783#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 20588#L715 
[2024-11-17 09:20:22,500 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:22,500 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 23 times
[2024-11-17 09:20:22,501 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:22,501 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1653988998]
[2024-11-17 09:20:22,501 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:22,501 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:22,511 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:22,511 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:22,517 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:22,527 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:22,528 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:22,528 INFO  L85        PathProgramCache]: Analyzing trace with hash 1968505418, now seen corresponding path program 1 times
[2024-11-17 09:20:22,528 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:22,528 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746878806]
[2024-11-17 09:20:22,528 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:22,528 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:22,632 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:22,997 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:22,998 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:22,998 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1746878806]
[2024-11-17 09:20:22,998 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1746878806] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:22,998 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:22,998 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11
[2024-11-17 09:20:22,998 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838545383]
[2024-11-17 09:20:22,998 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:22,999 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:22,999 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:22,999 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2024-11-17 09:20:22,999 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110
[2024-11-17 09:20:22,999 INFO  L87              Difference]: Start difference. First operand 503 states and 699 transitions. cyclomatic complexity: 199 Second operand  has 11 states, 11 states have (on average 7.545454545454546) internal successors, (83), 11 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:23,929 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:23,929 INFO  L93              Difference]: Finished difference Result 517 states and 717 transitions.
[2024-11-17 09:20:23,929 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 517 states and 717 transitions.
[2024-11-17 09:20:23,932 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 510
[2024-11-17 09:20:23,934 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 517 states to 517 states and 717 transitions.
[2024-11-17 09:20:23,935 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 517
[2024-11-17 09:20:23,936 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 517
[2024-11-17 09:20:23,936 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 517 states and 717 transitions.
[2024-11-17 09:20:23,937 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:23,937 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 517 states and 717 transitions.
[2024-11-17 09:20:23,939 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 517 states and 717 transitions.
[2024-11-17 09:20:23,948 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 506.
[2024-11-17 09:20:23,949 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 506 states, 502 states have (on average 1.3864541832669324) internal successors, (696), 501 states have internal predecessors, (696), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:23,950 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 702 transitions.
[2024-11-17 09:20:23,950 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 506 states and 702 transitions.
[2024-11-17 09:20:23,952 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:20:23,953 INFO  L425   stractBuchiCegarLoop]: Abstraction has 506 states and 702 transitions.
[2024-11-17 09:20:23,953 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 24 ============
[2024-11-17 09:20:23,953 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 702 transitions.
[2024-11-17 09:20:23,954 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 499
[2024-11-17 09:20:23,954 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:23,954 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:23,955 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:23,955 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:23,955 INFO  L745   eck$LassoCheckResult]: Stem: 21946#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 21622#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 21623#L715 
[2024-11-17 09:20:23,956 INFO  L747   eck$LassoCheckResult]: Loop: 21623#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 21859#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 21607#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 21608#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 21876#L722 assume true;havoc main_~_ha_hashv~0#1; 21576#L722-73 assume true; 21577#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 21846#L722-156 assume true; 22001#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 22000#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 21999#L722-154 assume !main_#t~switch29#1; 21998#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 21997#L722-152 assume !main_#t~switch29#1; 21996#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 21995#L722-150 assume !main_#t~switch29#1; 21994#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 21993#L722-148 assume !main_#t~switch29#1; 21992#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 21991#L722-146 assume !main_#t~switch29#1; 21990#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 21989#L722-144 assume !main_#t~switch29#1; 21988#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 21987#L722-142 assume !main_#t~switch29#1; 21986#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 21985#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 21984#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 21983#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 21982#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 21981#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 21980#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 21979#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 21978#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 21977#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 21975#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 21976#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 22041#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 21888#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 21889#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 21741#L722-127 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise42#1 := 256 * (main_~_hj_i~0#1 % 4294967296); 21742#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 22050#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 22049#L722-120 assume !(0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 21644#L722-119 assume !(main_~_ha_hashv~0#1 % 4294967296 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296); 21645#L722-118 havoc main_#t~bitwise43#1;assume main_#t~bitwise43#1 % 4294967296 <= main_~_ha_hashv~0#1 % 4294967296 + main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296; 21921#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 22024#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 21615#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 22012#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 21778#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 22011#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 21863#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 21950#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 21593#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 21949#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 21880#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 21948#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 21835#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 21904#L722-79 assume true; 21886#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 21887#L722-76 assume true; 21893#L722-74 assume true; 21857#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 21858#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 21832#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 21833#L722-71 assume true; 21881#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 21891#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 21899#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 21826#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 21827#L722-55 assume true; 21862#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 21817#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 21553#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 21554#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 21788#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 21789#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 21642#L722-9 assume true; 21643#L722-7 havoc main_~_ha_bkt~0#1; 21689#L722-6 assume true; 21647#L722-4 assume true; 21648#L722-2 havoc main_~_ha_hashv~0#1; 21882#L722-1 assume true; 21816#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 21623#L715 
[2024-11-17 09:20:23,956 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:23,956 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 24 times
[2024-11-17 09:20:23,956 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:23,956 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [513201476]
[2024-11-17 09:20:23,957 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:23,957 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:23,967 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:23,967 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:23,970 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:23,976 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:23,976 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:23,976 INFO  L85        PathProgramCache]: Analyzing trace with hash 1966487211, now seen corresponding path program 1 times
[2024-11-17 09:20:23,977 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:23,977 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390703907]
[2024-11-17 09:20:23,977 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:23,978 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:24,115 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:24,582 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:24,583 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:24,583 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390703907]
[2024-11-17 09:20:24,583 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390703907] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:24,583 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:24,583 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2024-11-17 09:20:24,584 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [187539762]
[2024-11-17 09:20:24,584 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:24,584 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:24,584 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:24,584 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-17 09:20:24,584 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90
[2024-11-17 09:20:24,585 INFO  L87              Difference]: Start difference. First operand 506 states and 702 transitions. cyclomatic complexity: 199 Second operand  has 10 states, 10 states have (on average 8.3) internal successors, (83), 10 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:29,240 WARN  L539   Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 3.89s for a HTC check with result VALID. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers []
[2024-11-17 09:20:29,756 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:29,756 INFO  L93              Difference]: Finished difference Result 519 states and 717 transitions.
[2024-11-17 09:20:29,756 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 519 states and 717 transitions.
[2024-11-17 09:20:29,758 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 512
[2024-11-17 09:20:29,760 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 519 states to 519 states and 717 transitions.
[2024-11-17 09:20:29,760 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 519
[2024-11-17 09:20:29,761 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 519
[2024-11-17 09:20:29,761 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 519 states and 717 transitions.
[2024-11-17 09:20:29,762 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:29,762 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 519 states and 717 transitions.
[2024-11-17 09:20:29,763 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 519 states and 717 transitions.
[2024-11-17 09:20:29,774 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 506.
[2024-11-17 09:20:29,775 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 506 states, 502 states have (on average 1.3844621513944224) internal successors, (695), 501 states have internal predecessors, (695), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:29,776 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 701 transitions.
[2024-11-17 09:20:29,776 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 506 states and 701 transitions.
[2024-11-17 09:20:29,777 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:20:29,777 INFO  L425   stractBuchiCegarLoop]: Abstraction has 506 states and 701 transitions.
[2024-11-17 09:20:29,777 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 25 ============
[2024-11-17 09:20:29,777 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 701 transitions.
[2024-11-17 09:20:29,779 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 499
[2024-11-17 09:20:29,779 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:29,779 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:29,780 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:29,780 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:29,780 INFO  L745   eck$LassoCheckResult]: Stem: 22994#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 22669#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 22670#L715 
[2024-11-17 09:20:29,781 INFO  L747   eck$LassoCheckResult]: Loop: 22670#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 22907#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 22654#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 22655#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 22924#L722 assume true;havoc main_~_ha_hashv~0#1; 22624#L722-73 assume true; 22625#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 22894#L722-156 assume true; 22794#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 22796#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 22735#L722-154 assume !main_#t~switch29#1; 22648#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 22649#L722-152 assume !main_#t~switch29#1; 22900#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 22682#L722-150 assume !main_#t~switch29#1; 22683#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 22752#L722-148 assume !main_#t~switch29#1; 22753#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 22808#L722-146 assume !main_#t~switch29#1; 22809#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 22933#L722-144 assume !main_#t~switch29#1; 22836#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 22780#L722-142 assume !main_#t~switch29#1; 22781#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 22727#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 22723#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 22724#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 22650#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 22617#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 22618#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 22898#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 22749#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 22750#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 22925#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 22626#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 22627#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 22850#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 22937#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 23078#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 23076#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 22861#L722-125 assume main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296;main_#t~bitwise42#1 := 0; 22765#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 22766#L722-121 assume !(0 == main_~_ha_hashv~0#1 % 4294967296); 22956#L722-120 assume 0 == main_~_hj_j~0#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise43#1 := main_~_ha_hashv~0#1; 22957#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 23012#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 22662#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 23002#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 22824#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 23000#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 22911#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 22998#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 22640#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 22997#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 22929#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 22996#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 22883#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 22953#L722-79 assume true; 22935#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 22936#L722-76 assume true; 22941#L722-74 assume true; 22905#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 22906#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 22880#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 22881#L722-71 assume true; 22930#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 22939#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 22947#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 22874#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 22875#L722-55 assume true; 22910#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 22865#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 22601#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 22602#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 22834#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 22835#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 22689#L722-9 assume true; 22690#L722-7 havoc main_~_ha_bkt~0#1; 22736#L722-6 assume true; 22694#L722-4 assume true; 22695#L722-2 havoc main_~_ha_hashv~0#1; 22931#L722-1 assume true; 22864#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 22670#L715 
[2024-11-17 09:20:29,781 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:29,781 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 25 times
[2024-11-17 09:20:29,782 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:29,782 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457669955]
[2024-11-17 09:20:29,782 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:29,782 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:29,793 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:29,794 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:29,797 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:29,803 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:29,804 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:29,804 INFO  L85        PathProgramCache]: Analyzing trace with hash -1223128716, now seen corresponding path program 1 times
[2024-11-17 09:20:29,804 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:29,804 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2121591931]
[2024-11-17 09:20:29,804 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:29,804 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:29,919 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-17 09:20:30,195 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-17 09:20:30,195 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-17 09:20:30,196 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2121591931]
[2024-11-17 09:20:30,196 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2121591931] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-17 09:20:30,196 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-17 09:20:30,196 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2024-11-17 09:20:30,196 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1807179377]
[2024-11-17 09:20:30,196 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-17 09:20:30,196 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-17 09:20:30,196 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-17 09:20:30,197 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-17 09:20:30,197 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72
[2024-11-17 09:20:30,197 INFO  L87              Difference]: Start difference. First operand 506 states and 701 transitions. cyclomatic complexity: 198 Second operand  has 9 states, 9 states have (on average 9.222222222222221) internal successors, (83), 9 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-17 09:20:31,013 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-17 09:20:31,013 INFO  L93              Difference]: Finished difference Result 520 states and 719 transitions.
[2024-11-17 09:20:31,013 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 520 states and 719 transitions.
[2024-11-17 09:20:31,015 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 513
[2024-11-17 09:20:31,016 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 520 states to 520 states and 719 transitions.
[2024-11-17 09:20:31,016 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 520
[2024-11-17 09:20:31,017 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 520
[2024-11-17 09:20:31,017 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 520 states and 719 transitions.
[2024-11-17 09:20:31,018 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-17 09:20:31,018 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 520 states and 719 transitions.
[2024-11-17 09:20:31,018 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 520 states and 719 transitions.
[2024-11-17 09:20:31,023 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 520 to 509.
[2024-11-17 09:20:31,025 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 509 states, 505 states have (on average 1.384158415841584) internal successors, (699), 504 states have internal predecessors, (699), 3 states have call successors, (3), 1 states have call predecessors, (3), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3)
[2024-11-17 09:20:31,026 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 509 states to 509 states and 705 transitions.
[2024-11-17 09:20:31,026 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 509 states and 705 transitions.
[2024-11-17 09:20:31,026 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-17 09:20:31,027 INFO  L425   stractBuchiCegarLoop]: Abstraction has 509 states and 705 transitions.
[2024-11-17 09:20:31,027 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 26 ============
[2024-11-17 09:20:31,027 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 509 states and 705 transitions.
[2024-11-17 09:20:31,028 INFO  L131   ngComponentsAnalysis]: Automaton has 3 accepting balls. 502
[2024-11-17 09:20:31,028 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-17 09:20:31,028 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-17 09:20:31,029 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-17 09:20:31,029 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-17 09:20:31,029 INFO  L745   eck$LassoCheckResult]: Stem: 24037#ULTIMATE.startENTRY assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(21, 2); 23711#ULTIMATE.init_returnLabel#1 assume true;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem3#1, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem9#1, main_#t~mem8#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem12#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem16#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~bitwise20#1, main_#t~bitwise21#1, main_#t~bitwise22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~switch29#1, main_#t~mem30#1, main_#t~mem31#1, main_#t~mem32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~bitwise41#1, main_#t~bitwise42#1, main_#t~bitwise43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc50#1.base, main_#t~malloc50#1.offset, main_#t~mem51#1.base, main_#t~mem51#1.offset, main_#t~mem52#1.base, main_#t~mem52#1.offset, main_#t~memset~res53#1.base, main_#t~memset~res53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~mem56#1.base, main_#t~mem56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~malloc59#1.base, main_#t~malloc59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~mem62#1.base, main_#t~mem62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~memset~res66#1.base, main_#t~memset~res66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~mem69#1.base, main_#t~mem69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1.base, main_#t~mem74#1.offset, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1, main_#t~post77#1, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~bitwise80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1.base, main_#t~mem82#1.offset, main_#t~mem83#1, main_#t~post84#1, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1.base, main_#t~mem86#1.offset, main_#t~mem87#1.base, main_#t~mem87#1.offset, main_#t~mem89#1, main_#t~mem88#1, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem91#1, main_#t~short92#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~malloc95#1.base, main_#t~malloc95#1.offset, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~memset~res98#1.base, main_#t~memset~res98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1.base, main_#t~mem100#1.offset, main_#t~mem103#1, main_#t~mem101#1.base, main_#t~mem101#1.offset, main_#t~mem102#1, main_#t~bitwise104#1, main_#t~mem105#1.base, main_#t~mem105#1.offset, main_#t~mem108#1, main_#t~mem106#1.base, main_#t~mem106#1.offset, main_#t~mem107#1, main_#t~bitwise109#1, main_#t~mem110#1.base, main_#t~mem110#1.offset, main_#t~mem111#1.base, main_#t~mem111#1.offset, main_#t~mem112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1.base, main_#t~mem115#1.offset, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem119#1, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1, main_#t~bitwise120#1, main_#t~mem121#1, main_#t~pre122#1, main_#t~mem123#1.base, main_#t~mem123#1.offset, main_#t~mem124#1, main_#t~mem125#1.base, main_#t~mem125#1.offset, main_#t~mem126#1, main_#t~post127#1, main_#t~mem131#1, main_#t~mem129#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem130#1, main_#t~mem132#1, main_#t~post133#1, main_#t~mem134#1.base, main_#t~mem134#1.offset, main_#t~mem135#1.base, main_#t~mem135#1.offset, main_#t~mem136#1.base, main_#t~mem136#1.offset, main_#t~post137#1, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~mem140#1.base, main_#t~mem140#1.offset, main_#t~mem141#1, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1, main_#t~post144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1.base, main_#t~mem146#1.offset, main_#t~mem147#1.base, main_#t~mem147#1.offset, main_#t~mem150#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1, main_#t~ite153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem156#1.base, main_#t~mem156#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem157#1, main_#t~post158#1, main_#t~mem159#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~mem202#1.base, main_#t~mem202#1.offset, main_#t~mem203#1, main_#t~bitwise204#1, main_#t~mem205#1.base, main_#t~mem205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~mem211#1.base, main_#t~mem211#1.offset, main_#t~mem212#1, main_#t~mem213#1, main_#t~mem214#1, main_#t~short215#1, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~nondet217#1, main_#t~mem218#1.base, main_#t~mem218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1.base, main_#t~mem223#1.offset, main_#t~short224#1, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1.base, main_#t~mem228#1.offset, main_#t~mem229#1.base, main_#t~mem229#1.offset, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1.base, main_#t~mem231#1.offset, main_#t~mem232#1.base, main_#t~mem232#1.offset, main_#t~mem233#1, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1.base, main_#t~mem235#1.offset, main_#t~mem236#1.base, main_#t~mem236#1.offset, main_#t~mem237#1, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem240#1.base, main_#t~mem240#1.offset, main_#t~mem241#1.base, main_#t~mem241#1.offset, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~mem244#1.base, main_#t~mem244#1.offset, main_#t~mem247#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~bitwise248#1, main_#t~mem249#1.base, main_#t~mem249#1.offset, main_#t~mem250#1.base, main_#t~mem250#1.offset, main_#t~mem251#1, main_#t~post252#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1.base, main_#t~mem254#1.offset, main_#t~mem255#1.base, main_#t~mem255#1.offset, main_#t~mem256#1.base, main_#t~mem256#1.offset, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1.base, main_#t~mem259#1.offset, main_#t~mem260#1.base, main_#t~mem260#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem261#1.base, main_#t~mem261#1.offset, main_#t~mem262#1, main_#t~post263#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem264#1, main_#t~post265#1, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4); 23712#L715 
[2024-11-17 09:20:31,029 INFO  L747   eck$LassoCheckResult]: Loop: 23712#L715 assume true;call main_#t~mem3#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4); 23949#L715-2 assume !!(main_#t~mem3#1 < 1000);havoc main_#t~mem3#1;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnHeap(40);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset; 23696#L717 assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0); 23697#L720 call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem5#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem6#1 * main_#t~mem7#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem6#1;havoc main_#t~mem7#1; 23966#L722 assume true;havoc main_~_ha_hashv~0#1; 23666#L722-73 assume true; 23667#L722-75 assume true;havoc main_~_hj_i~0#1;havoc main_~_hj_j~0#1;havoc main_~_hj_k~0#1;main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~0#1 := 4276993775;main_~_hj_j~0#1 := 2654435769;main_~_hj_i~0#1 := main_~_hj_j~0#1;main_~_hj_k~0#1 := 4; 23936#L722-156 assume true; 23836#L722-215 assume !(main_~_hj_k~0#1 % 4294967296 >= 12); 23838#L722-155 main_~_ha_hashv~0#1 := 4 + main_~_ha_hashv~0#1;main_#t~switch29#1 := 11 == main_~_hj_k~0#1; 23777#L722-154 assume !main_#t~switch29#1; 23690#L722-153 main_#t~switch29#1 := main_#t~switch29#1 || 10 == main_~_hj_k~0#1; 23691#L722-152 assume !main_#t~switch29#1; 23942#L722-151 main_#t~switch29#1 := main_#t~switch29#1 || 9 == main_~_hj_k~0#1; 23724#L722-150 assume !main_#t~switch29#1; 23725#L722-149 main_#t~switch29#1 := main_#t~switch29#1 || 8 == main_~_hj_k~0#1; 23794#L722-148 assume !main_#t~switch29#1; 23795#L722-147 main_#t~switch29#1 := main_#t~switch29#1 || 7 == main_~_hj_k~0#1; 23850#L722-146 assume !main_#t~switch29#1; 23851#L722-145 main_#t~switch29#1 := main_#t~switch29#1 || 6 == main_~_hj_k~0#1; 23975#L722-144 assume !main_#t~switch29#1; 23878#L722-143 main_#t~switch29#1 := main_#t~switch29#1 || 5 == main_~_hj_k~0#1; 23822#L722-142 assume !main_#t~switch29#1; 23823#L722-141 main_#t~switch29#1 := main_#t~switch29#1 || 4 == main_~_hj_k~0#1; 23769#L722-140 assume main_#t~switch29#1;call main_#t~mem37#1 := read~int#1(main_~_hj_key~0#1.base, 3 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 16777216 * (main_#t~mem37#1 % 256 % 4294967296); 23765#L722-139 main_#t~switch29#1 := main_#t~switch29#1 || 3 == main_~_hj_k~0#1; 23766#L722-138 assume main_#t~switch29#1;call main_#t~mem38#1 := read~int#1(main_~_hj_key~0#1.base, 2 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 65536 * (main_#t~mem38#1 % 256 % 4294967296); 23692#L722-137 main_#t~switch29#1 := main_#t~switch29#1 || 2 == main_~_hj_k~0#1; 23659#L722-136 assume main_#t~switch29#1;call main_#t~mem39#1 := read~int#1(main_~_hj_key~0#1.base, 1 + main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + 256 * (main_#t~mem39#1 % 256 % 4294967296); 23660#L722-135 main_#t~switch29#1 := main_#t~switch29#1 || 1 == main_~_hj_k~0#1; 23940#L722-134 assume main_#t~switch29#1;call main_#t~mem40#1 := read~int#1(main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, 1);main_~_hj_i~0#1 := main_~_hj_i~0#1 + (if main_#t~mem40#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem40#1 % 256 % 4294967296 else main_#t~mem40#1 % 256 % 4294967296 - 4294967296); 23791#main_SWITCH~BREAK~1#1 assume true;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1;havoc main_#t~switch29#1;havoc main_#t~mem30#1;havoc main_#t~mem31#1;havoc main_#t~mem32#1;havoc main_#t~mem33#1;havoc main_#t~mem34#1;havoc main_#t~mem35#1;havoc main_#t~mem36#1;havoc main_#t~mem37#1;havoc main_#t~mem38#1;havoc main_#t~mem39#1;havoc main_#t~mem40#1; 23792#L722-78 assume true;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 23967#L722-133 assume !(0 == main_~_hj_i~0#1 % 4294967296); 23668#L722-132 assume !(0 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 23669#L722-131 assume !(main_~_hj_i~0#1 % 4294967296 == main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296); 23892#L722-130 havoc main_#t~bitwise41#1;assume main_#t~bitwise41#1 % 4294967296 <= main_~_hj_i~0#1 % 4294967296 + main_~_ha_hashv~0#1 % 4294967296 / 8192 % 4294967296; 23979#L722-128 main_~_hj_i~0#1 := main_#t~bitwise41#1;havoc main_#t~bitwise41#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 24103#L722-127 assume !(0 == main_~_hj_j~0#1 % 4294967296); 24100#L722-126 assume !(0 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 24098#L722-125 assume !(main_~_hj_j~0#1 % 4294967296 == 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296); 24071#L722-124 havoc main_#t~bitwise42#1;assume main_#t~bitwise42#1 % 4294967296 <= main_~_hj_j~0#1 % 4294967296 + 256 * (main_~_hj_i~0#1 % 4294967296) % 4294967296; 24068#L722-122 main_~_hj_j~0#1 := main_#t~bitwise42#1;havoc main_#t~bitwise42#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 24063#L722-121 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise43#1 := main_~_hj_j~0#1 % 4294967296 / 8192; 24060#L722-116 main_~_ha_hashv~0#1 := main_#t~bitwise43#1;havoc main_#t~bitwise43#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 24057#L722-115 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise44#1 := main_~_ha_hashv~0#1 % 4294967296 / 4096; 23704#L722-110 main_~_hj_i~0#1 := main_#t~bitwise44#1;havoc main_#t~bitwise44#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 24046#L722-109 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise45#1 := 65536 * (main_~_hj_i~0#1 % 4294967296); 23869#L722-104 main_~_hj_j~0#1 := main_#t~bitwise45#1;havoc main_#t~bitwise45#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 24044#L722-103 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise46#1 := main_~_hj_j~0#1 % 4294967296 / 32; 23953#L722-98 main_~_ha_hashv~0#1 := main_#t~bitwise46#1;havoc main_#t~bitwise46#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_hj_j~0#1;main_~_hj_i~0#1 := main_~_hj_i~0#1 - main_~_ha_hashv~0#1; 24042#L722-97 assume 0 == main_~_hj_i~0#1 % 4294967296;main_#t~bitwise47#1 := main_~_ha_hashv~0#1 % 4294967296 / 8; 23682#L722-92 main_~_hj_i~0#1 := main_#t~bitwise47#1;havoc main_#t~bitwise47#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_ha_hashv~0#1;main_~_hj_j~0#1 := main_~_hj_j~0#1 - main_~_hj_i~0#1; 24041#L722-91 assume 0 == main_~_hj_j~0#1 % 4294967296;main_#t~bitwise48#1 := 1024 * (main_~_hj_i~0#1 % 4294967296); 23971#L722-86 main_~_hj_j~0#1 := main_#t~bitwise48#1;havoc main_#t~bitwise48#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_i~0#1;main_~_ha_hashv~0#1 := main_~_ha_hashv~0#1 - main_~_hj_j~0#1; 24040#L722-85 assume 0 == main_~_ha_hashv~0#1 % 4294967296;main_#t~bitwise49#1 := main_~_hj_j~0#1 % 4294967296 / 32768; 23925#L722-80 main_~_ha_hashv~0#1 := main_#t~bitwise49#1;havoc main_#t~bitwise49#1; 23995#L722-79 assume true; 23977#L722-77 havoc main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset; 23978#L722-76 assume true; 23983#L722-74 assume true; 23947#L722-3 assume true;call write~int#1(main_~_ha_hashv~0#1, main_~user~0#1.base, 36 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 28 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 32 + main_~user~0#1.offset, 4); 23948#L722-72 assume !(main_~users~0#1.base == 0 && main_~users~0#1.offset == 0);call main_#t~mem67#1.base, main_#t~mem67#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem67#1.base, main_#t~mem67#1.offset, main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);havoc main_#t~mem67#1.base, main_#t~mem67#1.offset; 23922#L722-70 assume true;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 16 + main_~user~0#1.offset, 4);call main_#t~mem68#1.base, main_#t~mem68#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem69#1.base, main_#t~mem69#1.offset := read~$Pointer$#1(main_#t~mem68#1.base, 16 + main_#t~mem68#1.offset, 4);call main_#t~mem70#1.base, main_#t~mem70#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem71#1 := read~int#1(main_#t~mem70#1.base, 20 + main_#t~mem70#1.offset, 4);call write~$Pointer$#1(main_#t~mem69#1.base, main_#t~mem69#1.offset - main_#t~mem71#1, main_~user~0#1.base, 12 + main_~user~0#1.offset, 4);havoc main_#t~mem68#1.base, main_#t~mem68#1.offset;havoc main_#t~mem69#1.base, main_#t~mem69#1.offset;havoc main_#t~mem70#1.base, main_#t~mem70#1.offset;havoc main_#t~mem71#1;call main_#t~mem72#1.base, main_#t~mem72#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem73#1.base, main_#t~mem73#1.offset := read~$Pointer$#1(main_#t~mem72#1.base, 16 + main_#t~mem72#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem73#1.base, 8 + main_#t~mem73#1.offset, 4);havoc main_#t~mem72#1.base, main_#t~mem72#1.offset;havoc main_#t~mem73#1.base, main_#t~mem73#1.offset;call main_#t~mem74#1.base, main_#t~mem74#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem74#1.base, 16 + main_#t~mem74#1.offset, 4);havoc main_#t~mem74#1.base, main_#t~mem74#1.offset; 23923#L722-71 assume true; 23972#L722-5 assume true;havoc main_~_ha_bkt~0#1;call main_#t~mem75#1.base, main_#t~mem75#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem76#1 := read~int#1(main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);main_#t~post77#1 := main_#t~mem76#1;call write~int#1(1 + main_#t~post77#1, main_#t~mem75#1.base, 12 + main_#t~mem75#1.offset, 4);havoc main_#t~mem75#1.base, main_#t~mem75#1.offset;havoc main_#t~mem76#1;havoc main_#t~post77#1; 23981#L722-54 assume true;call main_#t~mem78#1.base, main_#t~mem78#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem79#1 := read~int#1(main_#t~mem78#1.base, 4 + main_#t~mem78#1.offset, 4); 23989#L722-60 assume 0 == main_~_ha_hashv~0#1 % 4294967296 || 0 == (main_#t~mem79#1 - 1) % 4294967296;main_#t~bitwise80#1 := 0; 23916#L722-56 main_~_ha_bkt~0#1 := main_#t~bitwise80#1;havoc main_#t~mem78#1.base, main_#t~mem78#1.offset;havoc main_#t~mem79#1;havoc main_#t~bitwise80#1; 23917#L722-55 assume true; 23952#L722-8 assume true;call main_#t~mem81#1.base, main_#t~mem81#1.offset := read~$Pointer$#1(main_~users~0#1.base, 8 + main_~users~0#1.offset, 4);call main_#t~mem82#1.base, main_#t~mem82#1.offset := read~$Pointer$#1(main_#t~mem81#1.base, main_#t~mem81#1.offset, 4);main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset := main_#t~mem82#1.base, main_#t~mem82#1.offset + 12 * (if main_~_ha_bkt~0#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~0#1 % 4294967296 % 4294967296 else main_~_ha_bkt~0#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem81#1.base, main_#t~mem81#1.offset;havoc main_#t~mem82#1.base, main_#t~mem82#1.offset;call main_#t~mem83#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);main_#t~post84#1 := main_#t~mem83#1;call write~int#1(1 + main_#t~post84#1, main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);havoc main_#t~mem83#1;havoc main_#t~post84#1;call main_#t~mem85#1.base, main_#t~mem85#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem85#1.base, main_#t~mem85#1.offset, main_~user~0#1.base, 24 + main_~user~0#1.offset, 4);havoc main_#t~mem85#1.base, main_#t~mem85#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 20 + main_~user~0#1.offset, 4);call main_#t~mem86#1.base, main_#t~mem86#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4); 23907#L722-53 assume main_#t~mem86#1.base != 0 || main_#t~mem86#1.offset != 0;havoc main_#t~mem86#1.base, main_#t~mem86#1.offset;call main_#t~mem87#1.base, main_#t~mem87#1.offset := read~$Pointer$#1(main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_#t~mem87#1.base, 12 + main_#t~mem87#1.offset, 4);havoc main_#t~mem87#1.base, main_#t~mem87#1.offset; 23643#L722-52 call write~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, 4);call main_#t~mem89#1 := read~int#1(main_~_ha_head~0#1.base, 4 + main_~_ha_head~0#1.offset, 4);call main_#t~mem88#1 := read~int#1(main_~_ha_head~0#1.base, 8 + main_~_ha_head~0#1.offset, 4);main_#t~short92#1 := main_#t~mem89#1 % 4294967296 >= 10 * (1 + main_#t~mem88#1) % 4294967296; 23644#L722-51 assume main_#t~short92#1;call main_#t~mem90#1.base, main_#t~mem90#1.offset := read~$Pointer$#1(main_~user~0#1.base, 8 + main_~user~0#1.offset, 4);call main_#t~mem91#1 := read~int#1(main_#t~mem90#1.base, 36 + main_#t~mem90#1.offset, 4);main_#t~short92#1 := 0 == main_#t~mem91#1 % 4294967296; 23876#L722-50 assume !main_#t~short92#1;havoc main_#t~mem89#1;havoc main_#t~mem88#1;havoc main_#t~mem90#1.base, main_#t~mem90#1.offset;havoc main_#t~mem91#1;havoc main_#t~short92#1; 23877#L722-10 havoc main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset; 23731#L722-9 assume true; 23732#L722-7 havoc main_~_ha_bkt~0#1; 23778#L722-6 assume true; 23736#L722-4 assume true; 23737#L722-2 havoc main_~_ha_hashv~0#1; 23973#L722-1 assume true; 23906#L715-1 call main_#t~mem157#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post158#1 := main_#t~mem157#1;call write~int#2(1 + main_#t~post158#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem157#1;havoc main_#t~post158#1; 23712#L715 
[2024-11-17 09:20:31,030 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:31,030 INFO  L85        PathProgramCache]: Analyzing trace with hash 23616, now seen corresponding path program 26 times
[2024-11-17 09:20:31,030 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:31,030 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437168412]
[2024-11-17 09:20:31,030 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:31,030 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:31,039 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:31,039 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-17 09:20:31,042 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-17 09:20:31,047 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-17 09:20:31,047 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-17 09:20:31,047 INFO  L85        PathProgramCache]: Analyzing trace with hash 675735321, now seen corresponding path program 1 times
[2024-11-17 09:20:31,047 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-17 09:20:31,048 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101180211]
[2024-11-17 09:20:31,048 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-17 09:20:31,048 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-17 09:20:31,217 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat