./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 3061b6dc Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m [2024-11-19 14:41:42,428 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-19 14:41:42,474 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-19 14:41:42,478 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-19 14:41:42,479 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-19 14:41:42,506 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-19 14:41:42,508 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-19 14:41:42,509 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-19 14:41:42,509 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-19 14:41:42,510 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-19 14:41:42,510 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-19 14:41:42,511 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-19 14:41:42,511 INFO L153 SettingsManager]: * Use SBE=true [2024-11-19 14:41:42,512 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-19 14:41:42,513 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-19 14:41:42,514 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-19 14:41:42,514 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-19 14:41:42,514 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-19 14:41:42,514 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-19 14:41:42,515 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-19 14:41:42,515 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-19 14:41:42,517 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-19 14:41:42,517 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-19 14:41:42,517 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-19 14:41:42,517 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-19 14:41:42,518 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-19 14:41:42,518 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-19 14:41:42,518 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-19 14:41:42,519 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-19 14:41:42,519 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-19 14:41:42,519 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-19 14:41:42,519 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-19 14:41:42,520 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-19 14:41:42,520 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-19 14:41:42,520 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-19 14:41:42,520 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-19 14:41:42,521 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-19 14:41:42,521 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-19 14:41:42,521 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-19 14:41:42,522 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ef4a52e45666a829b602608a46cff9c8137910dd58bdfaebe016ce17984d1ac8 [2024-11-19 14:41:42,753 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-19 14:41:42,773 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-19 14:41:42,777 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-19 14:41:42,779 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-19 14:41:42,779 INFO L274 PluginConnector]: CDTParser initialized [2024-11-19 14:41:42,781 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-19 14:41:44,209 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-19 14:41:44,391 INFO L384 CDTParser]: Found 1 translation units. [2024-11-19 14:41:44,391 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/ldv-memsafety/ArraysWithLenghtAtDeclaration.c [2024-11-19 14:41:44,397 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8fdde4d71/cc103de4019147f3b09b70f496cafd17/FLAG05b6ccad4 [2024-11-19 14:41:44,410 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/8fdde4d71/cc103de4019147f3b09b70f496cafd17 [2024-11-19 14:41:44,412 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-19 14:41:44,414 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-19 14:41:44,416 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-19 14:41:44,416 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-19 14:41:44,423 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-19 14:41:44,424 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,425 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22724578 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44, skipping insertion in model container [2024-11-19 14:41:44,427 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,446 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-19 14:41:44,603 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-19 14:41:44,613 INFO L200 MainTranslator]: Completed pre-run [2024-11-19 14:41:44,626 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-19 14:41:44,638 INFO L204 MainTranslator]: Completed translation [2024-11-19 14:41:44,639 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44 WrapperNode [2024-11-19 14:41:44,639 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-19 14:41:44,640 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-19 14:41:44,640 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-19 14:41:44,640 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-19 14:41:44,648 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,654 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,674 INFO L138 Inliner]: procedures = 8, calls = 14, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 65 [2024-11-19 14:41:44,674 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-19 14:41:44,675 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-19 14:41:44,675 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-19 14:41:44,675 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-19 14:41:44,683 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,684 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,685 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,721 INFO L175 MemorySlicer]: Split 3 memory accesses to 2 slices as follows [2, 1]. 67 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 1 writes are split as follows [1, 0]. [2024-11-19 14:41:44,722 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,722 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,727 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,730 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,734 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,735 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,736 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-19 14:41:44,737 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-19 14:41:44,737 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-19 14:41:44,752 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-19 14:41:44,753 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (1/1) ... [2024-11-19 14:41:44,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:44,768 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:44,783 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:44,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-19 14:41:44,824 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-19 14:41:44,824 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-19 14:41:44,825 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-19 14:41:44,825 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-19 14:41:44,825 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-19 14:41:44,825 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-19 14:41:44,825 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-19 14:41:44,825 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-19 14:41:44,890 INFO L238 CfgBuilder]: Building ICFG [2024-11-19 14:41:44,891 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-19 14:41:45,056 INFO L? ?]: Removed 11 outVars from TransFormulas that were not future-live. [2024-11-19 14:41:45,056 INFO L287 CfgBuilder]: Performing block encoding [2024-11-19 14:41:45,072 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-19 14:41:45,073 INFO L316 CfgBuilder]: Removed 3 assume(true) statements. [2024-11-19 14:41:45,074 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 02:41:45 BoogieIcfgContainer [2024-11-19 14:41:45,075 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-19 14:41:45,076 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-19 14:41:45,076 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-19 14:41:45,080 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-19 14:41:45,080 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-19 14:41:45,080 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 19.11 02:41:44" (1/3) ... [2024-11-19 14:41:45,081 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a8282fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 02:41:45, skipping insertion in model container [2024-11-19 14:41:45,081 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-19 14:41:45,082 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:41:44" (2/3) ... [2024-11-19 14:41:45,082 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7a8282fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 02:41:45, skipping insertion in model container [2024-11-19 14:41:45,083 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-19 14:41:45,083 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 02:41:45" (3/3) ... [2024-11-19 14:41:45,084 INFO L332 chiAutomizerObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration.c [2024-11-19 14:41:45,142 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-19 14:41:45,142 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-19 14:41:45,143 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-19 14:41:45,143 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-19 14:41:45,144 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-19 14:41:45,144 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-19 14:41:45,145 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-19 14:41:45,145 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-19 14:41:45,149 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:45,167 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-19 14:41:45,167 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:45,167 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:45,172 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-19 14:41:45,172 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-19 14:41:45,172 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-19 14:41:45,173 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:45,175 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-19 14:41:45,175 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:45,175 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:45,175 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-19 14:41:45,176 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-19 14:41:45,183 INFO L745 eck$LassoCheckResult]: Stem: 15#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 16#L26-3true [2024-11-19 14:41:45,183 INFO L747 eck$LassoCheckResult]: Loop: 16#L26-3true assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8#L17-3true assume !(foo_~i~0#1 <= foo_~size#1); 9#L17-4true foo_#res#1 := foo_~i~0#1; 3#foo_returnLabel#1true main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 14#L26-2true main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16#L26-3true [2024-11-19 14:41:45,189 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,193 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-19 14:41:45,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397408779] [2024-11-19 14:41:45,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,307 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:45,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,341 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:45,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,344 INFO L85 PathProgramCache]: Analyzing trace with hash 38364915, now seen corresponding path program 1 times [2024-11-19 14:41:45,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,344 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685988527] [2024-11-19 14:41:45,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,384 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:45,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,403 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:45,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,407 INFO L85 PathProgramCache]: Analyzing trace with hash 1809804401, now seen corresponding path program 1 times [2024-11-19 14:41:45,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134139143] [2024-11-19 14:41:45,410 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:45,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:45,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:45,616 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134139143] [2024-11-19 14:41:45,616 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [134139143] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-19 14:41:45,616 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-19 14:41:45,616 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-19 14:41:45,617 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [613186901] [2024-11-19 14:41:45,617 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-19 14:41:45,761 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:45,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-19 14:41:45,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-19 14:41:45,801 INFO L87 Difference]: Start difference. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.75) internal successors, (7), 4 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:45,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:45,876 INFO L93 Difference]: Finished difference Result 28 states and 33 transitions. [2024-11-19 14:41:45,877 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 33 transitions. [2024-11-19 14:41:45,878 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 11 [2024-11-19 14:41:45,881 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 23 states and 26 transitions. [2024-11-19 14:41:45,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-19 14:41:45,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-19 14:41:45,884 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 26 transitions. [2024-11-19 14:41:45,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:41:45,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 26 transitions. [2024-11-19 14:41:45,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 26 transitions. [2024-11-19 14:41:45,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 14. [2024-11-19 14:41:45,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.1428571428571428) internal successors, (16), 13 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:45,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 16 transitions. [2024-11-19 14:41:45,904 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-19 14:41:45,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-19 14:41:45,909 INFO L425 stractBuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2024-11-19 14:41:45,909 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-19 14:41:45,909 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 16 transitions. [2024-11-19 14:41:45,913 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-19 14:41:45,913 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:45,913 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:45,913 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-19 14:41:45,913 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:41:45,913 INFO L745 eck$LassoCheckResult]: Stem: 68#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 69#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 71#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 70#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 59#L17-2 [2024-11-19 14:41:45,914 INFO L747 eck$LassoCheckResult]: Loop: 59#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 60#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 59#L17-2 [2024-11-19 14:41:45,914 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,914 INFO L85 PathProgramCache]: Analyzing trace with hash 925771, now seen corresponding path program 1 times [2024-11-19 14:41:45,914 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,915 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321348041] [2024-11-19 14:41:45,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,938 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:45,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,951 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:45,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 1 times [2024-11-19 14:41:45,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372071855] [2024-11-19 14:41:45,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,960 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:45,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:45,965 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:45,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:45,966 INFO L85 PathProgramCache]: Analyzing trace with hash 889666569, now seen corresponding path program 1 times [2024-11-19 14:41:45,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:45,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1238386518] [2024-11-19 14:41:45,967 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:45,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:45,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:46,080 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:46,080 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:46,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1238386518] [2024-11-19 14:41:46,080 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1238386518] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:46,081 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1758738572] [2024-11-19 14:41:46,081 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:46,081 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:46,081 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:46,083 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:46,085 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-19 14:41:46,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:46,143 INFO L255 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-19 14:41:46,145 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:46,223 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:46,223 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-19 14:41:46,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1758738572] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-19 14:41:46,224 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-19 14:41:46,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [4] total 7 [2024-11-19 14:41:46,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [171339266] [2024-11-19 14:41:46,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-19 14:41:46,297 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:46,298 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-19 14:41:46,299 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-19 14:41:46,299 INFO L87 Difference]: Start difference. First operand 14 states and 16 transitions. cyclomatic complexity: 4 Second operand has 5 states, 4 states have (on average 1.5) internal successors, (6), 5 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:46,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:46,371 INFO L93 Difference]: Finished difference Result 22 states and 24 transitions. [2024-11-19 14:41:46,371 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 24 transitions. [2024-11-19 14:41:46,372 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-19 14:41:46,374 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 24 transitions. [2024-11-19 14:41:46,374 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2024-11-19 14:41:46,374 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22 [2024-11-19 14:41:46,374 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 24 transitions. [2024-11-19 14:41:46,375 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:41:46,375 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 24 transitions. [2024-11-19 14:41:46,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 24 transitions. [2024-11-19 14:41:46,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 16. [2024-11-19 14:41:46,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.125) internal successors, (18), 15 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:46,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 18 transitions. [2024-11-19 14:41:46,378 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-19 14:41:46,378 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-19 14:41:46,379 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2024-11-19 14:41:46,379 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-19 14:41:46,379 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 18 transitions. [2024-11-19 14:41:46,380 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2024-11-19 14:41:46,380 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:46,380 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:46,380 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-19 14:41:46,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1] [2024-11-19 14:41:46,381 INFO L745 eck$LassoCheckResult]: Stem: 136#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 137#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 138#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 127#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 128#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 139#L17-4 [2024-11-19 14:41:46,381 INFO L747 eck$LassoCheckResult]: Loop: 139#L17-4 foo_#res#1 := foo_~i~0#1; 129#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 130#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 134#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 141#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 139#L17-4 [2024-11-19 14:41:46,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:46,382 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 1 times [2024-11-19 14:41:46,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:46,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888516441] [2024-11-19 14:41:46,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:46,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:46,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:46,411 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:46,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:46,421 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:46,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:46,422 INFO L85 PathProgramCache]: Analyzing trace with hash 51595455, now seen corresponding path program 2 times [2024-11-19 14:41:46,422 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:46,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343628797] [2024-11-19 14:41:46,423 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:46,423 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:46,432 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:41:46,432 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:46,432 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:46,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:46,440 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:46,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:46,441 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432377, now seen corresponding path program 1 times [2024-11-19 14:41:46,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:46,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [246845992] [2024-11-19 14:41:46,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:46,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:46,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:46,581 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:46,582 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:46,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [246845992] [2024-11-19 14:41:46,583 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [246845992] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:46,583 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [433021597] [2024-11-19 14:41:46,583 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:46,583 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:46,583 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:46,606 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:46,630 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-19 14:41:46,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:46,698 INFO L255 TraceCheckSpWp]: Trace formula consists of 84 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-19 14:41:46,700 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:46,746 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:46,746 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:46,802 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:46,803 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [433021597] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:46,804 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:46,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 8 [2024-11-19 14:41:46,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584427284] [2024-11-19 14:41:46,804 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:46,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:46,911 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2024-11-19 14:41:46,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2024-11-19 14:41:46,912 INFO L87 Difference]: Start difference. First operand 16 states and 18 transitions. cyclomatic complexity: 4 Second operand has 9 states, 8 states have (on average 3.875) internal successors, (31), 9 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:47,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:47,017 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2024-11-19 14:41:47,017 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 27 transitions. [2024-11-19 14:41:47,018 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-19 14:41:47,020 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 25 states and 27 transitions. [2024-11-19 14:41:47,020 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25 [2024-11-19 14:41:47,020 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-19 14:41:47,020 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 27 transitions. [2024-11-19 14:41:47,020 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:41:47,020 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 27 transitions. [2024-11-19 14:41:47,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 27 transitions. [2024-11-19 14:41:47,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 19. [2024-11-19 14:41:47,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.105263157894737) internal successors, (21), 18 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:47,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2024-11-19 14:41:47,022 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-11-19 14:41:47,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-19 14:41:47,025 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2024-11-19 14:41:47,025 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-19 14:41:47,026 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2024-11-19 14:41:47,027 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 12 [2024-11-19 14:41:47,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:47,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:47,027 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-19 14:41:47,027 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 2, 1, 1, 1, 1, 1] [2024-11-19 14:41:47,028 INFO L745 eck$LassoCheckResult]: Stem: 257#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 258#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 259#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 260#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 261#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 264#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 262#L17-4 [2024-11-19 14:41:47,028 INFO L747 eck$LassoCheckResult]: Loop: 262#L17-4 foo_#res#1 := foo_~i~0#1; 250#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 251#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 255#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 263#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 248#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 249#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 266#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 265#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 262#L17-4 [2024-11-19 14:41:47,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:47,029 INFO L85 PathProgramCache]: Analyzing trace with hash 889666567, now seen corresponding path program 2 times [2024-11-19 14:41:47,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:47,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1341175611] [2024-11-19 14:41:47,029 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:47,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:47,042 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:47,042 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:47,043 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:47,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:47,053 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:47,055 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:47,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1121476027, now seen corresponding path program 1 times [2024-11-19 14:41:47,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:47,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414669176] [2024-11-19 14:41:47,056 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:47,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:47,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:47,068 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:47,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:47,075 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:47,076 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:47,076 INFO L85 PathProgramCache]: Analyzing trace with hash -1242740619, now seen corresponding path program 2 times [2024-11-19 14:41:47,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:47,076 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850642972] [2024-11-19 14:41:47,076 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:47,076 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:47,102 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:47,106 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:47,106 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:47,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:47,127 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:47,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 21 [2024-11-19 14:41:47,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2024-11-19 14:41:47,640 INFO L204 LassoAnalysis]: Preferences: [2024-11-19 14:41:47,641 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-19 14:41:47,641 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-19 14:41:47,641 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-19 14:41:47,641 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-19 14:41:47,641 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:47,642 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-19 14:41:47,642 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-19 14:41:47,642 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration4_Lasso [2024-11-19 14:41:47,642 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-19 14:41:47,642 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-19 14:41:47,659 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,672 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,674 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,677 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,679 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,681 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,684 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,686 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,688 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,690 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,693 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,695 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,697 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:47,699 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:48,275 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-19 14:41:48,279 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-19 14:41:48,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:48,281 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:48,283 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:48,284 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-19 14:41:48,286 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:48,297 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:48,297 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:48,298 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:48,298 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:48,302 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:48,302 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:48,307 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-19 14:41:48,315 INFO L443 ModelExtractionUtils]: Simplification made 4 calls to the SMT solver. [2024-11-19 14:41:48,315 INFO L444 ModelExtractionUtils]: 3 out of 7 variables were initially zero. Simplification set additionally 1 variables to zero. [2024-11-19 14:41:48,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:48,317 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:48,324 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:48,330 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-19 14:41:48,334 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-19 14:41:48,345 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-19 14:41:48,346 INFO L474 LassoAnalysis]: Proved termination. [2024-11-19 14:41:48,347 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~1#1) = -2*ULTIMATE.start_main_~i~1#1 + 1 Supporting invariants [] [2024-11-19 14:41:48,363 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-19 14:41:48,380 INFO L156 tatePredicateManager]: 6 out of 6 supporting invariants were superfluous and have been removed [2024-11-19 14:41:48,402 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:48,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:48,419 INFO L255 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-19 14:41:48,420 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:48,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:48,446 INFO L255 TraceCheckSpWp]: Trace formula consists of 52 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:41:48,447 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:48,564 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:48,567 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2024-11-19 14:41:48,569 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4 Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:48,675 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 19 states and 21 transitions. cyclomatic complexity: 4. Second operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 40 states and 46 transitions. Complement of second has 13 states. [2024-11-19 14:41:48,677 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 7 states 1 stem states 5 non-accepting loop states 1 accepting loop states [2024-11-19 14:41:48,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 2.142857142857143) internal successors, (15), 7 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:48,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 23 transitions. [2024-11-19 14:41:48,680 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 6 letters. Loop has 9 letters. [2024-11-19 14:41:48,681 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:48,681 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 15 letters. Loop has 9 letters. [2024-11-19 14:41:48,681 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:48,681 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 7 states and 23 transitions. Stem has 6 letters. Loop has 18 letters. [2024-11-19 14:41:48,682 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:48,682 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 46 transitions. [2024-11-19 14:41:48,684 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-19 14:41:48,686 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 46 transitions. [2024-11-19 14:41:48,688 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 24 [2024-11-19 14:41:48,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25 [2024-11-19 14:41:48,688 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 46 transitions. [2024-11-19 14:41:48,688 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:48,688 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 46 transitions. [2024-11-19 14:41:48,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 46 transitions. [2024-11-19 14:41:48,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 34. [2024-11-19 14:41:48,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34 states, 34 states have (on average 1.1764705882352942) internal successors, (40), 33 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:48,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 40 transitions. [2024-11-19 14:41:48,692 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34 states and 40 transitions. [2024-11-19 14:41:48,692 INFO L425 stractBuchiCegarLoop]: Abstraction has 34 states and 40 transitions. [2024-11-19 14:41:48,693 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-19 14:41:48,693 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34 states and 40 transitions. [2024-11-19 14:41:48,694 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:48,694 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:48,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:48,694 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-19 14:41:48,695 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-19 14:41:48,696 INFO L745 eck$LassoCheckResult]: Stem: 425#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 426#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 429#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 439#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 438#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 435#L17-4 foo_#res#1 := foo_~i~0#1; 415#foo_returnLabel#1 [2024-11-19 14:41:48,696 INFO L747 eck$LassoCheckResult]: Loop: 415#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 416#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 422#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 433#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 444#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 443#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 411#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 427#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 441#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 431#L17-4 foo_#res#1 := foo_~i~0#1; 415#foo_returnLabel#1 [2024-11-19 14:41:48,696 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:48,696 INFO L85 PathProgramCache]: Analyzing trace with hash 1809859825, now seen corresponding path program 1 times [2024-11-19 14:41:48,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:48,697 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265347917] [2024-11-19 14:41:48,697 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:48,697 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:48,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:48,709 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:48,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:48,724 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:48,725 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:48,725 INFO L85 PathProgramCache]: Analyzing trace with hash 961271861, now seen corresponding path program 2 times [2024-11-19 14:41:48,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:48,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925355444] [2024-11-19 14:41:48,725 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:48,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:48,740 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:48,740 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:48,741 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:48,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:48,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:48,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:48,756 INFO L85 PathProgramCache]: Analyzing trace with hash 132390213, now seen corresponding path program 3 times [2024-11-19 14:41:48,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:48,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854763733] [2024-11-19 14:41:48,759 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:41:48,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:48,778 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-19 14:41:48,782 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:48,896 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 10 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:48,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:48,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854763733] [2024-11-19 14:41:48,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [854763733] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:48,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [130657814] [2024-11-19 14:41:48,897 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:41:48,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:48,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:48,900 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:48,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-19 14:41:48,997 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-19 14:41:48,997 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:48,998 INFO L255 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 8 conjuncts are in the unsatisfiable core [2024-11-19 14:41:49,003 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:49,005 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2024-11-19 14:41:49,093 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:49,093 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:49,152 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 13 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:49,153 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [130657814] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:49,153 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:49,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 12 [2024-11-19 14:41:49,153 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [428507473] [2024-11-19 14:41:49,154 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:49,362 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 32 [2024-11-19 14:41:49,441 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:49,441 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-11-19 14:41:49,442 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=94, Unknown=0, NotChecked=0, Total=132 [2024-11-19 14:41:49,442 INFO L87 Difference]: Start difference. First operand 34 states and 40 transitions. cyclomatic complexity: 9 Second operand has 12 states, 12 states have (on average 2.9166666666666665) internal successors, (35), 12 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:49,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:49,553 INFO L93 Difference]: Finished difference Result 61 states and 68 transitions. [2024-11-19 14:41:49,553 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 68 transitions. [2024-11-19 14:41:49,555 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:49,556 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 56 states and 63 transitions. [2024-11-19 14:41:49,556 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 33 [2024-11-19 14:41:49,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 33 [2024-11-19 14:41:49,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 63 transitions. [2024-11-19 14:41:49,556 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:49,556 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 63 transitions. [2024-11-19 14:41:49,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 63 transitions. [2024-11-19 14:41:49,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 45. [2024-11-19 14:41:49,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.1333333333333333) internal successors, (51), 44 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:49,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 51 transitions. [2024-11-19 14:41:49,563 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-19 14:41:49,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-19 14:41:49,565 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 51 transitions. [2024-11-19 14:41:49,565 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-19 14:41:49,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 51 transitions. [2024-11-19 14:41:49,566 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:49,566 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:49,566 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:49,567 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-19 14:41:49,567 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:41:49,567 INFO L745 eck$LassoCheckResult]: Stem: 649#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 650#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 651#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 654#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 664#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 659#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 656#L17-4 foo_#res#1 := foo_~i~0#1; 639#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 640#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 646#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 648#L26-4 main_~i~1#1 := 0; 643#L29-3 [2024-11-19 14:41:49,567 INFO L747 eck$LassoCheckResult]: Loop: 643#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 644#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 645#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 643#L29-3 [2024-11-19 14:41:49,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:49,567 INFO L85 PathProgramCache]: Analyzing trace with hash 1198432331, now seen corresponding path program 1 times [2024-11-19 14:41:49,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:49,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196917089] [2024-11-19 14:41:49,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:49,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:49,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:49,625 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:49,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:49,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [196917089] [2024-11-19 14:41:49,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [196917089] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:49,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1239118142] [2024-11-19 14:41:49,626 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:49,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:49,627 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:49,628 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:49,630 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-19 14:41:49,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:49,690 INFO L255 TraceCheckSpWp]: Trace formula consists of 71 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-19 14:41:49,691 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:49,709 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:49,711 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:49,746 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-11-19 14:41:49,746 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1239118142] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:49,746 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:49,746 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-19 14:41:49,746 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [107608602] [2024-11-19 14:41:49,746 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:49,747 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:41:49,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:49,747 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 1 times [2024-11-19 14:41:49,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:49,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1397820444] [2024-11-19 14:41:49,747 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-19 14:41:49,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:49,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:49,753 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:49,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:49,758 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:49,796 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:49,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-19 14:41:49,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2024-11-19 14:41:49,797 INFO L87 Difference]: Start difference. First operand 45 states and 51 transitions. cyclomatic complexity: 9 Second operand has 7 states, 7 states have (on average 3.142857142857143) internal successors, (22), 7 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:49,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:49,859 INFO L93 Difference]: Finished difference Result 85 states and 95 transitions. [2024-11-19 14:41:49,859 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 95 transitions. [2024-11-19 14:41:49,860 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-19 14:41:49,861 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 82 states and 92 transitions. [2024-11-19 14:41:49,861 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2024-11-19 14:41:49,861 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2024-11-19 14:41:49,861 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 92 transitions. [2024-11-19 14:41:49,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:49,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 82 states and 92 transitions. [2024-11-19 14:41:49,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 92 transitions. [2024-11-19 14:41:49,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 66. [2024-11-19 14:41:49,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 66 states, 66 states have (on average 1.1363636363636365) internal successors, (75), 65 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:49,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 75 transitions. [2024-11-19 14:41:49,865 INFO L240 hiAutomatonCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-19 14:41:49,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-19 14:41:49,866 INFO L425 stractBuchiCegarLoop]: Abstraction has 66 states and 75 transitions. [2024-11-19 14:41:49,866 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-19 14:41:49,866 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 66 states and 75 transitions. [2024-11-19 14:41:49,867 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 16 [2024-11-19 14:41:49,867 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:49,867 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:49,868 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 3, 2, 2, 2, 2, 1, 1] [2024-11-19 14:41:49,868 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:41:49,868 INFO L745 eck$LassoCheckResult]: Stem: 851#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 852#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 855#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 885#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 883#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 858#L17-4 foo_#res#1 := foo_~i~0#1; 859#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 899#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 856#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 857#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 902#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 901#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 900#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 898#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 879#L17-4 foo_#res#1 := foo_~i~0#1; 837#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 838#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 848#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 841#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 897#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 892#L17-2 [2024-11-19 14:41:49,868 INFO L747 eck$LassoCheckResult]: Loop: 892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 892#L17-2 [2024-11-19 14:41:49,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:49,869 INFO L85 PathProgramCache]: Analyzing trace with hash 1084446665, now seen corresponding path program 4 times [2024-11-19 14:41:49,869 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:49,869 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1162175217] [2024-11-19 14:41:49,869 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:41:49,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:49,893 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:41:49,893 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:49,893 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:49,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:49,909 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:49,909 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:49,909 INFO L85 PathProgramCache]: Analyzing trace with hash 1599, now seen corresponding path program 2 times [2024-11-19 14:41:49,909 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:49,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511500740] [2024-11-19 14:41:49,910 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:49,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:49,913 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:41:49,913 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:49,913 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:49,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:49,915 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:49,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:49,916 INFO L85 PathProgramCache]: Analyzing trace with hash -1523807225, now seen corresponding path program 5 times [2024-11-19 14:41:49,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:49,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573588709] [2024-11-19 14:41:49,916 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:41:49,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:49,941 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-19 14:41:49,941 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:50,046 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 9 proven. 43 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-19 14:41:50,047 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:50,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573588709] [2024-11-19 14:41:50,047 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1573588709] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:50,047 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [321770686] [2024-11-19 14:41:50,048 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:41:50,048 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:50,048 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:50,050 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:50,051 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-19 14:41:50,164 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-19 14:41:50,164 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:50,165 INFO L255 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-19 14:41:50,167 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:50,298 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-19 14:41:50,298 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:50,416 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 11 proven. 42 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-19 14:41:50,418 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [321770686] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:50,418 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:50,418 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 10] total 16 [2024-11-19 14:41:50,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012116291] [2024-11-19 14:41:50,418 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:50,463 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:50,464 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2024-11-19 14:41:50,464 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=209, Unknown=0, NotChecked=0, Total=272 [2024-11-19 14:41:50,464 INFO L87 Difference]: Start difference. First operand 66 states and 75 transitions. cyclomatic complexity: 13 Second operand has 17 states, 16 states have (on average 2.5625) internal successors, (41), 17 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:50,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:50,720 INFO L93 Difference]: Finished difference Result 80 states and 88 transitions. [2024-11-19 14:41:50,720 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 88 transitions. [2024-11-19 14:41:50,721 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:50,721 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 80 states and 88 transitions. [2024-11-19 14:41:50,721 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 45 [2024-11-19 14:41:50,721 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 45 [2024-11-19 14:41:50,722 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 88 transitions. [2024-11-19 14:41:50,722 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:50,722 INFO L218 hiAutomatonCegarLoop]: Abstraction has 80 states and 88 transitions. [2024-11-19 14:41:50,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 88 transitions. [2024-11-19 14:41:50,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 68. [2024-11-19 14:41:50,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 68 states have (on average 1.1176470588235294) internal successors, (76), 67 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:50,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 76 transitions. [2024-11-19 14:41:50,727 INFO L240 hiAutomatonCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-19 14:41:50,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-11-19 14:41:50,729 INFO L425 stractBuchiCegarLoop]: Abstraction has 68 states and 76 transitions. [2024-11-19 14:41:50,729 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-19 14:41:50,729 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 68 states and 76 transitions. [2024-11-19 14:41:50,730 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:50,730 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:50,730 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:50,730 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 3, 3, 3, 3, 1, 1] [2024-11-19 14:41:50,730 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-19 14:41:50,731 INFO L745 eck$LassoCheckResult]: Stem: 1190#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1191#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1194#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1234#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1230#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1226#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1196#L17-4 foo_#res#1 := foo_~i~0#1; 1197#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1241#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1240#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1237#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1229#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1225#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1221#L17-4 foo_#res#1 := foo_~i~0#1; 1181#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1182#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1188#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1238#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1231#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1227#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1224#L17-4 foo_#res#1 := foo_~i~0#1; 1179#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1180#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1219#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1200#L17-3 [2024-11-19 14:41:50,731 INFO L747 eck$LassoCheckResult]: Loop: 1200#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1216#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1212#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1206#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1205#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1203#L17-4 foo_#res#1 := foo_~i~0#1; 1202#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1201#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1199#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1200#L17-3 [2024-11-19 14:41:50,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:50,731 INFO L85 PathProgramCache]: Analyzing trace with hash 203385399, now seen corresponding path program 6 times [2024-11-19 14:41:50,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:50,731 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1860789707] [2024-11-19 14:41:50,731 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:41:50,731 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:50,767 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2024-11-19 14:41:50,769 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:50,885 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 10 proven. 38 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-19 14:41:50,885 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:50,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1860789707] [2024-11-19 14:41:50,885 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1860789707] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:50,885 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1147186268] [2024-11-19 14:41:50,885 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:41:50,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:50,886 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:50,887 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:50,889 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-19 14:41:50,975 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2024-11-19 14:41:50,975 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:50,976 INFO L255 TraceCheckSpWp]: Trace formula consists of 183 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:41:50,978 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:51,058 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-19 14:41:51,058 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:51,133 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 23 proven. 25 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-11-19 14:41:51,134 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1147186268] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:51,134 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:51,134 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2024-11-19 14:41:51,134 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111584305] [2024-11-19 14:41:51,134 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:51,135 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:41:51,135 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:51,135 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 3 times [2024-11-19 14:41:51,135 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:51,135 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269964712] [2024-11-19 14:41:51,136 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:41:51,136 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:51,145 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2024-11-19 14:41:51,145 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:51,146 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:51,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:51,156 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:51,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:51,478 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-19 14:41:51,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2024-11-19 14:41:51,478 INFO L87 Difference]: Start difference. First operand 68 states and 76 transitions. cyclomatic complexity: 11 Second operand has 13 states, 13 states have (on average 3.3076923076923075) internal successors, (43), 13 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:51,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:51,647 INFO L93 Difference]: Finished difference Result 74 states and 78 transitions. [2024-11-19 14:41:51,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 78 transitions. [2024-11-19 14:41:51,648 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 15 [2024-11-19 14:41:51,648 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 52 states and 54 transitions. [2024-11-19 14:41:51,649 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2024-11-19 14:41:51,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 52 [2024-11-19 14:41:51,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2024-11-19 14:41:51,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:41:51,649 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 54 transitions. [2024-11-19 14:41:51,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2024-11-19 14:41:51,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 45. [2024-11-19 14:41:51,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 45 states have (on average 1.0444444444444445) internal successors, (47), 44 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:51,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2024-11-19 14:41:51,652 INFO L240 hiAutomatonCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-19 14:41:51,654 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-19 14:41:51,655 INFO L425 stractBuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2024-11-19 14:41:51,655 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2024-11-19 14:41:51,655 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2024-11-19 14:41:51,655 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2024-11-19 14:41:51,656 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:51,656 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:51,656 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-19 14:41:51,656 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [3, 3, 1, 1, 1, 1, 1] [2024-11-19 14:41:51,657 INFO L745 eck$LassoCheckResult]: Stem: 1518#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1519#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1520#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1551#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1550#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1549#L17-4 foo_#res#1 := foo_~i~0#1; 1511#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1512#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1516#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1522#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1509#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1510#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1521#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1553#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1523#L17-4 foo_#res#1 := foo_~i~0#1; 1524#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1548#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1547#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1545#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1543#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1542#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1541#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1540#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1539#L17-4 foo_#res#1 := foo_~i~0#1; 1538#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1537#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1536#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1526#L17-3 [2024-11-19 14:41:51,657 INFO L747 eck$LassoCheckResult]: Loop: 1526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1535#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1534#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1533#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1532#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1531#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1530#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1529#L17-4 foo_#res#1 := foo_~i~0#1; 1528#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1527#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1525#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1526#L17-3 [2024-11-19 14:41:51,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:51,657 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 7 times [2024-11-19 14:41:51,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:51,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647445236] [2024-11-19 14:41:51,658 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-19 14:41:51,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:51,676 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:51,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:51,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:51,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:51,694 INFO L85 PathProgramCache]: Analyzing trace with hash -81249831, now seen corresponding path program 4 times [2024-11-19 14:41:51,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:51,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6095811] [2024-11-19 14:41:51,694 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:41:51,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:51,708 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:41:51,709 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:51,709 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:51,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:51,720 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:51,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:51,721 INFO L85 PathProgramCache]: Analyzing trace with hash -1101563419, now seen corresponding path program 8 times [2024-11-19 14:41:51,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:51,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730603] [2024-11-19 14:41:51,721 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:51,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:51,749 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:51,750 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:51,949 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 49 proven. 79 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-19 14:41:51,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:41:51,950 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730603] [2024-11-19 14:41:51,950 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730603] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:41:51,950 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [710675601] [2024-11-19 14:41:51,950 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:51,950 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:41:51,950 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:51,952 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:41:51,954 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2024-11-19 14:41:52,052 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:52,052 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:41:52,053 INFO L255 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-19 14:41:52,056 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:52,169 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-19 14:41:52,169 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:41:52,303 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 65 proven. 63 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2024-11-19 14:41:52,304 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [710675601] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:41:52,304 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:41:52,304 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 19 [2024-11-19 14:41:52,305 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [117620493] [2024-11-19 14:41:52,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:41:52,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:41:52,591 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-19 14:41:52,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=254, Unknown=0, NotChecked=0, Total=342 [2024-11-19 14:41:52,592 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 4 Second operand has 19 states, 19 states have (on average 3.1052631578947367) internal successors, (59), 19 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:52,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:41:52,879 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2024-11-19 14:41:52,879 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2024-11-19 14:41:52,879 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 17 [2024-11-19 14:41:52,881 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 57 states and 59 transitions. [2024-11-19 14:41:52,881 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 57 [2024-11-19 14:41:52,881 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 57 [2024-11-19 14:41:52,881 INFO L73 IsDeterministic]: Start isDeterministic. Operand 57 states and 59 transitions. [2024-11-19 14:41:52,882 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:41:52,882 INFO L218 hiAutomatonCegarLoop]: Abstraction has 57 states and 59 transitions. [2024-11-19 14:41:52,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states and 59 transitions. [2024-11-19 14:41:52,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 47. [2024-11-19 14:41:52,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 47 states, 47 states have (on average 1.0425531914893618) internal successors, (49), 46 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:52,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2024-11-19 14:41:52,884 INFO L240 hiAutomatonCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-19 14:41:52,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2024-11-19 14:41:52,887 INFO L425 stractBuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2024-11-19 14:41:52,887 INFO L332 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2024-11-19 14:41:52,887 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2024-11-19 14:41:52,887 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 16 [2024-11-19 14:41:52,887 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:52,887 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:52,888 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-19 14:41:52,888 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [4, 4, 1, 1, 1, 1, 1] [2024-11-19 14:41:52,888 INFO L745 eck$LassoCheckResult]: Stem: 1905#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1906#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 1907#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1909#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1939#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1937#L17-4 foo_#res#1 := foo_~i~0#1; 1936#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1902#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1903#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1895#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1896#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1940#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1938#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1910#L17-4 foo_#res#1 := foo_~i~0#1; 1897#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1898#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1935#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1933#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1928#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1927#L17-4 foo_#res#1 := foo_~i~0#1; 1926#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1925#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1924#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1912#L17-3 [2024-11-19 14:41:52,888 INFO L747 eck$LassoCheckResult]: Loop: 1912#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1923#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1922#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1921#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1920#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1919#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 1917#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 1916#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 1915#L17-4 foo_#res#1 := foo_~i~0#1; 1914#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 1913#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 1911#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 1912#L17-3 [2024-11-19 14:41:52,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:52,890 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 9 times [2024-11-19 14:41:52,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:52,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [77421802] [2024-11-19 14:41:52,891 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:41:52,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:52,932 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-19 14:41:52,933 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:52,933 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:52,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:52,951 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:52,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:52,952 INFO L85 PathProgramCache]: Analyzing trace with hash 879476375, now seen corresponding path program 5 times [2024-11-19 14:41:52,952 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:52,952 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1613688004] [2024-11-19 14:41:52,952 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:41:52,952 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:52,967 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2024-11-19 14:41:52,967 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:52,967 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:52,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:52,979 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:52,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:52,979 INFO L85 PathProgramCache]: Analyzing trace with hash -389338205, now seen corresponding path program 10 times [2024-11-19 14:41:52,979 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:52,979 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218333326] [2024-11-19 14:41:52,979 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:41:52,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:53,002 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:41:53,002 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:53,002 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:53,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:53,021 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:54,412 INFO L204 LassoAnalysis]: Preferences: [2024-11-19 14:41:54,413 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-19 14:41:54,413 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-19 14:41:54,413 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-19 14:41:54,413 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-19 14:41:54,413 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:54,413 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-19 14:41:54,413 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-19 14:41:54,413 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration10_Lasso [2024-11-19 14:41:54,413 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-19 14:41:54,413 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-19 14:41:54,415 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,422 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,425 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,427 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,429 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,431 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,432 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,434 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,437 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,438 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,440 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,442 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:54,444 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:55,136 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-19 14:41:55,136 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-19 14:41:55,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,136 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,141 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,144 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-19 14:41:55,145 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,157 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,157 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,158 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,158 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,158 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,159 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,159 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,161 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,175 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-19 14:41:55,176 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,176 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,178 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,180 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-19 14:41:55,182 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,194 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,194 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,195 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,195 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,195 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,196 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,196 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,201 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,218 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-19 14:41:55,219 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,219 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,221 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-19 14:41:55,223 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,236 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,236 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,237 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,237 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,237 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,237 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,237 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,240 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,254 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-19 14:41:55,255 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,255 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,257 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2024-11-19 14:41:55,259 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,271 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,271 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,272 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,272 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,272 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,272 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,272 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,273 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,290 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2024-11-19 14:41:55,290 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,290 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,292 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,293 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2024-11-19 14:41:55,294 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,307 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,307 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,307 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,307 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,307 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,308 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,308 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,310 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,324 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2024-11-19 14:41:55,325 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,325 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,326 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,332 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2024-11-19 14:41:55,332 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,344 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,344 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,344 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,344 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,344 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,345 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,345 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,347 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,361 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2024-11-19 14:41:55,362 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,362 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,363 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,366 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2024-11-19 14:41:55,368 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,380 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,380 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,380 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,380 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,380 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,381 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,381 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,383 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,398 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2024-11-19 14:41:55,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,398 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,407 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,408 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2024-11-19 14:41:55,409 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,422 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,422 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,422 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,422 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,422 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,423 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,423 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,424 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,435 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,435 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,436 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,438 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2024-11-19 14:41:55,438 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,448 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,448 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,448 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,448 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,448 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,449 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,449 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,450 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,461 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,461 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,463 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,465 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2024-11-19 14:41:55,466 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,477 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,477 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,477 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,477 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,477 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,477 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,477 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,479 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,493 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,494 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,494 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,495 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,497 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2024-11-19 14:41:55,498 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,510 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,510 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:55,510 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,510 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,510 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,510 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:55,511 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:55,514 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,529 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2024-11-19 14:41:55,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,531 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,532 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2024-11-19 14:41:55,533 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,545 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,546 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,546 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,546 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,549 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:55,549 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:55,554 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,569 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2024-11-19 14:41:55,569 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,569 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,571 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,572 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2024-11-19 14:41:55,573 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,585 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,585 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,585 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,587 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:55,587 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:55,592 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,605 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,605 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,607 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,607 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2024-11-19 14:41:55,608 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,619 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,619 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,619 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,619 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,622 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:55,622 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:55,627 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,638 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,639 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,639 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,640 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,641 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2024-11-19 14:41:55,642 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,651 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,652 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,652 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,652 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,653 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:55,653 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:55,658 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:55,669 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:55,669 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,669 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,670 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,671 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2024-11-19 14:41:55,672 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:55,682 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:55,682 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:55,682 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:55,682 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:55,694 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:55,694 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:55,718 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-19 14:41:55,757 INFO L443 ModelExtractionUtils]: Simplification made 18 calls to the SMT solver. [2024-11-19 14:41:55,757 INFO L444 ModelExtractionUtils]: 13 out of 31 variables were initially zero. Simplification set additionally 14 variables to zero. [2024-11-19 14:41:55,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:55,758 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:55,759 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:55,760 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2024-11-19 14:41:55,760 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-19 14:41:55,770 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-19 14:41:55,770 INFO L474 LassoAnalysis]: Proved termination. [2024-11-19 14:41:55,771 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_2, ULTIMATE.start_main_~i~1#1) = 1*v_rep(select #length ULTIMATE.start_main_~#b~0#1.base)_2 - 4*ULTIMATE.start_main_~i~1#1 Supporting invariants [1*ULTIMATE.start_main_~#b~0#1.offset >= 0] [2024-11-19 14:41:55,782 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2024-11-19 14:41:55,798 INFO L156 tatePredicateManager]: 6 out of 7 supporting invariants were superfluous and have been removed [2024-11-19 14:41:55,801 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-19 14:41:55,802 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-19 14:41:55,822 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:55,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:55,860 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-19 14:41:55,862 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:56,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:56,085 INFO L255 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 5 conjuncts are in the unsatisfiable core [2024-11-19 14:41:56,086 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:56,220 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-19 14:41:56,221 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 3 loop predicates [2024-11-19 14:41:56,221 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4 Second operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:56,263 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 47 states and 49 transitions. cyclomatic complexity: 4. Second operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 82 states and 86 transitions. Complement of second has 8 states. [2024-11-19 14:41:56,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-19 14:41:56,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 6 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:56,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 11 transitions. [2024-11-19 14:41:56,265 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 11 transitions. Stem has 30 letters. Loop has 13 letters. [2024-11-19 14:41:56,265 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:56,265 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 11 transitions. Stem has 43 letters. Loop has 13 letters. [2024-11-19 14:41:56,266 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:56,266 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 11 transitions. Stem has 30 letters. Loop has 26 letters. [2024-11-19 14:41:56,266 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:56,266 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 82 states and 86 transitions. [2024-11-19 14:41:56,267 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:41:56,267 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 82 states to 56 states and 60 transitions. [2024-11-19 14:41:56,267 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2024-11-19 14:41:56,267 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 17 [2024-11-19 14:41:56,267 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 60 transitions. [2024-11-19 14:41:56,267 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:56,268 INFO L218 hiAutomatonCegarLoop]: Abstraction has 56 states and 60 transitions. [2024-11-19 14:41:56,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 60 transitions. [2024-11-19 14:41:56,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 49. [2024-11-19 14:41:56,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.0816326530612246) internal successors, (53), 48 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:56,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 53 transitions. [2024-11-19 14:41:56,273 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 53 transitions. [2024-11-19 14:41:56,273 INFO L425 stractBuchiCegarLoop]: Abstraction has 49 states and 53 transitions. [2024-11-19 14:41:56,274 INFO L332 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2024-11-19 14:41:56,274 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 53 transitions. [2024-11-19 14:41:56,274 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:41:56,274 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:56,274 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:56,275 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 4, 3, 3, 3, 3, 1, 1] [2024-11-19 14:41:56,275 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:41:56,275 INFO L745 eck$LassoCheckResult]: Stem: 2224#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2225#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2227#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2228#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2260#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2258#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2231#L17-4 foo_#res#1 := foo_~i~0#1; 2212#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2213#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2229#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2230#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2216#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2217#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2226#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2259#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2257#L17-4 foo_#res#1 := foo_~i~0#1; 2256#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2221#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2222#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2255#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2254#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2253#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2252#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2251#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2250#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2249#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2248#L17-4 foo_#res#1 := foo_~i~0#1; 2247#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2246#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2245#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2215#L17-3 [2024-11-19 14:41:56,275 INFO L747 eck$LassoCheckResult]: Loop: 2215#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2214#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2215#L17-3 [2024-11-19 14:41:56,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:56,278 INFO L85 PathProgramCache]: Analyzing trace with hash -463974539, now seen corresponding path program 11 times [2024-11-19 14:41:56,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:56,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569432551] [2024-11-19 14:41:56,279 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:41:56,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:56,315 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2024-11-19 14:41:56,315 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:56,315 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:56,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:56,345 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:56,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:56,345 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 3 times [2024-11-19 14:41:56,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:56,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1258187861] [2024-11-19 14:41:56,345 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:41:56,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:56,348 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-11-19 14:41:56,348 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:56,349 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:56,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:56,351 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:56,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:56,351 INFO L85 PathProgramCache]: Analyzing trace with hash 797067383, now seen corresponding path program 12 times [2024-11-19 14:41:56,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:56,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540809315] [2024-11-19 14:41:56,351 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:41:56,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:56,425 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2024-11-19 14:41:56,426 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:56,426 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:56,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:56,448 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2024-11-19 14:41:56,455 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:57,461 INFO L204 LassoAnalysis]: Preferences: [2024-11-19 14:41:57,461 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-19 14:41:57,461 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-19 14:41:57,461 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-19 14:41:57,461 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-19 14:41:57,461 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,461 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-19 14:41:57,461 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-19 14:41:57,461 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration11_Lasso [2024-11-19 14:41:57,461 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-19 14:41:57,461 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-19 14:41:57,462 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,464 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,466 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,468 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,469 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,472 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,474 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,476 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,480 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,482 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,484 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,485 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,487 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,488 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,490 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:41:57,837 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-19 14:41:57,837 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-19 14:41:57,837 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,837 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,839 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,841 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2024-11-19 14:41:57,841 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,854 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,854 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,855 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,855 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,855 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,855 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,855 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,857 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:57,871 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2024-11-19 14:41:57,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,872 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,874 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,877 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2024-11-19 14:41:57,877 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,889 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,890 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,890 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,890 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,890 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,890 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,890 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,891 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:57,902 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:57,902 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,902 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,903 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,904 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2024-11-19 14:41:57,905 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,915 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,915 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,915 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,915 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,915 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,915 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,915 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,916 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:57,926 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:57,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,928 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,929 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2024-11-19 14:41:57,930 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,940 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,940 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,940 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,940 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,940 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,940 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,940 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,941 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:57,951 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2024-11-19 14:41:57,952 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,952 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,953 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,954 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2024-11-19 14:41:57,955 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,965 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,965 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,965 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,965 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,965 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,966 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,966 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,967 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:57,981 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:57,981 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:57,981 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:57,982 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:57,983 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2024-11-19 14:41:57,983 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:57,993 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:57,993 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:57,994 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:57,994 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:57,994 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:57,994 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:57,994 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:57,995 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,005 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Ended with exit code 0 [2024-11-19 14:41:58,006 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,006 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,007 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,008 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2024-11-19 14:41:58,009 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,019 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,019 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,019 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,019 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,019 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,020 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,020 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,021 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,031 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,031 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,031 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,033 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,033 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2024-11-19 14:41:58,034 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,044 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,044 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,044 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,044 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,045 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,045 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,045 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,046 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,056 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,057 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,058 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,059 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,060 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2024-11-19 14:41:58,069 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,069 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,069 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,069 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,070 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,070 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,072 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,083 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,083 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,085 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,086 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2024-11-19 14:41:58,087 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,097 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,098 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,098 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,098 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,099 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,100 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,103 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,117 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,117 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,117 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,119 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,120 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2024-11-19 14:41:58,121 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,133 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,133 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,133 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,133 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,133 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,134 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,134 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,135 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,145 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,146 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,146 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,147 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,147 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Waiting until timeout for monitored process [2024-11-19 14:41:58,148 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,158 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,158 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,158 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,158 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,158 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,158 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,159 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,160 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,170 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (39)] Ended with exit code 0 [2024-11-19 14:41:58,170 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,170 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,172 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,174 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Waiting until timeout for monitored process [2024-11-19 14:41:58,175 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,185 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,185 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,185 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,185 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,185 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,185 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,185 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,186 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,196 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (40)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,197 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,197 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,198 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,199 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Waiting until timeout for monitored process [2024-11-19 14:41:58,199 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,209 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,209 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,209 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,209 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,210 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,210 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,213 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,222 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (41)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,223 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,223 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,224 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,225 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Waiting until timeout for monitored process [2024-11-19 14:41:58,226 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,235 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,236 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,236 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,236 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,237 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,237 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,239 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,249 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (42)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,249 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,250 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,251 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,251 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Waiting until timeout for monitored process [2024-11-19 14:41:58,252 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,262 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,262 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:41:58,262 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,262 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,262 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,263 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:41:58,263 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:41:58,264 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,274 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (43)] Ended with exit code 0 [2024-11-19 14:41:58,274 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,274 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,275 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,276 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Waiting until timeout for monitored process [2024-11-19 14:41:58,277 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,287 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,287 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,287 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,287 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,289 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,289 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,296 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,310 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (44)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,310 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,310 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,311 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,312 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Waiting until timeout for monitored process [2024-11-19 14:41:58,312 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,323 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,323 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,323 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,323 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,325 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,325 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,327 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,337 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (45)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,338 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,339 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,339 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Waiting until timeout for monitored process [2024-11-19 14:41:58,341 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,351 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,351 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,351 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,351 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,353 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,353 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,356 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:41:58,366 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (46)] Forceful destruction successful, exit code 0 [2024-11-19 14:41:58,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,367 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,368 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,368 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Waiting until timeout for monitored process [2024-11-19 14:41:58,369 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:41:58,379 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:41:58,379 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:41:58,379 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:41:58,380 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:41:58,384 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:41:58,384 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:41:58,391 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-19 14:41:58,414 INFO L443 ModelExtractionUtils]: Simplification made 17 calls to the SMT solver. [2024-11-19 14:41:58,414 INFO L444 ModelExtractionUtils]: 5 out of 19 variables were initially zero. Simplification set additionally 9 variables to zero. [2024-11-19 14:41:58,414 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:41:58,415 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:41:58,416 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:41:58,416 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Waiting until timeout for monitored process [2024-11-19 14:41:58,417 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-19 14:41:58,427 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-19 14:41:58,428 INFO L474 LassoAnalysis]: Proved termination. [2024-11-19 14:41:58,428 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_3, ULTIMATE.start_foo_~i~0#1) = 1*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_3 - 1*ULTIMATE.start_foo_~i~0#1 Supporting invariants [1*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_3 - 2*ULTIMATE.start_foo_~size#1 >= 0] [2024-11-19 14:41:58,438 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (47)] Ended with exit code 0 [2024-11-19 14:41:58,458 INFO L156 tatePredicateManager]: 6 out of 8 supporting invariants were superfluous and have been removed [2024-11-19 14:41:58,462 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-19 14:41:58,463 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-19 14:41:58,484 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:58,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:58,525 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-19 14:41:58,526 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:58,539 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-19 14:41:58,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:58,729 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:41:58,729 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:58,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:58,753 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.5 stem predicates 2 loop predicates [2024-11-19 14:41:58,753 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:58,789 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7. Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 50 states and 54 transitions. Complement of second has 6 states. [2024-11-19 14:41:58,789 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 2 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-19 14:41:58,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:58,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 5 transitions. [2024-11-19 14:41:58,790 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 5 transitions. Stem has 30 letters. Loop has 2 letters. [2024-11-19 14:41:58,790 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:58,790 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:41:58,806 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:58,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:58,852 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-19 14:41:58,853 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:58,870 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-19 14:41:59,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:59,060 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:41:59,061 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:59,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:59,082 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.5 stem predicates 2 loop predicates [2024-11-19 14:41:59,082 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:59,124 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7. Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 50 states and 54 transitions. Complement of second has 6 states. [2024-11-19 14:41:59,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 2 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-19 14:41:59,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:59,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 5 transitions. [2024-11-19 14:41:59,125 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 5 transitions. Stem has 30 letters. Loop has 2 letters. [2024-11-19 14:41:59,126 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:59,126 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:41:59,147 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:59,182 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (48)] Ended with exit code 0 [2024-11-19 14:41:59,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:59,215 INFO L255 TraceCheckSpWp]: Trace formula consists of 194 conjuncts, 14 conjuncts are in the unsatisfiable core [2024-11-19 14:41:59,216 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:59,228 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2024-11-19 14:41:59,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:41:59,414 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:41:59,415 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:41:59,442 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:41:59,443 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.5 stem predicates 2 loop predicates [2024-11-19 14:41:59,443 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7 Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:59,549 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 53 transitions. cyclomatic complexity: 7. Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 77 states and 84 transitions. Complement of second has 18 states. [2024-11-19 14:41:59,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 8 states 5 stem states 1 non-accepting loop states 2 accepting loop states [2024-11-19 14:41:59,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:59,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 49 transitions. [2024-11-19 14:41:59,550 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 49 transitions. Stem has 30 letters. Loop has 2 letters. [2024-11-19 14:41:59,551 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:59,551 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 49 transitions. Stem has 32 letters. Loop has 2 letters. [2024-11-19 14:41:59,551 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:59,551 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 8 states and 49 transitions. Stem has 30 letters. Loop has 4 letters. [2024-11-19 14:41:59,551 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:41:59,551 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 84 transitions. [2024-11-19 14:41:59,552 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:41:59,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 63 states and 67 transitions. [2024-11-19 14:41:59,552 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2024-11-19 14:41:59,553 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-19 14:41:59,553 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 67 transitions. [2024-11-19 14:41:59,553 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:41:59,553 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 67 transitions. [2024-11-19 14:41:59,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 67 transitions. [2024-11-19 14:41:59,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 49. [2024-11-19 14:41:59,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 49 states have (on average 1.0612244897959184) internal successors, (52), 48 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:41:59,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2024-11-19 14:41:59,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 49 states and 52 transitions. [2024-11-19 14:41:59,555 INFO L425 stractBuchiCegarLoop]: Abstraction has 49 states and 52 transitions. [2024-11-19 14:41:59,555 INFO L332 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2024-11-19 14:41:59,555 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 52 transitions. [2024-11-19 14:41:59,556 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:41:59,556 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:41:59,556 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:41:59,557 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 5, 4, 4, 4, 4, 1, 1] [2024-11-19 14:41:59,557 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:41:59,557 INFO L745 eck$LassoCheckResult]: Stem: 2844#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2845#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 2849#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2846#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2847#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2880#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2851#L17-4 foo_#res#1 := foo_~i~0#1; 2852#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2877#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2850#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2848#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2835#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2836#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2881#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2879#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2878#L17-4 foo_#res#1 := foo_~i~0#1; 2837#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2838#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2842#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2876#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2875#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2874#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2873#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2872#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2871#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2870#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2869#L17-4 foo_#res#1 := foo_~i~0#1; 2868#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2867#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2866#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2854#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2865#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2864#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2863#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2862#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2861#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2860#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2859#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2858#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 2857#L17-4 foo_#res#1 := foo_~i~0#1; 2856#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 2855#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 2853#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 2834#L17-3 [2024-11-19 14:41:59,558 INFO L747 eck$LassoCheckResult]: Loop: 2834#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 2833#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 2834#L17-3 [2024-11-19 14:41:59,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:59,559 INFO L85 PathProgramCache]: Analyzing trace with hash -389338205, now seen corresponding path program 13 times [2024-11-19 14:41:59,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:59,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142781431] [2024-11-19 14:41:59,559 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-19 14:41:59,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:59,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:59,584 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:59,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:59,605 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:59,605 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:59,605 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 4 times [2024-11-19 14:41:59,606 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:59,606 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126693354] [2024-11-19 14:41:59,606 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:41:59,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:59,609 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:41:59,609 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:59,609 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:59,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:59,614 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:41:59,614 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:41:59,614 INFO L85 PathProgramCache]: Analyzing trace with hash -491859675, now seen corresponding path program 14 times [2024-11-19 14:41:59,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:41:59,614 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550595764] [2024-11-19 14:41:59,614 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:41:59,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:41:59,646 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:41:59,646 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:41:59,647 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:41:59,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:41:59,684 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:02,126 INFO L204 LassoAnalysis]: Preferences: [2024-11-19 14:42:02,126 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-19 14:42:02,126 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-19 14:42:02,126 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-19 14:42:02,127 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-19 14:42:02,127 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,127 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-19 14:42:02,127 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-19 14:42:02,127 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration12_Lasso [2024-11-19 14:42:02,127 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-19 14:42:02,127 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-19 14:42:02,128 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,132 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,134 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,136 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,269 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,270 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,272 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,274 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,276 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,278 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,279 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,281 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,283 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,284 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,286 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:02,487 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-19 14:42:02,487 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-19 14:42:02,487 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,487 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,489 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,491 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Waiting until timeout for monitored process [2024-11-19 14:42:02,492 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,501 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,501 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:02,502 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,502 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,502 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,502 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:02,502 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:02,503 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,513 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (49)] Ended with exit code 0 [2024-11-19 14:42:02,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,514 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,515 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,516 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Waiting until timeout for monitored process [2024-11-19 14:42:02,516 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,526 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,526 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:02,526 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,526 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,526 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,526 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:02,526 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:02,527 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,538 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (50)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,538 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,538 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,539 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,540 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Waiting until timeout for monitored process [2024-11-19 14:42:02,540 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,551 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,551 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:02,551 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,551 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,551 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,551 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:02,551 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:02,552 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,562 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (51)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,563 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,563 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,564 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,564 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Waiting until timeout for monitored process [2024-11-19 14:42:02,565 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,575 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,575 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,575 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,575 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,576 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,576 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,578 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,588 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (52)] Ended with exit code 0 [2024-11-19 14:42:02,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,589 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,590 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,590 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Waiting until timeout for monitored process [2024-11-19 14:42:02,591 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,601 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,601 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,601 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,601 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,602 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,602 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,604 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,614 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (53)] Ended with exit code 0 [2024-11-19 14:42:02,614 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,615 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,616 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Waiting until timeout for monitored process [2024-11-19 14:42:02,617 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,627 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,628 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,628 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,628 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,629 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,629 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,631 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,642 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (54)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,642 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,642 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,643 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,644 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Waiting until timeout for monitored process [2024-11-19 14:42:02,645 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,655 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,655 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,655 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,655 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,657 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,657 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,661 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,671 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (55)] Ended with exit code 0 [2024-11-19 14:42:02,672 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,672 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,673 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,674 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Waiting until timeout for monitored process [2024-11-19 14:42:02,676 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,686 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,686 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,686 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,686 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,688 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,688 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,692 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,702 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (56)] Ended with exit code 0 [2024-11-19 14:42:02,702 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,702 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,703 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,704 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Waiting until timeout for monitored process [2024-11-19 14:42:02,705 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,714 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,715 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:02,715 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,715 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,715 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,715 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:02,715 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:02,716 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,726 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (57)] Ended with exit code 0 [2024-11-19 14:42:02,727 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,727 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,728 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,729 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Waiting until timeout for monitored process [2024-11-19 14:42:02,729 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,739 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,739 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,739 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,739 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,740 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,740 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,743 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,753 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (58)] Ended with exit code 0 [2024-11-19 14:42:02,754 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,754 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,755 INFO L229 MonitoredProcess]: Starting monitored process 59 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,755 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Waiting until timeout for monitored process [2024-11-19 14:42:02,756 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,766 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,766 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:02,766 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,766 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,766 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,766 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:02,766 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:02,768 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,782 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (59)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,783 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,784 INFO L229 MonitoredProcess]: Starting monitored process 60 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,785 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Waiting until timeout for monitored process [2024-11-19 14:42:02,786 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,799 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,799 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,799 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,799 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,801 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,801 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,804 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,818 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (60)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,819 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,819 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,820 INFO L229 MonitoredProcess]: Starting monitored process 61 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Waiting until timeout for monitored process [2024-11-19 14:42:02,822 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,835 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,835 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,835 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,835 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,836 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,837 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,840 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:02,854 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (61)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,855 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,856 INFO L229 MonitoredProcess]: Starting monitored process 62 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,857 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Waiting until timeout for monitored process [2024-11-19 14:42:02,858 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:02,871 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:02,872 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:02,872 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:02,872 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:02,876 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:02,876 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:02,886 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-19 14:42:02,900 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2024-11-19 14:42:02,900 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 11 variables to zero. [2024-11-19 14:42:02,900 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:02,900 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:02,901 INFO L229 MonitoredProcess]: Starting monitored process 63 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:02,902 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Waiting until timeout for monitored process [2024-11-19 14:42:02,902 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-19 14:42:02,913 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-19 14:42:02,913 INFO L474 LassoAnalysis]: Proved termination. [2024-11-19 14:42:02,913 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_foo_~i~0#1, v_rep(select #length ULTIMATE.start_foo_~b#1.base)_4) = -1*ULTIMATE.start_foo_~i~0#1 + 1*v_rep(select #length ULTIMATE.start_foo_~b#1.base)_4 Supporting invariants [-2*ULTIMATE.start_foo_~size#1 + 1*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_4 >= 0] [2024-11-19 14:42:02,924 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (62)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:02,937 INFO L156 tatePredicateManager]: 6 out of 8 supporting invariants were superfluous and have been removed [2024-11-19 14:42:02,941 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-19 14:42:02,941 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-19 14:42:02,958 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:03,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:03,015 INFO L255 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-19 14:42:03,019 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:03,029 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2024-11-19 14:42:03,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:03,256 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:03,257 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:03,277 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:03,278 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-19 14:42:03,278 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:03,312 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 50 states and 53 transitions. Complement of second has 6 states. [2024-11-19 14:42:03,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 2 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-19 14:42:03,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:03,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 5 transitions. [2024-11-19 14:42:03,313 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 5 transitions. Stem has 43 letters. Loop has 2 letters. [2024-11-19 14:42:03,314 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:03,314 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:42:03,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:03,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:03,374 INFO L255 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-19 14:42:03,375 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:03,387 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2024-11-19 14:42:03,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:03,620 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:03,621 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:03,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:03,651 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-19 14:42:03,652 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:03,699 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 50 states and 53 transitions. Complement of second has 6 states. [2024-11-19 14:42:03,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 2 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-19 14:42:03,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:03,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 5 transitions. [2024-11-19 14:42:03,700 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 5 transitions. Stem has 43 letters. Loop has 2 letters. [2024-11-19 14:42:03,700 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:03,700 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:42:03,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:03,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:03,770 INFO L255 TraceCheckSpWp]: Trace formula consists of 266 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-19 14:42:03,771 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:03,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2024-11-19 14:42:03,879 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (63)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:04,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:04,037 WARN L253 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:04,037 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:04,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:04,059 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.6 stem predicates 2 loop predicates [2024-11-19 14:42:04,059 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6 Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:04,176 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 49 states and 52 transitions. cyclomatic complexity: 6. Second operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 94 states and 104 transitions. Complement of second has 22 states. [2024-11-19 14:42:04,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 6 stem states 1 non-accepting loop states 2 accepting loop states [2024-11-19 14:42:04,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8 states, 8 states have (on average 4.125) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:04,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 58 transitions. [2024-11-19 14:42:04,177 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 58 transitions. Stem has 43 letters. Loop has 2 letters. [2024-11-19 14:42:04,177 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:04,177 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 58 transitions. Stem has 45 letters. Loop has 2 letters. [2024-11-19 14:42:04,178 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:04,178 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 58 transitions. Stem has 43 letters. Loop has 4 letters. [2024-11-19 14:42:04,178 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:04,178 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 104 transitions. [2024-11-19 14:42:04,179 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:42:04,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 76 states and 82 transitions. [2024-11-19 14:42:04,180 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2024-11-19 14:42:04,180 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-19 14:42:04,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 82 transitions. [2024-11-19 14:42:04,180 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:42:04,180 INFO L218 hiAutomatonCegarLoop]: Abstraction has 76 states and 82 transitions. [2024-11-19 14:42:04,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 82 transitions. [2024-11-19 14:42:04,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 62. [2024-11-19 14:42:04,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 62 states, 62 states have (on average 1.0806451612903225) internal successors, (67), 61 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:04,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 67 transitions. [2024-11-19 14:42:04,183 INFO L240 hiAutomatonCegarLoop]: Abstraction has 62 states and 67 transitions. [2024-11-19 14:42:04,183 INFO L425 stractBuchiCegarLoop]: Abstraction has 62 states and 67 transitions. [2024-11-19 14:42:04,183 INFO L332 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2024-11-19 14:42:04,183 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 62 states and 67 transitions. [2024-11-19 14:42:04,183 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:42:04,184 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:04,184 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:04,184 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 4, 4, 4, 4, 4, 1, 1, 1, 1] [2024-11-19 14:42:04,184 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:04,185 INFO L745 eck$LassoCheckResult]: Stem: 3608#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 3609#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 3613#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3610#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3611#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3649#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3647#L17-4 foo_#res#1 := foo_~i~0#1; 3645#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3605#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3606#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3614#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3652#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3651#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3650#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3648#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3646#L17-4 foo_#res#1 := foo_~i~0#1; 3644#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3643#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3642#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3641#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3640#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3639#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3638#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3637#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3636#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3635#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3634#L17-4 foo_#res#1 := foo_~i~0#1; 3633#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3632#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3631#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 3630#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3629#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3628#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3627#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3626#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3625#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3624#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 3623#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 3622#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 3621#L17-4 foo_#res#1 := foo_~i~0#1; 3620#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 3619#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 3616#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 3607#L26-4 main_~i~1#1 := 0; 3602#L29-3 [2024-11-19 14:42:04,185 INFO L747 eck$LassoCheckResult]: Loop: 3602#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 3603#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 3604#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 3602#L29-3 [2024-11-19 14:42:04,185 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:04,185 INFO L85 PathProgramCache]: Analyzing trace with hash 815417503, now seen corresponding path program 2 times [2024-11-19 14:42:04,186 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:04,186 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742666015] [2024-11-19 14:42:04,186 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:04,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:04,207 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:42:04,207 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:04,329 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:04,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:04,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742666015] [2024-11-19 14:42:04,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742666015] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:04,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1022399364] [2024-11-19 14:42:04,330 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:04,331 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:04,331 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:04,349 INFO L229 MonitoredProcess]: Starting monitored process 64 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:04,351 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2024-11-19 14:42:04,465 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:42:04,465 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:04,469 INFO L255 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-19 14:42:04,470 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:04,528 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:04,528 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:04,652 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 134 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:04,653 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1022399364] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:04,653 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:04,653 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-19 14:42:04,653 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441067723] [2024-11-19 14:42:04,653 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:04,654 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:04,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:04,654 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 2 times [2024-11-19 14:42:04,654 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:04,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416258452] [2024-11-19 14:42:04,655 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:04,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:04,658 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:42:04,659 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:04,659 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:04,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:04,664 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:04,702 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:04,703 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-19 14:42:04,703 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=98, Unknown=0, NotChecked=0, Total=156 [2024-11-19 14:42:04,703 INFO L87 Difference]: Start difference. First operand 62 states and 67 transitions. cyclomatic complexity: 9 Second operand has 13 states, 13 states have (on average 4.923076923076923) internal successors, (64), 13 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:05,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:05,027 INFO L93 Difference]: Finished difference Result 163 states and 177 transitions. [2024-11-19 14:42:05,027 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 177 transitions. [2024-11-19 14:42:05,028 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 13 [2024-11-19 14:42:05,030 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 163 states and 177 transitions. [2024-11-19 14:42:05,030 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2024-11-19 14:42:05,030 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2024-11-19 14:42:05,031 INFO L73 IsDeterministic]: Start isDeterministic. Operand 163 states and 177 transitions. [2024-11-19 14:42:05,031 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:42:05,033 INFO L218 hiAutomatonCegarLoop]: Abstraction has 163 states and 177 transitions. [2024-11-19 14:42:05,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states and 177 transitions. [2024-11-19 14:42:05,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 127. [2024-11-19 14:42:05,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.110236220472441) internal successors, (141), 126 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:05,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 141 transitions. [2024-11-19 14:42:05,041 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 141 transitions. [2024-11-19 14:42:05,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-19 14:42:05,042 INFO L425 stractBuchiCegarLoop]: Abstraction has 127 states and 141 transitions. [2024-11-19 14:42:05,042 INFO L332 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2024-11-19 14:42:05,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 141 transitions. [2024-11-19 14:42:05,045 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:42:05,045 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:05,045 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:05,046 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 6, 5, 5, 5, 5, 1, 1] [2024-11-19 14:42:05,047 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:42:05,047 INFO L745 eck$LassoCheckResult]: Stem: 4115#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4116#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4117#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4118#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4105#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4106#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4122#L17-4 foo_#res#1 := foo_~i~0#1; 4107#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4108#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4121#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4119#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4120#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4229#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4228#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4227#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4226#L17-4 foo_#res#1 := foo_~i~0#1; 4225#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4112#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4113#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4223#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4221#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4219#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4218#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4217#L17-4 foo_#res#1 := foo_~i~0#1; 4216#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4215#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4214#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4213#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4212#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4211#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4210#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4209#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4208#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4206#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4205#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4204#L17-4 foo_#res#1 := foo_~i~0#1; 4203#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4202#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4201#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4200#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4199#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4198#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4197#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4196#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4195#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4194#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4193#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4192#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4191#L17-4 foo_#res#1 := foo_~i~0#1; 4190#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4189#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4188#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4104#L17-3 [2024-11-19 14:42:05,047 INFO L747 eck$LassoCheckResult]: Loop: 4104#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4103#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4104#L17-3 [2024-11-19 14:42:05,047 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:05,047 INFO L85 PathProgramCache]: Analyzing trace with hash 1555565109, now seen corresponding path program 15 times [2024-11-19 14:42:05,048 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:05,048 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755217640] [2024-11-19 14:42:05,048 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:05,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:05,079 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-19 14:42:05,079 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:05,315 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 105 proven. 172 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:05,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:05,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755217640] [2024-11-19 14:42:05,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1755217640] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:05,316 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [574097581] [2024-11-19 14:42:05,316 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:05,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:05,316 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:05,318 INFO L229 MonitoredProcess]: Starting monitored process 65 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:05,319 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2024-11-19 14:42:05,454 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-19 14:42:05,454 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:05,455 INFO L255 TraceCheckSpWp]: Trace formula consists of 272 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-19 14:42:05,456 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:05,580 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 151 proven. 126 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:05,580 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:05,679 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 151 proven. 126 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2024-11-19 14:42:05,679 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [574097581] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:05,679 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:05,679 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 19 [2024-11-19 14:42:05,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1664193951] [2024-11-19 14:42:05,679 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:05,679 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:05,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:05,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 5 times [2024-11-19 14:42:05,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:05,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205492171] [2024-11-19 14:42:05,680 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:05,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:05,683 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:42:05,683 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:05,683 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:05,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:05,686 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:05,731 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:05,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2024-11-19 14:42:05,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2024-11-19 14:42:05,732 INFO L87 Difference]: Start difference. First operand 127 states and 141 transitions. cyclomatic complexity: 23 Second operand has 19 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 19 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:05,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:05,997 INFO L93 Difference]: Finished difference Result 167 states and 181 transitions. [2024-11-19 14:42:05,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167 states and 181 transitions. [2024-11-19 14:42:05,998 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:42:05,999 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167 states to 167 states and 181 transitions. [2024-11-19 14:42:05,999 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-19 14:42:05,999 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-19 14:42:05,999 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167 states and 181 transitions. [2024-11-19 14:42:05,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2024-11-19 14:42:05,999 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167 states and 181 transitions. [2024-11-19 14:42:05,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states and 181 transitions. [2024-11-19 14:42:06,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 139. [2024-11-19 14:42:06,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 139 states, 139 states have (on average 1.1007194244604317) internal successors, (153), 138 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:06,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 153 transitions. [2024-11-19 14:42:06,004 INFO L240 hiAutomatonCegarLoop]: Abstraction has 139 states and 153 transitions. [2024-11-19 14:42:06,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-19 14:42:06,008 INFO L425 stractBuchiCegarLoop]: Abstraction has 139 states and 153 transitions. [2024-11-19 14:42:06,008 INFO L332 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2024-11-19 14:42:06,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 139 states and 153 transitions. [2024-11-19 14:42:06,008 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2024-11-19 14:42:06,008 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:06,009 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:06,009 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [15, 15, 6, 5, 5, 5, 5, 1, 1] [2024-11-19 14:42:06,009 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-19 14:42:06,009 INFO L745 eck$LassoCheckResult]: Stem: 4792#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 4793#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 4795#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4796#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4783#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4784#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4794#L17-4 foo_#res#1 := foo_~i~0#1; 4785#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4786#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4790#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4797#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4919#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4918#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4917#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4916#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4915#L17-4 foo_#res#1 := foo_~i~0#1; 4914#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4913#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4912#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4906#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4905#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4904#L17-4 foo_#res#1 := foo_~i~0#1; 4903#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4902#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4901#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4900#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4899#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4898#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4897#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4896#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4895#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4894#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4893#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4892#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4891#L17-4 foo_#res#1 := foo_~i~0#1; 4890#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4889#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4888#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4886#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4882#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4880#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4878#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4877#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 4876#L17-4 foo_#res#1 := foo_~i~0#1; 4875#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 4874#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 4873#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 4782#L17-3 [2024-11-19 14:42:06,012 INFO L747 eck$LassoCheckResult]: Loop: 4782#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 4781#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 4782#L17-3 [2024-11-19 14:42:06,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:06,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1900603379, now seen corresponding path program 16 times [2024-11-19 14:42:06,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:06,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [41344566] [2024-11-19 14:42:06,013 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:06,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:06,050 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:06,051 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:06,051 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:06,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:06,079 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:06,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:06,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1539, now seen corresponding path program 6 times [2024-11-19 14:42:06,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:06,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1675506005] [2024-11-19 14:42:06,080 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:42:06,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:06,084 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2024-11-19 14:42:06,084 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:06,084 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:06,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:06,086 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:06,087 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:06,087 INFO L85 PathProgramCache]: Analyzing trace with hash 1118746997, now seen corresponding path program 17 times [2024-11-19 14:42:06,087 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:06,087 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85862825] [2024-11-19 14:42:06,087 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:06,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:06,169 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2024-11-19 14:42:06,169 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:06,169 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:06,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:06,201 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:10,743 INFO L204 LassoAnalysis]: Preferences: [2024-11-19 14:42:10,743 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-19 14:42:10,743 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-19 14:42:10,743 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-19 14:42:10,743 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-19 14:42:10,743 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:10,743 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-19 14:42:10,743 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-19 14:42:10,743 INFO L132 ssoRankerPreferences]: Filename of dumped script: ArraysWithLenghtAtDeclaration.c_Iteration15_Lasso [2024-11-19 14:42:10,743 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-19 14:42:10,743 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-19 14:42:10,745 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,749 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,751 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,884 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,886 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,888 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,890 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,892 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,894 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,896 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,898 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,899 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,901 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,902 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:10,904 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-19 14:42:11,119 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-19 14:42:11,119 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-19 14:42:11,119 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,119 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,121 INFO L229 MonitoredProcess]: Starting monitored process 66 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,123 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Waiting until timeout for monitored process [2024-11-19 14:42:11,124 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,135 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,135 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:11,135 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,135 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,135 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,136 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:11,136 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:11,137 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,147 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (66)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:11,147 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,147 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,148 INFO L229 MonitoredProcess]: Starting monitored process 67 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,149 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Waiting until timeout for monitored process [2024-11-19 14:42:11,149 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,162 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,162 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-19 14:42:11,162 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,162 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,162 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,162 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-19 14:42:11,163 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-19 14:42:11,164 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,175 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (67)] Ended with exit code 0 [2024-11-19 14:42:11,175 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,175 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,176 INFO L229 MonitoredProcess]: Starting monitored process 68 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,177 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Waiting until timeout for monitored process [2024-11-19 14:42:11,178 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,187 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,188 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,188 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,188 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,189 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:11,189 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:11,191 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,201 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (68)] Ended with exit code 0 [2024-11-19 14:42:11,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,202 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,203 INFO L229 MonitoredProcess]: Starting monitored process 69 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,203 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Waiting until timeout for monitored process [2024-11-19 14:42:11,204 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,214 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,214 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,214 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,214 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,216 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:11,216 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:11,220 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,230 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (69)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:11,230 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,230 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,231 INFO L229 MonitoredProcess]: Starting monitored process 70 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,232 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Waiting until timeout for monitored process [2024-11-19 14:42:11,233 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,242 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,243 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,243 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,243 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,244 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:11,244 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:11,246 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,256 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (70)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:11,256 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,257 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,258 INFO L229 MonitoredProcess]: Starting monitored process 71 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Waiting until timeout for monitored process [2024-11-19 14:42:11,259 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,268 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,269 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,269 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,269 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,270 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:11,270 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:11,272 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-19 14:42:11,282 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (71)] Ended with exit code 0 [2024-11-19 14:42:11,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,283 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,284 INFO L229 MonitoredProcess]: Starting monitored process 72 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,285 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Waiting until timeout for monitored process [2024-11-19 14:42:11,285 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-19 14:42:11,295 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-19 14:42:11,295 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-19 14:42:11,296 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-19 14:42:11,296 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-19 14:42:11,300 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-19 14:42:11,300 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-19 14:42:11,307 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-19 14:42:11,330 INFO L443 ModelExtractionUtils]: Simplification made 14 calls to the SMT solver. [2024-11-19 14:42:11,330 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 15 variables to zero. [2024-11-19 14:42:11,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-19 14:42:11,330 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:11,332 INFO L229 MonitoredProcess]: Starting monitored process 73 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-19 14:42:11,333 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Waiting until timeout for monitored process [2024-11-19 14:42:11,334 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-19 14:42:11,345 INFO L438 nArgumentSynthesizer]: Removed 1 redundant supporting invariants from a total of 2. [2024-11-19 14:42:11,345 INFO L474 LassoAnalysis]: Proved termination. [2024-11-19 14:42:11,345 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_5, ULTIMATE.start_foo_~i~0#1) = 1*v_rep(select #length ULTIMATE.start_main_~#mask~0#1.base)_5 - 1*ULTIMATE.start_foo_~i~0#1 Supporting invariants [1*ULTIMATE.start_foo_~b#1.offset >= 0] [2024-11-19 14:42:11,356 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (72)] Ended with exit code 0 [2024-11-19 14:42:11,371 INFO L156 tatePredicateManager]: 6 out of 8 supporting invariants were superfluous and have been removed [2024-11-19 14:42:11,396 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-19 14:42:11,396 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-19 14:42:11,409 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (73)] Forceful destruction successful, exit code 0 [2024-11-19 14:42:11,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:11,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:11,476 INFO L255 TraceCheckSpWp]: Trace formula consists of 349 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:11,477 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:11,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:11,615 INFO L255 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-19 14:42:11,615 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:11,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:11,632 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2024-11-19 14:42:11,632 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:11,665 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 141 states and 155 transitions. Complement of second has 8 states. [2024-11-19 14:42:11,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-19 14:42:11,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:11,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6 transitions. [2024-11-19 14:42:11,666 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 6 transitions. Stem has 58 letters. Loop has 2 letters. [2024-11-19 14:42:11,666 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:11,666 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:42:11,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:11,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:11,741 INFO L255 TraceCheckSpWp]: Trace formula consists of 349 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:11,742 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:11,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:11,892 INFO L255 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-19 14:42:11,892 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:11,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:11,909 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.2 stem predicates 2 loop predicates [2024-11-19 14:42:11,909 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:11,936 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 141 states and 155 transitions. Complement of second has 8 states. [2024-11-19 14:42:11,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-19 14:42:11,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:11,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 6 transitions. [2024-11-19 14:42:11,938 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 6 transitions. Stem has 58 letters. Loop has 2 letters. [2024-11-19 14:42:11,938 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:11,938 INFO L682 stractBuchiCegarLoop]: Bad chosen interpolant automaton: word not accepted [2024-11-19 14:42:11,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:12,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:12,026 INFO L255 TraceCheckSpWp]: Trace formula consists of 349 conjuncts, 9 conjuncts are in the unsatisfiable core [2024-11-19 14:42:12,027 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:12,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:12,201 INFO L255 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 7 conjuncts are in the unsatisfiable core [2024-11-19 14:42:12,201 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:12,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-19 14:42:12,224 INFO L141 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2024-11-19 14:42:12,224 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23 Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:12,263 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 139 states and 153 transitions. cyclomatic complexity: 23. Second operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 191 states and 213 transitions. Complement of second has 7 states. [2024-11-19 14:42:12,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2024-11-19 14:42:12,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4 states, 4 states have (on average 3.0) internal successors, (12), 4 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:12,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 18 transitions. [2024-11-19 14:42:12,269 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 58 letters. Loop has 2 letters. [2024-11-19 14:42:12,269 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:12,269 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 60 letters. Loop has 2 letters. [2024-11-19 14:42:12,270 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:12,270 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 18 transitions. Stem has 58 letters. Loop has 4 letters. [2024-11-19 14:42:12,270 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-19 14:42:12,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 191 states and 213 transitions. [2024-11-19 14:42:12,274 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:12,279 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 191 states to 137 states and 145 transitions. [2024-11-19 14:42:12,279 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-19 14:42:12,279 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-19 14:42:12,279 INFO L73 IsDeterministic]: Start isDeterministic. Operand 137 states and 145 transitions. [2024-11-19 14:42:12,280 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:12,280 INFO L218 hiAutomatonCegarLoop]: Abstraction has 137 states and 145 transitions. [2024-11-19 14:42:12,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states and 145 transitions. [2024-11-19 14:42:12,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2024-11-19 14:42:12,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 137 states have (on average 1.0583941605839415) internal successors, (145), 136 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:12,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2024-11-19 14:42:12,289 INFO L240 hiAutomatonCegarLoop]: Abstraction has 137 states and 145 transitions. [2024-11-19 14:42:12,289 INFO L425 stractBuchiCegarLoop]: Abstraction has 137 states and 145 transitions. [2024-11-19 14:42:12,289 INFO L332 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2024-11-19 14:42:12,289 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 137 states and 145 transitions. [2024-11-19 14:42:12,290 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:12,290 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:12,290 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:12,291 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [40, 40, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-19 14:42:12,291 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:12,291 INFO L745 eck$LassoCheckResult]: Stem: 6030#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 6031#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 6035#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6032#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6033#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6156#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6037#L17-4 foo_#res#1 := foo_~i~0#1; 6038#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6153#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6036#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6034#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6021#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6022#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6157#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6155#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6154#L17-4 foo_#res#1 := foo_~i~0#1; 6023#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6024#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6028#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6151#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6150#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6149#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6148#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6147#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6146#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6145#L17-4 foo_#res#1 := foo_~i~0#1; 6144#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6143#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6142#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6140#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6139#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6138#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6137#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6136#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6135#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6134#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6133#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6132#L17-4 foo_#res#1 := foo_~i~0#1; 6131#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6130#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6129#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6128#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6127#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6126#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6125#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6124#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6123#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6122#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6121#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6120#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6119#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6118#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6117#L17-4 foo_#res#1 := foo_~i~0#1; 6116#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6115#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6114#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6113#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6112#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6111#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6110#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6109#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6108#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6107#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6106#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6105#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6104#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6103#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6102#L17-4 foo_#res#1 := foo_~i~0#1; 6101#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6100#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6099#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6098#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6097#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6096#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6095#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6094#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6093#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6091#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6089#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6088#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6087#L17-4 foo_#res#1 := foo_~i~0#1; 6086#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6085#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6084#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6083#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6082#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6080#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6078#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6077#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6076#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6074#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6073#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6072#L17-4 foo_#res#1 := foo_~i~0#1; 6071#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6070#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6069#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6068#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6067#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6066#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6065#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6064#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6063#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6062#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6061#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6060#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6059#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6058#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6057#L17-4 foo_#res#1 := foo_~i~0#1; 6056#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6055#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6054#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 6040#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6053#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6052#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6051#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6050#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6049#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6048#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6047#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6046#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 6045#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 6044#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 6043#L17-4 foo_#res#1 := foo_~i~0#1; 6042#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 6041#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 6039#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 6029#L26-4 main_~i~1#1 := 0; 6025#L29-3 [2024-11-19 14:42:12,298 INFO L747 eck$LassoCheckResult]: Loop: 6025#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 6026#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 6027#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 6025#L29-3 [2024-11-19 14:42:12,299 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:12,299 INFO L85 PathProgramCache]: Analyzing trace with hash 953714335, now seen corresponding path program 3 times [2024-11-19 14:42:12,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:12,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882018001] [2024-11-19 14:42:12,299 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:12,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:12,363 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-19 14:42:12,363 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:12,681 INFO L134 CoverageAnalysis]: Checked inductivity of 2195 backedges. 883 proven. 44 refuted. 0 times theorem prover too weak. 1268 trivial. 0 not checked. [2024-11-19 14:42:12,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:12,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882018001] [2024-11-19 14:42:12,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [882018001] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:12,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [256516126] [2024-11-19 14:42:12,682 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:12,682 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:12,683 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:12,684 INFO L229 MonitoredProcess]: Starting monitored process 74 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:12,685 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2024-11-19 14:42:12,869 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2024-11-19 14:42:12,869 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:12,871 INFO L255 TraceCheckSpWp]: Trace formula consists of 271 conjuncts, 22 conjuncts are in the unsatisfiable core [2024-11-19 14:42:12,873 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:13,150 INFO L134 CoverageAnalysis]: Checked inductivity of 2195 backedges. 457 proven. 44 refuted. 0 times theorem prover too weak. 1694 trivial. 0 not checked. [2024-11-19 14:42:13,150 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 2195 backedges. 0 proven. 501 refuted. 0 times theorem prover too weak. 1694 trivial. 0 not checked. [2024-11-19 14:42:13,624 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [256516126] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:13,624 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:13,624 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 12, 12] total 35 [2024-11-19 14:42:13,624 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539054254] [2024-11-19 14:42:13,625 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:13,625 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:13,625 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:13,625 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 3 times [2024-11-19 14:42:13,625 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:13,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183853020] [2024-11-19 14:42:13,625 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:13,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:13,629 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-11-19 14:42:13,630 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:13,630 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:13,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:13,632 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:13,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:13,670 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-19 14:42:13,671 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=315, Invalid=875, Unknown=0, NotChecked=0, Total=1190 [2024-11-19 14:42:13,671 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. cyclomatic complexity: 16 Second operand has 35 states, 35 states have (on average 2.3714285714285714) internal successors, (83), 35 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:14,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:14,798 INFO L93 Difference]: Finished difference Result 451 states and 519 transitions. [2024-11-19 14:42:14,798 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 451 states and 519 transitions. [2024-11-19 14:42:14,801 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:14,803 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 451 states to 451 states and 519 transitions. [2024-11-19 14:42:14,803 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2024-11-19 14:42:14,804 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2024-11-19 14:42:14,804 INFO L73 IsDeterministic]: Start isDeterministic. Operand 451 states and 519 transitions. [2024-11-19 14:42:14,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:14,804 INFO L218 hiAutomatonCegarLoop]: Abstraction has 451 states and 519 transitions. [2024-11-19 14:42:14,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 451 states and 519 transitions. [2024-11-19 14:42:14,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 451 to 155. [2024-11-19 14:42:14,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 155 states have (on average 1.1096774193548387) internal successors, (172), 154 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:14,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 172 transitions. [2024-11-19 14:42:14,808 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155 states and 172 transitions. [2024-11-19 14:42:14,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2024-11-19 14:42:14,809 INFO L425 stractBuchiCegarLoop]: Abstraction has 155 states and 172 transitions. [2024-11-19 14:42:14,809 INFO L332 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2024-11-19 14:42:14,809 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155 states and 172 transitions. [2024-11-19 14:42:14,810 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:14,810 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:14,811 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:14,812 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [49, 49, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-19 14:42:14,812 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:14,812 INFO L745 eck$LassoCheckResult]: Stem: 7526#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 7527#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 7531#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7528#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7529#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7639#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7637#L17-4 foo_#res#1 := foo_~i~0#1; 7635#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7633#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7631#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7627#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7628#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7623#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7624#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7641#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7640#L17-4 foo_#res#1 := foo_~i~0#1; 7638#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7636#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7634#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7632#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7629#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7630#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7625#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7626#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7622#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7603#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7604#L17-4 foo_#res#1 := foo_~i~0#1; 7652#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7651#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7649#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7650#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7665#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7664#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7663#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7662#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7661#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7660#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7659#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7658#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7657#L17-4 foo_#res#1 := foo_~i~0#1; 7656#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7655#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7654#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7653#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7648#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7647#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7646#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7645#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7644#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7643#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7642#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7621#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7619#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7620#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7533#L17-4 foo_#res#1 := foo_~i~0#1; 7519#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7520#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7524#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7532#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7668#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7666#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7667#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7671#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7670#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7669#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7517#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7518#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7530#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7618#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7617#L17-4 foo_#res#1 := foo_~i~0#1; 7616#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7615#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7614#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7613#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7612#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7611#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7610#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7609#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7608#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7607#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7606#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7605#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7602#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7601#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7555#L17-4 foo_#res#1 := foo_~i~0#1; 7600#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7599#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7598#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7597#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7596#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7595#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7594#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7593#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7592#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7591#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7590#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7589#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7588#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7587#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7586#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7585#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7584#L17-4 foo_#res#1 := foo_~i~0#1; 7583#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7582#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7581#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7580#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7579#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7578#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7577#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7576#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7575#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7574#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7573#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7572#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7571#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7570#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7569#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7568#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7542#L17-4 foo_#res#1 := foo_~i~0#1; 7567#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7566#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7565#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 7535#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7564#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7563#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7562#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7561#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7560#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7559#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7558#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7557#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7556#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7554#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7553#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7551#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7550#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7549#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7548#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7547#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7545#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7543#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7541#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 7540#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 7539#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 7538#L17-4 foo_#res#1 := foo_~i~0#1; 7537#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 7536#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 7534#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 7525#L26-4 main_~i~1#1 := 0; 7521#L29-3 [2024-11-19 14:42:14,813 INFO L747 eck$LassoCheckResult]: Loop: 7521#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 7522#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 7523#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 7521#L29-3 [2024-11-19 14:42:14,813 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:14,813 INFO L85 PathProgramCache]: Analyzing trace with hash 1366663789, now seen corresponding path program 4 times [2024-11-19 14:42:14,813 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:14,813 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655781161] [2024-11-19 14:42:14,814 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:14,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:14,914 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:14,914 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:15,404 INFO L134 CoverageAnalysis]: Checked inductivity of 3077 backedges. 1828 proven. 220 refuted. 0 times theorem prover too weak. 1029 trivial. 0 not checked. [2024-11-19 14:42:15,405 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:15,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655781161] [2024-11-19 14:42:15,405 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1655781161] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:15,405 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [7691576] [2024-11-19 14:42:15,405 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:15,405 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:15,405 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:15,407 INFO L229 MonitoredProcess]: Starting monitored process 75 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:15,408 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2024-11-19 14:42:15,668 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:15,668 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:15,673 INFO L255 TraceCheckSpWp]: Trace formula consists of 851 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-19 14:42:15,675 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:15,838 INFO L134 CoverageAnalysis]: Checked inductivity of 3077 backedges. 1828 proven. 220 refuted. 0 times theorem prover too weak. 1029 trivial. 0 not checked. [2024-11-19 14:42:15,838 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:15,972 INFO L134 CoverageAnalysis]: Checked inductivity of 3077 backedges. 1828 proven. 220 refuted. 0 times theorem prover too weak. 1029 trivial. 0 not checked. [2024-11-19 14:42:15,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [7691576] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:15,972 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:15,973 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 20 [2024-11-19 14:42:15,973 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [747504142] [2024-11-19 14:42:15,973 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:15,973 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:15,973 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:15,973 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 4 times [2024-11-19 14:42:15,973 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:15,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857226039] [2024-11-19 14:42:15,974 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:15,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:15,976 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:15,977 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:15,977 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:15,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:15,979 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:16,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:16,007 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2024-11-19 14:42:16,007 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2024-11-19 14:42:16,008 INFO L87 Difference]: Start difference. First operand 155 states and 172 transitions. cyclomatic complexity: 23 Second operand has 20 states, 20 states have (on average 3.5) internal successors, (70), 20 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:16,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:16,392 INFO L93 Difference]: Finished difference Result 178 states and 192 transitions. [2024-11-19 14:42:16,392 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 178 states and 192 transitions. [2024-11-19 14:42:16,394 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:16,394 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 178 states to 178 states and 192 transitions. [2024-11-19 14:42:16,394 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-19 14:42:16,395 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-19 14:42:16,395 INFO L73 IsDeterministic]: Start isDeterministic. Operand 178 states and 192 transitions. [2024-11-19 14:42:16,395 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:16,395 INFO L218 hiAutomatonCegarLoop]: Abstraction has 178 states and 192 transitions. [2024-11-19 14:42:16,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states and 192 transitions. [2024-11-19 14:42:16,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 159. [2024-11-19 14:42:16,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 159 states, 159 states have (on average 1.0880503144654088) internal successors, (173), 158 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:16,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 173 transitions. [2024-11-19 14:42:16,399 INFO L240 hiAutomatonCegarLoop]: Abstraction has 159 states and 173 transitions. [2024-11-19 14:42:16,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-11-19 14:42:16,400 INFO L425 stractBuchiCegarLoop]: Abstraction has 159 states and 173 transitions. [2024-11-19 14:42:16,400 INFO L332 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2024-11-19 14:42:16,400 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 159 states and 173 transitions. [2024-11-19 14:42:16,401 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:16,401 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:16,401 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:16,403 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [51, 51, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-19 14:42:16,404 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:16,405 INFO L745 eck$LassoCheckResult]: Stem: 8833#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 8834#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 8838#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8835#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8836#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8980#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8978#L17-4 foo_#res#1 := foo_~i~0#1; 8977#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8830#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8831#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8837#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8823#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8824#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8981#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8979#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8839#L17-4 foo_#res#1 := foo_~i~0#1; 8825#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8826#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8976#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8974#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8972#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8970#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8969#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8968#L17-4 foo_#res#1 := foo_~i~0#1; 8967#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8966#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8965#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8964#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8963#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8962#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8961#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8960#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8959#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8958#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8957#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8956#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8955#L17-4 foo_#res#1 := foo_~i~0#1; 8954#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8953#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8952#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8950#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8948#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8946#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8944#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8943#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8942#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8941#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8940#L17-4 foo_#res#1 := foo_~i~0#1; 8939#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8938#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8937#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8935#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8933#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8927#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8926#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8925#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8924#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8923#L17-4 foo_#res#1 := foo_~i~0#1; 8922#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8921#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8920#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8918#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8912#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8907#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8906#L17-4 foo_#res#1 := foo_~i~0#1; 8905#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8904#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8903#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8902#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8901#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8900#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8899#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8898#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8897#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8896#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8895#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8894#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8893#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8892#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8891#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8890#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8889#L17-4 foo_#res#1 := foo_~i~0#1; 8888#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8887#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8886#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8882#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8881#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8880#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8878#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8877#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8876#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8874#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8873#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8848#L17-4 foo_#res#1 := foo_~i~0#1; 8872#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8871#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8870#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 8841#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8869#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8868#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8867#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8866#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8865#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8864#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8863#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8862#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8861#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8860#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8859#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8858#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8857#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8856#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8855#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8854#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8853#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8852#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8851#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8850#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8849#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 8846#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 8845#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 8844#L17-4 foo_#res#1 := foo_~i~0#1; 8843#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 8842#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 8840#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 8832#L26-4 main_~i~1#1 := 0; 8827#L29-3 [2024-11-19 14:42:16,405 INFO L747 eck$LassoCheckResult]: Loop: 8827#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 8828#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 8829#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 8827#L29-3 [2024-11-19 14:42:16,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:16,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1780797997, now seen corresponding path program 5 times [2024-11-19 14:42:16,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:16,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1138118786] [2024-11-19 14:42:16,406 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:16,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:16,592 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2024-11-19 14:42:16,593 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:17,179 INFO L134 CoverageAnalysis]: Checked inductivity of 3295 backedges. 2161 proven. 387 refuted. 0 times theorem prover too weak. 747 trivial. 0 not checked. [2024-11-19 14:42:17,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:17,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1138118786] [2024-11-19 14:42:17,180 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1138118786] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:17,180 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1918203492] [2024-11-19 14:42:17,180 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:17,180 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:17,180 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:17,182 INFO L229 MonitoredProcess]: Starting monitored process 76 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:17,184 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (76)] Waiting until timeout for monitored process [2024-11-19 14:42:17,531 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2024-11-19 14:42:17,532 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:17,535 INFO L255 TraceCheckSpWp]: Trace formula consists of 665 conjuncts, 20 conjuncts are in the unsatisfiable core [2024-11-19 14:42:17,538 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:17,765 INFO L134 CoverageAnalysis]: Checked inductivity of 3295 backedges. 2160 proven. 396 refuted. 0 times theorem prover too weak. 739 trivial. 0 not checked. [2024-11-19 14:42:17,765 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:17,976 INFO L134 CoverageAnalysis]: Checked inductivity of 3295 backedges. 2225 proven. 331 refuted. 0 times theorem prover too weak. 739 trivial. 0 not checked. [2024-11-19 14:42:17,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1918203492] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:17,976 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:17,977 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 29 [2024-11-19 14:42:17,977 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1775212830] [2024-11-19 14:42:17,977 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:17,977 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:17,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:17,977 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 5 times [2024-11-19 14:42:17,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:17,978 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1699133227] [2024-11-19 14:42:17,978 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:17,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:17,982 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:42:17,982 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:17,982 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:17,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:17,985 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:18,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:18,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-11-19 14:42:18,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=644, Unknown=0, NotChecked=0, Total=812 [2024-11-19 14:42:18,019 INFO L87 Difference]: Start difference. First operand 159 states and 173 transitions. cyclomatic complexity: 22 Second operand has 29 states, 29 states have (on average 3.206896551724138) internal successors, (93), 29 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:18,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:18,693 INFO L93 Difference]: Finished difference Result 168 states and 181 transitions. [2024-11-19 14:42:18,693 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 168 states and 181 transitions. [2024-11-19 14:42:18,693 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:18,694 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 168 states to 168 states and 181 transitions. [2024-11-19 14:42:18,694 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2024-11-19 14:42:18,694 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-19 14:42:18,694 INFO L73 IsDeterministic]: Start isDeterministic. Operand 168 states and 181 transitions. [2024-11-19 14:42:18,694 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:18,695 INFO L218 hiAutomatonCegarLoop]: Abstraction has 168 states and 181 transitions. [2024-11-19 14:42:18,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states and 181 transitions. [2024-11-19 14:42:18,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 165. [2024-11-19 14:42:18,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 165 states have (on average 1.0787878787878789) internal successors, (178), 164 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:18,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 178 transitions. [2024-11-19 14:42:18,698 INFO L240 hiAutomatonCegarLoop]: Abstraction has 165 states and 178 transitions. [2024-11-19 14:42:18,698 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2024-11-19 14:42:18,698 INFO L425 stractBuchiCegarLoop]: Abstraction has 165 states and 178 transitions. [2024-11-19 14:42:18,699 INFO L332 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2024-11-19 14:42:18,699 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 165 states and 178 transitions. [2024-11-19 14:42:18,699 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:18,700 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:18,700 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:18,701 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [54, 54, 10, 10, 10, 10, 10, 1, 1, 1, 1] [2024-11-19 14:42:18,701 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:18,701 INFO L745 eck$LassoCheckResult]: Stem: 10189#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10190#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 10194#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10192#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10343#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10196#L17-4 foo_#res#1 := foo_~i~0#1; 10197#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10340#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10195#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10193#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10182#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10183#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10344#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10342#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10341#L17-4 foo_#res#1 := foo_~i~0#1; 10180#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10181#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10187#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10338#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10337#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10336#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10334#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10333#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10332#L17-4 foo_#res#1 := foo_~i~0#1; 10331#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10330#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10329#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10327#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10325#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10323#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10322#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10321#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10320#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10319#L17-4 foo_#res#1 := foo_~i~0#1; 10318#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10317#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10316#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10314#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10312#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10311#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10310#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10309#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10308#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10307#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10306#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10305#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10304#L17-4 foo_#res#1 := foo_~i~0#1; 10303#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10302#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10301#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10300#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10299#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10297#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10295#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10293#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10291#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10289#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10288#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10287#L17-4 foo_#res#1 := foo_~i~0#1; 10286#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10285#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10284#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10283#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10282#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10281#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10280#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10279#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10278#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10277#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10276#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10275#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10274#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10272#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10270#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10269#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10268#L17-4 foo_#res#1 := foo_~i~0#1; 10267#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10266#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10265#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10264#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10263#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10262#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10261#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10260#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10259#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10258#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10257#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10256#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10255#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10254#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10253#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10252#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10251#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10250#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10249#L17-4 foo_#res#1 := foo_~i~0#1; 10248#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10247#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10246#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10245#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10244#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10243#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10242#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10241#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10240#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10238#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10237#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10236#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10234#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10232#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10231#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10206#L17-4 foo_#res#1 := foo_~i~0#1; 10230#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10229#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10228#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 10199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10227#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10226#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10225#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10224#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10223#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10222#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10221#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10220#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10219#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10218#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10217#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10215#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10214#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10213#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10212#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10211#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10210#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10209#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10208#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10207#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10205#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 10204#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 10203#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 10202#L17-4 foo_#res#1 := foo_~i~0#1; 10201#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 10200#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 10198#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 10188#L26-4 main_~i~1#1 := 0; 10184#L29-3 [2024-11-19 14:42:18,701 INFO L747 eck$LassoCheckResult]: Loop: 10184#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 10185#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 10186#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 10184#L29-3 [2024-11-19 14:42:18,702 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:18,702 INFO L85 PathProgramCache]: Analyzing trace with hash 1422264363, now seen corresponding path program 6 times [2024-11-19 14:42:18,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:18,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852320682] [2024-11-19 14:42:18,702 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:42:18,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:18,838 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2024-11-19 14:42:18,838 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:19,442 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 515 proven. 2735 refuted. 0 times theorem prover too weak. 387 trivial. 0 not checked. [2024-11-19 14:42:19,442 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:19,442 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852320682] [2024-11-19 14:42:19,443 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1852320682] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:19,443 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [79777496] [2024-11-19 14:42:19,443 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:42:19,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:19,443 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:19,445 INFO L229 MonitoredProcess]: Starting monitored process 77 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:19,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (77)] Waiting until timeout for monitored process [2024-11-19 14:42:19,988 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2024-11-19 14:42:19,989 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:19,992 INFO L255 TraceCheckSpWp]: Trace formula consists of 741 conjuncts, 15 conjuncts are in the unsatisfiable core [2024-11-19 14:42:19,995 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:20,643 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 0 proven. 3255 refuted. 0 times theorem prover too weak. 382 trivial. 0 not checked. [2024-11-19 14:42:20,644 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:22,098 INFO L134 CoverageAnalysis]: Checked inductivity of 3637 backedges. 0 proven. 3255 refuted. 0 times theorem prover too weak. 382 trivial. 0 not checked. [2024-11-19 14:42:22,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [79777496] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:22,099 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:22,099 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14, 14] total 42 [2024-11-19 14:42:22,099 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1904571758] [2024-11-19 14:42:22,099 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:22,099 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:22,100 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:22,100 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 6 times [2024-11-19 14:42:22,100 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:22,100 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086542780] [2024-11-19 14:42:22,100 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-19 14:42:22,100 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:22,106 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2024-11-19 14:42:22,106 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:22,106 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:22,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:22,109 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:22,150 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:22,150 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2024-11-19 14:42:22,151 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=468, Invalid=1254, Unknown=0, NotChecked=0, Total=1722 [2024-11-19 14:42:22,151 INFO L87 Difference]: Start difference. First operand 165 states and 178 transitions. cyclomatic complexity: 21 Second operand has 42 states, 42 states have (on average 5.119047619047619) internal successors, (215), 42 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:26,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:26,707 INFO L93 Difference]: Finished difference Result 629 states and 714 transitions. [2024-11-19 14:42:26,707 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 629 states and 714 transitions. [2024-11-19 14:42:26,713 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:26,715 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 629 states to 629 states and 714 transitions. [2024-11-19 14:42:26,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72 [2024-11-19 14:42:26,715 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2024-11-19 14:42:26,715 INFO L73 IsDeterministic]: Start isDeterministic. Operand 629 states and 714 transitions. [2024-11-19 14:42:26,716 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:26,716 INFO L218 hiAutomatonCegarLoop]: Abstraction has 629 states and 714 transitions. [2024-11-19 14:42:26,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 629 states and 714 transitions. [2024-11-19 14:42:26,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 629 to 393. [2024-11-19 14:42:26,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 393 states, 393 states have (on average 1.063613231552163) internal successors, (418), 392 states have internal predecessors, (418), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:26,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 418 transitions. [2024-11-19 14:42:26,722 INFO L240 hiAutomatonCegarLoop]: Abstraction has 393 states and 418 transitions. [2024-11-19 14:42:26,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 119 states. [2024-11-19 14:42:26,723 INFO L425 stractBuchiCegarLoop]: Abstraction has 393 states and 418 transitions. [2024-11-19 14:42:26,723 INFO L332 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2024-11-19 14:42:26,723 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 393 states and 418 transitions. [2024-11-19 14:42:26,729 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:26,729 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:26,729 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:26,733 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [138, 138, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-19 14:42:26,733 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:26,733 INFO L745 eck$LassoCheckResult]: Stem: 12224#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 12225#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 12226#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12227#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12228#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12606#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12604#L17-4 foo_#res#1 := foo_~i~0#1; 12603#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12602#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12230#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12229#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12215#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12216#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12607#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12605#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12231#L17-4 foo_#res#1 := foo_~i~0#1; 12217#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12218#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12222#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12601#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12600#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12599#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12598#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12597#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12596#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12595#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12594#L17-4 foo_#res#1 := foo_~i~0#1; 12593#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12592#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12591#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12590#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12589#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12588#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12587#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12586#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12585#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12584#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12583#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12582#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12581#L17-4 foo_#res#1 := foo_~i~0#1; 12580#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12579#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12578#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12577#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12576#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12575#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12574#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12573#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12572#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12571#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12570#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12569#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12568#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12567#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12566#L17-4 foo_#res#1 := foo_~i~0#1; 12565#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12564#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12563#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12562#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12561#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12560#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12559#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12558#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12557#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12556#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12555#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12554#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12553#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12551#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12550#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12549#L17-4 foo_#res#1 := foo_~i~0#1; 12548#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12547#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12546#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12545#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12544#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12543#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12542#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12541#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12540#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12539#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12538#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12537#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12536#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12535#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12534#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12533#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12532#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12531#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12530#L17-4 foo_#res#1 := foo_~i~0#1; 12529#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12528#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12527#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12526#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12525#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12524#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12523#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12522#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12521#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12520#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12519#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12518#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12517#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12516#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12515#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12514#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12513#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12512#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12511#L17-4 foo_#res#1 := foo_~i~0#1; 12510#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12509#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12508#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12507#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12506#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12505#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12504#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12503#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12502#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12501#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12500#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12499#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12498#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12497#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12496#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12495#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12494#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12493#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12492#L17-4 foo_#res#1 := foo_~i~0#1; 12491#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12490#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12489#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12488#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12487#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12486#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12485#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12484#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12483#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12482#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12481#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12480#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12479#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12478#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12477#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12476#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12475#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12474#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12473#L17-4 foo_#res#1 := foo_~i~0#1; 12472#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12471#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12470#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12469#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12468#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12467#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12466#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12465#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12464#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12463#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12462#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12461#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12460#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12459#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12458#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12457#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12456#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12455#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12454#L17-4 foo_#res#1 := foo_~i~0#1; 12453#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12452#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12451#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12450#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12449#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12448#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12447#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12446#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12445#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12444#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12443#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12442#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12441#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12440#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12439#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12438#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12437#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12436#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12435#L17-4 foo_#res#1 := foo_~i~0#1; 12434#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12433#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12432#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12431#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12430#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12429#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12428#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12427#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12426#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12425#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12424#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12423#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12422#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12421#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12420#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12419#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12418#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12417#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12416#L17-4 foo_#res#1 := foo_~i~0#1; 12415#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12414#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12413#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12412#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12411#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12409#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12408#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12407#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12405#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12404#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12403#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12401#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12400#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12399#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12398#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12397#L17-4 foo_#res#1 := foo_~i~0#1; 12396#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12395#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12394#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12393#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12392#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12391#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12390#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12389#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12388#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12387#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12386#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12385#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12384#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12383#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12382#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12381#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12380#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12379#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12378#L17-4 foo_#res#1 := foo_~i~0#1; 12377#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12376#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12375#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12374#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12373#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12372#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12371#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12370#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12369#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12368#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12367#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12366#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12365#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12364#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12363#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12362#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12361#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12360#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12359#L17-4 foo_#res#1 := foo_~i~0#1; 12358#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12357#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12356#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12355#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12354#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12353#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12352#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12351#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12350#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12349#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12348#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12347#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12346#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12345#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12344#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12342#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12341#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12340#L17-4 foo_#res#1 := foo_~i~0#1; 12339#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12338#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12337#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12336#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12335#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12334#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12333#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12332#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12331#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12330#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12329#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12328#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12327#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12326#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12325#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12324#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12323#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12322#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12321#L17-4 foo_#res#1 := foo_~i~0#1; 12320#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12319#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12318#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12317#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12316#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12315#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12314#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12313#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12312#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12311#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12310#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12309#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12308#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12307#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12306#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12305#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12304#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12303#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12302#L17-4 foo_#res#1 := foo_~i~0#1; 12301#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12300#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12299#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12297#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12296#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12295#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12293#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12292#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12291#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12289#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12288#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12287#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12285#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12284#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12283#L17-4 foo_#res#1 := foo_~i~0#1; 12282#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12281#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12280#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12279#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12278#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12277#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12276#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12275#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12274#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12273#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12272#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12271#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12270#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12269#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12268#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12267#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12266#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12265#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12240#L17-4 foo_#res#1 := foo_~i~0#1; 12264#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12263#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12262#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 12233#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12261#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12260#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12259#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12258#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12257#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12256#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12255#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12254#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12253#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12252#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12251#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12250#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12249#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12248#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12247#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12246#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12245#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12244#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12243#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12242#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12241#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12239#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 12238#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 12237#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 12236#L17-4 foo_#res#1 := foo_~i~0#1; 12235#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 12234#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 12232#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 12223#L26-4 main_~i~1#1 := 0; 12219#L29-3 [2024-11-19 14:42:26,734 INFO L747 eck$LassoCheckResult]: Loop: 12219#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 12220#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 12221#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 12219#L29-3 [2024-11-19 14:42:26,734 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:26,735 INFO L85 PathProgramCache]: Analyzing trace with hash 396993579, now seen corresponding path program 7 times [2024-11-19 14:42:26,735 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:26,735 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376535555] [2024-11-19 14:42:26,735 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-19 14:42:26,735 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:26,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:28,657 INFO L134 CoverageAnalysis]: Checked inductivity of 23119 backedges. 7351 proven. 186 refuted. 0 times theorem prover too weak. 15582 trivial. 0 not checked. [2024-11-19 14:42:28,658 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:28,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376535555] [2024-11-19 14:42:28,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376535555] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:28,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [971003786] [2024-11-19 14:42:28,658 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-19 14:42:28,658 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:28,659 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:28,660 INFO L229 MonitoredProcess]: Starting monitored process 78 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:28,663 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (78)] Waiting until timeout for monitored process [2024-11-19 14:42:29,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-19 14:42:29,182 INFO L255 TraceCheckSpWp]: Trace formula consists of 2166 conjuncts, 19 conjuncts are in the unsatisfiable core [2024-11-19 14:42:29,191 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:29,515 INFO L134 CoverageAnalysis]: Checked inductivity of 23119 backedges. 9995 proven. 525 refuted. 0 times theorem prover too weak. 12599 trivial. 0 not checked. [2024-11-19 14:42:29,516 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:29,785 INFO L134 CoverageAnalysis]: Checked inductivity of 23119 backedges. 9995 proven. 525 refuted. 0 times theorem prover too weak. 12599 trivial. 0 not checked. [2024-11-19 14:42:29,785 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [971003786] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:29,786 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:29,786 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 18, 18] total 35 [2024-11-19 14:42:29,786 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1593598652] [2024-11-19 14:42:29,786 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:29,787 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:29,787 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:29,787 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 7 times [2024-11-19 14:42:29,788 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:29,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328158111] [2024-11-19 14:42:29,789 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2024-11-19 14:42:29,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:29,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:29,795 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:29,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:29,798 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:29,839 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:29,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2024-11-19 14:42:29,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=225, Invalid=965, Unknown=0, NotChecked=0, Total=1190 [2024-11-19 14:42:29,841 INFO L87 Difference]: Start difference. First operand 393 states and 418 transitions. cyclomatic complexity: 45 Second operand has 35 states, 35 states have (on average 3.4) internal successors, (119), 35 states have internal predecessors, (119), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:31,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:31,174 INFO L93 Difference]: Finished difference Result 592 states and 625 transitions. [2024-11-19 14:42:31,174 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 592 states and 625 transitions. [2024-11-19 14:42:31,177 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:31,179 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 592 states to 592 states and 625 transitions. [2024-11-19 14:42:31,180 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 29 [2024-11-19 14:42:31,180 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 29 [2024-11-19 14:42:31,180 INFO L73 IsDeterministic]: Start isDeterministic. Operand 592 states and 625 transitions. [2024-11-19 14:42:31,181 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:31,181 INFO L218 hiAutomatonCegarLoop]: Abstraction has 592 states and 625 transitions. [2024-11-19 14:42:31,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states and 625 transitions. [2024-11-19 14:42:31,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 500. [2024-11-19 14:42:31,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 500 states, 500 states have (on average 1.06) internal successors, (530), 499 states have internal predecessors, (530), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:31,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 530 transitions. [2024-11-19 14:42:31,187 INFO L240 hiAutomatonCegarLoop]: Abstraction has 500 states and 530 transitions. [2024-11-19 14:42:31,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2024-11-19 14:42:31,188 INFO L425 stractBuchiCegarLoop]: Abstraction has 500 states and 530 transitions. [2024-11-19 14:42:31,188 INFO L332 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2024-11-19 14:42:31,188 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 500 states and 530 transitions. [2024-11-19 14:42:31,190 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:31,190 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:31,190 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:31,195 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [152, 152, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-19 14:42:31,195 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:31,195 INFO L745 eck$LassoCheckResult]: Stem: 15672#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 15673#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 15677#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15674#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15675#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16097#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16096#L17-4 foo_#res#1 := foo_~i~0#1; 16095#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16094#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16093#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16092#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16091#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16090#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16089#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16088#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16087#L17-4 foo_#res#1 := foo_~i~0#1; 16086#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16085#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16084#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16083#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16082#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16081#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16080#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16078#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16077#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16076#L17-4 foo_#res#1 := foo_~i~0#1; 16075#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16074#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16073#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16072#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16071#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16070#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16069#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16068#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16067#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16066#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16065#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16063#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16062#L17-4 foo_#res#1 := foo_~i~0#1; 16061#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16060#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16059#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16058#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16057#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16056#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16055#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16054#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16053#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16052#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16051#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16050#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16049#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16047#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16046#L17-4 foo_#res#1 := foo_~i~0#1; 16045#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16044#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16043#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16042#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16041#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16040#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16039#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16038#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16037#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16036#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16035#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16034#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16033#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16032#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16031#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16029#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16028#L17-4 foo_#res#1 := foo_~i~0#1; 16026#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16024#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16022#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16020#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16019#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16018#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16017#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16016#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16015#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16014#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16013#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16012#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16011#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16010#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16009#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16008#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16007#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 16006#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 16005#L17-4 foo_#res#1 := foo_~i~0#1; 16004#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 16003#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 16002#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 16001#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 16000#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15999#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15998#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15997#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15996#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15995#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15994#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15993#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15992#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15990#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15988#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15987#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15986#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15985#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15984#L17-4 foo_#res#1 := foo_~i~0#1; 15983#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15982#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15981#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15979#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15977#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15976#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15975#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15974#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15973#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15972#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15971#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15970#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15969#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15968#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15967#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15966#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15965#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15964#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15963#L17-4 foo_#res#1 := foo_~i~0#1; 15962#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15961#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15960#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15959#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15958#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15957#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15956#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15955#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15954#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15952#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15950#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15948#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15946#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15944#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15943#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15942#L17-4 foo_#res#1 := foo_~i~0#1; 15941#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15940#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15939#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15938#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15937#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15935#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15933#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15928#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15927#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15926#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15925#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15924#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15923#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15922#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15921#L17-4 foo_#res#1 := foo_~i~0#1; 15920#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15919#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15918#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15912#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15906#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15905#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15904#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15902#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15901#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15900#L17-4 foo_#res#1 := foo_~i~0#1; 15899#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15898#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15897#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15896#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15895#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15894#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15893#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15892#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15891#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15890#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15889#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15888#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15887#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15886#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15885#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15884#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15883#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15882#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15881#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15880#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15879#L17-4 foo_#res#1 := foo_~i~0#1; 15878#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15877#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15876#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15874#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15873#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15872#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15870#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15869#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15868#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15866#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15865#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15864#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15862#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15861#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15860#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15859#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15858#L17-4 foo_#res#1 := foo_~i~0#1; 15857#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15856#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15855#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15854#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15853#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15852#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15851#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15850#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15849#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15848#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15847#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15846#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15845#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15844#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15843#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15842#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15841#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15840#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15839#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15838#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15837#L17-4 foo_#res#1 := foo_~i~0#1; 15836#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15835#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15834#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15833#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15832#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15831#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15830#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15829#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15828#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15827#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15826#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15825#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15824#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15823#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15822#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15821#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15820#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15819#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15818#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15817#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15816#L17-4 foo_#res#1 := foo_~i~0#1; 15815#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15814#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15813#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15812#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15811#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15810#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15809#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15808#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15807#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15806#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15805#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15804#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15803#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15802#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15801#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15800#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15799#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15798#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15797#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15796#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15795#L17-4 foo_#res#1 := foo_~i~0#1; 15794#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15793#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15792#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15791#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15790#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15789#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15788#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15787#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15786#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15785#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15784#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15782#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15781#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15780#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15779#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15778#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15777#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15776#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15775#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15774#L17-4 foo_#res#1 := foo_~i~0#1; 15773#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15772#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15771#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15770#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15769#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15768#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15767#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15766#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15765#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15764#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15763#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15762#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15761#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15760#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15759#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15758#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15757#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15755#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15754#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15753#L17-4 foo_#res#1 := foo_~i~0#1; 15752#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15751#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15750#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15749#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15748#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15747#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15746#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15745#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15744#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15743#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15742#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15741#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15740#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15739#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15738#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15737#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15736#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15735#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15734#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15733#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15732#L17-4 foo_#res#1 := foo_~i~0#1; 15731#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15730#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15729#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15728#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15727#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15726#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15725#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15724#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15723#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15722#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15721#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15720#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15719#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15718#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15717#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15716#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15715#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15714#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15713#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15712#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15687#L17-4 foo_#res#1 := foo_~i~0#1; 15711#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15710#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15709#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 15680#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15708#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15707#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15706#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15704#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15703#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15702#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15701#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15700#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15699#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15698#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15697#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15696#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15695#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15694#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15693#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15692#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15691#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15690#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15689#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15688#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15686#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 15685#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 15684#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 15683#L17-4 foo_#res#1 := foo_~i~0#1; 15682#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 15681#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 15679#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 15671#L26-4 main_~i~1#1 := 0; 15666#L29-3 [2024-11-19 14:42:31,196 INFO L747 eck$LassoCheckResult]: Loop: 15666#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 15667#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 15668#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 15666#L29-3 [2024-11-19 14:42:31,197 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:31,197 INFO L85 PathProgramCache]: Analyzing trace with hash 990853995, now seen corresponding path program 8 times [2024-11-19 14:42:31,197 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:31,197 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339150620] [2024-11-19 14:42:31,197 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:31,197 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:31,391 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:42:31,391 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:33,073 INFO L134 CoverageAnalysis]: Checked inductivity of 27473 backedges. 8606 proven. 237 refuted. 0 times theorem prover too weak. 18630 trivial. 0 not checked. [2024-11-19 14:42:33,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:33,073 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339150620] [2024-11-19 14:42:33,073 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [339150620] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:33,074 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [778047785] [2024-11-19 14:42:33,074 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:33,074 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:33,074 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:33,077 INFO L229 MonitoredProcess]: Starting monitored process 79 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:33,077 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Waiting until timeout for monitored process [2024-11-19 14:42:33,731 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-19 14:42:33,732 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:33,743 INFO L255 TraceCheckSpWp]: Trace formula consists of 2320 conjuncts, 21 conjuncts are in the unsatisfiable core [2024-11-19 14:42:33,756 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:34,148 INFO L134 CoverageAnalysis]: Checked inductivity of 27473 backedges. 13119 proven. 748 refuted. 0 times theorem prover too weak. 13606 trivial. 0 not checked. [2024-11-19 14:42:34,148 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:34,546 INFO L134 CoverageAnalysis]: Checked inductivity of 27473 backedges. 13119 proven. 748 refuted. 0 times theorem prover too weak. 13606 trivial. 0 not checked. [2024-11-19 14:42:34,546 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [778047785] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:34,546 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:34,546 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20, 20] total 39 [2024-11-19 14:42:34,546 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833475126] [2024-11-19 14:42:34,546 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:34,547 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:34,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:34,547 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 8 times [2024-11-19 14:42:34,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:34,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754907874] [2024-11-19 14:42:34,547 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-19 14:42:34,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:34,551 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:42:34,551 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:34,551 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:34,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:34,554 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:34,583 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:34,583 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2024-11-19 14:42:34,584 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=275, Invalid=1207, Unknown=0, NotChecked=0, Total=1482 [2024-11-19 14:42:34,584 INFO L87 Difference]: Start difference. First operand 500 states and 530 transitions. cyclomatic complexity: 50 Second operand has 39 states, 39 states have (on average 3.3846153846153846) internal successors, (132), 39 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:36,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:36,016 INFO L93 Difference]: Finished difference Result 718 states and 755 transitions. [2024-11-19 14:42:36,016 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 718 states and 755 transitions. [2024-11-19 14:42:36,020 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:36,022 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 718 states to 718 states and 755 transitions. [2024-11-19 14:42:36,022 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 32 [2024-11-19 14:42:36,022 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 32 [2024-11-19 14:42:36,022 INFO L73 IsDeterministic]: Start isDeterministic. Operand 718 states and 755 transitions. [2024-11-19 14:42:36,023 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:36,024 INFO L218 hiAutomatonCegarLoop]: Abstraction has 718 states and 755 transitions. [2024-11-19 14:42:36,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states and 755 transitions. [2024-11-19 14:42:36,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 597. [2024-11-19 14:42:36,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 597 states, 597 states have (on average 1.0552763819095476) internal successors, (630), 596 states have internal predecessors, (630), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:36,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 630 transitions. [2024-11-19 14:42:36,031 INFO L240 hiAutomatonCegarLoop]: Abstraction has 597 states and 630 transitions. [2024-11-19 14:42:36,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2024-11-19 14:42:36,032 INFO L425 stractBuchiCegarLoop]: Abstraction has 597 states and 630 transitions. [2024-11-19 14:42:36,032 INFO L332 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2024-11-19 14:42:36,032 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 597 states and 630 transitions. [2024-11-19 14:42:36,035 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:36,035 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:36,035 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:36,037 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [165, 165, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-19 14:42:36,037 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:36,038 INFO L745 eck$LassoCheckResult]: Stem: 19544#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 19545#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 19549#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19547#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19996#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19995#L17-4 foo_#res#1 := foo_~i~0#1; 19994#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19993#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19992#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19990#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19988#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19987#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19986#L17-4 foo_#res#1 := foo_~i~0#1; 19985#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19984#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19983#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19982#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19981#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19980#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19979#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19977#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19976#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19975#L17-4 foo_#res#1 := foo_~i~0#1; 19974#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19973#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19972#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19970#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19969#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19968#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19966#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19965#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19964#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19962#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19961#L17-4 foo_#res#1 := foo_~i~0#1; 19960#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19959#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19958#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19957#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19956#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19955#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19954#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19952#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19950#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19948#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19946#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19945#L17-4 foo_#res#1 := foo_~i~0#1; 19944#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19943#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19942#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19940#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19939#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19938#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19936#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19935#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19934#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19932#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19931#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19930#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19928#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19927#L17-4 foo_#res#1 := foo_~i~0#1; 19926#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19925#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19924#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19923#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19922#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19920#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19918#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19912#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19908#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19907#L17-4 foo_#res#1 := foo_~i~0#1; 19905#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19903#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19901#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19899#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19898#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19896#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19894#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19890#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19888#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19886#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19883#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19882#L17-4 foo_#res#1 := foo_~i~0#1; 19881#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19880#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19879#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19878#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19877#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19876#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19875#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19874#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19873#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19872#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19871#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19870#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19869#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19868#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19867#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19866#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19865#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19864#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19863#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19862#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19861#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19860#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19859#L17-4 foo_#res#1 := foo_~i~0#1; 19858#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19857#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19856#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19855#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19854#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19853#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19852#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19850#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19849#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19848#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19846#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19845#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19844#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19843#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19842#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19841#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19840#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19839#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19838#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19837#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19836#L17-4 foo_#res#1 := foo_~i~0#1; 19835#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19834#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19833#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19832#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19831#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19830#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19829#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19828#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19827#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19826#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19825#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19824#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19823#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19822#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19821#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19820#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19819#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19818#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19817#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19816#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19815#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19814#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19813#L17-4 foo_#res#1 := foo_~i~0#1; 19812#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19811#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19810#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19809#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19808#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19807#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19806#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19805#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19804#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19803#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19802#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19801#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19800#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19799#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19798#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19797#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19796#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19795#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19794#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19793#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19792#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19791#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19790#L17-4 foo_#res#1 := foo_~i~0#1; 19789#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19788#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19787#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19786#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19785#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19784#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19783#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19782#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19781#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19780#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19779#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19778#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19777#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19776#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19775#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19774#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19773#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19772#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19771#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19770#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19769#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19768#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19767#L17-4 foo_#res#1 := foo_~i~0#1; 19766#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19765#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19764#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19763#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19762#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19761#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19760#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19759#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19758#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19757#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19756#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19755#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19754#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19753#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19752#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19751#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19750#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19749#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19748#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19747#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19746#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19745#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19744#L17-4 foo_#res#1 := foo_~i~0#1; 19743#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19742#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19741#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19740#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19739#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19738#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19737#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19736#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19735#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19734#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19733#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19732#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19731#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19730#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19729#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19728#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19727#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19726#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19725#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19724#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19723#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19722#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19721#L17-4 foo_#res#1 := foo_~i~0#1; 19720#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19719#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19718#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19717#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19716#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19715#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19714#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19713#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19712#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19711#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19710#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19709#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19708#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19707#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19706#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19704#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19703#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19702#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19701#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19700#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19699#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19698#L17-4 foo_#res#1 := foo_~i~0#1; 19697#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19696#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19695#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19694#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19693#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19692#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19691#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19690#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19689#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19688#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19687#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19686#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19685#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19684#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19683#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19682#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19681#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19680#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19679#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19678#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19677#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19676#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19675#L17-4 foo_#res#1 := foo_~i~0#1; 19674#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19673#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19672#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19671#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19670#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19669#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19668#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19667#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19666#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19665#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19664#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19663#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19662#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19661#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19660#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19659#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19658#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19657#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19656#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19655#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19654#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19653#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19652#L17-4 foo_#res#1 := foo_~i~0#1; 19651#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19650#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19649#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19648#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19647#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19646#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19645#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19644#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19643#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19642#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19641#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19640#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19639#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19638#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19637#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19636#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19635#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19634#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19633#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19632#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19631#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19630#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19629#L17-4 foo_#res#1 := foo_~i~0#1; 19628#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19627#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19626#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19625#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19624#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19623#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19622#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19621#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19620#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19619#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19618#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19617#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19616#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19615#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19614#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19613#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19612#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19611#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19610#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19609#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19608#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19607#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19606#L17-4 foo_#res#1 := foo_~i~0#1; 19605#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19604#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19603#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19602#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19601#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19600#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19599#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19598#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19597#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19596#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19595#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19594#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19593#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19592#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19591#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19590#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19589#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19588#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19587#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19586#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19585#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19584#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19559#L17-4 foo_#res#1 := foo_~i~0#1; 19583#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19582#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19581#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 19552#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19580#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19579#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19578#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19577#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19576#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19575#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19574#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19573#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19572#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19571#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19570#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19569#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19568#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19567#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19566#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19565#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19564#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19563#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19562#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19561#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19560#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19558#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 19557#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 19556#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 19555#L17-4 foo_#res#1 := foo_~i~0#1; 19554#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 19553#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 19551#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 19543#L26-4 main_~i~1#1 := 0; 19538#L29-3 [2024-11-19 14:42:36,039 INFO L747 eck$LassoCheckResult]: Loop: 19538#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 19539#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 19540#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 19538#L29-3 [2024-11-19 14:42:36,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:36,039 INFO L85 PathProgramCache]: Analyzing trace with hash 1389232425, now seen corresponding path program 9 times [2024-11-19 14:42:36,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:36,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812353023] [2024-11-19 14:42:36,040 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:36,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:36,209 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2024-11-19 14:42:36,209 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:37,625 INFO L134 CoverageAnalysis]: Checked inductivity of 31867 backedges. 3056 proven. 4327 refuted. 0 times theorem prover too weak. 24484 trivial. 0 not checked. [2024-11-19 14:42:37,625 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:37,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812353023] [2024-11-19 14:42:37,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [812353023] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:37,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1886976495] [2024-11-19 14:42:37,627 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:37,627 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:37,627 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:37,630 INFO L229 MonitoredProcess]: Starting monitored process 80 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:37,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (80)] Waiting until timeout for monitored process [2024-11-19 14:42:38,067 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2024-11-19 14:42:38,068 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:38,072 INFO L255 TraceCheckSpWp]: Trace formula consists of 729 conjuncts, 29 conjuncts are in the unsatisfiable core [2024-11-19 14:42:38,078 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:38,720 INFO L134 CoverageAnalysis]: Checked inductivity of 31867 backedges. 7125 proven. 300 refuted. 0 times theorem prover too weak. 24442 trivial. 0 not checked. [2024-11-19 14:42:38,720 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:39,516 INFO L134 CoverageAnalysis]: Checked inductivity of 31867 backedges. 7125 proven. 300 refuted. 0 times theorem prover too weak. 24442 trivial. 0 not checked. [2024-11-19 14:42:39,517 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1886976495] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:39,517 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:39,517 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 26, 26] total 71 [2024-11-19 14:42:39,517 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545886116] [2024-11-19 14:42:39,517 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:39,518 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:39,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:39,518 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 9 times [2024-11-19 14:42:39,518 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:39,518 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211727752] [2024-11-19 14:42:39,518 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-19 14:42:39,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:39,524 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-11-19 14:42:39,524 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:39,525 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:39,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:39,529 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:39,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:39,562 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2024-11-19 14:42:39,563 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=759, Invalid=4211, Unknown=0, NotChecked=0, Total=4970 [2024-11-19 14:42:39,564 INFO L87 Difference]: Start difference. First operand 597 states and 630 transitions. cyclomatic complexity: 53 Second operand has 71 states, 71 states have (on average 2.211267605633803) internal successors, (157), 71 states have internal predecessors, (157), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:43,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:43,897 INFO L93 Difference]: Finished difference Result 2819 states and 3130 transitions. [2024-11-19 14:42:43,897 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2819 states and 3130 transitions. [2024-11-19 14:42:43,910 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:43,920 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2819 states to 2819 states and 3130 transitions. [2024-11-19 14:42:43,921 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2024-11-19 14:42:43,921 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23 [2024-11-19 14:42:43,921 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2819 states and 3130 transitions. [2024-11-19 14:42:43,924 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:43,924 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2819 states and 3130 transitions. [2024-11-19 14:42:43,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2819 states and 3130 transitions. [2024-11-19 14:42:43,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2819 to 1521. [2024-11-19 14:42:43,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1521 states, 1521 states have (on average 1.0775805391190008) internal successors, (1639), 1520 states have internal predecessors, (1639), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:43,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1521 states to 1521 states and 1639 transitions. [2024-11-19 14:42:43,951 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1521 states and 1639 transitions. [2024-11-19 14:42:43,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-11-19 14:42:43,955 INFO L425 stractBuchiCegarLoop]: Abstraction has 1521 states and 1639 transitions. [2024-11-19 14:42:43,955 INFO L332 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2024-11-19 14:42:43,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1521 states and 1639 transitions. [2024-11-19 14:42:43,962 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:43,962 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:43,962 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:43,965 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [172, 172, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-19 14:42:43,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:43,965 INFO L745 eck$LassoCheckResult]: Stem: 25881#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 25882#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 25887#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26992#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26991#L17-4 foo_#res#1 := foo_~i~0#1; 26990#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26989#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26988#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26987#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26986#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26985#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26984#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26983#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26982#L17-4 foo_#res#1 := foo_~i~0#1; 26981#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26980#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26979#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26978#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26977#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26976#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26975#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26974#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26973#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26972#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26971#L17-4 foo_#res#1 := foo_~i~0#1; 26970#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26969#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26968#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26966#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26965#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26964#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26963#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26962#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26961#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26960#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26958#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26957#L17-4 foo_#res#1 := foo_~i~0#1; 26956#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26955#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26954#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26953#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26952#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26951#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26950#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26949#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26948#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26947#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26946#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26944#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26942#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26941#L17-4 foo_#res#1 := foo_~i~0#1; 26940#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26939#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26938#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26936#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26935#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26934#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26932#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26931#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26930#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26929#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26928#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26927#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26926#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26924#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26923#L17-4 foo_#res#1 := foo_~i~0#1; 26922#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26921#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26920#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26918#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26912#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26907#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26906#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26904#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26903#L17-4 foo_#res#1 := foo_~i~0#1; 26902#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26901#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26900#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26899#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26898#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26896#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26895#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26894#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26893#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26892#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26890#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26889#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26888#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26886#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26885#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26884#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26877#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26875#L17-4 foo_#res#1 := foo_~i~0#1; 26873#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26871#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26869#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26865#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26861#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26857#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26855#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26853#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26851#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26849#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26847#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26845#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26843#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26841#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26839#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26837#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26835#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26833#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26831#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26796#L17-4 foo_#res#1 := foo_~i~0#1; 26794#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26792#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26790#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26788#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26786#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26784#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26782#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26780#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26778#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26776#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26774#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26772#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26770#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26768#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26766#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26764#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26762#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26760#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26758#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26756#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26754#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26752#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26717#L17-4 foo_#res#1 := foo_~i~0#1; 26715#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26713#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26711#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26709#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26707#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26705#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26703#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26701#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26699#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26697#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26695#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26693#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26691#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26689#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26687#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26685#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26683#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26681#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26679#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26677#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26675#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26673#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26638#L17-4 foo_#res#1 := foo_~i~0#1; 26636#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26634#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26632#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26630#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26628#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26626#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26624#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26622#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26620#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26618#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26616#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26614#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26612#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26610#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26608#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26606#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26604#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26602#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26600#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26598#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26596#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26594#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26559#L17-4 foo_#res#1 := foo_~i~0#1; 26557#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26555#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26553#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26551#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26549#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26547#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26545#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26543#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26541#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26539#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26537#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26535#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26533#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26531#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26529#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26527#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26525#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26523#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26521#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26519#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26517#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26515#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26479#L17-4 foo_#res#1 := foo_~i~0#1; 26477#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26475#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26473#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26471#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26469#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26467#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26465#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26463#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26461#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26459#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26457#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26455#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26453#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26451#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26449#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26447#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26445#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26443#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26441#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26439#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26437#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26435#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26400#L17-4 foo_#res#1 := foo_~i~0#1; 26398#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26396#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26394#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26392#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26390#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26388#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26386#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26384#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26382#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26380#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26378#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26376#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26374#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26372#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26370#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26368#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26366#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26364#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26362#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26360#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26358#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26356#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26322#L17-4 foo_#res#1 := foo_~i~0#1; 26320#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26318#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26316#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26314#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26312#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26310#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26308#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26306#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26304#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26302#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26300#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26298#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26296#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26294#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26292#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26290#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26288#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26284#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26282#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26280#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26278#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26243#L17-4 foo_#res#1 := foo_~i~0#1; 26241#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26239#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26237#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26235#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26233#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26231#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26229#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26227#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26225#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26223#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26221#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26219#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26217#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26215#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26213#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26211#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26209#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26205#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26201#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26199#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 26164#L17-4 foo_#res#1 := foo_~i~0#1; 26162#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26160#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26158#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26156#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26154#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26152#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26150#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26148#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26146#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26144#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26142#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26140#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26138#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26136#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26134#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26132#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26130#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26128#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26126#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26124#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26122#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26120#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25907#L17-4 foo_#res#1 := foo_~i~0#1; 26033#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26032#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26031#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26030#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26029#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26028#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26027#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26026#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26025#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26024#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26023#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26022#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26021#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26020#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26019#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26018#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26017#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26016#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26015#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26014#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26013#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26012#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 26011#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 26007#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25904#L17-4 foo_#res#1 := foo_~i~0#1; 26006#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 26005#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 26003#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 26001#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25999#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25997#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25995#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25993#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25991#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25989#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25987#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25985#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25983#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25981#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25979#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25977#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25975#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25973#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25971#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25969#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25967#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25965#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25963#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25961#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25960#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25956#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25901#L17-4 foo_#res#1 := foo_~i~0#1; 25955#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 25954#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 25953#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25952#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25951#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25950#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25949#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25948#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25947#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25946#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25945#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25944#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25943#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25942#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25941#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25940#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25939#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25938#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25937#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25936#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25935#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25934#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25933#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25932#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25930#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25929#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25928#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25898#L17-4 foo_#res#1 := foo_~i~0#1; 25927#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 25926#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 25925#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 25891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25924#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25923#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25922#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25920#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25919#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25918#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25916#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25915#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25914#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25912#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25911#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25910#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25909#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25908#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25906#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25905#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25903#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25902#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25900#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25899#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25897#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 25896#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 25895#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 25894#L17-4 foo_#res#1 := foo_~i~0#1; 25893#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 25892#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 25890#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 25880#L26-4 main_~i~1#1 := 0; 25875#L29-3 [2024-11-19 14:42:43,966 INFO L747 eck$LassoCheckResult]: Loop: 25875#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 25876#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 25877#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 25875#L29-3 [2024-11-19 14:42:43,967 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:43,967 INFO L85 PathProgramCache]: Analyzing trace with hash -1718568153, now seen corresponding path program 10 times [2024-11-19 14:42:43,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:43,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297948903] [2024-11-19 14:42:43,967 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:43,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:44,291 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:44,291 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:45,971 INFO L134 CoverageAnalysis]: Checked inductivity of 34373 backedges. 17462 proven. 1026 refuted. 0 times theorem prover too weak. 15885 trivial. 0 not checked. [2024-11-19 14:42:45,971 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:45,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297948903] [2024-11-19 14:42:45,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1297948903] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:45,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1612800832] [2024-11-19 14:42:45,971 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:45,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:45,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:45,974 INFO L229 MonitoredProcess]: Starting monitored process 81 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:45,975 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (81)] Waiting until timeout for monitored process [2024-11-19 14:42:46,699 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:46,699 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:46,710 INFO L255 TraceCheckSpWp]: Trace formula consists of 2540 conjuncts, 23 conjuncts are in the unsatisfiable core [2024-11-19 14:42:46,715 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:47,040 INFO L134 CoverageAnalysis]: Checked inductivity of 34373 backedges. 17462 proven. 1026 refuted. 0 times theorem prover too weak. 15885 trivial. 0 not checked. [2024-11-19 14:42:47,040 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:47,353 INFO L134 CoverageAnalysis]: Checked inductivity of 34373 backedges. 17462 proven. 1026 refuted. 0 times theorem prover too weak. 15885 trivial. 0 not checked. [2024-11-19 14:42:47,353 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1612800832] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:47,353 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:47,353 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22] total 32 [2024-11-19 14:42:47,354 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1068467473] [2024-11-19 14:42:47,354 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:47,355 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:47,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:47,356 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 10 times [2024-11-19 14:42:47,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:47,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [428217722] [2024-11-19 14:42:47,356 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-19 14:42:47,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:47,362 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-19 14:42:47,362 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:47,362 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:47,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:47,366 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:47,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:47,410 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2024-11-19 14:42:47,412 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=741, Unknown=0, NotChecked=0, Total=992 [2024-11-19 14:42:47,412 INFO L87 Difference]: Start difference. First operand 1521 states and 1639 transitions. cyclomatic complexity: 135 Second operand has 32 states, 32 states have (on average 3.5625) internal successors, (114), 32 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:48,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-19 14:42:48,441 INFO L93 Difference]: Finished difference Result 1323 states and 1407 transitions. [2024-11-19 14:42:48,441 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1323 states and 1407 transitions. [2024-11-19 14:42:48,446 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:48,450 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1323 states to 1323 states and 1407 transitions. [2024-11-19 14:42:48,451 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 35 [2024-11-19 14:42:48,451 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 35 [2024-11-19 14:42:48,451 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1323 states and 1407 transitions. [2024-11-19 14:42:48,452 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-19 14:42:48,452 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1323 states and 1407 transitions. [2024-11-19 14:42:48,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1323 states and 1407 transitions. [2024-11-19 14:42:48,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1323 to 1296. [2024-11-19 14:42:48,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1296 states, 1296 states have (on average 1.0648148148148149) internal successors, (1380), 1295 states have internal predecessors, (1380), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-19 14:42:48,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1296 states to 1296 states and 1380 transitions. [2024-11-19 14:42:48,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1296 states and 1380 transitions. [2024-11-19 14:42:48,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2024-11-19 14:42:48,467 INFO L425 stractBuchiCegarLoop]: Abstraction has 1296 states and 1380 transitions. [2024-11-19 14:42:48,467 INFO L332 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2024-11-19 14:42:48,467 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1296 states and 1380 transitions. [2024-11-19 14:42:48,472 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2024-11-19 14:42:48,472 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-19 14:42:48,472 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-19 14:42:48,475 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [181, 181, 22, 22, 22, 22, 22, 1, 1, 1, 1] [2024-11-19 14:42:48,475 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2024-11-19 14:42:48,475 INFO L745 eck$LassoCheckResult]: Stem: 31614#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 31615#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~ret2#1, main_#t~post3#1, main_#t~mem4#1, main_#t~post5#1, main_~i~1#1, main_~#b~0#1.base, main_~#b~0#1.offset, main_~#mask~0#1.base, main_~#mask~0#1.offset;havoc main_~i~1#1;call main_~#b~0#1.base, main_~#b~0#1.offset := #Ultimate.allocOnStack(128);call main_~#mask~0#1.base, main_~#mask~0#1.offset := #Ultimate.allocOnStack(32);main_~i~1#1 := 0; 31619#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31616#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31617#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32575#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32574#L17-4 foo_#res#1 := foo_~i~0#1; 32573#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32572#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32571#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32570#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32569#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32568#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32567#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32566#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32565#L17-4 foo_#res#1 := foo_~i~0#1; 32564#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32563#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32562#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32561#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32560#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32559#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32558#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32557#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32556#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32555#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32554#L17-4 foo_#res#1 := foo_~i~0#1; 32553#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32552#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32551#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32550#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32549#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32548#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32547#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32546#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32545#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32544#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32543#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32541#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32540#L17-4 foo_#res#1 := foo_~i~0#1; 32539#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32538#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32537#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32535#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32533#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32531#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32529#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32527#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32525#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32523#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32521#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32519#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32517#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32514#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32512#L17-4 foo_#res#1 := foo_~i~0#1; 32510#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32508#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32506#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32504#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32502#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32500#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32498#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32496#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32494#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32492#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32490#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32487#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32485#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32483#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32481#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32478#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32476#L17-4 foo_#res#1 := foo_~i~0#1; 32474#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32472#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32470#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32468#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32466#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32464#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32462#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32460#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32458#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32456#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32454#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32452#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32450#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32448#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32446#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32445#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32443#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32440#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32438#L17-4 foo_#res#1 := foo_~i~0#1; 32436#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32434#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32432#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32430#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32428#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32426#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32424#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32422#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32420#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32418#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32416#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32414#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32412#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32410#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32408#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32406#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32404#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32402#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32400#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32398#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32359#L17-4 foo_#res#1 := foo_~i~0#1; 32357#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32355#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32353#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32351#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32349#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32347#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32345#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32343#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32341#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32339#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32337#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32335#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32333#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32331#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32329#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32327#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32325#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32323#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32321#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32318#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32316#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32315#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32298#L17-4 foo_#res#1 := foo_~i~0#1; 32295#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32292#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32289#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32286#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32283#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32280#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32277#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32274#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32271#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32268#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32265#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32262#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32259#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32256#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32253#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32250#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32247#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32244#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32241#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32238#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32235#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32232#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32231#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32225#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32223#L17-4 foo_#res#1 := foo_~i~0#1; 32221#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32219#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32217#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32215#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32213#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32211#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32209#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32207#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32205#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32203#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32201#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32199#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32197#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32195#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32193#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32191#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32189#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32187#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32185#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32183#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32181#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32178#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32179#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32171#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32169#L17-4 foo_#res#1 := foo_~i~0#1; 32167#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32165#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32163#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32161#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32159#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32157#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32155#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32153#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32151#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32149#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32147#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32145#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32143#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32141#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32139#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32137#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32135#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32133#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32131#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32129#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32127#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32124#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32125#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32117#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32115#L17-4 foo_#res#1 := foo_~i~0#1; 32113#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32111#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32109#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32107#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32105#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32103#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32101#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32099#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32097#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32095#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32093#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32091#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32089#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32087#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32085#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32083#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32081#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32079#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32077#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32075#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32073#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32070#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32071#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32063#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32061#L17-4 foo_#res#1 := foo_~i~0#1; 32059#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32057#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32055#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 32053#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32051#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32049#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32047#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32045#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32043#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32041#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32039#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32037#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32035#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32033#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32031#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32029#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32027#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32025#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32023#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32021#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32019#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32016#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 32017#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 32009#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 32007#L17-4 foo_#res#1 := foo_~i~0#1; 32005#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 32003#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 32001#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31999#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31997#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31995#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31993#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31991#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31989#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31987#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31985#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31983#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31981#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31979#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31977#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31975#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31973#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31971#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31969#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31967#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31965#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31962#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31963#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31955#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31953#L17-4 foo_#res#1 := foo_~i~0#1; 31951#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31949#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31947#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31945#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31943#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31941#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31939#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31937#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31935#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31933#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31931#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31929#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31927#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31925#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31923#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31921#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31919#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31917#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31915#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31913#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31911#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31908#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31909#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31901#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31899#L17-4 foo_#res#1 := foo_~i~0#1; 31897#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31895#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31893#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31891#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31889#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31887#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31885#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31883#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31881#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31879#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31877#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31875#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31873#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31871#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31869#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31867#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31865#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31863#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31861#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31859#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31857#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31854#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31855#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31847#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31845#L17-4 foo_#res#1 := foo_~i~0#1; 31843#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31841#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31839#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31837#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31835#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31833#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31831#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31829#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31827#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31825#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31823#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31821#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31819#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31817#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31815#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31813#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31811#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31809#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31807#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31805#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31803#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31800#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31801#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31793#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31791#L17-4 foo_#res#1 := foo_~i~0#1; 31789#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31787#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31785#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31783#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31781#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31779#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31777#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31775#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31773#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31771#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31769#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31767#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31765#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31763#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31761#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31759#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31757#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31755#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31753#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31751#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31749#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31746#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31747#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31739#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31635#L17-4 foo_#res#1 := foo_~i~0#1; 31736#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31734#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31732#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31730#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31728#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31726#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31724#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31722#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31720#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31718#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31716#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31714#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31712#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31710#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31708#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31706#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31704#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31702#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31700#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31698#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31696#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31694#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31692#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31689#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31690#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31686#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31632#L17-4 foo_#res#1 := foo_~i~0#1; 31685#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31684#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31683#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31682#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31681#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31680#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31679#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31678#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31677#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31676#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31675#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31674#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31673#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31672#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31671#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31670#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31669#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31668#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31667#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31666#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31665#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31664#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31663#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31662#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31661#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31660#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31659#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31658#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31629#L17-4 foo_#res#1 := foo_~i~0#1; 31657#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31656#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31655#L26-3 assume !!(main_~i~1#1 % 4294967296 < 32);assume { :begin_inline_foo } true;foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1 := main_~#mask~0#1.base, main_~#mask~0#1.offset, main_~i~1#1;havoc foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;foo_~b#1.base, foo_~b#1.offset := foo_#in~b#1.base, foo_#in~b#1.offset;foo_~size#1 := foo_#in~size#1;havoc foo_~a~0#1;havoc foo_~i~0#1;foo_~i~0#1 := 0; 31622#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31654#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31653#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31652#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31651#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31650#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31649#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31648#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31647#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31646#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31645#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31644#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31643#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31642#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31641#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31640#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31639#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31638#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31637#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31636#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31634#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31633#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31631#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31630#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31628#L17-3 assume !!(foo_~i~0#1 <= foo_~size#1);assume 0 <= foo_~i~0#1 % 4294967296 && foo_~i~0#1 % 4294967296 < 32;call foo_#t~mem0#1 := read~int#1(foo_~b#1.base, foo_~b#1.offset + foo_~i~0#1, 1);foo_~a~0#1 := foo_~a~0#1[foo_~i~0#1 := foo_#t~mem0#1];havoc foo_#t~mem0#1; 31627#L17-2 foo_#t~post1#1 := foo_~i~0#1;foo_~i~0#1 := 1 + foo_#t~post1#1;havoc foo_#t~post1#1; 31626#L17-3 assume !(foo_~i~0#1 <= foo_~size#1); 31625#L17-4 foo_#res#1 := foo_~i~0#1; 31624#foo_returnLabel#1 main_#t~ret2#1 := foo_#res#1;havoc foo_#t~mem0#1, foo_#t~post1#1, foo_~b#1.base, foo_~b#1.offset, foo_~size#1, foo_~a~0#1, foo_~i~0#1;havoc foo_#in~b#1.base, foo_#in~b#1.offset, foo_#in~size#1;assume { :end_inline_foo } true;call write~int#0(main_#t~ret2#1, main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4);havoc main_#t~ret2#1; 31623#L26-2 main_#t~post3#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post3#1;havoc main_#t~post3#1; 31621#L26-3 assume !(main_~i~1#1 % 4294967296 < 32); 31613#L26-4 main_~i~1#1 := 0; 31608#L29-3 [2024-11-19 14:42:48,476 INFO L747 eck$LassoCheckResult]: Loop: 31608#L29-3 assume !!(main_~i~1#1 % 4294967296 < 32);call main_#t~mem4#1 := read~int#0(main_~#b~0#1.base, main_~#b~0#1.offset + 4 * main_~i~1#1, 4); 31609#L30 assume !(main_#t~mem4#1 != main_~i~1#1);havoc main_#t~mem4#1; 31610#L29-2 main_#t~post5#1 := main_~i~1#1;main_~i~1#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1; 31608#L29-3 [2024-11-19 14:42:48,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:48,477 INFO L85 PathProgramCache]: Analyzing trace with hash -1807699287, now seen corresponding path program 11 times [2024-11-19 14:42:48,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:48,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169476304] [2024-11-19 14:42:48,477 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:48,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:49,067 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2024-11-19 14:42:49,067 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:49,952 INFO L134 CoverageAnalysis]: Checked inductivity of 37739 backedges. 20291 proven. 717 refuted. 0 times theorem prover too weak. 16731 trivial. 0 not checked. [2024-11-19 14:42:49,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-19 14:42:49,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169476304] [2024-11-19 14:42:49,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169476304] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-19 14:42:49,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [371553988] [2024-11-19 14:42:49,953 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:49,954 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-19 14:42:49,954 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-19 14:42:49,956 INFO L229 MonitoredProcess]: Starting monitored process 82 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-19 14:42:49,957 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Waiting until timeout for monitored process [2024-11-19 14:42:51,296 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2024-11-19 14:42:51,297 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-19 14:42:51,304 INFO L255 TraceCheckSpWp]: Trace formula consists of 1128 conjuncts, 28 conjuncts are in the unsatisfiable core [2024-11-19 14:42:51,311 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-19 14:42:51,801 INFO L134 CoverageAnalysis]: Checked inductivity of 37739 backedges. 20805 proven. 1505 refuted. 0 times theorem prover too weak. 15429 trivial. 0 not checked. [2024-11-19 14:42:51,801 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-19 14:42:52,192 INFO L134 CoverageAnalysis]: Checked inductivity of 37739 backedges. 21199 proven. 1111 refuted. 0 times theorem prover too weak. 15429 trivial. 0 not checked. [2024-11-19 14:42:52,192 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [371553988] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-19 14:42:52,192 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-19 14:42:52,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 50 [2024-11-19 14:42:52,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [251439861] [2024-11-19 14:42:52,192 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-19 14:42:52,193 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-19 14:42:52,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-19 14:42:52,193 INFO L85 PathProgramCache]: Analyzing trace with hash 69737, now seen corresponding path program 11 times [2024-11-19 14:42:52,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-19 14:42:52,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028501923] [2024-11-19 14:42:52,194 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-19 14:42:52,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-19 14:42:52,200 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-19 14:42:52,200 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-19 14:42:52,200 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-19 14:42:52,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-19 14:42:52,205 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-19 14:42:52,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-19 14:42:52,245 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2024-11-19 14:42:52,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=450, Invalid=2000, Unknown=0, NotChecked=0, Total=2450 [2024-11-19 14:42:52,246 INFO L87 Difference]: Start difference. First operand 1296 states and 1380 transitions. cyclomatic complexity: 101 Second operand has 50 states, 50 states have (on average 2.8) internal successors, (140), 50 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)