./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i --full-output --architecture 64bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 3061b6dc
Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe
--- Real Ultimate output ---
This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m
[2024-11-19 14:18:53,099 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2024-11-19 14:18:53,165 INFO  L114        SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf
[2024-11-19 14:18:53,171 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2024-11-19 14:18:53,172 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-19 14:18:53,195 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-19 14:18:53,196 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-19 14:18:53,196 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-19 14:18:53,197 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-19 14:18:53,197 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2024-11-19 14:18:53,197 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-19 14:18:53,198 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2024-11-19 14:18:53,198 INFO  L153        SettingsManager]:  * Use SBE=true
[2024-11-19 14:18:53,200 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2024-11-19 14:18:53,202 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2024-11-19 14:18:53,203 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2024-11-19 14:18:53,203 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2024-11-19 14:18:53,203 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2024-11-19 14:18:53,203 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2024-11-19 14:18:53,204 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-19 14:18:53,204 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2024-11-19 14:18:53,208 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2024-11-19 14:18:53,209 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2024-11-19 14:18:53,209 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2024-11-19 14:18:53,209 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2024-11-19 14:18:53,209 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2024-11-19 14:18:53,209 INFO  L153        SettingsManager]:  * Allow undefined functions=false
[2024-11-19 14:18:53,210 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2024-11-19 14:18:53,210 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2024-11-19 14:18:53,210 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2024-11-19 14:18:53,210 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2024-11-19 14:18:53,210 INFO  L151        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-19 14:18:53,211 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2024-11-19 14:18:53,211 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-19 14:18:53,211 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2024-11-19 14:18:53,211 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2024-11-19 14:18:53,212 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 68763c9a2179c48c1fc2989bd19031bbd8829c13b9c8eeaf244defd8aef53cfe
[2024-11-19 14:18:53,463 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-19 14:18:53,492 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-19 14:18:53,494 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-19 14:18:53,495 INFO  L270        PluginConnector]: Initializing CDTParser...
[2024-11-19 14:18:53,497 INFO  L274        PluginConnector]: CDTParser initialized
[2024-11-19 14:18:53,498 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i
[2024-11-19 14:18:55,014 INFO  L533              CDTParser]: Created temporary CDT project at NULL
[2024-11-19 14:18:55,240 INFO  L384              CDTParser]: Found 1 translation units.
[2024-11-19 14:18:55,241 INFO  L180              CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/Urban-2013WST-Fig2-modified1000-alloca.i
[2024-11-19 14:18:55,252 INFO  L427              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/30c3dbd67/9d65938e5a914a40a718ed7bdf0b2530/FLAG17bd0183e
[2024-11-19 14:18:55,583 INFO  L435              CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/30c3dbd67/9d65938e5a914a40a718ed7bdf0b2530
[2024-11-19 14:18:55,586 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-19 14:18:55,588 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-19 14:18:55,591 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-19 14:18:55,592 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-19 14:18:55,597 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-19 14:18:55,597 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 02:18:55" (1/1) ...
[2024-11-19 14:18:55,598 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@72eb9782 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:55, skipping insertion in model container
[2024-11-19 14:18:55,598 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 19.11 02:18:55" (1/1) ...
[2024-11-19 14:18:55,636 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2024-11-19 14:18:56,002 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-19 14:18:56,014 INFO  L200         MainTranslator]: Completed pre-run
[2024-11-19 14:18:56,068 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2024-11-19 14:18:56,097 INFO  L204         MainTranslator]: Completed translation
[2024-11-19 14:18:56,097 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56 WrapperNode
[2024-11-19 14:18:56,097 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-19 14:18:56,099 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-19 14:18:56,099 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-19 14:18:56,099 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-19 14:18:56,106 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,123 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,140 INFO  L138                Inliner]: procedures = 109, calls = 13, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 33
[2024-11-19 14:18:56,141 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-19 14:18:56,142 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-19 14:18:56,142 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-19 14:18:56,142 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2024-11-19 14:18:56,151 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,151 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,153 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,163 INFO  L175           MemorySlicer]: Split 7 memory accesses to 2 slices as follows [4, 3]. 57 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0]. The 3 writes are split as follows [2, 1].
[2024-11-19 14:18:56,164 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,164 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,168 INFO  L184        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,172 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,173 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,175 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,179 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-19 14:18:56,180 INFO  L112        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-19 14:18:56,180 INFO  L270        PluginConnector]: Initializing RCFGBuilder...
[2024-11-19 14:18:56,181 INFO  L274        PluginConnector]: RCFGBuilder initialized
[2024-11-19 14:18:56,181 INFO  L184        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (1/1) ...
[2024-11-19 14:18:56,187 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-19 14:18:56,199 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:18:56,216 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-19 14:18:56,219 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2024-11-19 14:18:56,271 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#0
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure read~int#1
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#0
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure write~int#1
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2024-11-19 14:18:56,272 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-19 14:18:56,272 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-19 14:18:56,379 INFO  L238             CfgBuilder]: Building ICFG
[2024-11-19 14:18:56,381 INFO  L264             CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-19 14:18:56,488 INFO  L?                        ?]: Removed 4 outVars from TransFormulas that were not future-live.
[2024-11-19 14:18:56,488 INFO  L287             CfgBuilder]: Performing block encoding
[2024-11-19 14:18:56,497 INFO  L311             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-19 14:18:56,498 INFO  L316             CfgBuilder]: Removed 2 assume(true) statements.
[2024-11-19 14:18:56,498 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 02:18:56 BoogieIcfgContainer
[2024-11-19 14:18:56,498 INFO  L131        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-19 14:18:56,499 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2024-11-19 14:18:56,499 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2024-11-19 14:18:56,503 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2024-11-19 14:18:56,504 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-19 14:18:56,504 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 19.11 02:18:55" (1/3) ...
[2024-11-19 14:18:56,505 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d2fc0b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 02:18:56, skipping insertion in model container
[2024-11-19 14:18:56,505 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-19 14:18:56,505 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 19.11 02:18:56" (2/3) ...
[2024-11-19 14:18:56,506 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2d2fc0b7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 19.11 02:18:56, skipping insertion in model container
[2024-11-19 14:18:56,506 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-19 14:18:56,507 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 19.11 02:18:56" (3/3) ...
[2024-11-19 14:18:56,509 INFO  L332   chiAutomizerObserver]: Analyzing ICFG Urban-2013WST-Fig2-modified1000-alloca.i
[2024-11-19 14:18:56,564 INFO  L300   stractBuchiCegarLoop]: Interprodecural is true
[2024-11-19 14:18:56,564 INFO  L301   stractBuchiCegarLoop]: Hoare is None
[2024-11-19 14:18:56,564 INFO  L302   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2024-11-19 14:18:56,564 INFO  L303   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2024-11-19 14:18:56,565 INFO  L304   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2024-11-19 14:18:56,565 INFO  L305   stractBuchiCegarLoop]: Difference is false
[2024-11-19 14:18:56,565 INFO  L306   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2024-11-19 14:18:56,565 INFO  L310   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2024-11-19 14:18:56,568 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:56,585 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 5
[2024-11-19 14:18:56,586 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:56,586 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:56,591 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:56,591 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1]
[2024-11-19 14:18:56,591 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2024-11-19 14:18:56,591 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:56,592 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 5
[2024-11-19 14:18:56,592 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:56,592 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:56,593 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:56,593 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1]
[2024-11-19 14:18:56,599 INFO  L745   eck$LassoCheckResult]: Stem: 6#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 10#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 5#L549-3true 
[2024-11-19 14:18:56,599 INFO  L747   eck$LassoCheckResult]: Loop: 5#L549-3true call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2#L549-1true assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 7#L551-3true assume !true; 11#L551-4true call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 5#L549-3true 
[2024-11-19 14:18:56,604 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:56,604 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times
[2024-11-19 14:18:56,612 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:56,612 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694141139]
[2024-11-19 14:18:56,613 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-19 14:18:56,613 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:56,710 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:56,711 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:18:56,727 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:56,750 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:18:56,753 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:56,754 INFO  L85        PathProgramCache]: Analyzing trace with hash 1144360, now seen corresponding path program 1 times
[2024-11-19 14:18:56,754 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:56,754 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179156831]
[2024-11-19 14:18:56,754 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-19 14:18:56,755 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:56,769 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-19 14:18:56,818 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:56,819 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:18:56,819 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179156831]
[2024-11-19 14:18:56,820 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179156831] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-19 14:18:56,821 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-19 14:18:56,821 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2024-11-19 14:18:56,821 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1790254682]
[2024-11-19 14:18:56,822 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-19 14:18:56,827 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:18:56,828 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:18:56,865 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-19 14:18:56,866 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-19 14:18:56,868 INFO  L87              Difference]: Start difference. First operand  has 11 states, 10 states have (on average 1.4) internal successors, (14), 10 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand  has 2 states, 2 states have (on average 2.0) internal successors, (4), 2 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:56,874 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:18:56,875 INFO  L93              Difference]: Finished difference Result 11 states and 12 transitions.
[2024-11-19 14:18:56,876 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 12 transitions.
[2024-11-19 14:18:56,878 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 5
[2024-11-19 14:18:56,881 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 8 transitions.
[2024-11-19 14:18:56,882 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 7
[2024-11-19 14:18:56,882 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 7
[2024-11-19 14:18:56,883 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 7 states and 8 transitions.
[2024-11-19 14:18:56,883 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:18:56,884 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions.
[2024-11-19 14:18:56,899 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 7 states and 8 transitions.
[2024-11-19 14:18:56,907 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7.
[2024-11-19 14:18:56,908 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:56,909 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions.
[2024-11-19 14:18:56,910 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions.
[2024-11-19 14:18:56,911 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2024-11-19 14:18:56,917 INFO  L425   stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions.
[2024-11-19 14:18:56,917 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2024-11-19 14:18:56,917 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions.
[2024-11-19 14:18:56,918 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 5
[2024-11-19 14:18:56,918 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:56,919 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:56,919 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:56,919 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1]
[2024-11-19 14:18:56,919 INFO  L745   eck$LassoCheckResult]: Stem: 33#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 34#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 32#L549-3 
[2024-11-19 14:18:56,919 INFO  L747   eck$LassoCheckResult]: Loop: 32#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 30#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 31#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 35#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 36#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 32#L549-3 
[2024-11-19 14:18:56,920 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:56,920 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times
[2024-11-19 14:18:56,921 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:56,922 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263289185]
[2024-11-19 14:18:56,922 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-19 14:18:56,922 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:56,944 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2024-11-19 14:18:56,945 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:18:56,945 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:18:56,957 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:56,962 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:18:56,963 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:56,963 INFO  L85        PathProgramCache]: Analyzing trace with hash 35468273, now seen corresponding path program 1 times
[2024-11-19 14:18:56,963 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:56,963 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918633236]
[2024-11-19 14:18:56,963 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-19 14:18:56,964 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:56,995 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-19 14:18:57,164 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:57,165 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:18:57,165 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918633236]
[2024-11-19 14:18:57,165 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1918633236] provided 1 perfect and 0 imperfect interpolant sequences
[2024-11-19 14:18:57,165 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2024-11-19 14:18:57,166 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2024-11-19 14:18:57,166 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1008226879]
[2024-11-19 14:18:57,166 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2024-11-19 14:18:57,166 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:18:57,166 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:18:57,167 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2024-11-19 14:18:57,167 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2024-11-19 14:18:57,168 INFO  L87              Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 2 Second operand  has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:57,211 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:18:57,211 INFO  L93              Difference]: Finished difference Result 9 states and 10 transitions.
[2024-11-19 14:18:57,211 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions.
[2024-11-19 14:18:57,211 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 7
[2024-11-19 14:18:57,212 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions.
[2024-11-19 14:18:57,212 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 9
[2024-11-19 14:18:57,212 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 9
[2024-11-19 14:18:57,212 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions.
[2024-11-19 14:18:57,212 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:18:57,212 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions.
[2024-11-19 14:18:57,213 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions.
[2024-11-19 14:18:57,214 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9.
[2024-11-19 14:18:57,214 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:57,214 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions.
[2024-11-19 14:18:57,215 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions.
[2024-11-19 14:18:57,215 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2024-11-19 14:18:57,217 INFO  L425   stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions.
[2024-11-19 14:18:57,218 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2024-11-19 14:18:57,220 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions.
[2024-11-19 14:18:57,220 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 7
[2024-11-19 14:18:57,220 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:57,220 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:57,221 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:57,221 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1]
[2024-11-19 14:18:57,221 INFO  L745   eck$LassoCheckResult]: Stem: 60#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 61#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 57#L549-3 
[2024-11-19 14:18:57,222 INFO  L747   eck$LassoCheckResult]: Loop: 57#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 55#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 56#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 58#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 59#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 63#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 62#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 57#L549-3 
[2024-11-19 14:18:57,222 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:57,223 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times
[2024-11-19 14:18:57,223 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:57,224 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328346945]
[2024-11-19 14:18:57,224 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2024-11-19 14:18:57,224 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:57,240 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s)
[2024-11-19 14:18:57,240 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:18:57,240 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:18:57,245 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:57,248 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:18:57,249 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:57,249 INFO  L85        PathProgramCache]: Analyzing trace with hash -274676436, now seen corresponding path program 1 times
[2024-11-19 14:18:57,252 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:57,253 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219263792]
[2024-11-19 14:18:57,253 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-19 14:18:57,253 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:57,270 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-19 14:18:57,507 INFO  L134       CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:57,507 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:18:57,508 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219263792]
[2024-11-19 14:18:57,508 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219263792] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:18:57,508 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [150436681]
[2024-11-19 14:18:57,508 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-19 14:18:57,509 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:18:57,509 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:18:57,511 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:18:57,514 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-19 14:18:57,587 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-19 14:18:57,590 INFO  L255         TraceCheckSpWp]: Trace formula consists of 47 conjuncts, 8 conjuncts are in the unsatisfiable core
[2024-11-19 14:18:57,593 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-19 14:18:57,656 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1
[2024-11-19 14:18:57,691 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:18:57,707 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7
[2024-11-19 14:18:57,714 INFO  L134       CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:57,714 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-19 14:18:57,770 INFO  L134       CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:57,772 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [150436681] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-19 14:18:57,772 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-19 14:18:57,772 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 10
[2024-11-19 14:18:57,772 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119855969]
[2024-11-19 14:18:57,773 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-19 14:18:57,773 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:18:57,773 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:18:57,774 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2024-11-19 14:18:57,774 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=55, Unknown=0, NotChecked=0, Total=90
[2024-11-19 14:18:57,775 INFO  L87              Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 2 Second operand  has 10 states, 10 states have (on average 1.5) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:57,872 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:18:57,873 INFO  L93              Difference]: Finished difference Result 15 states and 16 transitions.
[2024-11-19 14:18:57,873 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions.
[2024-11-19 14:18:57,873 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 13
[2024-11-19 14:18:57,875 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions.
[2024-11-19 14:18:57,875 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 15
[2024-11-19 14:18:57,875 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 15
[2024-11-19 14:18:57,876 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions.
[2024-11-19 14:18:57,876 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:18:57,876 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions.
[2024-11-19 14:18:57,876 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions.
[2024-11-19 14:18:57,877 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15.
[2024-11-19 14:18:57,878 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:57,879 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions.
[2024-11-19 14:18:57,879 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions.
[2024-11-19 14:18:57,879 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. 
[2024-11-19 14:18:57,880 INFO  L425   stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions.
[2024-11-19 14:18:57,880 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2024-11-19 14:18:57,880 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions.
[2024-11-19 14:18:57,881 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 13
[2024-11-19 14:18:57,881 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:57,882 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:57,883 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:57,883 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [5, 4, 1, 1, 1, 1]
[2024-11-19 14:18:57,883 INFO  L745   eck$LassoCheckResult]: Stem: 140#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 136#L549-3 
[2024-11-19 14:18:57,883 INFO  L747   eck$LassoCheckResult]: Loop: 136#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 134#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 135#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 137#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 138#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 139#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 148#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 146#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 145#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 144#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 143#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 142#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 136#L549-3 
[2024-11-19 14:18:57,884 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:57,884 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times
[2024-11-19 14:18:57,884 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:57,884 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327996970]
[2024-11-19 14:18:57,884 INFO  L93    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2024-11-19 14:18:57,884 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:57,897 INFO  L227   tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s)
[2024-11-19 14:18:57,898 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:18:57,898 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:18:57,901 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:57,903 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:18:57,904 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:57,904 INFO  L85        PathProgramCache]: Analyzing trace with hash 351922269, now seen corresponding path program 2 times
[2024-11-19 14:18:57,904 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:57,904 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1279597644]
[2024-11-19 14:18:57,904 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-19 14:18:57,904 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:57,926 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-19 14:18:57,927 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:18:58,335 INFO  L134       CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:58,336 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:18:58,336 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1279597644]
[2024-11-19 14:18:58,336 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1279597644] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:18:58,336 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [769802703]
[2024-11-19 14:18:58,336 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-19 14:18:58,336 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:18:58,337 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:18:58,360 INFO  L229       MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:18:58,363 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-19 14:18:58,433 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2024-11-19 14:18:58,434 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:18:58,435 INFO  L255         TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 17 conjuncts are in the unsatisfiable core
[2024-11-19 14:18:58,437 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-19 14:18:58,447 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1
[2024-11-19 14:18:58,470 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:18:58,490 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:18:58,512 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:18:58,531 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:18:58,541 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7
[2024-11-19 14:18:58,548 INFO  L134       CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:58,549 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-19 14:18:58,712 INFO  L134       CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:58,713 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [769802703] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-19 14:18:58,713 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-19 14:18:58,713 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 8, 8] total 17
[2024-11-19 14:18:58,713 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290749521]
[2024-11-19 14:18:58,713 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-19 14:18:58,713 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:18:58,714 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:18:58,714 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants.
[2024-11-19 14:18:58,715 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=162, Unknown=0, NotChecked=0, Total=272
[2024-11-19 14:18:58,716 INFO  L87              Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 2 Second operand  has 17 states, 17 states have (on average 1.7647058823529411) internal successors, (30), 17 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:58,873 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:18:58,873 INFO  L93              Difference]: Finished difference Result 27 states and 28 transitions.
[2024-11-19 14:18:58,873 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions.
[2024-11-19 14:18:58,874 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 25
[2024-11-19 14:18:58,875 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions.
[2024-11-19 14:18:58,875 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 27
[2024-11-19 14:18:58,875 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 27
[2024-11-19 14:18:58,876 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions.
[2024-11-19 14:18:58,876 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:18:58,876 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions.
[2024-11-19 14:18:58,876 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions.
[2024-11-19 14:18:58,877 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27.
[2024-11-19 14:18:58,878 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:18:58,880 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions.
[2024-11-19 14:18:58,880 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions.
[2024-11-19 14:18:58,882 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. 
[2024-11-19 14:18:58,883 INFO  L425   stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions.
[2024-11-19 14:18:58,883 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 5 ============
[2024-11-19 14:18:58,883 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions.
[2024-11-19 14:18:58,884 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 25
[2024-11-19 14:18:58,884 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:18:58,884 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:18:58,885 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:18:58,885 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [11, 10, 1, 1, 1, 1]
[2024-11-19 14:18:58,885 INFO  L745   eck$LassoCheckResult]: Stem: 288#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 289#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 284#L549-3 
[2024-11-19 14:18:58,885 INFO  L747   eck$LassoCheckResult]: Loop: 284#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 282#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 283#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 285#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 286#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 287#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 308#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 307#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 306#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 305#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 304#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 303#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 302#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 301#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 300#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 299#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 298#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 297#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 296#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 295#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 294#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 293#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 292#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 291#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 290#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 284#L549-3 
[2024-11-19 14:18:58,885 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:58,885 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times
[2024-11-19 14:18:58,888 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:58,888 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763708348]
[2024-11-19 14:18:58,888 INFO  L93    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2024-11-19 14:18:58,888 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:58,897 INFO  L227   tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2024-11-19 14:18:58,898 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:18:58,898 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:18:58,900 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:18:58,903 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:18:58,904 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:18:58,904 INFO  L85        PathProgramCache]: Analyzing trace with hash 646907007, now seen corresponding path program 3 times
[2024-11-19 14:18:58,904 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:18:58,904 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [484058670]
[2024-11-19 14:18:58,904 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2024-11-19 14:18:58,905 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:18:58,951 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s)
[2024-11-19 14:18:58,951 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:18:59,879 INFO  L134       CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:18:59,880 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:18:59,880 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [484058670]
[2024-11-19 14:18:59,880 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [484058670] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:18:59,880 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [551400703]
[2024-11-19 14:18:59,880 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2024-11-19 14:18:59,881 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:18:59,881 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:18:59,883 INFO  L229       MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:18:59,884 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2024-11-19 14:18:59,999 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s)
[2024-11-19 14:18:59,999 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:00,001 INFO  L255         TraceCheckSpWp]: Trace formula consists of 182 conjuncts, 35 conjuncts are in the unsatisfiable core
[2024-11-19 14:19:00,007 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-19 14:19:00,017 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1
[2024-11-19 14:19:00,038 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,050 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,060 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,070 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,080 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,089 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,099 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,109 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,119 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,132 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:00,139 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7
[2024-11-19 14:19:00,141 INFO  L134       CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:00,142 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-19 14:19:00,452 INFO  L134       CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:00,453 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [551400703] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-19 14:19:00,453 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-19 14:19:00,453 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 27
[2024-11-19 14:19:00,453 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279384030]
[2024-11-19 14:19:00,453 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-19 14:19:00,453 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:19:00,454 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:19:00,454 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants.
[2024-11-19 14:19:00,455 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=397, Unknown=0, NotChecked=0, Total=702
[2024-11-19 14:19:00,459 INFO  L87              Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 2 Second operand  has 27 states, 27 states have (on average 1.8888888888888888) internal successors, (51), 27 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:00,916 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:19:00,917 INFO  L93              Difference]: Finished difference Result 51 states and 52 transitions.
[2024-11-19 14:19:00,917 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions.
[2024-11-19 14:19:00,918 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 49
[2024-11-19 14:19:00,918 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions.
[2024-11-19 14:19:00,919 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 51
[2024-11-19 14:19:00,919 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 51
[2024-11-19 14:19:00,919 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions.
[2024-11-19 14:19:00,922 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:19:00,922 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions.
[2024-11-19 14:19:00,922 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions.
[2024-11-19 14:19:00,924 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51.
[2024-11-19 14:19:00,926 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:00,927 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions.
[2024-11-19 14:19:00,927 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions.
[2024-11-19 14:19:00,928 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. 
[2024-11-19 14:19:00,929 INFO  L425   stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions.
[2024-11-19 14:19:00,930 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 6 ============
[2024-11-19 14:19:00,930 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions.
[2024-11-19 14:19:00,931 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 49
[2024-11-19 14:19:00,931 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:19:00,932 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:19:00,933 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:19:00,933 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [23, 22, 1, 1, 1, 1]
[2024-11-19 14:19:00,933 INFO  L745   eck$LassoCheckResult]: Stem: 584#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 585#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 580#L549-3 
[2024-11-19 14:19:00,933 INFO  L747   eck$LassoCheckResult]: Loop: 580#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 578#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 579#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 581#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 582#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 583#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 628#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 627#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 626#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 625#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 624#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 623#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 622#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 621#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 620#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 619#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 618#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 617#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 616#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 615#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 614#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 613#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 612#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 611#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 610#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 609#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 608#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 607#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 606#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 605#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 604#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 603#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 602#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 601#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 600#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 599#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 598#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 597#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 596#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 595#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 594#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 593#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 592#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 591#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 590#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 589#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 588#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 587#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 586#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 580#L549-3 
[2024-11-19 14:19:00,934 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:00,934 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times
[2024-11-19 14:19:00,934 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:00,934 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015549415]
[2024-11-19 14:19:00,934 INFO  L93    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2024-11-19 14:19:00,934 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:00,945 INFO  L227   tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s)
[2024-11-19 14:19:00,945 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:19:00,945 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:19:00,947 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:19:00,950 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:19:00,951 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:00,951 INFO  L85        PathProgramCache]: Analyzing trace with hash 1009537987, now seen corresponding path program 4 times
[2024-11-19 14:19:00,954 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:00,954 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207004098]
[2024-11-19 14:19:00,954 INFO  L93    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2024-11-19 14:19:00,955 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:00,997 INFO  L227   tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s)
[2024-11-19 14:19:00,997 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:03,843 INFO  L134       CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:03,843 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:19:03,843 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207004098]
[2024-11-19 14:19:03,844 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [207004098] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:19:03,844 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [492366159]
[2024-11-19 14:19:03,844 INFO  L93    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2024-11-19 14:19:03,844 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:19:03,844 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:19:03,852 INFO  L229       MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:19:03,856 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-19 14:19:04,233 INFO  L227   tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s)
[2024-11-19 14:19:04,233 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:04,237 INFO  L255         TraceCheckSpWp]: Trace formula consists of 362 conjuncts, 73 conjuncts are in the unsatisfiable core
[2024-11-19 14:19:04,245 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-19 14:19:04,260 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1
[2024-11-19 14:19:04,282 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,290 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,304 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,316 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,325 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,334 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,343 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,353 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,362 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,370 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,380 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,389 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,398 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,408 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,421 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,429 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,438 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,446 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,456 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,464 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,472 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,482 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:04,487 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7
[2024-11-19 14:19:04,490 INFO  L134       CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:04,490 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-19 14:19:05,483 INFO  L134       CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:05,483 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [492366159] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-19 14:19:05,483 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-19 14:19:05,483 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 26, 26] total 70
[2024-11-19 14:19:05,483 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1646983829]
[2024-11-19 14:19:05,484 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-19 14:19:05,484 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:19:05,484 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:19:05,485 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants.
[2024-11-19 14:19:05,487 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=2094, Invalid=2736, Unknown=0, NotChecked=0, Total=4830
[2024-11-19 14:19:05,487 INFO  L87              Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 2 Second operand  has 70 states, 70 states have (on average 1.9285714285714286) internal successors, (135), 70 states have internal predecessors, (135), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:06,510 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:19:06,510 INFO  L93              Difference]: Finished difference Result 99 states and 100 transitions.
[2024-11-19 14:19:06,511 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions.
[2024-11-19 14:19:06,512 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 97
[2024-11-19 14:19:06,513 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions.
[2024-11-19 14:19:06,513 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 99
[2024-11-19 14:19:06,513 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 99
[2024-11-19 14:19:06,514 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions.
[2024-11-19 14:19:06,514 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:19:06,514 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions.
[2024-11-19 14:19:06,515 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions.
[2024-11-19 14:19:06,518 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99.
[2024-11-19 14:19:06,519 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:06,519 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions.
[2024-11-19 14:19:06,520 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions.
[2024-11-19 14:19:06,520 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. 
[2024-11-19 14:19:06,521 INFO  L425   stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions.
[2024-11-19 14:19:06,521 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 7 ============
[2024-11-19 14:19:06,521 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions.
[2024-11-19 14:19:06,522 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 97
[2024-11-19 14:19:06,522 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:19:06,522 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:19:06,523 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:19:06,523 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [47, 46, 1, 1, 1, 1]
[2024-11-19 14:19:06,524 INFO  L745   eck$LassoCheckResult]: Stem: 1149#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 1150#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 1145#L549-3 
[2024-11-19 14:19:06,524 INFO  L747   eck$LassoCheckResult]: Loop: 1145#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 1143#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1144#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1148#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1146#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1147#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1241#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1240#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1239#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1238#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1237#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1236#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1235#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1234#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1233#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1232#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1231#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1230#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1229#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1228#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1227#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1226#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1225#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1224#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1223#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1222#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1221#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1220#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1219#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1218#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1217#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1216#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1215#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1214#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1213#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1212#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1211#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1210#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1209#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1208#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1207#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1206#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1205#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1204#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1203#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1202#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1201#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1200#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1199#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1198#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1197#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1196#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1195#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1194#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1193#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1192#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1191#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1190#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1189#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1188#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1187#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1186#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1185#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1184#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1183#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1182#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1181#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1180#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1179#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1178#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1177#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1176#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1175#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1174#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1173#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1172#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1171#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1170#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1169#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1168#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1167#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1166#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1165#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1164#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1163#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1162#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1161#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1160#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1159#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1158#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1157#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1156#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1155#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1154#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 1153#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 1152#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 1151#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 1145#L549-3 
[2024-11-19 14:19:06,524 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:06,525 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times
[2024-11-19 14:19:06,525 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:06,525 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492412927]
[2024-11-19 14:19:06,525 INFO  L93    rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2024-11-19 14:19:06,525 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:06,534 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:19:06,534 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:19:06,536 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:19:06,537 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:19:06,538 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:06,538 INFO  L85        PathProgramCache]: Analyzing trace with hash 1846627915, now seen corresponding path program 5 times
[2024-11-19 14:19:06,538 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:06,538 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655511340]
[2024-11-19 14:19:06,538 INFO  L93    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2024-11-19 14:19:06,538 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:06,704 INFO  L227   tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s)
[2024-11-19 14:19:06,704 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:12,565 INFO  L134       CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:12,565 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:19:12,565 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655511340]
[2024-11-19 14:19:12,565 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1655511340] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:19:12,566 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1603722153]
[2024-11-19 14:19:12,566 INFO  L93    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2024-11-19 14:19:12,566 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:19:12,566 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:19:12,568 INFO  L229       MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:19:12,569 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2024-11-19 14:19:34,938 INFO  L227   tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s)
[2024-11-19 14:19:34,938 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:34,952 INFO  L255         TraceCheckSpWp]: Trace formula consists of 722 conjuncts, 143 conjuncts are in the unsatisfiable core
[2024-11-19 14:19:34,971 INFO  L278         TraceCheckSpWp]: Computing forward predicates...
[2024-11-19 14:19:34,979 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1
[2024-11-19 14:19:35,001 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,021 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,031 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,040 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,048 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,056 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,063 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,069 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,078 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,088 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,097 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,106 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,113 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,121 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,129 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,137 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,146 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,162 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,170 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,181 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,192 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,203 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,216 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,223 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,232 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,239 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,247 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,255 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,262 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,270 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,278 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,288 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,297 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,305 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,311 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,322 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,332 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,341 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,348 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,361 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,376 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,386 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,395 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,407 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,417 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,431 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13
[2024-11-19 14:19:35,439 INFO  L378             Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7
[2024-11-19 14:19:35,443 INFO  L134       CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:35,443 INFO  L311         TraceCheckSpWp]: Computing backward predicates...
[2024-11-19 14:19:38,254 INFO  L134       CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:38,255 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleZ3 [1603722153] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-19 14:19:38,255 INFO  L185   FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-19 14:19:38,255 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50, 50] total 99
[2024-11-19 14:19:38,255 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372009257]
[2024-11-19 14:19:38,255 INFO  L85    oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-19 14:19:38,256 INFO  L762   eck$LassoCheckResult]: loop already infeasible
[2024-11-19 14:19:38,256 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2024-11-19 14:19:38,258 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants.
[2024-11-19 14:19:38,262 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=4661, Invalid=5041, Unknown=0, NotChecked=0, Total=9702
[2024-11-19 14:19:38,262 INFO  L87              Difference]: Start difference. First operand 99 states and 100 transitions. cyclomatic complexity: 2 Second operand  has 99 states, 99 states have (on average 1.9696969696969697) internal successors, (195), 99 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:41,950 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-19 14:19:41,950 INFO  L93              Difference]: Finished difference Result 195 states and 196 transitions.
[2024-11-19 14:19:41,950 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 195 states and 196 transitions.
[2024-11-19 14:19:41,952 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 193
[2024-11-19 14:19:41,955 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 195 states to 195 states and 196 transitions.
[2024-11-19 14:19:41,955 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 195
[2024-11-19 14:19:41,956 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 195
[2024-11-19 14:19:41,956 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 195 states and 196 transitions.
[2024-11-19 14:19:41,958 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-19 14:19:41,958 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions.
[2024-11-19 14:19:41,958 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 195 states and 196 transitions.
[2024-11-19 14:19:41,966 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 195.
[2024-11-19 14:19:41,966 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 195 states, 195 states have (on average 1.005128205128205) internal successors, (196), 194 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-19 14:19:41,968 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 196 transitions.
[2024-11-19 14:19:41,968 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 195 states and 196 transitions.
[2024-11-19 14:19:41,969 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. 
[2024-11-19 14:19:41,969 INFO  L425   stractBuchiCegarLoop]: Abstraction has 195 states and 196 transitions.
[2024-11-19 14:19:41,969 INFO  L332   stractBuchiCegarLoop]: ======== Iteration 8 ============
[2024-11-19 14:19:41,969 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 195 states and 196 transitions.
[2024-11-19 14:19:41,971 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 193
[2024-11-19 14:19:41,971 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-19 14:19:41,971 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2024-11-19 14:19:41,973 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-19 14:19:41,973 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [95, 94, 1, 1, 1, 1]
[2024-11-19 14:19:41,973 INFO  L745   eck$LassoCheckResult]: Stem: 2309#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier; 2310#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~mem4#1, main_#t~mem5#1, main_#t~mem6#1, main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, main_~x2~0#1.base, main_~x2~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~x1~0#1.base, main_~x1~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~x2~0#1.base, main_~x2~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset; 2305#L549-3 
[2024-11-19 14:19:41,973 INFO  L747   eck$LassoCheckResult]: Loop: 2305#L549-3 call main_#t~mem4#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4); 2303#L549-1 assume !!(main_#t~mem4#1 <= 10);havoc main_#t~mem4#1;call write~int#0(1000, main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2304#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2308#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2306#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2307#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2497#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2496#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2495#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2494#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2493#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2492#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2491#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2490#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2489#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2488#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2487#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2486#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2485#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2484#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2483#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2482#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2481#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2480#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2479#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2478#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2477#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2476#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2475#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2474#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2473#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2472#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2471#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2470#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2469#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2468#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2467#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2466#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2465#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2464#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2463#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2462#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2461#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2460#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2459#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2458#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2457#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2456#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2455#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2454#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2453#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2452#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2451#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2450#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2449#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2448#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2447#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2446#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2445#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2444#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2443#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2442#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2441#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2440#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2439#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2438#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2437#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2436#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2435#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2434#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2433#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2432#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2431#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2430#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2429#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2428#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2427#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2426#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2425#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2424#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2423#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2422#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2421#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2420#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2419#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2418#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2417#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2416#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2415#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2414#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2413#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2412#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2411#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2410#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2409#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2408#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2407#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2406#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2405#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2404#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2403#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2402#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2401#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2400#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2399#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2398#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2397#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2396#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2395#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2394#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2393#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2392#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2391#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2390#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2389#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2388#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2387#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2386#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2385#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2384#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2383#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2382#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2381#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2380#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2379#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2378#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2377#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2376#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2375#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2374#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2373#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2372#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2371#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2370#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2369#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2368#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2367#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2366#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2365#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2364#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2363#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2362#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2361#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2360#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2359#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2358#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2357#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2356#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2355#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2354#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2353#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2352#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2351#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2350#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2349#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2348#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2347#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2346#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2345#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2344#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2343#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2342#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2341#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2340#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2339#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2338#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2337#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2336#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2335#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2334#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2333#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2332#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2331#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2330#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2329#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2328#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2327#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2326#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2325#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2324#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2323#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2322#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2321#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2320#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2319#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2318#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2317#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2316#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2315#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2314#L551-1 assume !!(main_#t~mem5#1 > 1);havoc main_#t~mem5#1;call main_#t~mem6#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4);call write~int#0(main_#t~mem6#1 - 1, main_~x2~0#1.base, main_~x2~0#1.offset, 4);havoc main_#t~mem6#1; 2313#L551-3 call main_#t~mem5#1 := read~int#0(main_~x2~0#1.base, main_~x2~0#1.offset, 4); 2312#L551-1 assume !(main_#t~mem5#1 > 1);havoc main_#t~mem5#1; 2311#L551-4 call main_#t~mem7#1 := read~int#1(main_~x1~0#1.base, main_~x1~0#1.offset, 4);call write~int#1(1 + main_#t~mem7#1, main_~x1~0#1.base, main_~x1~0#1.offset, 4);havoc main_#t~mem7#1; 2305#L549-3 
[2024-11-19 14:19:41,977 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:41,977 INFO  L85        PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times
[2024-11-19 14:19:41,977 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:41,977 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1864484230]
[2024-11-19 14:19:41,977 INFO  L93    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2024-11-19 14:19:41,978 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:41,982 INFO  L227   tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2024-11-19 14:19:41,982 INFO  L228   tOrderPrioritization]: Conjunction of SSA is sat
[2024-11-19 14:19:41,982 INFO  L356             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-19 14:19:41,983 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-19 14:19:41,985 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2024-11-19 14:19:41,985 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2024-11-19 14:19:41,985 INFO  L85        PathProgramCache]: Analyzing trace with hash -1384860837, now seen corresponding path program 6 times
[2024-11-19 14:19:41,985 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2024-11-19 14:19:41,986 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [7829140]
[2024-11-19 14:19:41,986 INFO  L93    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2024-11-19 14:19:41,986 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-19 14:19:42,385 INFO  L227   tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s)
[2024-11-19 14:19:42,386 INFO  L228   tOrderPrioritization]: Conjunction of SSA is unsat
[2024-11-19 14:19:58,665 INFO  L134       CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-19 14:19:58,665 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2024-11-19 14:19:58,665 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [7829140]
[2024-11-19 14:19:58,666 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [7829140] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-19 14:19:58,666 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [754892759]
[2024-11-19 14:19:58,666 INFO  L93    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2024-11-19 14:19:58,666 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-19 14:19:58,666 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2024-11-19 14:19:58,668 INFO  L229       MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-19 14:19:58,669 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process