./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 3061b6dc Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m [2024-11-18 17:30:16,205 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-18 17:30:16,270 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2024-11-18 17:30:16,274 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-18 17:30:16,275 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-18 17:30:16,306 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-18 17:30:16,307 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-18 17:30:16,307 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-18 17:30:16,308 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-18 17:30:16,308 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-18 17:30:16,309 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-18 17:30:16,311 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-18 17:30:16,312 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-18 17:30:16,312 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-18 17:30:16,312 INFO L153 SettingsManager]: * Use SBE=true [2024-11-18 17:30:16,313 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-18 17:30:16,313 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-18 17:30:16,313 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-18 17:30:16,314 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-18 17:30:16,318 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-18 17:30:16,318 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-18 17:30:16,319 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-18 17:30:16,319 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-18 17:30:16,323 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-18 17:30:16,324 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-18 17:30:16,324 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-18 17:30:16,324 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-18 17:30:16,324 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-18 17:30:16,325 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-18 17:30:16,325 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 17:30:16,325 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-18 17:30:16,325 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-18 17:30:16,326 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-18 17:30:16,326 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-18 17:30:16,327 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-18 17:30:16,327 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-18 17:30:16,328 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-18 17:30:16,328 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-18 17:30:16,329 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-18 17:30:16,329 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2024-11-18 17:30:16,595 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-18 17:30:16,621 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-18 17:30:16,628 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-18 17:30:16,632 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-18 17:30:16,633 INFO L274 PluginConnector]: CDTParser initialized [2024-11-18 17:30:16,634 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-18 17:30:18,132 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-18 17:30:18,391 INFO L384 CDTParser]: Found 1 translation units. [2024-11-18 17:30:18,392 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-18 17:30:18,413 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f877d5631/285c24ad4fbc4412b949d2d5d8060cce/FLAGdbe3e0b2f [2024-11-18 17:30:18,435 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f877d5631/285c24ad4fbc4412b949d2d5d8060cce [2024-11-18 17:30:18,439 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-18 17:30:18,440 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-18 17:30:18,441 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-18 17:30:18,442 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-18 17:30:18,447 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-18 17:30:18,448 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:30:18" (1/1) ... [2024-11-18 17:30:18,451 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@58fc519e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:18, skipping insertion in model container [2024-11-18 17:30:18,452 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:30:18" (1/1) ... [2024-11-18 17:30:18,505 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-18 17:30:18,713 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-18 17:30:18,930 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 17:30:18,944 INFO L200 MainTranslator]: Completed pre-run [2024-11-18 17:30:18,954 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-18 17:30:19,073 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 17:30:19,107 INFO L204 MainTranslator]: Completed translation [2024-11-18 17:30:19,108 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19 WrapperNode [2024-11-18 17:30:19,108 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-18 17:30:19,109 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-18 17:30:19,109 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-18 17:30:19,110 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-18 17:30:19,116 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,167 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,447 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 1946 [2024-11-18 17:30:19,447 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-18 17:30:19,449 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-18 17:30:19,449 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-18 17:30:19,450 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-18 17:30:19,461 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,461 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,512 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,593 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-18 17:30:19,593 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,594 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,656 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,669 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,689 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,705 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,733 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-18 17:30:19,734 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-18 17:30:19,734 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-18 17:30:19,734 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-18 17:30:19,735 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (1/1) ... [2024-11-18 17:30:19,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 17:30:19,757 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 17:30:19,774 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-18 17:30:19,780 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-18 17:30:19,826 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-18 17:30:19,826 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-18 17:30:19,826 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-18 17:30:19,826 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-18 17:30:20,100 INFO L238 CfgBuilder]: Building ICFG [2024-11-18 17:30:20,103 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-18 17:30:22,140 INFO L? ?]: Removed 1134 outVars from TransFormulas that were not future-live. [2024-11-18 17:30:22,141 INFO L287 CfgBuilder]: Performing block encoding [2024-11-18 17:30:22,175 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-18 17:30:22,175 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-18 17:30:22,176 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:30:22 BoogieIcfgContainer [2024-11-18 17:30:22,176 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-18 17:30:22,178 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-18 17:30:22,178 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-18 17:30:22,183 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-18 17:30:22,183 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 05:30:18" (1/3) ... [2024-11-18 17:30:22,184 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e8d1a84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:30:22, skipping insertion in model container [2024-11-18 17:30:22,184 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:30:19" (2/3) ... [2024-11-18 17:30:22,184 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e8d1a84 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:30:22, skipping insertion in model container [2024-11-18 17:30:22,184 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:30:22" (3/3) ... [2024-11-18 17:30:22,185 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2024-11-18 17:30:22,203 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-18 17:30:22,204 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-11-18 17:30:22,287 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-18 17:30:22,295 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@173ca21e, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-18 17:30:22,296 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-18 17:30:22,303 INFO L276 IsEmpty]: Start isEmpty. Operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:22,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 216 [2024-11-18 17:30:22,328 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:22,329 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:22,329 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:22,334 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:22,335 INFO L85 PathProgramCache]: Analyzing trace with hash 1124175102, now seen corresponding path program 1 times [2024-11-18 17:30:22,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:22,344 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1399963897] [2024-11-18 17:30:22,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:22,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:22,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:24,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:24,320 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:24,320 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1399963897] [2024-11-18 17:30:24,320 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1399963897] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:24,321 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:24,321 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:24,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314893869] [2024-11-18 17:30:24,323 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:24,327 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:24,328 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:24,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:24,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:24,355 INFO L87 Difference]: Start difference. First operand has 498 states, 496 states have (on average 1.497983870967742) internal successors, (743), 497 states have internal predecessors, (743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:24,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:24,462 INFO L93 Difference]: Finished difference Result 901 states and 1347 transitions. [2024-11-18 17:30:24,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:24,465 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 215 [2024-11-18 17:30:24,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:24,485 INFO L225 Difference]: With dead ends: 901 [2024-11-18 17:30:24,486 INFO L226 Difference]: Without dead ends: 497 [2024-11-18 17:30:24,491 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:24,496 INFO L432 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1468 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2205 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:24,497 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2205 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:24,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2024-11-18 17:30:24,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 497. [2024-11-18 17:30:24,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 497 states, 496 states have (on average 1.4939516129032258) internal successors, (741), 496 states have internal predecessors, (741), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:24,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 741 transitions. [2024-11-18 17:30:24,566 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 741 transitions. Word has length 215 [2024-11-18 17:30:24,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:24,569 INFO L471 AbstractCegarLoop]: Abstraction has 497 states and 741 transitions. [2024-11-18 17:30:24,570 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 53.75) internal successors, (215), 4 states have internal predecessors, (215), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:24,570 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 741 transitions. [2024-11-18 17:30:24,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2024-11-18 17:30:24,578 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:24,578 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:24,579 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-18 17:30:24,579 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:24,579 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:24,580 INFO L85 PathProgramCache]: Analyzing trace with hash 491386312, now seen corresponding path program 1 times [2024-11-18 17:30:24,580 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:24,580 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735812139] [2024-11-18 17:30:24,580 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:24,580 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:24,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:25,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:25,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:25,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735812139] [2024-11-18 17:30:25,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [735812139] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:25,462 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:25,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 17:30:25,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224732194] [2024-11-18 17:30:25,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:25,466 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 17:30:25,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:25,469 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 17:30:25,469 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:25,469 INFO L87 Difference]: Start difference. First operand 497 states and 741 transitions. Second operand has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:26,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:26,358 INFO L93 Difference]: Finished difference Result 1711 states and 2552 transitions. [2024-11-18 17:30:26,358 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-18 17:30:26,359 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 216 [2024-11-18 17:30:26,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:26,363 INFO L225 Difference]: With dead ends: 1711 [2024-11-18 17:30:26,363 INFO L226 Difference]: Without dead ends: 876 [2024-11-18 17:30:26,367 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2024-11-18 17:30:26,368 INFO L432 NwaCegarLoop]: 867 mSDtfsCounter, 2923 mSDsluCounter, 1907 mSDsCounter, 0 mSdLazyCounter, 581 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2923 SdHoareTripleChecker+Valid, 2774 SdHoareTripleChecker+Invalid, 650 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 581 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:26,369 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2923 Valid, 2774 Invalid, 650 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 581 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2024-11-18 17:30:26,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 876 states. [2024-11-18 17:30:26,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 876 to 695. [2024-11-18 17:30:26,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 695 states, 694 states have (on average 1.494236311239193) internal successors, (1037), 694 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:26,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 695 states to 695 states and 1037 transitions. [2024-11-18 17:30:26,415 INFO L78 Accepts]: Start accepts. Automaton has 695 states and 1037 transitions. Word has length 216 [2024-11-18 17:30:26,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:26,416 INFO L471 AbstractCegarLoop]: Abstraction has 695 states and 1037 transitions. [2024-11-18 17:30:26,417 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 36.0) internal successors, (216), 6 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:26,417 INFO L276 IsEmpty]: Start isEmpty. Operand 695 states and 1037 transitions. [2024-11-18 17:30:26,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2024-11-18 17:30:26,421 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:26,421 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:26,421 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-18 17:30:26,422 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:26,422 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:26,422 INFO L85 PathProgramCache]: Analyzing trace with hash -907188898, now seen corresponding path program 1 times [2024-11-18 17:30:26,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:26,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [748641408] [2024-11-18 17:30:26,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:26,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:26,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:27,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:27,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:27,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [748641408] [2024-11-18 17:30:27,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [748641408] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:27,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:27,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:27,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413020278] [2024-11-18 17:30:27,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:27,142 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:27,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:27,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:27,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:27,143 INFO L87 Difference]: Start difference. First operand 695 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:27,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:27,177 INFO L93 Difference]: Finished difference Result 1100 states and 1641 transitions. [2024-11-18 17:30:27,178 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:27,178 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 217 [2024-11-18 17:30:27,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:27,181 INFO L225 Difference]: With dead ends: 1100 [2024-11-18 17:30:27,181 INFO L226 Difference]: Without dead ends: 697 [2024-11-18 17:30:27,182 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:27,183 INFO L432 NwaCegarLoop]: 737 mSDtfsCounter, 0 mSDsluCounter, 1464 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 2201 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:27,184 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 2201 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:27,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 697 states. [2024-11-18 17:30:27,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 697 to 697. [2024-11-18 17:30:27,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 697 states, 696 states have (on average 1.492816091954023) internal successors, (1039), 696 states have internal predecessors, (1039), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:27,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 697 states to 697 states and 1039 transitions. [2024-11-18 17:30:27,198 INFO L78 Accepts]: Start accepts. Automaton has 697 states and 1039 transitions. Word has length 217 [2024-11-18 17:30:27,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:27,198 INFO L471 AbstractCegarLoop]: Abstraction has 697 states and 1039 transitions. [2024-11-18 17:30:27,199 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.25) internal successors, (217), 4 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:27,199 INFO L276 IsEmpty]: Start isEmpty. Operand 697 states and 1039 transitions. [2024-11-18 17:30:27,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 219 [2024-11-18 17:30:27,201 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:27,201 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:27,201 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-18 17:30:27,202 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:27,202 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:27,202 INFO L85 PathProgramCache]: Analyzing trace with hash 843950657, now seen corresponding path program 1 times [2024-11-18 17:30:27,202 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:27,203 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [994129759] [2024-11-18 17:30:27,203 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:27,203 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:27,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:28,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:28,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:28,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [994129759] [2024-11-18 17:30:28,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [994129759] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:28,548 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:28,548 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 17:30:28,548 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057297549] [2024-11-18 17:30:28,548 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:28,549 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 17:30:28,549 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:28,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 17:30:28,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-18 17:30:28,550 INFO L87 Difference]: Start difference. First operand 697 states and 1039 transitions. Second operand has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:28,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:28,644 INFO L93 Difference]: Finished difference Result 1106 states and 1648 transitions. [2024-11-18 17:30:28,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 17:30:28,645 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 218 [2024-11-18 17:30:28,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:28,648 INFO L225 Difference]: With dead ends: 1106 [2024-11-18 17:30:28,648 INFO L226 Difference]: Without dead ends: 701 [2024-11-18 17:30:28,649 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:28,650 INFO L432 NwaCegarLoop]: 722 mSDtfsCounter, 535 mSDsluCounter, 1436 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 535 SdHoareTripleChecker+Valid, 2158 SdHoareTripleChecker+Invalid, 59 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:28,653 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [535 Valid, 2158 Invalid, 59 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:28,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2024-11-18 17:30:28,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 700. [2024-11-18 17:30:28,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4907010014306152) internal successors, (1042), 699 states have internal predecessors, (1042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:28,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1042 transitions. [2024-11-18 17:30:28,693 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1042 transitions. Word has length 218 [2024-11-18 17:30:28,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:28,693 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1042 transitions. [2024-11-18 17:30:28,694 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 43.6) internal successors, (218), 5 states have internal predecessors, (218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:28,694 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1042 transitions. [2024-11-18 17:30:28,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2024-11-18 17:30:28,696 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:28,696 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:28,697 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-18 17:30:28,697 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:28,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:28,698 INFO L85 PathProgramCache]: Analyzing trace with hash 1957213057, now seen corresponding path program 1 times [2024-11-18 17:30:28,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:28,699 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270170474] [2024-11-18 17:30:28,699 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:28,699 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:29,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:30,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:30,015 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:30,015 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270170474] [2024-11-18 17:30:30,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1270170474] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:30,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:30,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:30,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2014629998] [2024-11-18 17:30:30,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:30,018 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:30,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:30,019 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:30,019 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:30,020 INFO L87 Difference]: Start difference. First operand 700 states and 1042 transitions. Second operand has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:30,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:30,058 INFO L93 Difference]: Finished difference Result 1118 states and 1662 transitions. [2024-11-18 17:30:30,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:30,059 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 219 [2024-11-18 17:30:30,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:30,061 INFO L225 Difference]: With dead ends: 1118 [2024-11-18 17:30:30,062 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:30,062 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:30,063 INFO L432 NwaCegarLoop]: 733 mSDtfsCounter, 6 mSDsluCounter, 1456 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2189 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:30,065 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2189 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:30,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:30,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:30,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4878397711015736) internal successors, (1040), 699 states have internal predecessors, (1040), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:30,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1040 transitions. [2024-11-18 17:30:30,077 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1040 transitions. Word has length 219 [2024-11-18 17:30:30,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:30,077 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1040 transitions. [2024-11-18 17:30:30,078 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 54.75) internal successors, (219), 4 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:30,078 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1040 transitions. [2024-11-18 17:30:30,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2024-11-18 17:30:30,080 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:30,080 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:30,081 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-18 17:30:30,081 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:30,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:30,082 INFO L85 PathProgramCache]: Analyzing trace with hash 2075244672, now seen corresponding path program 1 times [2024-11-18 17:30:30,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:30,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328921507] [2024-11-18 17:30:30,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:30,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:30,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:31,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:31,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:31,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [328921507] [2024-11-18 17:30:31,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [328921507] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:31,397 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:31,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:31,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [890426561] [2024-11-18 17:30:31,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:31,398 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:31,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:31,399 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:31,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:31,399 INFO L87 Difference]: Start difference. First operand 700 states and 1040 transitions. Second operand has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:31,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:31,438 INFO L93 Difference]: Finished difference Result 1266 states and 1880 transitions. [2024-11-18 17:30:31,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:31,439 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 220 [2024-11-18 17:30:31,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:31,442 INFO L225 Difference]: With dead ends: 1266 [2024-11-18 17:30:31,442 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:31,443 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:31,446 INFO L432 NwaCegarLoop]: 732 mSDtfsCounter, 6 mSDsluCounter, 1454 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2186 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:31,447 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2186 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:31,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:31,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:31,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4849785407725322) internal successors, (1038), 699 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:31,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1038 transitions. [2024-11-18 17:30:31,465 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1038 transitions. Word has length 220 [2024-11-18 17:30:31,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:31,465 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1038 transitions. [2024-11-18 17:30:31,466 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.0) internal successors, (220), 4 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:31,466 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1038 transitions. [2024-11-18 17:30:31,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2024-11-18 17:30:31,468 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:31,468 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:31,468 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-18 17:30:31,469 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:31,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:31,472 INFO L85 PathProgramCache]: Analyzing trace with hash -1460174850, now seen corresponding path program 1 times [2024-11-18 17:30:31,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:31,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669528176] [2024-11-18 17:30:31,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:31,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:31,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:32,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:32,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:32,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669528176] [2024-11-18 17:30:32,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669528176] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:32,920 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:32,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:32,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1556405117] [2024-11-18 17:30:32,920 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:32,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:32,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:32,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:32,922 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:32,922 INFO L87 Difference]: Start difference. First operand 700 states and 1038 transitions. Second operand has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:32,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:32,963 INFO L93 Difference]: Finished difference Result 1108 states and 1642 transitions. [2024-11-18 17:30:32,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:32,964 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 221 [2024-11-18 17:30:32,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:32,967 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:32,967 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:32,968 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:32,968 INFO L432 NwaCegarLoop]: 731 mSDtfsCounter, 6 mSDsluCounter, 1452 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2183 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:32,971 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2183 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:32,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:32,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:32,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4835479256080115) internal successors, (1037), 699 states have internal predecessors, (1037), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:32,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1037 transitions. [2024-11-18 17:30:32,985 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1037 transitions. Word has length 221 [2024-11-18 17:30:32,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:32,986 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1037 transitions. [2024-11-18 17:30:32,986 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.25) internal successors, (221), 4 states have internal predecessors, (221), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:32,986 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1037 transitions. [2024-11-18 17:30:32,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2024-11-18 17:30:32,989 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:32,989 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:32,989 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-18 17:30:32,989 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:32,990 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:32,990 INFO L85 PathProgramCache]: Analyzing trace with hash -523909459, now seen corresponding path program 1 times [2024-11-18 17:30:32,990 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:32,990 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958436794] [2024-11-18 17:30:32,990 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:32,990 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:33,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:34,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:34,152 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:34,152 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958436794] [2024-11-18 17:30:34,152 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [958436794] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:34,152 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:34,152 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:34,152 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039071614] [2024-11-18 17:30:34,153 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:34,153 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:34,153 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:34,154 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:34,154 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:34,154 INFO L87 Difference]: Start difference. First operand 700 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:34,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:34,189 INFO L93 Difference]: Finished difference Result 1108 states and 1640 transitions. [2024-11-18 17:30:34,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:34,190 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 222 [2024-11-18 17:30:34,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:34,192 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:34,193 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:34,193 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:34,195 INFO L432 NwaCegarLoop]: 730 mSDtfsCounter, 5 mSDsluCounter, 1450 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 2180 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:34,195 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 2180 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:34,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:34,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:34,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4821173104434906) internal successors, (1036), 699 states have internal predecessors, (1036), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:34,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1036 transitions. [2024-11-18 17:30:34,209 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1036 transitions. Word has length 222 [2024-11-18 17:30:34,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:34,209 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1036 transitions. [2024-11-18 17:30:34,210 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.5) internal successors, (222), 4 states have internal predecessors, (222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:34,210 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1036 transitions. [2024-11-18 17:30:34,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2024-11-18 17:30:34,212 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:34,212 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:34,213 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-18 17:30:34,213 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:34,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:34,213 INFO L85 PathProgramCache]: Analyzing trace with hash 943224598, now seen corresponding path program 1 times [2024-11-18 17:30:34,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:34,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532315231] [2024-11-18 17:30:34,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:34,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:34,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:35,511 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:35,512 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:35,512 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532315231] [2024-11-18 17:30:35,512 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [532315231] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:35,512 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:35,512 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:35,513 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1696293772] [2024-11-18 17:30:35,513 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:35,514 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:35,514 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:35,514 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:35,515 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:35,515 INFO L87 Difference]: Start difference. First operand 700 states and 1036 transitions. Second operand has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:35,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:35,551 INFO L93 Difference]: Finished difference Result 1246 states and 1843 transitions. [2024-11-18 17:30:35,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:35,552 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 223 [2024-11-18 17:30:35,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:35,558 INFO L225 Difference]: With dead ends: 1246 [2024-11-18 17:30:35,558 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:35,559 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:35,560 INFO L432 NwaCegarLoop]: 729 mSDtfsCounter, 6 mSDsluCounter, 1448 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2177 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:35,560 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2177 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:35,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:35,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:35,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4792560801144492) internal successors, (1034), 699 states have internal predecessors, (1034), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:35,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1034 transitions. [2024-11-18 17:30:35,574 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1034 transitions. Word has length 223 [2024-11-18 17:30:35,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:35,575 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1034 transitions. [2024-11-18 17:30:35,575 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 55.75) internal successors, (223), 4 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:35,576 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1034 transitions. [2024-11-18 17:30:35,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2024-11-18 17:30:35,579 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:35,579 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:35,579 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-18 17:30:35,580 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:35,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:35,583 INFO L85 PathProgramCache]: Analyzing trace with hash -29545317, now seen corresponding path program 1 times [2024-11-18 17:30:35,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:35,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487194472] [2024-11-18 17:30:35,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:35,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:35,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:36,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:36,812 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:36,812 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487194472] [2024-11-18 17:30:36,812 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1487194472] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:36,812 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:36,812 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:36,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565436606] [2024-11-18 17:30:36,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:36,813 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:36,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:36,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:36,814 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:36,814 INFO L87 Difference]: Start difference. First operand 700 states and 1034 transitions. Second operand has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:36,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:36,853 INFO L93 Difference]: Finished difference Result 1294 states and 1910 transitions. [2024-11-18 17:30:36,855 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:36,856 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 224 [2024-11-18 17:30:36,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:36,858 INFO L225 Difference]: With dead ends: 1294 [2024-11-18 17:30:36,858 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:36,863 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:36,863 INFO L432 NwaCegarLoop]: 728 mSDtfsCounter, 6 mSDsluCounter, 1446 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2174 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:36,864 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2174 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:36,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:36,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:36,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4763948497854078) internal successors, (1032), 699 states have internal predecessors, (1032), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:36,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1032 transitions. [2024-11-18 17:30:36,877 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1032 transitions. Word has length 224 [2024-11-18 17:30:36,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:36,877 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1032 transitions. [2024-11-18 17:30:36,878 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.0) internal successors, (224), 4 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:36,878 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1032 transitions. [2024-11-18 17:30:36,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 226 [2024-11-18 17:30:36,880 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:36,880 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:36,880 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-18 17:30:36,881 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:36,882 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:36,882 INFO L85 PathProgramCache]: Analyzing trace with hash 1774890696, now seen corresponding path program 1 times [2024-11-18 17:30:36,883 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:36,883 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781744751] [2024-11-18 17:30:36,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:36,884 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:37,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:38,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:38,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:38,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1781744751] [2024-11-18 17:30:38,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1781744751] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:38,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:38,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:38,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811066209] [2024-11-18 17:30:38,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:38,033 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:38,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:38,033 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:38,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:38,034 INFO L87 Difference]: Start difference. First operand 700 states and 1032 transitions. Second operand has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:38,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:38,066 INFO L93 Difference]: Finished difference Result 1108 states and 1632 transitions. [2024-11-18 17:30:38,067 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:38,067 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 225 [2024-11-18 17:30:38,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:38,070 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:38,070 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:38,071 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:38,071 INFO L432 NwaCegarLoop]: 727 mSDtfsCounter, 6 mSDsluCounter, 1444 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2171 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:38,072 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2171 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:38,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:38,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:38,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4749642346208869) internal successors, (1031), 699 states have internal predecessors, (1031), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:38,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1031 transitions. [2024-11-18 17:30:38,085 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1031 transitions. Word has length 225 [2024-11-18 17:30:38,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:38,085 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1031 transitions. [2024-11-18 17:30:38,086 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.25) internal successors, (225), 4 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:38,086 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1031 transitions. [2024-11-18 17:30:38,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2024-11-18 17:30:38,088 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:38,088 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:38,088 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-18 17:30:38,089 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:38,089 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:38,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1371812033, now seen corresponding path program 1 times [2024-11-18 17:30:38,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:38,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369686006] [2024-11-18 17:30:38,090 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:38,090 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:38,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:39,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:39,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:39,284 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369686006] [2024-11-18 17:30:39,284 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369686006] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:39,284 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:39,284 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:39,284 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910898547] [2024-11-18 17:30:39,284 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:39,285 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:39,285 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:39,286 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:39,286 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:39,286 INFO L87 Difference]: Start difference. First operand 700 states and 1031 transitions. Second operand has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:39,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:39,319 INFO L93 Difference]: Finished difference Result 1108 states and 1630 transitions. [2024-11-18 17:30:39,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:39,320 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 226 [2024-11-18 17:30:39,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:39,322 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:39,322 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:39,323 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:39,324 INFO L432 NwaCegarLoop]: 726 mSDtfsCounter, 6 mSDsluCounter, 1442 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2168 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:39,324 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2168 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:39,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:39,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:39,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4735336194563662) internal successors, (1030), 699 states have internal predecessors, (1030), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:39,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1030 transitions. [2024-11-18 17:30:39,339 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1030 transitions. Word has length 226 [2024-11-18 17:30:39,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:39,340 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1030 transitions. [2024-11-18 17:30:39,340 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.5) internal successors, (226), 4 states have internal predecessors, (226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:39,341 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1030 transitions. [2024-11-18 17:30:39,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2024-11-18 17:30:39,343 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:39,344 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:39,344 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-18 17:30:39,344 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:39,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:39,345 INFO L85 PathProgramCache]: Analyzing trace with hash -2077231164, now seen corresponding path program 1 times [2024-11-18 17:30:39,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:39,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1389364891] [2024-11-18 17:30:39,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:39,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:39,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:40,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:40,583 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:40,583 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1389364891] [2024-11-18 17:30:40,583 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1389364891] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:40,584 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:40,584 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:40,584 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194795603] [2024-11-18 17:30:40,584 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:40,585 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:40,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:40,587 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:40,587 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:40,587 INFO L87 Difference]: Start difference. First operand 700 states and 1030 transitions. Second operand has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:40,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:40,624 INFO L93 Difference]: Finished difference Result 1108 states and 1628 transitions. [2024-11-18 17:30:40,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:40,625 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 227 [2024-11-18 17:30:40,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:40,628 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:40,628 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:40,629 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:40,630 INFO L432 NwaCegarLoop]: 725 mSDtfsCounter, 6 mSDsluCounter, 1440 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2165 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:40,630 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2165 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:40,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:40,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:40,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4721030042918455) internal successors, (1029), 699 states have internal predecessors, (1029), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:40,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1029 transitions. [2024-11-18 17:30:40,651 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1029 transitions. Word has length 227 [2024-11-18 17:30:40,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:40,652 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1029 transitions. [2024-11-18 17:30:40,652 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 56.75) internal successors, (227), 4 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:40,652 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1029 transitions. [2024-11-18 17:30:40,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2024-11-18 17:30:40,655 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:40,655 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:40,656 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-18 17:30:40,656 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:40,656 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:40,657 INFO L85 PathProgramCache]: Analyzing trace with hash 99784443, now seen corresponding path program 1 times [2024-11-18 17:30:40,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:40,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782620070] [2024-11-18 17:30:40,658 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:40,659 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:40,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:41,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:41,880 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:41,880 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782620070] [2024-11-18 17:30:41,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1782620070] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:41,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:41,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:30:41,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [103171446] [2024-11-18 17:30:41,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:41,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:30:41,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:41,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:30:41,883 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:41,883 INFO L87 Difference]: Start difference. First operand 700 states and 1029 transitions. Second operand has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:41,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:41,914 INFO L93 Difference]: Finished difference Result 1108 states and 1626 transitions. [2024-11-18 17:30:41,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:30:41,915 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2024-11-18 17:30:41,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:41,918 INFO L225 Difference]: With dead ends: 1108 [2024-11-18 17:30:41,918 INFO L226 Difference]: Without dead ends: 700 [2024-11-18 17:30:41,919 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:30:41,919 INFO L432 NwaCegarLoop]: 724 mSDtfsCounter, 6 mSDsluCounter, 1438 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2162 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:41,920 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 2162 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 17:30:41,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 700 states. [2024-11-18 17:30:41,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 700 to 700. [2024-11-18 17:30:41,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 700 states, 699 states have (on average 1.4706723891273248) internal successors, (1028), 699 states have internal predecessors, (1028), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:41,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 700 states to 700 states and 1028 transitions. [2024-11-18 17:30:41,934 INFO L78 Accepts]: Start accepts. Automaton has 700 states and 1028 transitions. Word has length 228 [2024-11-18 17:30:41,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:41,934 INFO L471 AbstractCegarLoop]: Abstraction has 700 states and 1028 transitions. [2024-11-18 17:30:41,934 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 57.0) internal successors, (228), 4 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:41,935 INFO L276 IsEmpty]: Start isEmpty. Operand 700 states and 1028 transitions. [2024-11-18 17:30:41,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 230 [2024-11-18 17:30:41,937 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:41,937 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:41,937 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-18 17:30:41,937 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:41,938 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:41,938 INFO L85 PathProgramCache]: Analyzing trace with hash 26033572, now seen corresponding path program 1 times [2024-11-18 17:30:41,938 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:41,938 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087957868] [2024-11-18 17:30:41,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:41,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:42,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:44,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:44,331 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:44,331 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087957868] [2024-11-18 17:30:44,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2087957868] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:44,332 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:44,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-18 17:30:44,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180116439] [2024-11-18 17:30:44,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:44,333 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-18 17:30:44,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:44,334 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-18 17:30:44,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2024-11-18 17:30:44,334 INFO L87 Difference]: Start difference. First operand 700 states and 1028 transitions. Second operand has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:44,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:44,518 INFO L93 Difference]: Finished difference Result 1304 states and 1913 transitions. [2024-11-18 17:30:44,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-18 17:30:44,519 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 229 [2024-11-18 17:30:44,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:44,523 INFO L225 Difference]: With dead ends: 1304 [2024-11-18 17:30:44,524 INFO L226 Difference]: Without dead ends: 718 [2024-11-18 17:30:44,526 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-18 17:30:44,526 INFO L432 NwaCegarLoop]: 699 mSDtfsCounter, 691 mSDsluCounter, 3476 mSDsCounter, 0 mSdLazyCounter, 193 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 691 SdHoareTripleChecker+Valid, 4175 SdHoareTripleChecker+Invalid, 193 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 193 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:44,527 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [691 Valid, 4175 Invalid, 193 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 193 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:44,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2024-11-18 17:30:44,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 708. [2024-11-18 17:30:44,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 708 states, 707 states have (on average 1.4681753889674682) internal successors, (1038), 707 states have internal predecessors, (1038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:44,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 708 states and 1038 transitions. [2024-11-18 17:30:44,543 INFO L78 Accepts]: Start accepts. Automaton has 708 states and 1038 transitions. Word has length 229 [2024-11-18 17:30:44,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:44,543 INFO L471 AbstractCegarLoop]: Abstraction has 708 states and 1038 transitions. [2024-11-18 17:30:44,544 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.625) internal successors, (229), 8 states have internal predecessors, (229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:44,544 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 1038 transitions. [2024-11-18 17:30:44,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-18 17:30:44,546 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:44,546 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:44,547 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-18 17:30:44,547 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:44,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:44,547 INFO L85 PathProgramCache]: Analyzing trace with hash 794633637, now seen corresponding path program 1 times [2024-11-18 17:30:44,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:44,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27313281] [2024-11-18 17:30:44,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:44,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:44,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:46,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:46,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:46,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27313281] [2024-11-18 17:30:46,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [27313281] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:46,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:46,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2024-11-18 17:30:46,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [876958605] [2024-11-18 17:30:46,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:46,051 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-18 17:30:46,051 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:46,052 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-18 17:30:46,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-18 17:30:46,052 INFO L87 Difference]: Start difference. First operand 708 states and 1038 transitions. Second operand has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:46,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:46,138 INFO L93 Difference]: Finished difference Result 1310 states and 1920 transitions. [2024-11-18 17:30:46,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-18 17:30:46,139 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-18 17:30:46,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:46,142 INFO L225 Difference]: With dead ends: 1310 [2024-11-18 17:30:46,142 INFO L226 Difference]: Without dead ends: 720 [2024-11-18 17:30:46,143 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-18 17:30:46,143 INFO L432 NwaCegarLoop]: 719 mSDtfsCounter, 11 mSDsluCounter, 4294 mSDsCounter, 0 mSdLazyCounter, 80 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 5013 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 80 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:46,144 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [11 Valid, 5013 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 80 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:46,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 720 states. [2024-11-18 17:30:46,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 720 to 718. [2024-11-18 17:30:46,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4672245467224547) internal successors, (1052), 717 states have internal predecessors, (1052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:46,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1052 transitions. [2024-11-18 17:30:46,190 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1052 transitions. Word has length 230 [2024-11-18 17:30:46,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:46,190 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1052 transitions. [2024-11-18 17:30:46,191 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 28.75) internal successors, (230), 8 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:46,191 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1052 transitions. [2024-11-18 17:30:46,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-18 17:30:46,193 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:46,193 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:46,194 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-18 17:30:46,194 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:46,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:46,194 INFO L85 PathProgramCache]: Analyzing trace with hash -1702319170, now seen corresponding path program 1 times [2024-11-18 17:30:46,195 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:46,195 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379721566] [2024-11-18 17:30:46,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:46,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:46,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:47,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:47,424 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:47,424 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [379721566] [2024-11-18 17:30:47,424 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [379721566] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:47,424 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:47,424 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 17:30:47,424 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453786940] [2024-11-18 17:30:47,425 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:47,425 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 17:30:47,425 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:47,426 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 17:30:47,426 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:47,427 INFO L87 Difference]: Start difference. First operand 718 states and 1052 transitions. Second operand has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:47,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:47,962 INFO L93 Difference]: Finished difference Result 1474 states and 2152 transitions. [2024-11-18 17:30:47,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-18 17:30:47,963 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-18 17:30:47,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:47,966 INFO L225 Difference]: With dead ends: 1474 [2024-11-18 17:30:47,966 INFO L226 Difference]: Without dead ends: 872 [2024-11-18 17:30:47,968 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2024-11-18 17:30:47,968 INFO L432 NwaCegarLoop]: 721 mSDtfsCounter, 589 mSDsluCounter, 1679 mSDsCounter, 0 mSdLazyCounter, 378 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2400 SdHoareTripleChecker+Invalid, 378 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:47,968 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2400 Invalid, 378 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 378 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-18 17:30:47,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 872 states. [2024-11-18 17:30:47,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 872 to 718. [2024-11-18 17:30:47,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 717 states have (on average 1.4644351464435146) internal successors, (1050), 717 states have internal predecessors, (1050), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:47,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1050 transitions. [2024-11-18 17:30:47,986 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1050 transitions. Word has length 230 [2024-11-18 17:30:47,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:47,987 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1050 transitions. [2024-11-18 17:30:47,987 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.333333333333336) internal successors, (230), 6 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:47,987 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1050 transitions. [2024-11-18 17:30:47,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 231 [2024-11-18 17:30:47,989 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:47,990 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:47,990 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-18 17:30:47,990 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:47,990 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:47,990 INFO L85 PathProgramCache]: Analyzing trace with hash -357936550, now seen corresponding path program 1 times [2024-11-18 17:30:47,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:47,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526639191] [2024-11-18 17:30:47,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:47,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:48,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:49,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:49,531 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:49,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526639191] [2024-11-18 17:30:49,532 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526639191] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:49,532 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:49,532 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 17:30:49,532 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [483459571] [2024-11-18 17:30:49,532 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:49,532 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 17:30:49,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:49,533 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 17:30:49,533 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-18 17:30:49,533 INFO L87 Difference]: Start difference. First operand 718 states and 1050 transitions. Second operand has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:49,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:49,621 INFO L93 Difference]: Finished difference Result 1328 states and 1941 transitions. [2024-11-18 17:30:49,622 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 17:30:49,622 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 230 [2024-11-18 17:30:49,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:49,625 INFO L225 Difference]: With dead ends: 1328 [2024-11-18 17:30:49,625 INFO L226 Difference]: Without dead ends: 724 [2024-11-18 17:30:49,626 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:49,626 INFO L432 NwaCegarLoop]: 710 mSDtfsCounter, 680 mSDsluCounter, 1413 mSDsCounter, 0 mSdLazyCounter, 64 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 680 SdHoareTripleChecker+Valid, 2123 SdHoareTripleChecker+Invalid, 64 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 64 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:49,626 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [680 Valid, 2123 Invalid, 64 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 64 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:49,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2024-11-18 17:30:49,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 724. [2024-11-18 17:30:49,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 724 states, 723 states have (on average 1.4605809128630705) internal successors, (1056), 723 states have internal predecessors, (1056), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:49,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 1056 transitions. [2024-11-18 17:30:49,642 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 1056 transitions. Word has length 230 [2024-11-18 17:30:49,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:49,642 INFO L471 AbstractCegarLoop]: Abstraction has 724 states and 1056 transitions. [2024-11-18 17:30:49,643 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.0) internal successors, (230), 5 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:49,643 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 1056 transitions. [2024-11-18 17:30:49,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2024-11-18 17:30:49,645 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:49,646 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:49,646 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-18 17:30:49,646 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:49,647 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:49,647 INFO L85 PathProgramCache]: Analyzing trace with hash 1971804679, now seen corresponding path program 1 times [2024-11-18 17:30:49,647 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:49,647 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742997384] [2024-11-18 17:30:49,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:49,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:50,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:51,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:51,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:51,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742997384] [2024-11-18 17:30:51,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742997384] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:51,369 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:51,369 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 17:30:51,369 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831808167] [2024-11-18 17:30:51,369 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:51,371 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 17:30:51,371 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:51,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 17:30:51,372 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 17:30:51,372 INFO L87 Difference]: Start difference. First operand 724 states and 1056 transitions. Second operand has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:51,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:51,588 INFO L93 Difference]: Finished difference Result 1334 states and 1939 transitions. [2024-11-18 17:30:51,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-18 17:30:51,589 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2024-11-18 17:30:51,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:51,592 INFO L225 Difference]: With dead ends: 1334 [2024-11-18 17:30:51,592 INFO L226 Difference]: Without dead ends: 914 [2024-11-18 17:30:51,593 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2024-11-18 17:30:51,594 INFO L432 NwaCegarLoop]: 705 mSDtfsCounter, 1689 mSDsluCounter, 2818 mSDsCounter, 0 mSdLazyCounter, 122 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1689 SdHoareTripleChecker+Valid, 3523 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:51,594 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1689 Valid, 3523 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 122 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:51,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 914 states. [2024-11-18 17:30:51,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 914 to 728. [2024-11-18 17:30:51,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 728 states, 727 states have (on average 1.4594222833562587) internal successors, (1061), 727 states have internal predecessors, (1061), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:51,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 728 states to 728 states and 1061 transitions. [2024-11-18 17:30:51,611 INFO L78 Accepts]: Start accepts. Automaton has 728 states and 1061 transitions. Word has length 231 [2024-11-18 17:30:51,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:51,612 INFO L471 AbstractCegarLoop]: Abstraction has 728 states and 1061 transitions. [2024-11-18 17:30:51,612 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.0) internal successors, (231), 7 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:51,612 INFO L276 IsEmpty]: Start isEmpty. Operand 728 states and 1061 transitions. [2024-11-18 17:30:51,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2024-11-18 17:30:51,615 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:51,615 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:51,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-18 17:30:51,615 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:51,617 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:51,617 INFO L85 PathProgramCache]: Analyzing trace with hash -1096975599, now seen corresponding path program 1 times [2024-11-18 17:30:51,617 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:51,617 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214326330] [2024-11-18 17:30:51,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:51,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:52,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:53,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:53,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:53,326 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214326330] [2024-11-18 17:30:53,326 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [214326330] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:53,326 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:53,326 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 17:30:53,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1180943556] [2024-11-18 17:30:53,327 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:53,327 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 17:30:53,327 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:53,328 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 17:30:53,328 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-18 17:30:53,328 INFO L87 Difference]: Start difference. First operand 728 states and 1061 transitions. Second operand has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:53,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:53,418 INFO L93 Difference]: Finished difference Result 1170 states and 1701 transitions. [2024-11-18 17:30:53,419 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 17:30:53,419 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 232 [2024-11-18 17:30:53,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:53,422 INFO L225 Difference]: With dead ends: 1170 [2024-11-18 17:30:53,422 INFO L226 Difference]: Without dead ends: 736 [2024-11-18 17:30:53,423 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:53,424 INFO L432 NwaCegarLoop]: 703 mSDtfsCounter, 589 mSDsluCounter, 1400 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 2103 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:53,424 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [589 Valid, 2103 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:53,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 736 states. [2024-11-18 17:30:53,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 736 to 734. [2024-11-18 17:30:53,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 734 states, 733 states have (on average 1.455661664392906) internal successors, (1067), 733 states have internal predecessors, (1067), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:53,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 1067 transitions. [2024-11-18 17:30:53,438 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 1067 transitions. Word has length 232 [2024-11-18 17:30:53,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:53,438 INFO L471 AbstractCegarLoop]: Abstraction has 734 states and 1067 transitions. [2024-11-18 17:30:53,439 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.4) internal successors, (232), 5 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:53,439 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 1067 transitions. [2024-11-18 17:30:53,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2024-11-18 17:30:53,440 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:53,440 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:53,441 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-18 17:30:53,441 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:53,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:53,441 INFO L85 PathProgramCache]: Analyzing trace with hash 776328857, now seen corresponding path program 1 times [2024-11-18 17:30:53,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:53,442 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371523761] [2024-11-18 17:30:53,442 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:53,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:54,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:55,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:55,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:55,141 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371523761] [2024-11-18 17:30:55,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [371523761] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:55,141 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:55,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 17:30:55,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [859128602] [2024-11-18 17:30:55,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:55,142 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 17:30:55,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:55,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 17:30:55,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2024-11-18 17:30:55,143 INFO L87 Difference]: Start difference. First operand 734 states and 1067 transitions. Second operand has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:55,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:55,237 INFO L93 Difference]: Finished difference Result 1161 states and 1686 transitions. [2024-11-18 17:30:55,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 17:30:55,238 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 233 [2024-11-18 17:30:55,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:55,240 INFO L225 Difference]: With dead ends: 1161 [2024-11-18 17:30:55,241 INFO L226 Difference]: Without dead ends: 738 [2024-11-18 17:30:55,242 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2024-11-18 17:30:55,242 INFO L432 NwaCegarLoop]: 703 mSDtfsCounter, 559 mSDsluCounter, 1399 mSDsCounter, 0 mSdLazyCounter, 84 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 559 SdHoareTripleChecker+Valid, 2102 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 84 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:55,242 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [559 Valid, 2102 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 84 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:30:55,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2024-11-18 17:30:55,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 737. [2024-11-18 17:30:55,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 737 states, 736 states have (on average 1.453804347826087) internal successors, (1070), 736 states have internal predecessors, (1070), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:55,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 737 states to 737 states and 1070 transitions. [2024-11-18 17:30:55,256 INFO L78 Accepts]: Start accepts. Automaton has 737 states and 1070 transitions. Word has length 233 [2024-11-18 17:30:55,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:55,256 INFO L471 AbstractCegarLoop]: Abstraction has 737 states and 1070 transitions. [2024-11-18 17:30:55,257 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 46.6) internal successors, (233), 5 states have internal predecessors, (233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:55,257 INFO L276 IsEmpty]: Start isEmpty. Operand 737 states and 1070 transitions. [2024-11-18 17:30:55,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2024-11-18 17:30:55,258 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:55,258 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:55,259 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-18 17:30:55,259 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:55,259 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:55,259 INFO L85 PathProgramCache]: Analyzing trace with hash 1966964095, now seen corresponding path program 1 times [2024-11-18 17:30:55,259 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:55,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079043081] [2024-11-18 17:30:55,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:55,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:56,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:30:57,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:30:57,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 17:30:57,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079043081] [2024-11-18 17:30:57,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1079043081] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:30:57,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:30:57,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 17:30:57,822 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613657013] [2024-11-18 17:30:57,822 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:30:57,823 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 17:30:57,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 17:30:57,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 17:30:57,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2024-11-18 17:30:57,825 INFO L87 Difference]: Start difference. First operand 737 states and 1070 transitions. Second operand has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:58,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:30:58,034 INFO L93 Difference]: Finished difference Result 1172 states and 1700 transitions. [2024-11-18 17:30:58,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2024-11-18 17:30:58,035 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2024-11-18 17:30:58,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:30:58,038 INFO L225 Difference]: With dead ends: 1172 [2024-11-18 17:30:58,038 INFO L226 Difference]: Without dead ends: 746 [2024-11-18 17:30:58,039 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2024-11-18 17:30:58,040 INFO L432 NwaCegarLoop]: 685 mSDtfsCounter, 529 mSDsluCounter, 2049 mSDsCounter, 0 mSdLazyCounter, 187 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 529 SdHoareTripleChecker+Valid, 2734 SdHoareTripleChecker+Invalid, 187 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 187 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 17:30:58,040 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [529 Valid, 2734 Invalid, 187 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 187 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 17:30:58,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2024-11-18 17:30:58,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 741. [2024-11-18 17:30:58,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 741 states, 740 states have (on average 1.4527027027027026) internal successors, (1075), 740 states have internal predecessors, (1075), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:58,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 741 states to 741 states and 1075 transitions. [2024-11-18 17:30:58,054 INFO L78 Accepts]: Start accepts. Automaton has 741 states and 1075 transitions. Word has length 234 [2024-11-18 17:30:58,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:30:58,055 INFO L471 AbstractCegarLoop]: Abstraction has 741 states and 1075 transitions. [2024-11-18 17:30:58,055 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 33.42857142857143) internal successors, (234), 7 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:30:58,055 INFO L276 IsEmpty]: Start isEmpty. Operand 741 states and 1075 transitions. [2024-11-18 17:30:58,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2024-11-18 17:30:58,057 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:30:58,057 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:58,057 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-18 17:30:58,057 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:30:58,058 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:30:58,058 INFO L85 PathProgramCache]: Analyzing trace with hash -529340456, now seen corresponding path program 1 times [2024-11-18 17:30:58,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 17:30:58,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412671594] [2024-11-18 17:30:58,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:30:58,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 17:30:58,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 17:30:58,787 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-18 17:30:59,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 17:30:59,584 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-18 17:30:59,584 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-18 17:30:59,585 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-18 17:30:59,587 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-18 17:30:59,590 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 17:30:59,763 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-18 17:30:59,767 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 05:30:59 BoogieIcfgContainer [2024-11-18 17:30:59,768 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-18 17:30:59,769 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-18 17:30:59,769 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-18 17:30:59,769 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-18 17:30:59,770 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:30:22" (3/4) ... [2024-11-18 17:30:59,772 INFO L145 WitnessPrinter]: No result that supports witness generation found [2024-11-18 17:30:59,774 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-18 17:30:59,774 INFO L158 Benchmark]: Toolchain (without parser) took 41334.17ms. Allocated memory was 184.5MB in the beginning and 1.6GB in the end (delta: 1.4GB). Free memory was 123.4MB in the beginning and 1.4GB in the end (delta: -1.3GB). Peak memory consumption was 153.4MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,774 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 184.5MB. Free memory is still 151.6MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-18 17:30:59,775 INFO L158 Benchmark]: CACSL2BoogieTranslator took 667.14ms. Allocated memory is still 184.5MB. Free memory was 123.4MB in the beginning and 83.0MB in the end (delta: 40.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,775 INFO L158 Benchmark]: Boogie Procedure Inliner took 338.29ms. Allocated memory was 184.5MB in the beginning and 270.5MB in the end (delta: 86.0MB). Free memory was 83.0MB in the beginning and 204.6MB in the end (delta: -121.6MB). Peak memory consumption was 51.8MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,775 INFO L158 Benchmark]: Boogie Preprocessor took 284.67ms. Allocated memory is still 270.5MB. Free memory was 204.6MB in the beginning and 180.5MB in the end (delta: 24.1MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,775 INFO L158 Benchmark]: RCFGBuilder took 2441.91ms. Allocated memory is still 270.5MB. Free memory was 180.5MB in the beginning and 155.6MB in the end (delta: 24.9MB). Peak memory consumption was 99.7MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,775 INFO L158 Benchmark]: TraceAbstraction took 37590.61ms. Allocated memory was 270.5MB in the beginning and 1.6GB in the end (delta: 1.3GB). Free memory was 154.5MB in the beginning and 1.4GB in the end (delta: -1.2GB). Peak memory consumption was 916.7MB. Max. memory is 16.1GB. [2024-11-18 17:30:59,776 INFO L158 Benchmark]: Witness Printer took 4.77ms. Allocated memory is still 1.6GB. Free memory is still 1.4GB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-18 17:30:59,777 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 184.5MB. Free memory is still 151.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 667.14ms. Allocated memory is still 184.5MB. Free memory was 123.4MB in the beginning and 83.0MB in the end (delta: 40.4MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 338.29ms. Allocated memory was 184.5MB in the beginning and 270.5MB in the end (delta: 86.0MB). Free memory was 83.0MB in the beginning and 204.6MB in the end (delta: -121.6MB). Peak memory consumption was 51.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 284.67ms. Allocated memory is still 270.5MB. Free memory was 204.6MB in the beginning and 180.5MB in the end (delta: 24.1MB). Peak memory consumption was 23.1MB. Max. memory is 16.1GB. * RCFGBuilder took 2441.91ms. Allocated memory is still 270.5MB. Free memory was 180.5MB in the beginning and 155.6MB in the end (delta: 24.9MB). Peak memory consumption was 99.7MB. Max. memory is 16.1GB. * TraceAbstraction took 37590.61ms. Allocated memory was 270.5MB in the beginning and 1.6GB in the end (delta: 1.3GB). Free memory was 154.5MB in the beginning and 1.4GB in the end (delta: -1.2GB). Peak memory consumption was 916.7MB. Max. memory is 16.1GB. * Witness Printer took 4.77ms. Allocated memory is still 1.6GB. Free memory is still 1.4GB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseOr at line 460, overapproximation of bitwiseAnd at line 564. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 8); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (8 - 1); [L32] const SORT_10 mask_SORT_10 = (SORT_10)-1 >> (sizeof(SORT_10) * 8 - 32); [L33] const SORT_10 msb_SORT_10 = (SORT_10)1 << (32 - 1); [L35] const SORT_20 mask_SORT_20 = (SORT_20)-1 >> (sizeof(SORT_20) * 8 - 4); [L36] const SORT_20 msb_SORT_20 = (SORT_20)1 << (4 - 1); [L38] const SORT_29 mask_SORT_29 = (SORT_29)-1 >> (sizeof(SORT_29) * 8 - 10); [L39] const SORT_29 msb_SORT_29 = (SORT_29)1 << (10 - 1); [L41] const SORT_33 mask_SORT_33 = (SORT_33)-1 >> (sizeof(SORT_33) * 8 - 2); [L42] const SORT_33 msb_SORT_33 = (SORT_33)1 << (2 - 1); [L44] const SORT_1 var_7 = 0; [L45] const SORT_10 var_12 = 1; [L46] const SORT_20 var_21 = 0; [L47] const SORT_10 var_26 = 0; [L48] const SORT_29 var_30 = 0; [L49] const SORT_1 var_122 = 1; [L50] const SORT_20 var_126 = 1; [L51] const SORT_3 var_183 = 0; [L52] const SORT_10 var_254 = 104; [L54] SORT_1 input_2; [L55] SORT_3 input_4; [L56] SORT_1 input_5; [L57] SORT_1 input_6; [L58] SORT_1 input_201; [L59] SORT_1 input_228; [L60] SORT_1 input_234; [L61] SORT_1 input_235; [L62] SORT_29 input_249; [L63] SORT_1 input_262; [L64] SORT_1 input_270; [L65] SORT_1 input_278; [L66] SORT_1 input_284; [L67] SORT_1 input_289; [L68] SORT_1 input_290; [L69] SORT_1 input_291; [L70] SORT_1 input_300; [L71] SORT_1 input_301; [L72] SORT_1 input_302; [L73] SORT_3 input_323; [L74] SORT_1 input_330; [L75] SORT_1 input_336; [L77] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L77] SORT_1 state_8 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L78] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L78] SORT_1 state_15 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L79] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L79] SORT_20 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L80] EXPR __VERIFIER_nondet_ushort() & mask_SORT_29 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L80] SORT_29 state_31 = __VERIFIER_nondet_ushort() & mask_SORT_29; [L81] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L81] SORT_1 state_38 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L82] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L82] SORT_1 state_43 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L83] EXPR __VERIFIER_nondet_uchar() & mask_SORT_20 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L83] SORT_20 state_49 = __VERIFIER_nondet_uchar() & mask_SORT_20; [L84] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L84] SORT_1 state_60 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L85] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L85] SORT_1 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L86] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L86] SORT_1 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L87] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L87] SORT_1 state_86 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L88] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L88] SORT_1 state_100 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L89] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L89] SORT_1 state_123 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L90] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L90] SORT_1 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L91] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L91] SORT_1 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L92] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L92] SORT_1 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L93] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L93] SORT_1 state_153 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L94] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L94] SORT_1 state_166 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L95] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L95] SORT_1 state_177 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L96] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L96] SORT_3 state_184 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L97] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L97] SORT_1 state_197 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L98] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L98] SORT_1 state_199 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L99] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, var_122=1, var_126=1, var_12=1, var_183=0, var_21=0, var_254=104, var_26=0, var_30=0, var_7=0] [L99] SORT_1 state_203 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L101] SORT_1 init_9_arg_1 = var_7; [L102] state_8 = init_9_arg_1 [L103] SORT_1 init_16_arg_1 = var_7; [L104] state_15 = init_16_arg_1 [L105] SORT_20 init_23_arg_1 = var_21; [L106] state_22 = init_23_arg_1 [L107] SORT_29 init_32_arg_1 = var_30; [L108] state_31 = init_32_arg_1 [L109] SORT_1 init_39_arg_1 = var_7; [L110] state_38 = init_39_arg_1 [L111] SORT_1 init_44_arg_1 = var_7; [L112] state_43 = init_44_arg_1 [L113] SORT_20 init_50_arg_1 = var_21; [L114] state_49 = init_50_arg_1 [L115] SORT_1 init_61_arg_1 = var_7; [L116] state_60 = init_61_arg_1 [L117] SORT_1 init_65_arg_1 = var_7; [L118] state_64 = init_65_arg_1 [L119] SORT_1 init_73_arg_1 = var_7; [L120] state_72 = init_73_arg_1 [L121] SORT_1 init_87_arg_1 = var_7; [L122] state_86 = init_87_arg_1 [L123] SORT_1 init_101_arg_1 = var_7; [L124] state_100 = init_101_arg_1 [L125] SORT_1 init_124_arg_1 = var_122; [L126] state_123 = init_124_arg_1 [L127] SORT_1 init_131_arg_1 = var_7; [L128] state_130 = init_131_arg_1 [L129] SORT_1 init_136_arg_1 = var_7; [L130] state_135 = init_136_arg_1 [L131] SORT_1 init_142_arg_1 = var_7; [L132] state_141 = init_142_arg_1 [L133] SORT_1 init_154_arg_1 = var_7; [L134] state_153 = init_154_arg_1 [L135] SORT_1 init_167_arg_1 = var_7; [L136] state_166 = init_167_arg_1 [L137] SORT_1 init_178_arg_1 = var_7; [L138] state_177 = init_178_arg_1 [L139] SORT_3 init_185_arg_1 = var_183; [L140] state_184 = init_185_arg_1 [L141] SORT_1 init_198_arg_1 = var_7; [L142] state_197 = init_198_arg_1 [L143] SORT_1 init_200_arg_1 = var_7; [L144] state_199 = init_200_arg_1 [L145] SORT_1 init_204_arg_1 = var_7; [L146] state_203 = init_204_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L149] input_2 = __VERIFIER_nondet_uchar() [L150] input_4 = __VERIFIER_nondet_uchar() [L151] input_5 = __VERIFIER_nondet_uchar() [L152] input_6 = __VERIFIER_nondet_uchar() [L153] input_201 = __VERIFIER_nondet_uchar() [L154] input_228 = __VERIFIER_nondet_uchar() [L155] input_234 = __VERIFIER_nondet_uchar() [L156] input_235 = __VERIFIER_nondet_uchar() [L157] input_249 = __VERIFIER_nondet_ushort() [L158] input_262 = __VERIFIER_nondet_uchar() [L159] input_270 = __VERIFIER_nondet_uchar() [L160] input_278 = __VERIFIER_nondet_uchar() [L161] input_284 = __VERIFIER_nondet_uchar() [L162] input_289 = __VERIFIER_nondet_uchar() [L163] input_290 = __VERIFIER_nondet_uchar() [L164] input_291 = __VERIFIER_nondet_uchar() [L165] input_300 = __VERIFIER_nondet_uchar() [L166] input_301 = __VERIFIER_nondet_uchar() [L167] input_302 = __VERIFIER_nondet_uchar() [L168] input_323 = __VERIFIER_nondet_uchar() [L169] input_330 = __VERIFIER_nondet_uchar() [L170] input_336 = __VERIFIER_nondet_uchar() [L173] SORT_1 var_11_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_11_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] EXPR var_11_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L174] var_11_arg_0 = var_11_arg_0 & mask_SORT_1 [L175] SORT_10 var_11 = var_11_arg_0; [L176] SORT_10 var_13_arg_0 = var_11; [L177] SORT_10 var_13_arg_1 = var_12; [L178] SORT_1 var_13 = var_13_arg_0 == var_13_arg_1; [L179] SORT_1 var_14_arg_0 = var_13; [L180] SORT_1 var_14 = ~var_14_arg_0; [L181] SORT_1 var_17_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_17_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L182] EXPR var_17_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_14=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L182] var_17_arg_0 = var_17_arg_0 & mask_SORT_1 [L183] SORT_10 var_17 = var_17_arg_0; [L184] SORT_10 var_18_arg_0 = var_17; [L185] SORT_10 var_18_arg_1 = var_12; [L186] SORT_1 var_18 = var_18_arg_0 == var_18_arg_1; [L187] SORT_1 var_19_arg_0 = var_14; [L188] SORT_1 var_19_arg_1 = var_18; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19_arg_0=-1, var_19_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L189] EXPR var_19_arg_0 | var_19_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L189] SORT_1 var_19 = var_19_arg_0 | var_19_arg_1; [L190] SORT_20 var_24_arg_0 = state_22; [L191] SORT_1 var_24 = var_24_arg_0 >> 3; [L192] SORT_1 var_25_arg_0 = var_24; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_25_arg_0=0, var_26=0, var_30=0, var_7=0] [L193] EXPR var_25_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_19=255, var_254=104, var_26=0, var_30=0, var_7=0] [L193] var_25_arg_0 = var_25_arg_0 & mask_SORT_1 [L194] SORT_10 var_25 = var_25_arg_0; [L195] SORT_10 var_27_arg_0 = var_25; [L196] SORT_10 var_27_arg_1 = var_26; [L197] SORT_1 var_27 = var_27_arg_0 == var_27_arg_1; [L198] SORT_1 var_28_arg_0 = var_19; [L199] SORT_1 var_28_arg_1 = var_27; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28_arg_0=255, var_28_arg_1=1, var_30=0, var_7=0] [L200] EXPR var_28_arg_0 & var_28_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L200] SORT_1 var_28 = var_28_arg_0 & var_28_arg_1; [L201] SORT_29 var_34_arg_0 = state_31; [L202] SORT_33 var_34 = var_34_arg_0 >> 8; [L203] SORT_33 var_35_arg_0 = var_34; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_35_arg_0=0, var_7=0] [L204] EXPR var_35_arg_0 & mask_SORT_33 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_28=0, var_30=0, var_7=0] [L204] var_35_arg_0 = var_35_arg_0 & mask_SORT_33 [L205] SORT_10 var_35 = var_35_arg_0; [L206] SORT_10 var_36_arg_0 = var_35; [L207] SORT_10 var_36_arg_1 = var_26; [L208] SORT_1 var_36 = var_36_arg_0 == var_36_arg_1; [L209] SORT_1 var_37_arg_0 = var_28; [L210] SORT_1 var_37_arg_1 = var_36; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37_arg_0=0, var_37_arg_1=1, var_7=0] [L211] EXPR var_37_arg_0 & var_37_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L211] SORT_1 var_37 = var_37_arg_0 & var_37_arg_1; [L212] SORT_1 var_40_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_40_arg_0=0, var_7=0] [L213] EXPR var_40_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L213] var_40_arg_0 = var_40_arg_0 & mask_SORT_1 [L214] SORT_10 var_40 = var_40_arg_0; [L215] SORT_10 var_41_arg_0 = var_40; [L216] SORT_10 var_41_arg_1 = var_12; [L217] SORT_1 var_41 = var_41_arg_0 == var_41_arg_1; [L218] SORT_1 var_42_arg_0 = var_41; [L219] SORT_1 var_42 = ~var_42_arg_0; [L220] SORT_1 var_45_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_45_arg_0=0, var_7=0] [L221] EXPR var_45_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_42=-1, var_7=0] [L221] var_45_arg_0 = var_45_arg_0 & mask_SORT_1 [L222] SORT_10 var_45 = var_45_arg_0; [L223] SORT_10 var_46_arg_0 = var_45; [L224] SORT_10 var_46_arg_1 = var_12; [L225] SORT_1 var_46 = var_46_arg_0 == var_46_arg_1; [L226] SORT_1 var_47_arg_0 = var_42; [L227] SORT_1 var_47_arg_1 = var_46; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_47_arg_0=-1, var_47_arg_1=0, var_7=0] [L228] EXPR var_47_arg_0 | var_47_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_37=0, var_7=0] [L228] SORT_1 var_47 = var_47_arg_0 | var_47_arg_1; [L229] SORT_1 var_48_arg_0 = var_37; [L230] SORT_1 var_48_arg_1 = var_47; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_48_arg_0=0, var_48_arg_1=255, var_7=0] [L231] EXPR var_48_arg_0 & var_48_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L231] SORT_1 var_48 = var_48_arg_0 & var_48_arg_1; [L232] SORT_20 var_51_arg_0 = state_22; [L233] SORT_20 var_51_arg_1 = state_49; [L234] SORT_1 var_51 = var_51_arg_0 == var_51_arg_1; [L235] SORT_1 var_52_arg_0 = var_48; [L236] SORT_1 var_52_arg_1 = var_51; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52_arg_0=0, var_52_arg_1=1, var_7=0] [L237] EXPR var_52_arg_0 & var_52_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L237] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L238] SORT_1 var_53_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_53_arg_0=0, var_7=0] [L239] EXPR var_53_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L239] var_53_arg_0 = var_53_arg_0 & mask_SORT_1 [L240] SORT_10 var_53 = var_53_arg_0; [L241] SORT_10 var_54_arg_0 = var_53; [L242] SORT_10 var_54_arg_1 = var_12; [L243] SORT_1 var_54 = var_54_arg_0 == var_54_arg_1; [L244] SORT_1 var_55_arg_0 = var_54; [L245] SORT_1 var_55 = ~var_55_arg_0; [L246] SORT_1 var_56_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_56_arg_0=0, var_7=0] [L247] EXPR var_56_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_55=-1, var_7=0] [L247] var_56_arg_0 = var_56_arg_0 & mask_SORT_1 [L248] SORT_10 var_56 = var_56_arg_0; [L249] SORT_10 var_57_arg_0 = var_56; [L250] SORT_10 var_57_arg_1 = var_12; [L251] SORT_1 var_57 = var_57_arg_0 == var_57_arg_1; [L252] SORT_1 var_58_arg_0 = var_55; [L253] SORT_1 var_58_arg_1 = var_57; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_58_arg_0=-1, var_58_arg_1=0, var_7=0] [L254] EXPR var_58_arg_0 | var_58_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_52=0, var_7=0] [L254] SORT_1 var_58 = var_58_arg_0 | var_58_arg_1; [L255] SORT_1 var_59_arg_0 = var_52; [L256] SORT_1 var_59_arg_1 = var_58; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59_arg_0=0, var_59_arg_1=255, var_7=0] [L257] EXPR var_59_arg_0 & var_59_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L257] SORT_1 var_59 = var_59_arg_0 & var_59_arg_1; [L258] SORT_1 var_62_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_62_arg_0=0, var_7=0] [L259] EXPR var_62_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L259] var_62_arg_0 = var_62_arg_0 & mask_SORT_1 [L260] SORT_10 var_62 = var_62_arg_0; [L261] SORT_10 var_63_arg_0 = var_62; [L262] SORT_10 var_63_arg_1 = var_26; [L263] SORT_1 var_63 = var_63_arg_0 == var_63_arg_1; [L264] SORT_1 var_66_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_66_arg_0=0, var_7=0] [L265] EXPR var_66_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_63=1, var_7=0] [L265] var_66_arg_0 = var_66_arg_0 & mask_SORT_1 [L266] SORT_10 var_66 = var_66_arg_0; [L267] SORT_10 var_67_arg_0 = var_66; [L268] SORT_10 var_67_arg_1 = var_26; [L269] SORT_1 var_67 = var_67_arg_0 == var_67_arg_1; [L270] SORT_1 var_68_arg_0 = var_63; [L271] SORT_1 var_68_arg_1 = var_67; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_68_arg_0=1, var_68_arg_1=1, var_7=0] [L272] EXPR var_68_arg_0 | var_68_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_59=0, var_7=0] [L272] SORT_1 var_68 = var_68_arg_0 | var_68_arg_1; [L273] SORT_1 var_69_arg_0 = var_59; [L274] SORT_1 var_69_arg_1 = var_68; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69_arg_0=0, var_69_arg_1=1, var_7=0] [L275] EXPR var_69_arg_0 & var_69_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L275] SORT_1 var_69 = var_69_arg_0 & var_69_arg_1; [L276] SORT_1 var_70_arg_0 = state_60; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_70_arg_0=0, var_7=0] [L277] EXPR var_70_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L277] var_70_arg_0 = var_70_arg_0 & mask_SORT_1 [L278] SORT_10 var_70 = var_70_arg_0; [L279] SORT_10 var_71_arg_0 = var_70; [L280] SORT_10 var_71_arg_1 = var_26; [L281] SORT_1 var_71 = var_71_arg_0 == var_71_arg_1; [L282] SORT_1 var_74_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_74_arg_0=0, var_7=0] [L283] EXPR var_74_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_71=1, var_7=0] [L283] var_74_arg_0 = var_74_arg_0 & mask_SORT_1 [L284] SORT_10 var_74 = var_74_arg_0; [L285] SORT_10 var_75_arg_0 = var_74; [L286] SORT_10 var_75_arg_1 = var_26; [L287] SORT_1 var_75 = var_75_arg_0 == var_75_arg_1; [L288] SORT_1 var_76_arg_0 = var_71; [L289] SORT_1 var_76_arg_1 = var_75; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_76_arg_0=1, var_76_arg_1=1, var_7=0] [L290] EXPR var_76_arg_0 | var_76_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_69=0, var_7=0] [L290] SORT_1 var_76 = var_76_arg_0 | var_76_arg_1; [L291] SORT_1 var_77_arg_0 = var_69; [L292] SORT_1 var_77_arg_1 = var_76; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77_arg_0=0, var_77_arg_1=1, var_7=0] [L293] EXPR var_77_arg_0 & var_77_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L293] SORT_1 var_77 = var_77_arg_0 & var_77_arg_1; [L294] SORT_1 var_78_arg_0 = state_64; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_78_arg_0=0, var_7=0] [L295] EXPR var_78_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L295] var_78_arg_0 = var_78_arg_0 & mask_SORT_1 [L296] SORT_10 var_78 = var_78_arg_0; [L297] SORT_10 var_79_arg_0 = var_78; [L298] SORT_10 var_79_arg_1 = var_26; [L299] SORT_1 var_79 = var_79_arg_0 == var_79_arg_1; [L300] SORT_1 var_80_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0, var_80_arg_0=0] [L301] EXPR var_80_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_79=1, var_7=0] [L301] var_80_arg_0 = var_80_arg_0 & mask_SORT_1 [L302] SORT_10 var_80 = var_80_arg_0; [L303] SORT_10 var_81_arg_0 = var_80; [L304] SORT_10 var_81_arg_1 = var_26; [L305] SORT_1 var_81 = var_81_arg_0 == var_81_arg_1; [L306] SORT_1 var_82_arg_0 = var_79; [L307] SORT_1 var_82_arg_1 = var_81; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0, var_82_arg_0=1, var_82_arg_1=1] [L308] EXPR var_82_arg_0 | var_82_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_77=0, var_7=0] [L308] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L309] SORT_1 var_83_arg_0 = var_77; [L310] SORT_1 var_83_arg_1 = var_82; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83_arg_0=0, var_83_arg_1=1] [L311] EXPR var_83_arg_0 & var_83_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L311] SORT_1 var_83 = var_83_arg_0 & var_83_arg_1; [L312] SORT_1 var_84_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_84_arg_0=0] [L313] EXPR var_84_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L313] var_84_arg_0 = var_84_arg_0 & mask_SORT_1 [L314] SORT_10 var_84 = var_84_arg_0; [L315] SORT_10 var_85_arg_0 = var_84; [L316] SORT_10 var_85_arg_1 = var_26; [L317] SORT_1 var_85 = var_85_arg_0 == var_85_arg_1; [L318] SORT_1 var_88_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1, var_88_arg_0=0] [L319] EXPR var_88_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_85=1] [L319] var_88_arg_0 = var_88_arg_0 & mask_SORT_1 [L320] SORT_10 var_88 = var_88_arg_0; [L321] SORT_10 var_89_arg_0 = var_88; [L322] SORT_10 var_89_arg_1 = var_26; [L323] SORT_1 var_89 = var_89_arg_0 == var_89_arg_1; [L324] SORT_1 var_90_arg_0 = var_85; [L325] SORT_1 var_90_arg_1 = var_89; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0, var_90_arg_0=1, var_90_arg_1=1] [L326] EXPR var_90_arg_0 | var_90_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_83=0] [L326] SORT_1 var_90 = var_90_arg_0 | var_90_arg_1; [L327] SORT_1 var_91_arg_0 = var_83; [L328] SORT_1 var_91_arg_1 = var_90; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91_arg_0=0, var_91_arg_1=1] [L329] EXPR var_91_arg_0 & var_91_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L329] SORT_1 var_91 = var_91_arg_0 & var_91_arg_1; [L330] SORT_1 var_92_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_92_arg_0=0] [L331] EXPR var_92_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L331] var_92_arg_0 = var_92_arg_0 & mask_SORT_1 [L332] SORT_10 var_92 = var_92_arg_0; [L333] SORT_10 var_93_arg_0 = var_92; [L334] SORT_10 var_93_arg_1 = var_26; [L335] SORT_1 var_93 = var_93_arg_0 == var_93_arg_1; [L336] SORT_1 var_94_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1, var_94_arg_0=0] [L337] EXPR var_94_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_93=1] [L337] var_94_arg_0 = var_94_arg_0 & mask_SORT_1 [L338] SORT_10 var_94 = var_94_arg_0; [L339] SORT_10 var_95_arg_0 = var_94; [L340] SORT_10 var_95_arg_1 = var_26; [L341] SORT_1 var_95 = var_95_arg_0 == var_95_arg_1; [L342] SORT_1 var_96_arg_0 = var_93; [L343] SORT_1 var_96_arg_1 = var_95; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0, var_96_arg_0=1, var_96_arg_1=1] [L344] EXPR var_96_arg_0 | var_96_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_91=0] [L344] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L345] SORT_1 var_97_arg_0 = var_91; [L346] SORT_1 var_97_arg_1 = var_96; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97_arg_0=0, var_97_arg_1=1] [L347] EXPR var_97_arg_0 & var_97_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L347] SORT_1 var_97 = var_97_arg_0 & var_97_arg_1; [L348] SORT_1 var_98_arg_0 = state_8; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_98_arg_0=0] [L349] EXPR var_98_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L349] var_98_arg_0 = var_98_arg_0 & mask_SORT_1 [L350] SORT_10 var_98 = var_98_arg_0; [L351] SORT_10 var_99_arg_0 = var_98; [L352] SORT_10 var_99_arg_1 = var_26; [L353] SORT_1 var_99 = var_99_arg_0 == var_99_arg_1; [L354] SORT_1 var_102_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_102_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] EXPR var_102_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0, var_99=1] [L355] var_102_arg_0 = var_102_arg_0 & mask_SORT_1 [L356] SORT_10 var_102 = var_102_arg_0; [L357] SORT_10 var_103_arg_0 = var_102; [L358] SORT_10 var_103_arg_1 = var_26; [L359] SORT_1 var_103 = var_103_arg_0 == var_103_arg_1; [L360] SORT_1 var_104_arg_0 = var_99; [L361] SORT_1 var_104_arg_1 = var_103; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_104_arg_0=1, var_104_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] EXPR var_104_arg_0 | var_104_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0, var_97=0] [L362] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L363] SORT_1 var_105_arg_0 = var_97; [L364] SORT_1 var_105_arg_1 = var_104; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105_arg_0=0, var_105_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] EXPR var_105_arg_0 & var_105_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L365] SORT_1 var_105 = var_105_arg_0 & var_105_arg_1; [L366] SORT_1 var_106_arg_0 = state_72; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_106_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] EXPR var_106_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L367] var_106_arg_0 = var_106_arg_0 & mask_SORT_1 [L368] SORT_10 var_106 = var_106_arg_0; [L369] SORT_10 var_107_arg_0 = var_106; [L370] SORT_10 var_107_arg_1 = var_26; [L371] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L372] SORT_1 var_108_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_108_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] EXPR var_108_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_107=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L373] var_108_arg_0 = var_108_arg_0 & mask_SORT_1 [L374] SORT_10 var_108 = var_108_arg_0; [L375] SORT_10 var_109_arg_0 = var_108; [L376] SORT_10 var_109_arg_1 = var_26; [L377] SORT_1 var_109 = var_109_arg_0 == var_109_arg_1; [L378] SORT_1 var_110_arg_0 = var_107; [L379] SORT_1 var_110_arg_1 = var_109; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_110_arg_0=1, var_110_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] EXPR var_110_arg_0 | var_110_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_105=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L380] SORT_1 var_110 = var_110_arg_0 | var_110_arg_1; [L381] SORT_1 var_111_arg_0 = var_105; [L382] SORT_1 var_111_arg_1 = var_110; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111_arg_0=0, var_111_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] EXPR var_111_arg_0 & var_111_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L383] SORT_1 var_111 = var_111_arg_0 & var_111_arg_1; [L384] SORT_1 var_112_arg_0 = state_86; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_112_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] EXPR var_112_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L385] var_112_arg_0 = var_112_arg_0 & mask_SORT_1 [L386] SORT_10 var_112 = var_112_arg_0; [L387] SORT_10 var_113_arg_0 = var_112; [L388] SORT_10 var_113_arg_1 = var_26; [L389] SORT_1 var_113 = var_113_arg_0 == var_113_arg_1; [L390] SORT_1 var_114_arg_0 = var_113; [L391] SORT_1 var_114 = ~var_114_arg_0; [L392] SORT_1 var_115_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_115_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] EXPR var_115_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_114=-2, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L393] var_115_arg_0 = var_115_arg_0 & mask_SORT_1 [L394] SORT_10 var_115 = var_115_arg_0; [L395] SORT_10 var_116_arg_0 = var_115; [L396] SORT_10 var_116_arg_1 = var_26; [L397] SORT_1 var_116 = var_116_arg_0 == var_116_arg_1; [L398] SORT_1 var_117_arg_0 = var_114; [L399] SORT_1 var_117_arg_1 = var_116; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_117_arg_0=-2, var_117_arg_1=1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] EXPR var_117_arg_0 | var_117_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_111=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L400] SORT_1 var_117 = var_117_arg_0 | var_117_arg_1; [L401] SORT_1 var_118_arg_0 = var_111; [L402] SORT_1 var_118_arg_1 = var_117; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118_arg_0=0, var_118_arg_1=254, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] EXPR var_118_arg_0 & var_118_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L403] SORT_1 var_118 = var_118_arg_0 & var_118_arg_1; [L404] SORT_1 var_119_arg_0 = state_100; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_119_arg_0=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] EXPR var_119_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L405] var_119_arg_0 = var_119_arg_0 & mask_SORT_1 [L406] SORT_10 var_119 = var_119_arg_0; [L407] SORT_10 var_120_arg_0 = var_119; [L408] SORT_10 var_120_arg_1 = var_12; [L409] SORT_1 var_120 = var_120_arg_0 == var_120_arg_1; [L410] SORT_1 var_121_arg_0 = var_120; [L411] SORT_1 var_121 = ~var_121_arg_0; [L412] SORT_1 var_125_arg_0 = state_123; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_125_arg_0=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] EXPR var_125_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_121=-1, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L413] var_125_arg_0 = var_125_arg_0 & mask_SORT_1 [L414] SORT_20 var_125 = var_125_arg_0; [L415] SORT_20 var_127_arg_0 = var_125; [L416] SORT_20 var_127_arg_1 = var_126; [L417] SORT_1 var_127 = var_127_arg_0 == var_127_arg_1; [L418] SORT_1 var_128_arg_0 = var_121; [L419] SORT_1 var_128_arg_1 = var_127; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_128_arg_0=-1, var_128_arg_1=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] EXPR var_128_arg_0 | var_128_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_118=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L420] SORT_1 var_128 = var_128_arg_0 | var_128_arg_1; [L421] SORT_1 var_129_arg_0 = var_118; [L422] SORT_1 var_129_arg_1 = var_128; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129_arg_0=0, var_129_arg_1=256, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] EXPR var_129_arg_0 & var_129_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L423] SORT_1 var_129 = var_129_arg_0 & var_129_arg_1; [L424] SORT_1 var_132_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_132_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L425] EXPR var_132_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L425] var_132_arg_0 = var_132_arg_0 & mask_SORT_1 [L426] SORT_10 var_132 = var_132_arg_0; [L427] SORT_10 var_133_arg_0 = var_132; [L428] SORT_10 var_133_arg_1 = var_12; [L429] SORT_1 var_133 = var_133_arg_0 == var_133_arg_1; [L430] SORT_1 var_134_arg_0 = var_133; [L431] SORT_1 var_134 = ~var_134_arg_0; [L432] SORT_1 var_137_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_137_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L433] EXPR var_137_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_134=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L433] var_137_arg_0 = var_137_arg_0 & mask_SORT_1 [L434] SORT_10 var_137 = var_137_arg_0; [L435] SORT_10 var_138_arg_0 = var_137; [L436] SORT_10 var_138_arg_1 = var_12; [L437] SORT_1 var_138 = var_138_arg_0 == var_138_arg_1; [L438] SORT_1 var_139_arg_0 = var_134; [L439] SORT_1 var_139_arg_1 = var_138; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_139_arg_0=-1, var_139_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L440] EXPR var_139_arg_0 | var_139_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_129=0, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L440] SORT_1 var_139 = var_139_arg_0 | var_139_arg_1; [L441] SORT_1 var_140_arg_0 = var_129; [L442] SORT_1 var_140_arg_1 = var_139; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140_arg_0=0, var_140_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L443] EXPR var_140_arg_0 & var_140_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L443] SORT_1 var_140 = var_140_arg_0 & var_140_arg_1; [L444] SORT_1 var_143_arg_0 = state_141; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_143_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] EXPR var_143_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L445] var_143_arg_0 = var_143_arg_0 & mask_SORT_1 [L446] SORT_10 var_143 = var_143_arg_0; [L447] SORT_10 var_144_arg_0 = var_143; [L448] SORT_10 var_144_arg_1 = var_26; [L449] SORT_1 var_144 = var_144_arg_0 == var_144_arg_1; [L450] SORT_1 var_145_arg_0 = var_144; [L451] SORT_1 var_145 = ~var_145_arg_0; [L452] SORT_1 var_146_arg_0 = state_135; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_146_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L453] EXPR var_146_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_145=-2, var_254=104, var_26=0, var_30=0, var_7=0] [L453] var_146_arg_0 = var_146_arg_0 & mask_SORT_1 [L454] SORT_10 var_146 = var_146_arg_0; [L455] SORT_10 var_147_arg_0 = var_146; [L456] SORT_10 var_147_arg_1 = var_26; [L457] SORT_1 var_147 = var_147_arg_0 == var_147_arg_1; [L458] SORT_1 var_148_arg_0 = var_145; [L459] SORT_1 var_148_arg_1 = var_147; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_148_arg_0=-2, var_148_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L460] EXPR var_148_arg_0 | var_148_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_140=0, var_254=104, var_26=0, var_30=0, var_7=0] [L460] SORT_1 var_148 = var_148_arg_0 | var_148_arg_1; [L461] SORT_1 var_149_arg_0 = var_140; [L462] SORT_1 var_149_arg_1 = var_148; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149_arg_0=0, var_149_arg_1=254, var_254=104, var_26=0, var_30=0, var_7=0] [L463] EXPR var_149_arg_0 & var_149_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L463] SORT_1 var_149 = var_149_arg_0 & var_149_arg_1; [L464] SORT_1 var_150_arg_0 = state_38; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_150_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] EXPR var_150_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L465] var_150_arg_0 = var_150_arg_0 & mask_SORT_1 [L466] SORT_10 var_150 = var_150_arg_0; [L467] SORT_10 var_151_arg_0 = var_150; [L468] SORT_10 var_151_arg_1 = var_12; [L469] SORT_1 var_151 = var_151_arg_0 == var_151_arg_1; [L470] SORT_1 var_152_arg_0 = var_151; [L471] SORT_1 var_152 = ~var_152_arg_0; [L472] SORT_1 var_155_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_155_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L473] EXPR var_155_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_152=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L473] var_155_arg_0 = var_155_arg_0 & mask_SORT_1 [L474] SORT_10 var_155 = var_155_arg_0; [L475] SORT_10 var_156_arg_0 = var_155; [L476] SORT_10 var_156_arg_1 = var_12; [L477] SORT_1 var_156 = var_156_arg_0 == var_156_arg_1; [L478] SORT_1 var_157_arg_0 = var_152; [L479] SORT_1 var_157_arg_1 = var_156; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_157_arg_0=-1, var_157_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] EXPR var_157_arg_0 | var_157_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_149=0, var_254=104, var_26=0, var_30=0, var_7=0] [L480] SORT_1 var_157 = var_157_arg_0 | var_157_arg_1; [L481] SORT_1 var_158_arg_0 = var_149; [L482] SORT_1 var_158_arg_1 = var_157; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158_arg_0=0, var_158_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L483] EXPR var_158_arg_0 & var_158_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L483] SORT_1 var_158 = var_158_arg_0 & var_158_arg_1; [L484] SORT_1 var_159_arg_0 = state_153; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_159_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] EXPR var_159_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L485] var_159_arg_0 = var_159_arg_0 & mask_SORT_1 [L486] SORT_10 var_159 = var_159_arg_0; [L487] SORT_10 var_160_arg_0 = var_159; [L488] SORT_10 var_160_arg_1 = var_12; [L489] SORT_1 var_160 = var_160_arg_0 == var_160_arg_1; [L490] SORT_1 var_161_arg_0 = var_160; [L491] SORT_1 var_161 = ~var_161_arg_0; [L492] SORT_1 var_162_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_162_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L493] EXPR var_162_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_161=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L493] var_162_arg_0 = var_162_arg_0 & mask_SORT_1 [L494] SORT_10 var_162 = var_162_arg_0; [L495] SORT_10 var_163_arg_0 = var_162; [L496] SORT_10 var_163_arg_1 = var_12; [L497] SORT_1 var_163 = var_163_arg_0 == var_163_arg_1; [L498] SORT_1 var_164_arg_0 = var_161; [L499] SORT_1 var_164_arg_1 = var_163; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_164_arg_0=-1, var_164_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] EXPR var_164_arg_0 | var_164_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_158=0, var_254=104, var_26=0, var_30=0, var_7=0] [L500] SORT_1 var_164 = var_164_arg_0 | var_164_arg_1; [L501] SORT_1 var_165_arg_0 = var_158; [L502] SORT_1 var_165_arg_1 = var_164; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165_arg_0=0, var_165_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L503] EXPR var_165_arg_0 & var_165_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L503] SORT_1 var_165 = var_165_arg_0 & var_165_arg_1; [L504] SORT_1 var_168_arg_0 = state_166; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_168_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] EXPR var_168_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L505] var_168_arg_0 = var_168_arg_0 & mask_SORT_1 [L506] SORT_10 var_168 = var_168_arg_0; [L507] SORT_10 var_169_arg_0 = var_168; [L508] SORT_10 var_169_arg_1 = var_12; [L509] SORT_1 var_169 = var_169_arg_0 == var_169_arg_1; [L510] SORT_1 var_170_arg_0 = var_169; [L511] SORT_1 var_170 = ~var_170_arg_0; [L512] SORT_1 var_171_arg_0 = state_43; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_171_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L513] EXPR var_171_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_170=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L513] var_171_arg_0 = var_171_arg_0 & mask_SORT_1 [L514] SORT_10 var_171 = var_171_arg_0; [L515] SORT_10 var_172_arg_0 = var_171; [L516] SORT_10 var_172_arg_1 = var_12; [L517] SORT_1 var_172 = var_172_arg_0 == var_172_arg_1; [L518] SORT_1 var_173_arg_0 = var_170; [L519] SORT_1 var_173_arg_1 = var_172; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_173_arg_0=-1, var_173_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] EXPR var_173_arg_0 | var_173_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_165=0, var_254=104, var_26=0, var_30=0, var_7=0] [L520] SORT_1 var_173 = var_173_arg_0 | var_173_arg_1; [L521] SORT_1 var_174_arg_0 = var_165; [L522] SORT_1 var_174_arg_1 = var_173; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174_arg_0=0, var_174_arg_1=255, var_254=104, var_26=0, var_30=0, var_7=0] [L523] EXPR var_174_arg_0 & var_174_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L523] SORT_1 var_174 = var_174_arg_0 & var_174_arg_1; [L524] SORT_1 var_175_arg_0 = state_130; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_175_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] EXPR var_175_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L525] var_175_arg_0 = var_175_arg_0 & mask_SORT_1 [L526] SORT_10 var_175 = var_175_arg_0; [L527] SORT_10 var_176_arg_0 = var_175; [L528] SORT_10 var_176_arg_1 = var_26; [L529] SORT_1 var_176 = var_176_arg_0 == var_176_arg_1; [L530] SORT_1 var_179_arg_0 = state_177; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_179_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L531] EXPR var_179_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_176=1, var_254=104, var_26=0, var_30=0, var_7=0] [L531] var_179_arg_0 = var_179_arg_0 & mask_SORT_1 [L532] SORT_10 var_179 = var_179_arg_0; [L533] SORT_10 var_180_arg_0 = var_179; [L534] SORT_10 var_180_arg_1 = var_26; [L535] SORT_1 var_180 = var_180_arg_0 == var_180_arg_1; [L536] SORT_1 var_181_arg_0 = var_176; [L537] SORT_1 var_181_arg_1 = var_180; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_181_arg_0=1, var_181_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L538] EXPR var_181_arg_0 | var_181_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_174=0, var_254=104, var_26=0, var_30=0, var_7=0] [L538] SORT_1 var_181 = var_181_arg_0 | var_181_arg_1; [L539] SORT_1 var_182_arg_0 = var_174; [L540] SORT_1 var_182_arg_1 = var_181; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182_arg_0=0, var_182_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] EXPR var_182_arg_0 & var_182_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L541] SORT_1 var_182 = var_182_arg_0 & var_182_arg_1; [L542] SORT_3 var_186_arg_0 = state_184; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_186_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] EXPR var_186_arg_0 & mask_SORT_3 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L543] var_186_arg_0 = var_186_arg_0 & mask_SORT_3 [L544] SORT_10 var_186 = var_186_arg_0; [L545] SORT_10 var_187_arg_0 = var_186; [L546] SORT_10 var_187_arg_1 = var_26; [L547] SORT_1 var_187 = var_187_arg_0 == var_187_arg_1; [L548] SORT_1 var_188_arg_0 = state_15; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_188_arg_0=0, var_254=104, var_26=0, var_30=0, var_7=0] [L549] EXPR var_188_arg_0 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_187=1, var_254=104, var_26=0, var_30=0, var_7=0] [L549] var_188_arg_0 = var_188_arg_0 & mask_SORT_1 [L550] SORT_10 var_188 = var_188_arg_0; [L551] SORT_10 var_189_arg_0 = var_188; [L552] SORT_10 var_189_arg_1 = var_12; [L553] SORT_1 var_189 = var_189_arg_0 == var_189_arg_1; [L554] SORT_1 var_190_arg_0 = var_187; [L555] SORT_1 var_190_arg_1 = var_189; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_190_arg_0=1, var_190_arg_1=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] EXPR var_190_arg_0 | var_190_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_182=0, var_254=104, var_26=0, var_30=0, var_7=0] [L556] SORT_1 var_190 = var_190_arg_0 | var_190_arg_1; [L557] SORT_1 var_191_arg_0 = var_182; [L558] SORT_1 var_191_arg_1 = var_190; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_191_arg_0=0, var_191_arg_1=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] EXPR var_191_arg_0 & var_191_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L559] SORT_1 var_191 = var_191_arg_0 & var_191_arg_1; [L560] SORT_1 var_194_arg_0 = var_191; [L561] SORT_1 var_194 = ~var_194_arg_0; [L562] SORT_1 var_195_arg_0 = var_122; [L563] SORT_1 var_195_arg_1 = var_194; VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_195_arg_0=1, var_195_arg_1=-1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] EXPR var_195_arg_0 & var_195_arg_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L564] SORT_1 var_195 = var_195_arg_0 & var_195_arg_1; [L565] EXPR var_195 & mask_SORT_1 VAL [mask_SORT_1=1, mask_SORT_20=15, mask_SORT_29=1023, mask_SORT_33=3, mask_SORT_3=255, state_100=0, state_123=1, state_130=0, state_135=0, state_141=0, state_153=0, state_15=0, state_166=0, state_177=0, state_184=0, state_197=0, state_199=0, state_203=0, state_22=0, state_31=0, state_38=0, state_43=0, state_49=0, state_60=0, state_64=0, state_72=0, state_86=0, state_8=0, var_122=1, var_126=1, var_12=1, var_254=104, var_26=0, var_30=0, var_7=0] [L565] var_195 = var_195 & mask_SORT_1 [L566] SORT_1 bad_196_arg_0 = var_195; [L567] CALL __VERIFIER_assert(!(bad_196_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 498 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 37.3s, OverallIterations: 23, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 3.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8854 SdHoareTripleChecker+Valid, 2.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8854 mSDsluCounter, 55266 SdHoareTripleChecker+Invalid, 1.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 39273 mSDsCounter, 70 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 2017 IncrementalHoareTripleChecker+Invalid, 2087 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 70 mSolverCounterUnsat, 15993 mSDtfsCounter, 2017 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 138 GetRequests, 53 SyntacticMatches, 1 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=741occurred in iteration=22, InterpolantAutomatonStates: 110, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 22 MinimizatonAttempts, 542 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 7.7s SatisfiabilityAnalysisTime, 23.3s InterpolantComputationTime, 5185 NumberOfCodeBlocks, 5185 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 4928 ConstructedInterpolants, 0 QuantifiedInterpolants, 9902 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 22 InterpolantComputations, 22 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2024-11-18 17:30:59,831 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m [2024-11-18 17:31:02,173 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-18 17:31:02,257 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2024-11-18 17:31:02,263 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-18 17:31:02,264 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-18 17:31:02,294 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-18 17:31:02,295 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-18 17:31:02,296 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-18 17:31:02,296 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-18 17:31:02,297 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-18 17:31:02,298 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-18 17:31:02,299 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-18 17:31:02,299 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-18 17:31:02,299 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-18 17:31:02,300 INFO L153 SettingsManager]: * Use SBE=true [2024-11-18 17:31:02,300 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-18 17:31:02,300 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-18 17:31:02,300 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-18 17:31:02,301 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-18 17:31:02,301 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-18 17:31:02,301 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-18 17:31:02,304 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2024-11-18 17:31:02,304 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2024-11-18 17:31:02,305 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-18 17:31:02,305 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2024-11-18 17:31:02,305 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-18 17:31:02,305 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-18 17:31:02,306 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-18 17:31:02,306 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-18 17:31:02,306 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-18 17:31:02,306 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-18 17:31:02,306 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 17:31:02,307 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-18 17:31:02,307 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-18 17:31:02,307 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-18 17:31:02,308 INFO L153 SettingsManager]: * Trace refinement strategy=WOLF [2024-11-18 17:31:02,309 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2024-11-18 17:31:02,309 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-18 17:31:02,310 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-18 17:31:02,310 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-18 17:31:02,310 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-18 17:31:02,311 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 133ed02e483160842227ba05a50e01319ae2d6425d72670eb79dfefca9c5ec50 [2024-11-18 17:31:02,623 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-18 17:31:02,649 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-18 17:31:02,652 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-18 17:31:02,654 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-18 17:31:02,654 INFO L274 PluginConnector]: CDTParser initialized [2024-11-18 17:31:02,655 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-18 17:31:04,282 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-18 17:31:04,582 INFO L384 CDTParser]: Found 1 translation units. [2024-11-18 17:31:04,583 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c [2024-11-18 17:31:04,602 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ad58b16ef/51e808ad79534fbbb325912df2fe7b7d/FLAGd2a6d7811 [2024-11-18 17:31:04,615 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/ad58b16ef/51e808ad79534fbbb325912df2fe7b7d [2024-11-18 17:31:04,617 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-18 17:31:04,618 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-18 17:31:04,619 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-18 17:31:04,619 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-18 17:31:04,624 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-18 17:31:04,625 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:31:04" (1/1) ... [2024-11-18 17:31:04,626 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1a28b6c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:04, skipping insertion in model container [2024-11-18 17:31:04,626 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 05:31:04" (1/1) ... [2024-11-18 17:31:04,683 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-18 17:31:04,896 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-18 17:31:05,127 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 17:31:05,148 INFO L200 MainTranslator]: Completed pre-run [2024-11-18 17:31:05,184 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.itc99_b13.c[1249,1262] [2024-11-18 17:31:05,265 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 17:31:05,282 INFO L204 MainTranslator]: Completed translation [2024-11-18 17:31:05,283 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05 WrapperNode [2024-11-18 17:31:05,283 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-18 17:31:05,284 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-18 17:31:05,285 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-18 17:31:05,285 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-18 17:31:05,292 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,326 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,409 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 970 [2024-11-18 17:31:05,410 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-18 17:31:05,414 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-18 17:31:05,414 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-18 17:31:05,414 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-18 17:31:05,425 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,425 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,435 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,504 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-18 17:31:05,505 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,505 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,525 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,536 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,539 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,554 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,569 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-18 17:31:05,570 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-18 17:31:05,570 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-18 17:31:05,570 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-18 17:31:05,571 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (1/1) ... [2024-11-18 17:31:05,581 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 17:31:05,592 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 17:31:05,609 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-18 17:31:05,612 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-18 17:31:05,662 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-18 17:31:05,663 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1#0 [2024-11-18 17:31:05,663 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-18 17:31:05,664 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-18 17:31:05,929 INFO L238 CfgBuilder]: Building ICFG [2024-11-18 17:31:05,931 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-18 17:31:06,711 INFO L? ?]: Removed 409 outVars from TransFormulas that were not future-live. [2024-11-18 17:31:06,711 INFO L287 CfgBuilder]: Performing block encoding [2024-11-18 17:31:06,724 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-18 17:31:06,725 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-18 17:31:06,726 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:31:06 BoogieIcfgContainer [2024-11-18 17:31:06,727 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-18 17:31:06,729 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-18 17:31:06,730 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-18 17:31:06,733 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-18 17:31:06,733 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 05:31:04" (1/3) ... [2024-11-18 17:31:06,734 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fb12ce3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:31:06, skipping insertion in model container [2024-11-18 17:31:06,734 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 05:31:05" (2/3) ... [2024-11-18 17:31:06,735 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fb12ce3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 05:31:06, skipping insertion in model container [2024-11-18 17:31:06,735 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 05:31:06" (3/3) ... [2024-11-18 17:31:06,736 INFO L112 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.itc99_b13.c [2024-11-18 17:31:06,754 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-18 17:31:06,755 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-11-18 17:31:06,828 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-18 17:31:06,836 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@344dd9d4, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-18 17:31:06,837 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-18 17:31:06,841 INFO L276 IsEmpty]: Start isEmpty. Operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:31:06,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2024-11-18 17:31:06,848 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:31:06,848 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2024-11-18 17:31:06,848 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:31:06,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:31:06,853 INFO L85 PathProgramCache]: Analyzing trace with hash 28694789, now seen corresponding path program 1 times [2024-11-18 17:31:06,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-11-18 17:31:06,869 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [496664344] [2024-11-18 17:31:06,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:31:06,869 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-18 17:31:06,870 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-11-18 17:31:06,871 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-18 17:31:06,893 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Waiting until timeout for monitored process [2024-11-18 17:31:07,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:31:07,470 WARN L253 TraceCheckSpWp]: Trace formula consists of 436 conjuncts, 277 conjuncts are in the unsatisfiable core [2024-11-18 17:31:07,522 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 17:31:11,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 17:31:11,365 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 17:31:11,365 INFO L136 FreeRefinementEngine]: Strategy WOLF found an infeasible trace [2024-11-18 17:31:11,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleMathsat [496664344] [2024-11-18 17:31:11,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleMathsat [496664344] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 17:31:11,367 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 17:31:11,367 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 17:31:11,368 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1583333193] [2024-11-18 17:31:11,370 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 17:31:11,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 17:31:11,374 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy WOLF [2024-11-18 17:31:11,397 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 17:31:11,397 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 17:31:11,399 INFO L87 Difference]: Start difference. First operand has 10 states, 8 states have (on average 1.375) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:31:11,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 17:31:11,620 INFO L93 Difference]: Finished difference Result 18 states and 23 transitions. [2024-11-18 17:31:11,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 17:31:11,623 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 5 [2024-11-18 17:31:11,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 17:31:11,629 INFO L225 Difference]: With dead ends: 18 [2024-11-18 17:31:11,629 INFO L226 Difference]: Without dead ends: 10 [2024-11-18 17:31:11,632 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 17:31:11,637 INFO L432 NwaCegarLoop]: 4 mSDtfsCounter, 2 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 17:31:11,638 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2 Valid, 11 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 17:31:11,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states. [2024-11-18 17:31:11,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2024-11-18 17:31:11,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 8 states have (on average 1.125) internal successors, (9), 8 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:31:11,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 9 transitions. [2024-11-18 17:31:11,688 INFO L78 Accepts]: Start accepts. Automaton has 9 states and 9 transitions. Word has length 5 [2024-11-18 17:31:11,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 17:31:11,689 INFO L471 AbstractCegarLoop]: Abstraction has 9 states and 9 transitions. [2024-11-18 17:31:11,689 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 1.25) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-18 17:31:11,689 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states and 9 transitions. [2024-11-18 17:31:11,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2024-11-18 17:31:11,690 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 17:31:11,690 INFO L215 NwaCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2024-11-18 17:31:11,710 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (2)] Ended with exit code 0 [2024-11-18 17:31:11,895 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-18 17:31:11,895 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 17:31:11,896 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 17:31:11,896 INFO L85 PathProgramCache]: Analyzing trace with hash 152739811, now seen corresponding path program 1 times [2024-11-18 17:31:11,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy WOLF [2024-11-18 17:31:11,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleMathsat [2016541882] [2024-11-18 17:31:11,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 17:31:11,898 INFO L173 SolverBuilder]: Constructing external solver with command: mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 [2024-11-18 17:31:11,899 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat [2024-11-18 17:31:11,900 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (exit command is (exit), workingDir is null) [2024-11-18 17:31:11,902 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/mathsat -theory.fp.to_bv_overflow_mode=1 -theory.fp.minmax_zero_mode=4 -theory.bv.div_by_zero_mode=1 -unsat_core_generation=3 (3)] Waiting until timeout for monitored process [2024-11-18 17:31:13,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 17:31:13,290 INFO L255 TraceCheckSpWp]: Trace formula consists of 815 conjuncts, 298 conjuncts are in the unsatisfiable core [2024-11-18 17:31:13,325 INFO L278 TraceCheckSpWp]: Computing forward predicates...