./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 3061b6dc Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m [2024-11-18 14:36:55,227 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-18 14:36:55,317 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-18 14:36:55,324 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-18 14:36:55,326 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-18 14:36:55,357 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-18 14:36:55,359 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-18 14:36:55,359 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-18 14:36:55,360 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-18 14:36:55,361 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-18 14:36:55,362 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-18 14:36:55,362 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-18 14:36:55,363 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-18 14:36:55,365 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-18 14:36:55,365 INFO L153 SettingsManager]: * Use SBE=true [2024-11-18 14:36:55,366 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-18 14:36:55,366 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-18 14:36:55,366 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-18 14:36:55,367 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-18 14:36:55,367 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-18 14:36:55,367 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-18 14:36:55,371 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-18 14:36:55,371 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-18 14:36:55,372 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-18 14:36:55,372 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-18 14:36:55,372 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-18 14:36:55,372 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-18 14:36:55,373 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-18 14:36:55,373 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-18 14:36:55,374 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-18 14:36:55,374 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-18 14:36:55,375 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-18 14:36:55,375 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 14:36:55,375 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-18 14:36:55,376 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-18 14:36:55,376 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-18 14:36:55,376 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-18 14:36:55,376 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-18 14:36:55,377 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-18 14:36:55,377 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-18 14:36:55,377 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-18 14:36:55,378 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-18 14:36:55,378 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a30aa210ed4a7c8ee647a70aef136aef282e5eccb07388ecda6495e33bc30b6d [2024-11-18 14:36:55,656 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-18 14:36:55,676 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-18 14:36:55,679 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-18 14:36:55,680 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-18 14:36:55,681 INFO L274 PluginConnector]: CDTParser initialized [2024-11-18 14:36:55,682 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-11-18 14:36:57,133 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-18 14:36:57,354 INFO L384 CDTParser]: Found 1 translation units. [2024-11-18 14:36:57,354 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-11-18 14:36:57,368 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/89ecc35a2/5efed20050994d429274ab80def068eb/FLAGc7b0c0abd [2024-11-18 14:36:57,382 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/89ecc35a2/5efed20050994d429274ab80def068eb [2024-11-18 14:36:57,385 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-18 14:36:57,386 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-18 14:36:57,391 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-18 14:36:57,391 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-18 14:36:57,396 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-18 14:36:57,397 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,398 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25545c5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57, skipping insertion in model container [2024-11-18 14:36:57,398 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,441 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-18 14:36:57,724 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2024-11-18 14:36:57,728 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 14:36:57,739 INFO L200 MainTranslator]: Completed pre-run [2024-11-18 14:36:57,815 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c[14540,14553] [2024-11-18 14:36:57,816 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 14:36:57,843 INFO L204 MainTranslator]: Completed translation [2024-11-18 14:36:57,843 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57 WrapperNode [2024-11-18 14:36:57,843 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-18 14:36:57,844 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-18 14:36:57,844 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-18 14:36:57,844 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-18 14:36:57,851 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,871 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,906 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 505 [2024-11-18 14:36:57,906 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-18 14:36:57,907 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-18 14:36:57,907 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-18 14:36:57,908 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-18 14:36:57,922 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,922 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,934 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,957 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-18 14:36:57,958 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,958 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,980 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,990 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:57,996 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:58,004 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:58,012 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-18 14:36:58,019 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-18 14:36:58,019 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-18 14:36:58,020 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-18 14:36:58,021 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (1/1) ... [2024-11-18 14:36:58,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 14:36:58,051 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:36:58,069 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-18 14:36:58,072 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-18 14:36:58,128 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2024-11-18 14:36:58,128 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2024-11-18 14:36:58,128 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-18 14:36:58,128 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2024-11-18 14:36:58,128 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2024-11-18 14:36:58,129 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2024-11-18 14:36:58,129 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2024-11-18 14:36:58,129 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2024-11-18 14:36:58,129 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2024-11-18 14:36:58,129 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2024-11-18 14:36:58,130 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2024-11-18 14:36:58,130 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-18 14:36:58,131 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2024-11-18 14:36:58,131 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2024-11-18 14:36:58,131 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-18 14:36:58,131 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-18 14:36:58,131 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2024-11-18 14:36:58,131 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2024-11-18 14:36:58,249 INFO L238 CfgBuilder]: Building ICFG [2024-11-18 14:36:58,251 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-18 14:36:58,996 INFO L? ?]: Removed 113 outVars from TransFormulas that were not future-live. [2024-11-18 14:36:58,996 INFO L287 CfgBuilder]: Performing block encoding [2024-11-18 14:36:59,021 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-18 14:36:59,022 INFO L316 CfgBuilder]: Removed 1 assume(true) statements. [2024-11-18 14:36:59,023 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:59 BoogieIcfgContainer [2024-11-18 14:36:59,023 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-18 14:36:59,025 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-18 14:36:59,027 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-18 14:36:59,030 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-18 14:36:59,030 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 02:36:57" (1/3) ... [2024-11-18 14:36:59,033 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c0f7f2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:36:59, skipping insertion in model container [2024-11-18 14:36:59,033 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 02:36:57" (2/3) ... [2024-11-18 14:36:59,033 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c0f7f2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 02:36:59, skipping insertion in model container [2024-11-18 14:36:59,033 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:59" (3/3) ... [2024-11-18 14:36:59,034 INFO L112 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.4_1.ufo.BOUNDED-10.pals.c [2024-11-18 14:36:59,052 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-18 14:36:59,053 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-11-18 14:36:59,133 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-18 14:36:59,142 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@3d7ed106, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-18 14:36:59,142 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2024-11-18 14:36:59,148 INFO L276 IsEmpty]: Start isEmpty. Operand has 179 states, 139 states have (on average 1.5467625899280575) internal successors, (215), 140 states have internal predecessors, (215), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-18 14:36:59,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-18 14:36:59,157 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:36:59,158 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:36:59,159 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:36:59,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:36:59,164 INFO L85 PathProgramCache]: Analyzing trace with hash -336437783, now seen corresponding path program 1 times [2024-11-18 14:36:59,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:36:59,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185422589] [2024-11-18 14:36:59,175 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:36:59,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:36:59,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:36:59,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 14:36:59,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:36:59,480 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185422589] [2024-11-18 14:36:59,481 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1185422589] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:36:59,482 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:36:59,482 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2024-11-18 14:36:59,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [620788636] [2024-11-18 14:36:59,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:36:59,489 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2024-11-18 14:36:59,490 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:36:59,516 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2024-11-18 14:36:59,517 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-18 14:36:59,522 INFO L87 Difference]: Start difference. First operand has 179 states, 139 states have (on average 1.5467625899280575) internal successors, (215), 140 states have internal predecessors, (215), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:36:59,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:36:59,578 INFO L93 Difference]: Finished difference Result 342 states and 554 transitions. [2024-11-18 14:36:59,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-11-18 14:36:59,580 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-11-18 14:36:59,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:36:59,592 INFO L225 Difference]: With dead ends: 342 [2024-11-18 14:36:59,593 INFO L226 Difference]: Without dead ends: 175 [2024-11-18 14:36:59,597 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2024-11-18 14:36:59,601 INFO L432 NwaCegarLoop]: 274 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 274 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:36:59,601 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 274 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:36:59,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2024-11-18 14:36:59,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2024-11-18 14:36:59,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 136 states have (on average 1.5294117647058822) internal successors, (208), 136 states have internal predecessors, (208), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-18 14:36:59,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 270 transitions. [2024-11-18 14:36:59,658 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 270 transitions. Word has length 28 [2024-11-18 14:36:59,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:36:59,658 INFO L471 AbstractCegarLoop]: Abstraction has 175 states and 270 transitions. [2024-11-18 14:36:59,658 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:36:59,659 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 270 transitions. [2024-11-18 14:36:59,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2024-11-18 14:36:59,661 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:36:59,661 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:36:59,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-18 14:36:59,662 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:36:59,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:36:59,662 INFO L85 PathProgramCache]: Analyzing trace with hash -117583065, now seen corresponding path program 1 times [2024-11-18 14:36:59,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:36:59,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703161090] [2024-11-18 14:36:59,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:36:59,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:36:59,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:36:59,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 14:36:59,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:36:59,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703161090] [2024-11-18 14:36:59,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1703161090] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:36:59,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:36:59,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 14:36:59,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869713339] [2024-11-18 14:36:59,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:36:59,960 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 14:36:59,960 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:36:59,965 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 14:36:59,965 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 14:36:59,966 INFO L87 Difference]: Start difference. First operand 175 states and 270 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:37:00,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:00,120 INFO L93 Difference]: Finished difference Result 447 states and 697 transitions. [2024-11-18 14:37:00,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-18 14:37:00,122 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2024-11-18 14:37:00,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:00,128 INFO L225 Difference]: With dead ends: 447 [2024-11-18 14:37:00,128 INFO L226 Difference]: Without dead ends: 286 [2024-11-18 14:37:00,133 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 14:37:00,134 INFO L432 NwaCegarLoop]: 264 mSDtfsCounter, 130 mSDsluCounter, 1033 mSDsCounter, 0 mSdLazyCounter, 37 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 156 SdHoareTripleChecker+Valid, 1297 SdHoareTripleChecker+Invalid, 49 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 37 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:00,135 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [156 Valid, 1297 Invalid, 49 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 37 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:00,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2024-11-18 14:37:00,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 175. [2024-11-18 14:37:00,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 136 states have (on average 1.4411764705882353) internal successors, (196), 136 states have internal predecessors, (196), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-18 14:37:00,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 258 transitions. [2024-11-18 14:37:00,176 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 258 transitions. Word has length 28 [2024-11-18 14:37:00,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:00,176 INFO L471 AbstractCegarLoop]: Abstraction has 175 states and 258 transitions. [2024-11-18 14:37:00,177 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:37:00,177 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 258 transitions. [2024-11-18 14:37:00,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2024-11-18 14:37:00,178 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:00,178 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:00,179 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-18 14:37:00,179 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:00,180 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:00,180 INFO L85 PathProgramCache]: Analyzing trace with hash -680629300, now seen corresponding path program 1 times [2024-11-18 14:37:00,180 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:00,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888348618] [2024-11-18 14:37:00,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:00,183 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:00,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:00,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 14:37:00,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:00,489 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888348618] [2024-11-18 14:37:00,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1888348618] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:00,490 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:00,490 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:00,490 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1757246502] [2024-11-18 14:37:00,490 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:00,490 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:00,491 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:00,491 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:00,491 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:00,491 INFO L87 Difference]: Start difference. First operand 175 states and 258 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:37:00,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:00,554 INFO L93 Difference]: Finished difference Result 337 states and 506 transitions. [2024-11-18 14:37:00,554 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:00,554 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2024-11-18 14:37:00,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:00,557 INFO L225 Difference]: With dead ends: 337 [2024-11-18 14:37:00,561 INFO L226 Difference]: Without dead ends: 179 [2024-11-18 14:37:00,562 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:00,563 INFO L432 NwaCegarLoop]: 252 mSDtfsCounter, 3 mSDsluCounter, 494 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 746 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:00,563 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 746 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:00,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2024-11-18 14:37:00,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2024-11-18 14:37:00,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 139 states have (on average 1.4316546762589928) internal successors, (199), 139 states have internal predecessors, (199), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2024-11-18 14:37:00,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 261 transitions. [2024-11-18 14:37:00,587 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 261 transitions. Word has length 39 [2024-11-18 14:37:00,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:00,588 INFO L471 AbstractCegarLoop]: Abstraction has 179 states and 261 transitions. [2024-11-18 14:37:00,588 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2024-11-18 14:37:00,588 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 261 transitions. [2024-11-18 14:37:00,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2024-11-18 14:37:00,590 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:00,590 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:00,590 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-18 14:37:00,591 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:00,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:00,592 INFO L85 PathProgramCache]: Analyzing trace with hash -1013800162, now seen corresponding path program 1 times [2024-11-18 14:37:00,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:00,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135802256] [2024-11-18 14:37:00,592 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:00,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:00,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:00,690 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:00,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:00,691 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135802256] [2024-11-18 14:37:00,691 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2135802256] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:00,692 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:00,692 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 14:37:00,692 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927108651] [2024-11-18 14:37:00,692 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:00,693 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 14:37:00,693 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:00,694 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 14:37:00,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:00,695 INFO L87 Difference]: Start difference. First operand 179 states and 261 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:00,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:00,757 INFO L93 Difference]: Finished difference Result 491 states and 726 transitions. [2024-11-18 14:37:00,759 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 14:37:00,759 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2024-11-18 14:37:00,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:00,762 INFO L225 Difference]: With dead ends: 491 [2024-11-18 14:37:00,762 INFO L226 Difference]: Without dead ends: 329 [2024-11-18 14:37:00,763 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:00,767 INFO L432 NwaCegarLoop]: 268 mSDtfsCounter, 209 mSDsluCounter, 249 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 209 SdHoareTripleChecker+Valid, 517 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:00,767 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [209 Valid, 517 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:00,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2024-11-18 14:37:00,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 323. [2024-11-18 14:37:00,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 323 states, 246 states have (on average 1.451219512195122) internal successors, (357), 247 states have internal predecessors, (357), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2024-11-18 14:37:00,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 323 states to 323 states and 477 transitions. [2024-11-18 14:37:00,801 INFO L78 Accepts]: Start accepts. Automaton has 323 states and 477 transitions. Word has length 55 [2024-11-18 14:37:00,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:00,803 INFO L471 AbstractCegarLoop]: Abstraction has 323 states and 477 transitions. [2024-11-18 14:37:00,804 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:00,804 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 477 transitions. [2024-11-18 14:37:00,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-18 14:37:00,807 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:00,808 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:00,808 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-18 14:37:00,808 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:00,808 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:00,808 INFO L85 PathProgramCache]: Analyzing trace with hash 753023036, now seen corresponding path program 1 times [2024-11-18 14:37:00,809 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:00,809 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049809329] [2024-11-18 14:37:00,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:00,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:00,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:00,898 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:00,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:00,899 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049809329] [2024-11-18 14:37:00,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1049809329] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:00,899 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:00,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 14:37:00,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [609874671] [2024-11-18 14:37:00,901 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:00,901 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 14:37:00,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:00,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 14:37:00,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:00,903 INFO L87 Difference]: Start difference. First operand 323 states and 477 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:00,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:00,957 INFO L93 Difference]: Finished difference Result 908 states and 1352 transitions. [2024-11-18 14:37:00,958 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 14:37:00,958 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-11-18 14:37:00,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:00,965 INFO L225 Difference]: With dead ends: 908 [2024-11-18 14:37:00,967 INFO L226 Difference]: Without dead ends: 602 [2024-11-18 14:37:00,969 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:00,970 INFO L432 NwaCegarLoop]: 288 mSDtfsCounter, 211 mSDsluCounter, 251 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 211 SdHoareTripleChecker+Valid, 539 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:00,974 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [211 Valid, 539 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:00,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 602 states. [2024-11-18 14:37:01,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 602 to 596. [2024-11-18 14:37:01,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 596 states, 447 states have (on average 1.4608501118568233) internal successors, (653), 450 states have internal predecessors, (653), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2024-11-18 14:37:01,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 596 states to 596 states and 887 transitions. [2024-11-18 14:37:01,019 INFO L78 Accepts]: Start accepts. Automaton has 596 states and 887 transitions. Word has length 56 [2024-11-18 14:37:01,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:01,020 INFO L471 AbstractCegarLoop]: Abstraction has 596 states and 887 transitions. [2024-11-18 14:37:01,020 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:01,020 INFO L276 IsEmpty]: Start isEmpty. Operand 596 states and 887 transitions. [2024-11-18 14:37:01,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2024-11-18 14:37:01,025 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:01,026 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:01,026 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-18 14:37:01,026 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:01,026 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:01,027 INFO L85 PathProgramCache]: Analyzing trace with hash -526840642, now seen corresponding path program 1 times [2024-11-18 14:37:01,027 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:01,027 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690085815] [2024-11-18 14:37:01,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:01,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:01,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:01,180 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:01,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:01,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690085815] [2024-11-18 14:37:01,181 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690085815] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:01,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:01,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 14:37:01,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [511761863] [2024-11-18 14:37:01,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:01,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 14:37:01,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:01,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 14:37:01,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:01,183 INFO L87 Difference]: Start difference. First operand 596 states and 887 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:01,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:01,368 INFO L93 Difference]: Finished difference Result 1275 states and 1892 transitions. [2024-11-18 14:37:01,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:01,369 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2024-11-18 14:37:01,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:01,378 INFO L225 Difference]: With dead ends: 1275 [2024-11-18 14:37:01,379 INFO L226 Difference]: Without dead ends: 696 [2024-11-18 14:37:01,381 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:01,382 INFO L432 NwaCegarLoop]: 226 mSDtfsCounter, 356 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 94 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 356 SdHoareTripleChecker+Valid, 668 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 94 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:01,384 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [356 Valid, 668 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 94 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:01,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2024-11-18 14:37:01,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 684. [2024-11-18 14:37:01,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 684 states, 522 states have (on average 1.446360153256705) internal successors, (755), 525 states have internal predecessors, (755), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:01,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 684 states and 1003 transitions. [2024-11-18 14:37:01,458 INFO L78 Accepts]: Start accepts. Automaton has 684 states and 1003 transitions. Word has length 56 [2024-11-18 14:37:01,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:01,458 INFO L471 AbstractCegarLoop]: Abstraction has 684 states and 1003 transitions. [2024-11-18 14:37:01,459 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:01,459 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 1003 transitions. [2024-11-18 14:37:01,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2024-11-18 14:37:01,460 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:01,461 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:01,461 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-18 14:37:01,461 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:01,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:01,462 INFO L85 PathProgramCache]: Analyzing trace with hash 139412401, now seen corresponding path program 1 times [2024-11-18 14:37:01,462 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:01,462 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044990992] [2024-11-18 14:37:01,462 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:01,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:01,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:01,642 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:01,642 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:01,642 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1044990992] [2024-11-18 14:37:01,642 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1044990992] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:01,642 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:01,642 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 14:37:01,642 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447676018] [2024-11-18 14:37:01,643 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:01,643 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 14:37:01,643 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:01,643 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 14:37:01,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:01,644 INFO L87 Difference]: Start difference. First operand 684 states and 1003 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:01,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:01,812 INFO L93 Difference]: Finished difference Result 1275 states and 1884 transitions. [2024-11-18 14:37:01,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:01,813 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2024-11-18 14:37:01,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:01,818 INFO L225 Difference]: With dead ends: 1275 [2024-11-18 14:37:01,818 INFO L226 Difference]: Without dead ends: 696 [2024-11-18 14:37:01,820 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:01,821 INFO L432 NwaCegarLoop]: 227 mSDtfsCounter, 353 mSDsluCounter, 444 mSDsCounter, 0 mSdLazyCounter, 91 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 353 SdHoareTripleChecker+Valid, 671 SdHoareTripleChecker+Invalid, 104 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 91 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:01,821 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [353 Valid, 671 Invalid, 104 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 91 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:01,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 696 states. [2024-11-18 14:37:01,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 696 to 684. [2024-11-18 14:37:01,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 684 states, 522 states have (on average 1.4386973180076628) internal successors, (751), 525 states have internal predecessors, (751), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:01,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 684 states and 999 transitions. [2024-11-18 14:37:01,866 INFO L78 Accepts]: Start accepts. Automaton has 684 states and 999 transitions. Word has length 57 [2024-11-18 14:37:01,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:01,867 INFO L471 AbstractCegarLoop]: Abstraction has 684 states and 999 transitions. [2024-11-18 14:37:01,867 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2024-11-18 14:37:01,867 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 999 transitions. [2024-11-18 14:37:01,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2024-11-18 14:37:01,868 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:01,868 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:01,870 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-18 14:37:01,870 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:01,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:01,870 INFO L85 PathProgramCache]: Analyzing trace with hash -1701327375, now seen corresponding path program 1 times [2024-11-18 14:37:01,871 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:01,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300132332] [2024-11-18 14:37:01,871 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:01,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:01,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:02,063 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:02,065 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:02,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300132332] [2024-11-18 14:37:02,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300132332] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:02,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:02,066 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:02,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1525002413] [2024-11-18 14:37:02,066 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:02,067 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:02,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:02,067 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:02,068 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:02,068 INFO L87 Difference]: Start difference. First operand 684 states and 999 transitions. Second operand has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-18 14:37:02,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:02,138 INFO L93 Difference]: Finished difference Result 1283 states and 1896 transitions. [2024-11-18 14:37:02,139 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:02,139 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 58 [2024-11-18 14:37:02,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:02,146 INFO L225 Difference]: With dead ends: 1283 [2024-11-18 14:37:02,146 INFO L226 Difference]: Without dead ends: 704 [2024-11-18 14:37:02,148 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:02,150 INFO L432 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 758 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:02,152 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 758 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:02,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 704 states. [2024-11-18 14:37:02,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 704 to 704. [2024-11-18 14:37:02,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 704 states, 538 states have (on average 1.4256505576208178) internal successors, (767), 541 states have internal predecessors, (767), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:02,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 704 states to 704 states and 1015 transitions. [2024-11-18 14:37:02,205 INFO L78 Accepts]: Start accepts. Automaton has 704 states and 1015 transitions. Word has length 58 [2024-11-18 14:37:02,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:02,206 INFO L471 AbstractCegarLoop]: Abstraction has 704 states and 1015 transitions. [2024-11-18 14:37:02,206 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 11.75) internal successors, (47), 3 states have internal predecessors, (47), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2024-11-18 14:37:02,206 INFO L276 IsEmpty]: Start isEmpty. Operand 704 states and 1015 transitions. [2024-11-18 14:37:02,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2024-11-18 14:37:02,208 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:02,209 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:02,209 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-18 14:37:02,209 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:02,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:02,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1426575004, now seen corresponding path program 1 times [2024-11-18 14:37:02,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:02,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988127811] [2024-11-18 14:37:02,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:02,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:02,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:02,437 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:02,438 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:02,438 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988127811] [2024-11-18 14:37:02,438 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1988127811] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:02,438 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:02,439 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:02,439 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [180555511] [2024-11-18 14:37:02,439 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:02,439 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:02,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:02,440 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:02,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:02,440 INFO L87 Difference]: Start difference. First operand 704 states and 1015 transitions. Second operand has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-18 14:37:02,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:02,528 INFO L93 Difference]: Finished difference Result 1323 states and 1940 transitions. [2024-11-18 14:37:02,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:02,529 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 66 [2024-11-18 14:37:02,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:02,533 INFO L225 Difference]: With dead ends: 1323 [2024-11-18 14:37:02,533 INFO L226 Difference]: Without dead ends: 724 [2024-11-18 14:37:02,535 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:02,536 INFO L432 NwaCegarLoop]: 251 mSDtfsCounter, 4 mSDsluCounter, 493 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 744 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:02,536 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 744 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:02,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 724 states. [2024-11-18 14:37:02,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 724 to 724. [2024-11-18 14:37:02,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 724 states, 554 states have (on average 1.4133574007220218) internal successors, (783), 557 states have internal predecessors, (783), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:02,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 1031 transitions. [2024-11-18 14:37:02,580 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 1031 transitions. Word has length 66 [2024-11-18 14:37:02,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:02,580 INFO L471 AbstractCegarLoop]: Abstraction has 724 states and 1031 transitions. [2024-11-18 14:37:02,580 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.25) internal successors, (53), 3 states have internal predecessors, (53), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2024-11-18 14:37:02,581 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 1031 transitions. [2024-11-18 14:37:02,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2024-11-18 14:37:02,582 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:02,582 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:02,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-18 14:37:02,583 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:02,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:02,583 INFO L85 PathProgramCache]: Analyzing trace with hash 1983388360, now seen corresponding path program 1 times [2024-11-18 14:37:02,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:02,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872409479] [2024-11-18 14:37:02,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:02,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:02,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:02,768 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:02,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:02,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872409479] [2024-11-18 14:37:02,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872409479] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:02,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:02,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:02,769 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1422366280] [2024-11-18 14:37:02,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:02,770 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:02,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:02,770 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:02,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:02,771 INFO L87 Difference]: Start difference. First operand 724 states and 1031 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 14:37:02,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:02,862 INFO L93 Difference]: Finished difference Result 1363 states and 1972 transitions. [2024-11-18 14:37:02,862 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:02,863 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 74 [2024-11-18 14:37:02,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:02,868 INFO L225 Difference]: With dead ends: 1363 [2024-11-18 14:37:02,868 INFO L226 Difference]: Without dead ends: 744 [2024-11-18 14:37:02,870 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:02,870 INFO L432 NwaCegarLoop]: 251 mSDtfsCounter, 4 mSDsluCounter, 493 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 744 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:02,871 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 744 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:02,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 744 states. [2024-11-18 14:37:02,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 744 to 744. [2024-11-18 14:37:02,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 744 states, 570 states have (on average 1.4017543859649122) internal successors, (799), 573 states have internal predecessors, (799), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:02,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 744 states to 744 states and 1047 transitions. [2024-11-18 14:37:02,913 INFO L78 Accepts]: Start accepts. Automaton has 744 states and 1047 transitions. Word has length 74 [2024-11-18 14:37:02,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:02,913 INFO L471 AbstractCegarLoop]: Abstraction has 744 states and 1047 transitions. [2024-11-18 14:37:02,914 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 14:37:02,914 INFO L276 IsEmpty]: Start isEmpty. Operand 744 states and 1047 transitions. [2024-11-18 14:37:02,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2024-11-18 14:37:02,915 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:02,915 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:02,915 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-18 14:37:02,916 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:02,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:02,916 INFO L85 PathProgramCache]: Analyzing trace with hash -413070943, now seen corresponding path program 1 times [2024-11-18 14:37:02,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:02,917 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311296594] [2024-11-18 14:37:02,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:02,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:02,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:03,069 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-11-18 14:37:03,069 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:03,069 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311296594] [2024-11-18 14:37:03,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [311296594] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:03,070 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:03,070 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:03,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745691395] [2024-11-18 14:37:03,070 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:03,071 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:03,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:03,071 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:03,071 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:03,072 INFO L87 Difference]: Start difference. First operand 744 states and 1047 transitions. Second operand has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 14:37:03,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:03,149 INFO L93 Difference]: Finished difference Result 1399 states and 1988 transitions. [2024-11-18 14:37:03,150 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:03,150 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 74 [2024-11-18 14:37:03,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:03,156 INFO L225 Difference]: With dead ends: 1399 [2024-11-18 14:37:03,156 INFO L226 Difference]: Without dead ends: 760 [2024-11-18 14:37:03,158 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:03,159 INFO L432 NwaCegarLoop]: 256 mSDtfsCounter, 3 mSDsluCounter, 498 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 754 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:03,159 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 754 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:03,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 760 states. [2024-11-18 14:37:03,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 760 to 760. [2024-11-18 14:37:03,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 760 states, 582 states have (on average 1.3934707903780068) internal successors, (811), 585 states have internal predecessors, (811), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:03,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 760 states to 760 states and 1059 transitions. [2024-11-18 14:37:03,207 INFO L78 Accepts]: Start accepts. Automaton has 760 states and 1059 transitions. Word has length 74 [2024-11-18 14:37:03,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:03,208 INFO L471 AbstractCegarLoop]: Abstraction has 760 states and 1059 transitions. [2024-11-18 14:37:03,208 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.75) internal successors, (59), 3 states have internal predecessors, (59), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 14:37:03,208 INFO L276 IsEmpty]: Start isEmpty. Operand 760 states and 1059 transitions. [2024-11-18 14:37:03,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2024-11-18 14:37:03,209 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:03,210 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:03,210 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-18 14:37:03,210 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:03,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:03,210 INFO L85 PathProgramCache]: Analyzing trace with hash -2001058616, now seen corresponding path program 1 times [2024-11-18 14:37:03,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:03,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090644673] [2024-11-18 14:37:03,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:03,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:03,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:03,432 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-18 14:37:03,433 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:03,433 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090644673] [2024-11-18 14:37:03,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1090644673] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:03,433 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:03,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:03,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137891480] [2024-11-18 14:37:03,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:03,434 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:03,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:03,434 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:03,434 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:03,434 INFO L87 Difference]: Start difference. First operand 760 states and 1059 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-18 14:37:03,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:03,513 INFO L93 Difference]: Finished difference Result 1439 states and 2024 transitions. [2024-11-18 14:37:03,514 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:03,514 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 82 [2024-11-18 14:37:03,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:03,520 INFO L225 Difference]: With dead ends: 1439 [2024-11-18 14:37:03,521 INFO L226 Difference]: Without dead ends: 784 [2024-11-18 14:37:03,523 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:03,524 INFO L432 NwaCegarLoop]: 255 mSDtfsCounter, 5 mSDsluCounter, 501 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 756 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:03,525 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 756 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:03,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 784 states. [2024-11-18 14:37:03,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 784 to 784. [2024-11-18 14:37:03,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 784 states, 602 states have (on average 1.3803986710963456) internal successors, (831), 605 states have internal predecessors, (831), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2024-11-18 14:37:03,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 784 states to 784 states and 1079 transitions. [2024-11-18 14:37:03,578 INFO L78 Accepts]: Start accepts. Automaton has 784 states and 1079 transitions. Word has length 82 [2024-11-18 14:37:03,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:03,579 INFO L471 AbstractCegarLoop]: Abstraction has 784 states and 1079 transitions. [2024-11-18 14:37:03,579 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2024-11-18 14:37:03,579 INFO L276 IsEmpty]: Start isEmpty. Operand 784 states and 1079 transitions. [2024-11-18 14:37:03,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2024-11-18 14:37:03,581 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:03,581 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:03,581 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-18 14:37:03,582 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:03,582 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:03,582 INFO L85 PathProgramCache]: Analyzing trace with hash -1222405877, now seen corresponding path program 1 times [2024-11-18 14:37:03,582 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:03,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977538381] [2024-11-18 14:37:03,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:03,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:03,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:04,233 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-18 14:37:04,233 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:04,233 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977538381] [2024-11-18 14:37:04,233 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977538381] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:04,234 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:04,234 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:04,234 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966258020] [2024-11-18 14:37:04,234 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:04,234 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:04,235 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:04,235 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:04,235 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:04,236 INFO L87 Difference]: Start difference. First operand 784 states and 1079 transitions. Second operand has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 14:37:04,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:04,562 INFO L93 Difference]: Finished difference Result 2035 states and 2789 transitions. [2024-11-18 14:37:04,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 14:37:04,563 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 85 [2024-11-18 14:37:04,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:04,571 INFO L225 Difference]: With dead ends: 2035 [2024-11-18 14:37:04,571 INFO L226 Difference]: Without dead ends: 1356 [2024-11-18 14:37:04,574 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:04,575 INFO L432 NwaCegarLoop]: 255 mSDtfsCounter, 210 mSDsluCounter, 1170 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 1425 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:04,575 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 1425 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 14:37:04,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1356 states. [2024-11-18 14:37:04,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1356 to 1068. [2024-11-18 14:37:04,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1068 states, 813 states have (on average 1.3690036900369005) internal successors, (1113), 818 states have internal predecessors, (1113), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2024-11-18 14:37:04,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1068 states to 1068 states and 1457 transitions. [2024-11-18 14:37:04,655 INFO L78 Accepts]: Start accepts. Automaton has 1068 states and 1457 transitions. Word has length 85 [2024-11-18 14:37:04,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:04,656 INFO L471 AbstractCegarLoop]: Abstraction has 1068 states and 1457 transitions. [2024-11-18 14:37:04,656 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.142857142857142) internal successors, (64), 6 states have internal predecessors, (64), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 14:37:04,656 INFO L276 IsEmpty]: Start isEmpty. Operand 1068 states and 1457 transitions. [2024-11-18 14:37:04,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2024-11-18 14:37:04,658 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:04,658 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:04,659 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-18 14:37:04,659 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:04,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:04,659 INFO L85 PathProgramCache]: Analyzing trace with hash -1993110303, now seen corresponding path program 1 times [2024-11-18 14:37:04,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:04,660 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1468367766] [2024-11-18 14:37:04,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:04,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:04,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:05,017 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-18 14:37:05,018 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:05,018 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1468367766] [2024-11-18 14:37:05,018 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1468367766] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:05,018 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1142174021] [2024-11-18 14:37:05,018 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:05,018 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:05,019 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:05,020 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:05,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-18 14:37:05,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:05,197 INFO L255 TraceCheckSpWp]: Trace formula consists of 475 conjuncts, 13 conjuncts are in the unsatisfiable core [2024-11-18 14:37:05,206 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:05,322 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-11-18 14:37:05,323 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 14:37:05,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1142174021] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:05,323 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 14:37:05,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2024-11-18 14:37:05,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [504219843] [2024-11-18 14:37:05,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:05,325 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2024-11-18 14:37:05,325 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:05,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2024-11-18 14:37:05,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2024-11-18 14:37:05,326 INFO L87 Difference]: Start difference. First operand 1068 states and 1457 transitions. Second operand has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-18 14:37:05,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:05,548 INFO L93 Difference]: Finished difference Result 2305 states and 3255 transitions. [2024-11-18 14:37:05,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2024-11-18 14:37:05,549 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 88 [2024-11-18 14:37:05,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:05,557 INFO L225 Difference]: With dead ends: 2305 [2024-11-18 14:37:05,558 INFO L226 Difference]: Without dead ends: 1490 [2024-11-18 14:37:05,561 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2024-11-18 14:37:05,561 INFO L432 NwaCegarLoop]: 432 mSDtfsCounter, 136 mSDsluCounter, 2395 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 162 SdHoareTripleChecker+Valid, 2827 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:05,562 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [162 Valid, 2827 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:05,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1490 states. [2024-11-18 14:37:05,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1490 to 1076. [2024-11-18 14:37:05,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1076 states, 817 states have (on average 1.3598531211750307) internal successors, (1111), 824 states have internal predecessors, (1111), 174 states have call successors, (174), 84 states have call predecessors, (174), 84 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-11-18 14:37:05,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1076 states to 1076 states and 1459 transitions. [2024-11-18 14:37:05,647 INFO L78 Accepts]: Start accepts. Automaton has 1076 states and 1459 transitions. Word has length 88 [2024-11-18 14:37:05,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:05,648 INFO L471 AbstractCegarLoop]: Abstraction has 1076 states and 1459 transitions. [2024-11-18 14:37:05,648 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.142857142857142) internal successors, (64), 7 states have internal predecessors, (64), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-18 14:37:05,648 INFO L276 IsEmpty]: Start isEmpty. Operand 1076 states and 1459 transitions. [2024-11-18 14:37:05,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2024-11-18 14:37:05,649 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:05,649 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:05,668 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2024-11-18 14:37:05,850 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2024-11-18 14:37:05,851 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:05,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:05,851 INFO L85 PathProgramCache]: Analyzing trace with hash 593545677, now seen corresponding path program 1 times [2024-11-18 14:37:05,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:05,852 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68748943] [2024-11-18 14:37:05,852 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:05,852 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:05,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-11-18 14:37:06,031 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:06,031 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68748943] [2024-11-18 14:37:06,031 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [68748943] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:06,031 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:06,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:06,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090123759] [2024-11-18 14:37:06,032 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:06,032 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:06,032 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:06,033 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:06,033 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:06,033 INFO L87 Difference]: Start difference. First operand 1076 states and 1459 transitions. Second operand has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-18 14:37:06,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:06,133 INFO L93 Difference]: Finished difference Result 2003 states and 2736 transitions. [2024-11-18 14:37:06,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:06,134 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 89 [2024-11-18 14:37:06,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:06,141 INFO L225 Difference]: With dead ends: 2003 [2024-11-18 14:37:06,141 INFO L226 Difference]: Without dead ends: 1100 [2024-11-18 14:37:06,144 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:06,144 INFO L432 NwaCegarLoop]: 256 mSDtfsCounter, 3 mSDsluCounter, 498 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 754 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:06,144 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 754 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:06,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1100 states. [2024-11-18 14:37:06,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1100 to 1100. [2024-11-18 14:37:06,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1100 states, 835 states have (on average 1.3520958083832335) internal successors, (1129), 842 states have internal predecessors, (1129), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2024-11-18 14:37:06,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 1100 states and 1477 transitions. [2024-11-18 14:37:06,226 INFO L78 Accepts]: Start accepts. Automaton has 1100 states and 1477 transitions. Word has length 89 [2024-11-18 14:37:06,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:06,227 INFO L471 AbstractCegarLoop]: Abstraction has 1100 states and 1477 transitions. [2024-11-18 14:37:06,227 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.0) internal successors, (68), 3 states have internal predecessors, (68), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2024-11-18 14:37:06,227 INFO L276 IsEmpty]: Start isEmpty. Operand 1100 states and 1477 transitions. [2024-11-18 14:37:06,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2024-11-18 14:37:06,228 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:06,229 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:06,229 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-18 14:37:06,229 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:06,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:06,230 INFO L85 PathProgramCache]: Analyzing trace with hash 365385979, now seen corresponding path program 1 times [2024-11-18 14:37:06,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:06,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [179848124] [2024-11-18 14:37:06,230 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:06,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:06,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:06,381 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2024-11-18 14:37:06,382 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:06,382 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [179848124] [2024-11-18 14:37:06,382 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [179848124] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:06,382 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:06,382 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:06,382 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933603879] [2024-11-18 14:37:06,383 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:06,383 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:06,383 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:06,384 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:06,384 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:06,384 INFO L87 Difference]: Start difference. First operand 1100 states and 1477 transitions. Second operand has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-18 14:37:06,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:06,598 INFO L93 Difference]: Finished difference Result 1984 states and 2666 transitions. [2024-11-18 14:37:06,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 14:37:06,599 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 91 [2024-11-18 14:37:06,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:06,607 INFO L225 Difference]: With dead ends: 1984 [2024-11-18 14:37:06,607 INFO L226 Difference]: Without dead ends: 1139 [2024-11-18 14:37:06,610 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:06,611 INFO L432 NwaCegarLoop]: 256 mSDtfsCounter, 250 mSDsluCounter, 1211 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 251 SdHoareTripleChecker+Valid, 1467 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:06,611 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [251 Valid, 1467 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:06,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1139 states. [2024-11-18 14:37:06,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1139 to 1105. [2024-11-18 14:37:06,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1105 states, 851 states have (on average 1.3443008225616921) internal successors, (1144), 863 states have internal predecessors, (1144), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2024-11-18 14:37:06,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1105 states to 1105 states and 1468 transitions. [2024-11-18 14:37:06,701 INFO L78 Accepts]: Start accepts. Automaton has 1105 states and 1468 transitions. Word has length 91 [2024-11-18 14:37:06,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:06,702 INFO L471 AbstractCegarLoop]: Abstraction has 1105 states and 1468 transitions. [2024-11-18 14:37:06,702 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.571428571428571) internal successors, (67), 6 states have internal predecessors, (67), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-18 14:37:06,702 INFO L276 IsEmpty]: Start isEmpty. Operand 1105 states and 1468 transitions. [2024-11-18 14:37:06,704 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2024-11-18 14:37:06,704 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:06,704 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:06,704 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-18 14:37:06,705 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:06,705 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:06,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1553183217, now seen corresponding path program 1 times [2024-11-18 14:37:06,705 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:06,706 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047793252] [2024-11-18 14:37:06,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:06,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:06,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:07,314 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-11-18 14:37:07,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:07,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047793252] [2024-11-18 14:37:07,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2047793252] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:07,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:07,315 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:07,315 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1755405553] [2024-11-18 14:37:07,316 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:07,316 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:07,316 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:07,317 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:07,317 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:07,317 INFO L87 Difference]: Start difference. First operand 1105 states and 1468 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 14:37:07,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:07,547 INFO L93 Difference]: Finished difference Result 1973 states and 2629 transitions. [2024-11-18 14:37:07,547 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 14:37:07,548 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 93 [2024-11-18 14:37:07,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:07,560 INFO L225 Difference]: With dead ends: 1973 [2024-11-18 14:37:07,561 INFO L226 Difference]: Without dead ends: 1103 [2024-11-18 14:37:07,563 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:07,564 INFO L432 NwaCegarLoop]: 285 mSDtfsCounter, 151 mSDsluCounter, 1298 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 1583 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:07,564 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 1583 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:07,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1103 states. [2024-11-18 14:37:07,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1103 to 995. [2024-11-18 14:37:07,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 995 states, 768 states have (on average 1.3463541666666667) internal successors, (1034), 778 states have internal predecessors, (1034), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2024-11-18 14:37:07,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 995 states to 995 states and 1324 transitions. [2024-11-18 14:37:07,636 INFO L78 Accepts]: Start accepts. Automaton has 995 states and 1324 transitions. Word has length 93 [2024-11-18 14:37:07,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:07,637 INFO L471 AbstractCegarLoop]: Abstraction has 995 states and 1324 transitions. [2024-11-18 14:37:07,637 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 14:37:07,637 INFO L276 IsEmpty]: Start isEmpty. Operand 995 states and 1324 transitions. [2024-11-18 14:37:07,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2024-11-18 14:37:07,651 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:07,651 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:07,652 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-18 14:37:07,652 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:07,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:07,652 INFO L85 PathProgramCache]: Analyzing trace with hash -2008252193, now seen corresponding path program 1 times [2024-11-18 14:37:07,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:07,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311802995] [2024-11-18 14:37:07,653 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:07,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:07,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:08,179 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-18 14:37:08,180 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:08,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311802995] [2024-11-18 14:37:08,181 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1311802995] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:08,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:08,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:08,181 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [397802838] [2024-11-18 14:37:08,181 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:08,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:08,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:08,183 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:08,183 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:08,183 INFO L87 Difference]: Start difference. First operand 995 states and 1324 transitions. Second operand has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 14:37:08,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:08,656 INFO L93 Difference]: Finished difference Result 1905 states and 2517 transitions. [2024-11-18 14:37:08,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-18 14:37:08,657 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 94 [2024-11-18 14:37:08,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:08,664 INFO L225 Difference]: With dead ends: 1905 [2024-11-18 14:37:08,664 INFO L226 Difference]: Without dead ends: 1065 [2024-11-18 14:37:08,666 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:08,667 INFO L432 NwaCegarLoop]: 279 mSDtfsCounter, 512 mSDsluCounter, 952 mSDsCounter, 0 mSdLazyCounter, 177 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 518 SdHoareTripleChecker+Valid, 1231 SdHoareTripleChecker+Invalid, 228 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 177 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:08,667 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [518 Valid, 1231 Invalid, 228 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 177 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-18 14:37:08,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1065 states. [2024-11-18 14:37:08,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1065 to 1011. [2024-11-18 14:37:08,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1011 states, 776 states have (on average 1.3234536082474226) internal successors, (1027), 787 states have internal predecessors, (1027), 148 states have call successors, (148), 86 states have call predecessors, (148), 86 states have return successors, (148), 137 states have call predecessors, (148), 148 states have call successors, (148) [2024-11-18 14:37:08,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1011 states to 1011 states and 1323 transitions. [2024-11-18 14:37:08,766 INFO L78 Accepts]: Start accepts. Automaton has 1011 states and 1323 transitions. Word has length 94 [2024-11-18 14:37:08,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:08,766 INFO L471 AbstractCegarLoop]: Abstraction has 1011 states and 1323 transitions. [2024-11-18 14:37:08,767 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.142857142857142) internal successors, (71), 6 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 14:37:08,767 INFO L276 IsEmpty]: Start isEmpty. Operand 1011 states and 1323 transitions. [2024-11-18 14:37:08,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2024-11-18 14:37:08,768 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:08,768 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:08,768 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-18 14:37:08,768 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:08,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:08,769 INFO L85 PathProgramCache]: Analyzing trace with hash -881975596, now seen corresponding path program 1 times [2024-11-18 14:37:08,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:08,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696734128] [2024-11-18 14:37:08,769 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:08,770 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:08,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:08,863 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:08,864 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:08,864 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696734128] [2024-11-18 14:37:08,864 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1696734128] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:08,864 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:08,864 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:08,865 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679703062] [2024-11-18 14:37:08,865 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:08,866 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:08,866 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:08,866 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:08,867 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:08,867 INFO L87 Difference]: Start difference. First operand 1011 states and 1323 transitions. Second operand has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:09,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:09,089 INFO L93 Difference]: Finished difference Result 2670 states and 3515 transitions. [2024-11-18 14:37:09,090 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:09,090 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 95 [2024-11-18 14:37:09,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:09,101 INFO L225 Difference]: With dead ends: 2670 [2024-11-18 14:37:09,101 INFO L226 Difference]: Without dead ends: 1865 [2024-11-18 14:37:09,104 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:09,104 INFO L432 NwaCegarLoop]: 453 mSDtfsCounter, 200 mSDsluCounter, 681 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1134 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:09,105 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1134 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:09,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1865 states. [2024-11-18 14:37:09,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1865 to 1748. [2024-11-18 14:37:09,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1748 states, 1323 states have (on average 1.3167044595616024) internal successors, (1742), 1342 states have internal predecessors, (1742), 272 states have call successors, (272), 152 states have call predecessors, (272), 152 states have return successors, (272), 253 states have call predecessors, (272), 272 states have call successors, (272) [2024-11-18 14:37:09,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1748 states to 1748 states and 2286 transitions. [2024-11-18 14:37:09,265 INFO L78 Accepts]: Start accepts. Automaton has 1748 states and 2286 transitions. Word has length 95 [2024-11-18 14:37:09,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:09,266 INFO L471 AbstractCegarLoop]: Abstraction has 1748 states and 2286 transitions. [2024-11-18 14:37:09,266 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.75) internal successors, (71), 4 states have internal predecessors, (71), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:09,266 INFO L276 IsEmpty]: Start isEmpty. Operand 1748 states and 2286 transitions. [2024-11-18 14:37:09,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2024-11-18 14:37:09,268 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:09,268 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:09,268 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-18 14:37:09,268 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:09,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:09,270 INFO L85 PathProgramCache]: Analyzing trace with hash -859536375, now seen corresponding path program 1 times [2024-11-18 14:37:09,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:09,271 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [61793139] [2024-11-18 14:37:09,271 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:09,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:09,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:09,865 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-11-18 14:37:09,866 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:09,866 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [61793139] [2024-11-18 14:37:09,866 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [61793139] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:09,866 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:09,866 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:09,866 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7720288] [2024-11-18 14:37:09,867 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:09,867 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:09,867 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:09,868 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:09,868 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:09,868 INFO L87 Difference]: Start difference. First operand 1748 states and 2286 transitions. Second operand has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:10,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:10,410 INFO L93 Difference]: Finished difference Result 3409 states and 4453 transitions. [2024-11-18 14:37:10,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-18 14:37:10,410 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 97 [2024-11-18 14:37:10,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:10,422 INFO L225 Difference]: With dead ends: 3409 [2024-11-18 14:37:10,422 INFO L226 Difference]: Without dead ends: 1945 [2024-11-18 14:37:10,427 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:10,428 INFO L432 NwaCegarLoop]: 319 mSDtfsCounter, 415 mSDsluCounter, 1142 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 421 SdHoareTripleChecker+Valid, 1461 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:10,428 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [421 Valid, 1461 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-18 14:37:10,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1945 states. [2024-11-18 14:37:10,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1945 to 1775. [2024-11-18 14:37:10,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1775 states, 1337 states have (on average 1.3103964098728496) internal successors, (1752), 1357 states have internal predecessors, (1752), 280 states have call successors, (280), 157 states have call predecessors, (280), 157 states have return successors, (280), 260 states have call predecessors, (280), 280 states have call successors, (280) [2024-11-18 14:37:10,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1775 states to 1775 states and 2312 transitions. [2024-11-18 14:37:10,666 INFO L78 Accepts]: Start accepts. Automaton has 1775 states and 2312 transitions. Word has length 97 [2024-11-18 14:37:10,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:10,666 INFO L471 AbstractCegarLoop]: Abstraction has 1775 states and 2312 transitions. [2024-11-18 14:37:10,667 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.571428571428571) internal successors, (74), 6 states have internal predecessors, (74), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:10,668 INFO L276 IsEmpty]: Start isEmpty. Operand 1775 states and 2312 transitions. [2024-11-18 14:37:10,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-18 14:37:10,669 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:10,669 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:10,670 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-18 14:37:10,670 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:10,670 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:10,670 INFO L85 PathProgramCache]: Analyzing trace with hash -1682651474, now seen corresponding path program 1 times [2024-11-18 14:37:10,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:10,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036873765] [2024-11-18 14:37:10,671 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:10,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:10,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:10,769 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:10,769 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:10,769 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1036873765] [2024-11-18 14:37:10,769 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1036873765] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:10,769 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:10,769 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:10,770 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1419333307] [2024-11-18 14:37:10,770 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:10,770 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:10,770 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:10,771 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:10,771 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:10,771 INFO L87 Difference]: Start difference. First operand 1775 states and 2312 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:11,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:11,142 INFO L93 Difference]: Finished difference Result 4513 states and 5910 transitions. [2024-11-18 14:37:11,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:11,143 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2024-11-18 14:37:11,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:11,160 INFO L225 Difference]: With dead ends: 4513 [2024-11-18 14:37:11,160 INFO L226 Difference]: Without dead ends: 3065 [2024-11-18 14:37:11,165 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:11,165 INFO L432 NwaCegarLoop]: 469 mSDtfsCounter, 206 mSDsluCounter, 703 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 206 SdHoareTripleChecker+Valid, 1172 SdHoareTripleChecker+Invalid, 35 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:11,165 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [206 Valid, 1172 Invalid, 35 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:11,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3065 states. [2024-11-18 14:37:11,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3065 to 2786. [2024-11-18 14:37:11,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2786 states, 2073 states have (on average 1.301013024602026) internal successors, (2697), 2104 states have internal predecessors, (2697), 460 states have call successors, (460), 252 states have call predecessors, (460), 252 states have return successors, (460), 429 states have call predecessors, (460), 460 states have call successors, (460) [2024-11-18 14:37:11,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2786 states to 2786 states and 3617 transitions. [2024-11-18 14:37:11,455 INFO L78 Accepts]: Start accepts. Automaton has 2786 states and 3617 transitions. Word has length 99 [2024-11-18 14:37:11,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:11,455 INFO L471 AbstractCegarLoop]: Abstraction has 2786 states and 3617 transitions. [2024-11-18 14:37:11,455 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:11,456 INFO L276 IsEmpty]: Start isEmpty. Operand 2786 states and 3617 transitions. [2024-11-18 14:37:11,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2024-11-18 14:37:11,457 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:11,457 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:11,457 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-18 14:37:11,458 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:11,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:11,459 INFO L85 PathProgramCache]: Analyzing trace with hash 341094078, now seen corresponding path program 1 times [2024-11-18 14:37:11,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:11,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507826131] [2024-11-18 14:37:11,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:11,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:11,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:11,546 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:11,547 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:11,547 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507826131] [2024-11-18 14:37:11,547 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1507826131] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:11,547 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:11,547 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:11,547 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1619924540] [2024-11-18 14:37:11,547 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:11,548 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:11,548 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:11,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:11,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:11,549 INFO L87 Difference]: Start difference. First operand 2786 states and 3617 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:12,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:12,015 INFO L93 Difference]: Finished difference Result 6519 states and 8500 transitions. [2024-11-18 14:37:12,015 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:12,015 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2024-11-18 14:37:12,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:12,040 INFO L225 Difference]: With dead ends: 6519 [2024-11-18 14:37:12,040 INFO L226 Difference]: Without dead ends: 4176 [2024-11-18 14:37:12,049 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:12,050 INFO L432 NwaCegarLoop]: 480 mSDtfsCounter, 199 mSDsluCounter, 706 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 199 SdHoareTripleChecker+Valid, 1186 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:12,050 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [199 Valid, 1186 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:12,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4176 states. [2024-11-18 14:37:12,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4176 to 3993. [2024-11-18 14:37:12,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3993 states, 2956 states have (on average 1.297361299052774) internal successors, (3835), 3000 states have internal predecessors, (3835), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-11-18 14:37:12,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3993 states to 3993 states and 5179 transitions. [2024-11-18 14:37:12,651 INFO L78 Accepts]: Start accepts. Automaton has 3993 states and 5179 transitions. Word has length 99 [2024-11-18 14:37:12,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:12,652 INFO L471 AbstractCegarLoop]: Abstraction has 3993 states and 5179 transitions. [2024-11-18 14:37:12,652 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:12,653 INFO L276 IsEmpty]: Start isEmpty. Operand 3993 states and 5179 transitions. [2024-11-18 14:37:12,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2024-11-18 14:37:12,655 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:12,655 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:12,656 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-18 14:37:12,656 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:12,656 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:12,656 INFO L85 PathProgramCache]: Analyzing trace with hash 1099513161, now seen corresponding path program 1 times [2024-11-18 14:37:12,656 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:12,656 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891361417] [2024-11-18 14:37:12,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:12,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:12,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:12,718 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:12,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:12,719 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [891361417] [2024-11-18 14:37:12,719 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [891361417] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:12,719 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:12,719 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 14:37:12,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450892836] [2024-11-18 14:37:12,719 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:12,720 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 14:37:12,720 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:12,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 14:37:12,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:12,722 INFO L87 Difference]: Start difference. First operand 3993 states and 5179 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:13,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:13,154 INFO L93 Difference]: Finished difference Result 7677 states and 10001 transitions. [2024-11-18 14:37:13,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 14:37:13,155 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 100 [2024-11-18 14:37:13,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:13,193 INFO L225 Difference]: With dead ends: 7677 [2024-11-18 14:37:13,197 INFO L226 Difference]: Without dead ends: 4026 [2024-11-18 14:37:13,214 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:13,215 INFO L432 NwaCegarLoop]: 257 mSDtfsCounter, 6 mSDsluCounter, 224 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 481 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:13,216 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 481 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:13,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4026 states. [2024-11-18 14:37:13,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4026 to 3999. [2024-11-18 14:37:13,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3999 states, 2962 states have (on average 1.2967589466576637) internal successors, (3841), 3006 states have internal predecessors, (3841), 672 states have call successors, (672), 364 states have call predecessors, (672), 364 states have return successors, (672), 628 states have call predecessors, (672), 672 states have call successors, (672) [2024-11-18 14:37:13,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3999 states to 3999 states and 5185 transitions. [2024-11-18 14:37:13,679 INFO L78 Accepts]: Start accepts. Automaton has 3999 states and 5185 transitions. Word has length 100 [2024-11-18 14:37:13,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:13,679 INFO L471 AbstractCegarLoop]: Abstraction has 3999 states and 5185 transitions. [2024-11-18 14:37:13,680 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:13,680 INFO L276 IsEmpty]: Start isEmpty. Operand 3999 states and 5185 transitions. [2024-11-18 14:37:13,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2024-11-18 14:37:13,682 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:13,682 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:13,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-18 14:37:13,683 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:13,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:13,683 INFO L85 PathProgramCache]: Analyzing trace with hash -917596551, now seen corresponding path program 1 times [2024-11-18 14:37:13,683 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:13,683 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405110005] [2024-11-18 14:37:13,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:13,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:13,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:13,821 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:13,822 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:13,822 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [405110005] [2024-11-18 14:37:13,822 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [405110005] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:13,822 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:13,822 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:13,823 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110688487] [2024-11-18 14:37:13,823 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:13,824 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:13,824 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:13,825 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:13,825 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:13,825 INFO L87 Difference]: Start difference. First operand 3999 states and 5185 transitions. Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:14,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:14,176 INFO L93 Difference]: Finished difference Result 7642 states and 9928 transitions. [2024-11-18 14:37:14,176 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:14,177 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 101 [2024-11-18 14:37:14,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:14,208 INFO L225 Difference]: With dead ends: 7642 [2024-11-18 14:37:14,208 INFO L226 Difference]: Without dead ends: 3715 [2024-11-18 14:37:14,222 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:14,224 INFO L432 NwaCegarLoop]: 261 mSDtfsCounter, 79 mSDsluCounter, 472 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 79 SdHoareTripleChecker+Valid, 733 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:14,224 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [79 Valid, 733 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:14,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3715 states. [2024-11-18 14:37:14,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3715 to 3652. [2024-11-18 14:37:14,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3652 states, 2698 states have (on average 1.305040770941438) internal successors, (3521), 2732 states have internal predecessors, (3521), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-11-18 14:37:14,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3652 states to 3652 states and 4761 transitions. [2024-11-18 14:37:14,641 INFO L78 Accepts]: Start accepts. Automaton has 3652 states and 4761 transitions. Word has length 101 [2024-11-18 14:37:14,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:14,641 INFO L471 AbstractCegarLoop]: Abstraction has 3652 states and 4761 transitions. [2024-11-18 14:37:14,641 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:14,642 INFO L276 IsEmpty]: Start isEmpty. Operand 3652 states and 4761 transitions. [2024-11-18 14:37:14,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-11-18 14:37:14,643 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:14,644 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:14,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-18 14:37:14,644 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:14,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:14,644 INFO L85 PathProgramCache]: Analyzing trace with hash 1897671897, now seen corresponding path program 1 times [2024-11-18 14:37:14,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:14,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [465211905] [2024-11-18 14:37:14,645 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:14,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:14,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:14,708 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:14,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:14,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [465211905] [2024-11-18 14:37:14,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [465211905] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:14,709 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:14,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 14:37:14,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38958649] [2024-11-18 14:37:14,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:14,710 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 14:37:14,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:14,711 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 14:37:14,711 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:14,711 INFO L87 Difference]: Start difference. First operand 3652 states and 4761 transitions. Second operand has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:15,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:15,207 INFO L93 Difference]: Finished difference Result 7180 states and 9398 transitions. [2024-11-18 14:37:15,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 14:37:15,207 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-11-18 14:37:15,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:15,232 INFO L225 Difference]: With dead ends: 7180 [2024-11-18 14:37:15,232 INFO L226 Difference]: Without dead ends: 3703 [2024-11-18 14:37:15,245 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 14:37:15,246 INFO L432 NwaCegarLoop]: 260 mSDtfsCounter, 6 mSDsluCounter, 223 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 483 SdHoareTripleChecker+Invalid, 40 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:15,247 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [7 Valid, 483 Invalid, 40 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:15,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3703 states. [2024-11-18 14:37:15,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3703 to 3662. [2024-11-18 14:37:15,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3662 states, 2708 states have (on average 1.3039143279172822) internal successors, (3531), 2742 states have internal predecessors, (3531), 620 states have call successors, (620), 333 states have call predecessors, (620), 333 states have return successors, (620), 586 states have call predecessors, (620), 620 states have call successors, (620) [2024-11-18 14:37:15,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3662 states to 3662 states and 4771 transitions. [2024-11-18 14:37:15,805 INFO L78 Accepts]: Start accepts. Automaton has 3662 states and 4771 transitions. Word has length 102 [2024-11-18 14:37:15,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:15,806 INFO L471 AbstractCegarLoop]: Abstraction has 3662 states and 4771 transitions. [2024-11-18 14:37:15,806 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.0) internal successors, (78), 3 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:15,806 INFO L276 IsEmpty]: Start isEmpty. Operand 3662 states and 4771 transitions. [2024-11-18 14:37:15,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2024-11-18 14:37:15,808 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:15,809 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:15,809 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-18 14:37:15,809 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:15,810 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:15,810 INFO L85 PathProgramCache]: Analyzing trace with hash -184950786, now seen corresponding path program 1 times [2024-11-18 14:37:15,810 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:15,810 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842042755] [2024-11-18 14:37:15,811 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:15,811 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:15,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:15,989 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2024-11-18 14:37:15,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:15,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842042755] [2024-11-18 14:37:15,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842042755] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:15,989 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:15,989 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 14:37:15,990 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [718749220] [2024-11-18 14:37:15,990 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:15,990 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 14:37:15,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:15,991 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 14:37:15,991 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 14:37:15,991 INFO L87 Difference]: Start difference. First operand 3662 states and 4771 transitions. Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:16,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:16,419 INFO L93 Difference]: Finished difference Result 7131 states and 9309 transitions. [2024-11-18 14:37:16,420 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 14:37:16,420 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 102 [2024-11-18 14:37:16,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:16,439 INFO L225 Difference]: With dead ends: 7131 [2024-11-18 14:37:16,439 INFO L226 Difference]: Without dead ends: 3584 [2024-11-18 14:37:16,448 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 14:37:16,449 INFO L432 NwaCegarLoop]: 266 mSDtfsCounter, 60 mSDsluCounter, 477 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 60 SdHoareTripleChecker+Valid, 743 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:16,450 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [60 Valid, 743 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:16,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3584 states. [2024-11-18 14:37:16,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3584 to 2753. [2024-11-18 14:37:16,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2753 states, 2033 states have (on average 1.2966060009837679) internal successors, (2636), 2052 states have internal predecessors, (2636), 469 states have call successors, (469), 250 states have call predecessors, (469), 250 states have return successors, (469), 450 states have call predecessors, (469), 469 states have call successors, (469) [2024-11-18 14:37:16,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2753 states to 2753 states and 3574 transitions. [2024-11-18 14:37:16,739 INFO L78 Accepts]: Start accepts. Automaton has 2753 states and 3574 transitions. Word has length 102 [2024-11-18 14:37:16,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:16,740 INFO L471 AbstractCegarLoop]: Abstraction has 2753 states and 3574 transitions. [2024-11-18 14:37:16,740 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 2 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2024-11-18 14:37:16,740 INFO L276 IsEmpty]: Start isEmpty. Operand 2753 states and 3574 transitions. [2024-11-18 14:37:16,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2024-11-18 14:37:16,746 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:16,746 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:16,746 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2024-11-18 14:37:16,746 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:16,748 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:16,748 INFO L85 PathProgramCache]: Analyzing trace with hash 1480765435, now seen corresponding path program 1 times [2024-11-18 14:37:16,748 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:16,748 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806666003] [2024-11-18 14:37:16,748 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:16,748 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:16,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:17,079 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 16 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:17,079 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:17,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806666003] [2024-11-18 14:37:17,080 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806666003] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:17,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1174163028] [2024-11-18 14:37:17,080 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:17,080 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:17,080 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:17,082 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:17,083 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-18 14:37:17,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:17,319 INFO L255 TraceCheckSpWp]: Trace formula consists of 731 conjuncts, 18 conjuncts are in the unsatisfiable core [2024-11-18 14:37:17,325 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:17,372 INFO L134 CoverageAnalysis]: Checked inductivity of 84 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2024-11-18 14:37:17,372 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 14:37:17,372 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1174163028] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:17,373 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 14:37:17,374 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 10 [2024-11-18 14:37:17,374 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560464361] [2024-11-18 14:37:17,374 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:17,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 14:37:17,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:17,375 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 14:37:17,375 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-18 14:37:17,376 INFO L87 Difference]: Start difference. First operand 2753 states and 3574 transitions. Second operand has 5 states, 4 states have (on average 24.25) internal successors, (97), 5 states have internal predecessors, (97), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-11-18 14:37:17,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:17,652 INFO L93 Difference]: Finished difference Result 5184 states and 6767 transitions. [2024-11-18 14:37:17,653 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 14:37:17,653 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 4 states have (on average 24.25) internal successors, (97), 5 states have internal predecessors, (97), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) Word has length 152 [2024-11-18 14:37:17,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:17,672 INFO L225 Difference]: With dead ends: 5184 [2024-11-18 14:37:17,672 INFO L226 Difference]: Without dead ends: 2586 [2024-11-18 14:37:17,681 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2024-11-18 14:37:17,683 INFO L432 NwaCegarLoop]: 255 mSDtfsCounter, 0 mSDsluCounter, 753 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1008 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:17,683 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1008 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 14:37:17,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2586 states. [2024-11-18 14:37:17,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2586 to 2570. [2024-11-18 14:37:17,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2570 states, 1895 states have (on average 1.2928759894459103) internal successors, (2450), 1912 states have internal predecessors, (2450), 440 states have call successors, (440), 234 states have call predecessors, (440), 234 states have return successors, (440), 423 states have call predecessors, (440), 440 states have call successors, (440) [2024-11-18 14:37:17,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2570 states to 2570 states and 3330 transitions. [2024-11-18 14:37:17,979 INFO L78 Accepts]: Start accepts. Automaton has 2570 states and 3330 transitions. Word has length 152 [2024-11-18 14:37:17,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:17,980 INFO L471 AbstractCegarLoop]: Abstraction has 2570 states and 3330 transitions. [2024-11-18 14:37:17,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 4 states have (on average 24.25) internal successors, (97), 5 states have internal predecessors, (97), 3 states have call successors, (14), 2 states have call predecessors, (14), 3 states have return successors, (13), 2 states have call predecessors, (13), 3 states have call successors, (13) [2024-11-18 14:37:17,980 INFO L276 IsEmpty]: Start isEmpty. Operand 2570 states and 3330 transitions. [2024-11-18 14:37:17,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2024-11-18 14:37:17,985 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:17,985 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:18,004 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2024-11-18 14:37:18,190 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2024-11-18 14:37:18,191 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:18,191 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:18,191 INFO L85 PathProgramCache]: Analyzing trace with hash 1981701105, now seen corresponding path program 1 times [2024-11-18 14:37:18,191 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:18,191 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967616099] [2024-11-18 14:37:18,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:18,192 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:18,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:19,041 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 12 proven. 17 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:19,041 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:19,041 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967616099] [2024-11-18 14:37:19,042 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1967616099] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:19,042 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [818699321] [2024-11-18 14:37:19,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:19,042 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:19,042 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:19,044 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:19,046 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-18 14:37:19,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:19,292 INFO L255 TraceCheckSpWp]: Trace formula consists of 765 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-18 14:37:19,303 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:19,643 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 32 proven. 44 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-18 14:37:19,645 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:19,990 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 12 proven. 17 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:19,991 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [818699321] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:19,991 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:19,991 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11, 8] total 23 [2024-11-18 14:37:19,991 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175121026] [2024-11-18 14:37:19,991 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:19,993 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-11-18 14:37:19,993 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:19,994 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-11-18 14:37:19,994 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=422, Unknown=0, NotChecked=0, Total=506 [2024-11-18 14:37:19,994 INFO L87 Difference]: Start difference. First operand 2570 states and 3330 transitions. Second operand has 23 states, 23 states have (on average 10.173913043478262) internal successors, (234), 20 states have internal predecessors, (234), 8 states have call successors, (40), 4 states have call predecessors, (40), 8 states have return successors, (39), 11 states have call predecessors, (39), 8 states have call successors, (39) [2024-11-18 14:37:21,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:21,948 INFO L93 Difference]: Finished difference Result 7258 states and 9439 transitions. [2024-11-18 14:37:21,949 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2024-11-18 14:37:21,949 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 10.173913043478262) internal successors, (234), 20 states have internal predecessors, (234), 8 states have call successors, (40), 4 states have call predecessors, (40), 8 states have return successors, (39), 11 states have call predecessors, (39), 8 states have call successors, (39) Word has length 154 [2024-11-18 14:37:21,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:21,979 INFO L225 Difference]: With dead ends: 7258 [2024-11-18 14:37:21,979 INFO L226 Difference]: Without dead ends: 4924 [2024-11-18 14:37:21,989 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 298 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=360, Invalid=1532, Unknown=0, NotChecked=0, Total=1892 [2024-11-18 14:37:21,990 INFO L432 NwaCegarLoop]: 408 mSDtfsCounter, 1506 mSDsluCounter, 3483 mSDsCounter, 0 mSdLazyCounter, 801 mSolverCounterSat, 549 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1511 SdHoareTripleChecker+Valid, 3891 SdHoareTripleChecker+Invalid, 1350 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 549 IncrementalHoareTripleChecker+Valid, 801 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:21,991 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1511 Valid, 3891 Invalid, 1350 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [549 Valid, 801 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-18 14:37:21,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4924 states. [2024-11-18 14:37:22,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4924 to 4402. [2024-11-18 14:37:22,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4402 states, 3246 states have (on average 1.2963647566235366) internal successors, (4208), 3274 states have internal predecessors, (4208), 751 states have call successors, (751), 404 states have call predecessors, (751), 404 states have return successors, (751), 723 states have call predecessors, (751), 751 states have call successors, (751) [2024-11-18 14:37:22,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4402 states to 4402 states and 5710 transitions. [2024-11-18 14:37:22,601 INFO L78 Accepts]: Start accepts. Automaton has 4402 states and 5710 transitions. Word has length 154 [2024-11-18 14:37:22,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:22,602 INFO L471 AbstractCegarLoop]: Abstraction has 4402 states and 5710 transitions. [2024-11-18 14:37:22,603 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 10.173913043478262) internal successors, (234), 20 states have internal predecessors, (234), 8 states have call successors, (40), 4 states have call predecessors, (40), 8 states have return successors, (39), 11 states have call predecessors, (39), 8 states have call successors, (39) [2024-11-18 14:37:22,603 INFO L276 IsEmpty]: Start isEmpty. Operand 4402 states and 5710 transitions. [2024-11-18 14:37:22,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2024-11-18 14:37:22,612 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:22,612 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:22,633 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-18 14:37:22,816 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:22,817 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:22,817 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:22,817 INFO L85 PathProgramCache]: Analyzing trace with hash -64139027, now seen corresponding path program 1 times [2024-11-18 14:37:22,817 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:22,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910539222] [2024-11-18 14:37:22,818 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:22,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:22,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:23,276 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 15 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:23,277 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:23,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910539222] [2024-11-18 14:37:23,277 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910539222] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:23,277 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1137708083] [2024-11-18 14:37:23,277 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:23,278 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:23,278 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:23,281 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:23,283 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-18 14:37:23,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:23,546 INFO L255 TraceCheckSpWp]: Trace formula consists of 766 conjuncts, 50 conjuncts are in the unsatisfiable core [2024-11-18 14:37:23,552 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:24,352 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 61 proven. 13 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-18 14:37:24,353 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:25,156 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 15 proven. 12 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:25,157 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1137708083] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:25,157 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:25,157 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 10, 11] total 22 [2024-11-18 14:37:25,158 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1636592211] [2024-11-18 14:37:25,158 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:25,159 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2024-11-18 14:37:25,159 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:25,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2024-11-18 14:37:25,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=368, Unknown=0, NotChecked=0, Total=462 [2024-11-18 14:37:25,161 INFO L87 Difference]: Start difference. First operand 4402 states and 5710 transitions. Second operand has 22 states, 22 states have (on average 11.045454545454545) internal successors, (243), 22 states have internal predecessors, (243), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) [2024-11-18 14:37:27,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:27,579 INFO L93 Difference]: Finished difference Result 9702 states and 12579 transitions. [2024-11-18 14:37:27,579 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-18 14:37:27,579 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 11.045454545454545) internal successors, (243), 22 states have internal predecessors, (243), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) Word has length 155 [2024-11-18 14:37:27,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:27,607 INFO L225 Difference]: With dead ends: 9702 [2024-11-18 14:37:27,607 INFO L226 Difference]: Without dead ends: 5547 [2024-11-18 14:37:27,618 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 302 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 459 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=457, Invalid=1349, Unknown=0, NotChecked=0, Total=1806 [2024-11-18 14:37:27,619 INFO L432 NwaCegarLoop]: 330 mSDtfsCounter, 2380 mSDsluCounter, 2584 mSDsCounter, 0 mSdLazyCounter, 1447 mSolverCounterSat, 857 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2380 SdHoareTripleChecker+Valid, 2914 SdHoareTripleChecker+Invalid, 2304 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 857 IncrementalHoareTripleChecker+Valid, 1447 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:27,619 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [2380 Valid, 2914 Invalid, 2304 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [857 Valid, 1447 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2024-11-18 14:37:27,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5547 states. [2024-11-18 14:37:28,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5547 to 5203. [2024-11-18 14:37:28,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5203 states, 3852 states have (on average 1.2897196261682242) internal successors, (4968), 3884 states have internal predecessors, (4968), 869 states have call successors, (869), 481 states have call predecessors, (869), 481 states have return successors, (869), 837 states have call predecessors, (869), 869 states have call successors, (869) [2024-11-18 14:37:28,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5203 states to 5203 states and 6706 transitions. [2024-11-18 14:37:28,217 INFO L78 Accepts]: Start accepts. Automaton has 5203 states and 6706 transitions. Word has length 155 [2024-11-18 14:37:28,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:28,217 INFO L471 AbstractCegarLoop]: Abstraction has 5203 states and 6706 transitions. [2024-11-18 14:37:28,218 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 11.045454545454545) internal successors, (243), 22 states have internal predecessors, (243), 9 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 9 states have call predecessors, (36), 9 states have call successors, (36) [2024-11-18 14:37:28,218 INFO L276 IsEmpty]: Start isEmpty. Operand 5203 states and 6706 transitions. [2024-11-18 14:37:28,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-11-18 14:37:28,225 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:28,226 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:28,245 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-18 14:37:28,429 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2024-11-18 14:37:28,430 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:28,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:28,431 INFO L85 PathProgramCache]: Analyzing trace with hash 1487218162, now seen corresponding path program 1 times [2024-11-18 14:37:28,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:28,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742975657] [2024-11-18 14:37:28,431 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:28,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:28,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:28,685 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2024-11-18 14:37:28,686 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:28,686 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742975657] [2024-11-18 14:37:28,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742975657] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 14:37:28,686 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 14:37:28,686 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 14:37:28,686 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237750268] [2024-11-18 14:37:28,686 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 14:37:28,687 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 14:37:28,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:28,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 14:37:28,695 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 14:37:28,695 INFO L87 Difference]: Start difference. First operand 5203 states and 6706 transitions. Second operand has 7 states, 7 states have (on average 13.0) internal successors, (91), 6 states have internal predecessors, (91), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-11-18 14:37:29,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:29,618 INFO L93 Difference]: Finished difference Result 15001 states and 19424 transitions. [2024-11-18 14:37:29,618 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 14:37:29,618 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 13.0) internal successors, (91), 6 states have internal predecessors, (91), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) Word has length 157 [2024-11-18 14:37:29,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:29,671 INFO L225 Difference]: With dead ends: 15001 [2024-11-18 14:37:29,671 INFO L226 Difference]: Without dead ends: 10185 [2024-11-18 14:37:29,688 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2024-11-18 14:37:29,689 INFO L432 NwaCegarLoop]: 478 mSDtfsCounter, 220 mSDsluCounter, 2059 mSDsCounter, 0 mSdLazyCounter, 132 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 225 SdHoareTripleChecker+Valid, 2537 SdHoareTripleChecker+Invalid, 132 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 132 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:29,689 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [225 Valid, 2537 Invalid, 132 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 132 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 14:37:29,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10185 states. [2024-11-18 14:37:30,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10185 to 7574. [2024-11-18 14:37:30,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7574 states, 5559 states have (on average 1.2898003237992444) internal successors, (7170), 5608 states have internal predecessors, (7170), 1312 states have call successors, (1312), 702 states have call predecessors, (1312), 702 states have return successors, (1312), 1263 states have call predecessors, (1312), 1312 states have call successors, (1312) [2024-11-18 14:37:30,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7574 states to 7574 states and 9794 transitions. [2024-11-18 14:37:30,539 INFO L78 Accepts]: Start accepts. Automaton has 7574 states and 9794 transitions. Word has length 157 [2024-11-18 14:37:30,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:30,540 INFO L471 AbstractCegarLoop]: Abstraction has 7574 states and 9794 transitions. [2024-11-18 14:37:30,540 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 13.0) internal successors, (91), 6 states have internal predecessors, (91), 3 states have call successors, (14), 2 states have call predecessors, (14), 2 states have return successors, (13), 3 states have call predecessors, (13), 2 states have call successors, (13) [2024-11-18 14:37:30,540 INFO L276 IsEmpty]: Start isEmpty. Operand 7574 states and 9794 transitions. [2024-11-18 14:37:30,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2024-11-18 14:37:30,552 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:30,552 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:30,552 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2024-11-18 14:37:30,553 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:30,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:30,553 INFO L85 PathProgramCache]: Analyzing trace with hash 904159804, now seen corresponding path program 1 times [2024-11-18 14:37:30,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:30,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600152902] [2024-11-18 14:37:30,554 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:30,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:30,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:31,876 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:31,877 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:31,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600152902] [2024-11-18 14:37:31,877 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1600152902] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:31,877 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [606965748] [2024-11-18 14:37:31,877 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:31,878 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:31,878 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:31,880 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:31,881 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-18 14:37:32,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:32,162 INFO L255 TraceCheckSpWp]: Trace formula consists of 783 conjuncts, 32 conjuncts are in the unsatisfiable core [2024-11-18 14:37:32,171 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:32,752 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 59 proven. 17 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-11-18 14:37:32,752 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:34,527 INFO L134 CoverageAnalysis]: Checked inductivity of 85 backedges. 20 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:34,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [606965748] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:34,528 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:34,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12, 10] total 29 [2024-11-18 14:37:34,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935396149] [2024-11-18 14:37:34,528 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:34,529 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2024-11-18 14:37:34,529 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:34,530 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2024-11-18 14:37:34,530 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=691, Unknown=0, NotChecked=0, Total=812 [2024-11-18 14:37:34,530 INFO L87 Difference]: Start difference. First operand 7574 states and 9794 transitions. Second operand has 29 states, 29 states have (on average 8.931034482758621) internal successors, (259), 29 states have internal predecessors, (259), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-11-18 14:37:37,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:37,147 INFO L93 Difference]: Finished difference Result 15575 states and 20218 transitions. [2024-11-18 14:37:37,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2024-11-18 14:37:37,147 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 8.931034482758621) internal successors, (259), 29 states have internal predecessors, (259), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) Word has length 157 [2024-11-18 14:37:37,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:37,185 INFO L225 Difference]: With dead ends: 15575 [2024-11-18 14:37:37,185 INFO L226 Difference]: Without dead ends: 8388 [2024-11-18 14:37:37,203 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 301 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 585 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=375, Invalid=1787, Unknown=0, NotChecked=0, Total=2162 [2024-11-18 14:37:37,204 INFO L432 NwaCegarLoop]: 455 mSDtfsCounter, 1240 mSDsluCounter, 3533 mSDsCounter, 0 mSdLazyCounter, 1820 mSolverCounterSat, 351 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1240 SdHoareTripleChecker+Valid, 3988 SdHoareTripleChecker+Invalid, 2171 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 351 IncrementalHoareTripleChecker+Valid, 1820 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:37,204 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1240 Valid, 3988 Invalid, 2171 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [351 Valid, 1820 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2024-11-18 14:37:37,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8388 states. [2024-11-18 14:37:38,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8388 to 8183. [2024-11-18 14:37:38,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8183 states, 6014 states have (on average 1.2893249085467242) internal successors, (7754), 6068 states have internal predecessors, (7754), 1411 states have call successors, (1411), 757 states have call predecessors, (1411), 757 states have return successors, (1411), 1357 states have call predecessors, (1411), 1411 states have call successors, (1411) [2024-11-18 14:37:38,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8183 states to 8183 states and 10576 transitions. [2024-11-18 14:37:38,140 INFO L78 Accepts]: Start accepts. Automaton has 8183 states and 10576 transitions. Word has length 157 [2024-11-18 14:37:38,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:38,141 INFO L471 AbstractCegarLoop]: Abstraction has 8183 states and 10576 transitions. [2024-11-18 14:37:38,141 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 8.931034482758621) internal successors, (259), 29 states have internal predecessors, (259), 10 states have call successors, (37), 5 states have call predecessors, (37), 6 states have return successors, (36), 10 states have call predecessors, (36), 10 states have call successors, (36) [2024-11-18 14:37:38,142 INFO L276 IsEmpty]: Start isEmpty. Operand 8183 states and 10576 transitions. [2024-11-18 14:37:38,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2024-11-18 14:37:38,155 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:38,155 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:38,174 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2024-11-18 14:37:38,359 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:38,360 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:38,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:38,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1023129224, now seen corresponding path program 1 times [2024-11-18 14:37:38,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:38,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132015793] [2024-11-18 14:37:38,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:38,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:38,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:39,057 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 23 proven. 9 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2024-11-18 14:37:39,058 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:39,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132015793] [2024-11-18 14:37:39,058 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132015793] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:39,058 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [124583355] [2024-11-18 14:37:39,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:39,059 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:39,059 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:39,061 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:39,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-18 14:37:39,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:39,326 INFO L255 TraceCheckSpWp]: Trace formula consists of 768 conjuncts, 34 conjuncts are in the unsatisfiable core [2024-11-18 14:37:39,330 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:39,591 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 68 proven. 4 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2024-11-18 14:37:39,591 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:39,849 INFO L134 CoverageAnalysis]: Checked inductivity of 88 backedges. 30 proven. 6 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2024-11-18 14:37:39,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [124583355] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:39,849 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:39,850 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 13, 9] total 26 [2024-11-18 14:37:39,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563119383] [2024-11-18 14:37:39,850 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:39,851 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2024-11-18 14:37:39,851 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:39,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2024-11-18 14:37:39,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2024-11-18 14:37:39,852 INFO L87 Difference]: Start difference. First operand 8183 states and 10576 transitions. Second operand has 26 states, 26 states have (on average 8.384615384615385) internal successors, (218), 22 states have internal predecessors, (218), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-11-18 14:37:43,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:43,981 INFO L93 Difference]: Finished difference Result 22157 states and 28569 transitions. [2024-11-18 14:37:43,982 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2024-11-18 14:37:43,982 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 8.384615384615385) internal successors, (218), 22 states have internal predecessors, (218), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) Word has length 158 [2024-11-18 14:37:43,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:44,046 INFO L225 Difference]: With dead ends: 22157 [2024-11-18 14:37:44,046 INFO L226 Difference]: Without dead ends: 14246 [2024-11-18 14:37:44,065 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 318 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 597 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=536, Invalid=3004, Unknown=0, NotChecked=0, Total=3540 [2024-11-18 14:37:44,066 INFO L432 NwaCegarLoop]: 380 mSDtfsCounter, 1699 mSDsluCounter, 5350 mSDsCounter, 0 mSdLazyCounter, 2516 mSolverCounterSat, 735 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1699 SdHoareTripleChecker+Valid, 5730 SdHoareTripleChecker+Invalid, 3251 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 735 IncrementalHoareTripleChecker+Valid, 2516 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:44,066 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1699 Valid, 5730 Invalid, 3251 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [735 Valid, 2516 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-18 14:37:44,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14246 states. [2024-11-18 14:37:45,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14246 to 9420. [2024-11-18 14:37:45,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9420 states, 6916 states have (on average 1.2888953152111047) internal successors, (8914), 6982 states have internal predecessors, (8914), 1618 states have call successors, (1618), 885 states have call predecessors, (1618), 885 states have return successors, (1618), 1552 states have call predecessors, (1618), 1618 states have call successors, (1618) [2024-11-18 14:37:45,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9420 states to 9420 states and 12150 transitions. [2024-11-18 14:37:45,702 INFO L78 Accepts]: Start accepts. Automaton has 9420 states and 12150 transitions. Word has length 158 [2024-11-18 14:37:45,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:45,703 INFO L471 AbstractCegarLoop]: Abstraction has 9420 states and 12150 transitions. [2024-11-18 14:37:45,703 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 8.384615384615385) internal successors, (218), 22 states have internal predecessors, (218), 7 states have call successors, (32), 4 states have call predecessors, (32), 8 states have return successors, (34), 10 states have call predecessors, (34), 7 states have call successors, (34) [2024-11-18 14:37:45,703 INFO L276 IsEmpty]: Start isEmpty. Operand 9420 states and 12150 transitions. [2024-11-18 14:37:45,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2024-11-18 14:37:45,719 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:45,719 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:45,742 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-18 14:37:45,920 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:45,920 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:45,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:45,921 INFO L85 PathProgramCache]: Analyzing trace with hash -1317436337, now seen corresponding path program 1 times [2024-11-18 14:37:45,921 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:45,921 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417385833] [2024-11-18 14:37:45,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:45,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:46,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:46,973 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 25 proven. 6 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2024-11-18 14:37:46,973 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:46,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417385833] [2024-11-18 14:37:46,973 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1417385833] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:46,973 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1676094065] [2024-11-18 14:37:46,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:46,974 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:46,974 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:46,976 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:46,978 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2024-11-18 14:37:47,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:47,206 INFO L255 TraceCheckSpWp]: Trace formula consists of 802 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-18 14:37:47,208 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:47,309 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 49 proven. 4 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2024-11-18 14:37:47,310 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:47,400 INFO L134 CoverageAnalysis]: Checked inductivity of 92 backedges. 26 proven. 2 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2024-11-18 14:37:47,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1676094065] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:47,400 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:47,400 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7] total 16 [2024-11-18 14:37:47,401 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863473052] [2024-11-18 14:37:47,401 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:47,401 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2024-11-18 14:37:47,401 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:47,402 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2024-11-18 14:37:47,402 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2024-11-18 14:37:47,403 INFO L87 Difference]: Start difference. First operand 9420 states and 12150 transitions. Second operand has 16 states, 16 states have (on average 12.3125) internal successors, (197), 15 states have internal predecessors, (197), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-11-18 14:37:49,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:49,968 INFO L93 Difference]: Finished difference Result 18824 states and 24281 transitions. [2024-11-18 14:37:49,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2024-11-18 14:37:49,969 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 12.3125) internal successors, (197), 15 states have internal predecessors, (197), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) Word has length 166 [2024-11-18 14:37:49,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:50,032 INFO L225 Difference]: With dead ends: 18824 [2024-11-18 14:37:50,032 INFO L226 Difference]: Without dead ends: 9612 [2024-11-18 14:37:50,058 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 377 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 342 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=241, Invalid=1481, Unknown=0, NotChecked=0, Total=1722 [2024-11-18 14:37:50,059 INFO L432 NwaCegarLoop]: 470 mSDtfsCounter, 846 mSDsluCounter, 4719 mSDsCounter, 0 mSdLazyCounter, 1633 mSolverCounterSat, 210 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 847 SdHoareTripleChecker+Valid, 5189 SdHoareTripleChecker+Invalid, 1843 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 210 IncrementalHoareTripleChecker+Valid, 1633 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:50,059 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [847 Valid, 5189 Invalid, 1843 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [210 Valid, 1633 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2024-11-18 14:37:50,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9612 states. [2024-11-18 14:37:51,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9612 to 9397. [2024-11-18 14:37:51,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9397 states, 6895 states have (on average 1.288469905728789) internal successors, (8884), 6961 states have internal predecessors, (8884), 1617 states have call successors, (1617), 884 states have call predecessors, (1617), 884 states have return successors, (1617), 1551 states have call predecessors, (1617), 1617 states have call successors, (1617) [2024-11-18 14:37:51,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9397 states to 9397 states and 12118 transitions. [2024-11-18 14:37:51,616 INFO L78 Accepts]: Start accepts. Automaton has 9397 states and 12118 transitions. Word has length 166 [2024-11-18 14:37:51,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:37:51,617 INFO L471 AbstractCegarLoop]: Abstraction has 9397 states and 12118 transitions. [2024-11-18 14:37:51,617 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 12.3125) internal successors, (197), 15 states have internal predecessors, (197), 6 states have call successors, (37), 4 states have call predecessors, (37), 6 states have return successors, (37), 7 states have call predecessors, (37), 6 states have call successors, (37) [2024-11-18 14:37:51,617 INFO L276 IsEmpty]: Start isEmpty. Operand 9397 states and 12118 transitions. [2024-11-18 14:37:51,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2024-11-18 14:37:51,628 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:37:51,628 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:37:51,648 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2024-11-18 14:37:51,829 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:51,829 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:37:51,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:37:51,830 INFO L85 PathProgramCache]: Analyzing trace with hash 811787975, now seen corresponding path program 1 times [2024-11-18 14:37:51,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:37:51,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742703812] [2024-11-18 14:37:51,830 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:51,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:37:51,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:52,577 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 29 proven. 6 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2024-11-18 14:37:52,577 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 14:37:52,578 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742703812] [2024-11-18 14:37:52,578 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1742703812] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 14:37:52,578 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1022314179] [2024-11-18 14:37:52,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:37:52,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 14:37:52,578 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 14:37:52,580 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 14:37:52,582 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2024-11-18 14:37:52,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 14:37:52,818 INFO L255 TraceCheckSpWp]: Trace formula consists of 821 conjuncts, 27 conjuncts are in the unsatisfiable core [2024-11-18 14:37:52,822 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 14:37:53,235 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 76 proven. 10 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2024-11-18 14:37:53,236 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-18 14:37:53,711 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-11-18 14:37:53,711 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1022314179] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-18 14:37:53,711 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-18 14:37:53,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10, 8] total 23 [2024-11-18 14:37:53,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1193162837] [2024-11-18 14:37:53,711 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-18 14:37:53,712 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2024-11-18 14:37:53,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 14:37:53,713 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2024-11-18 14:37:53,713 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=427, Unknown=0, NotChecked=0, Total=506 [2024-11-18 14:37:53,713 INFO L87 Difference]: Start difference. First operand 9397 states and 12118 transitions. Second operand has 23 states, 23 states have (on average 11.869565217391305) internal successors, (273), 21 states have internal predecessors, (273), 9 states have call successors, (43), 5 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 9 states have call successors, (42) [2024-11-18 14:37:59,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 14:37:59,023 INFO L93 Difference]: Finished difference Result 29495 states and 38029 transitions. [2024-11-18 14:37:59,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2024-11-18 14:37:59,023 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 11.869565217391305) internal successors, (273), 21 states have internal predecessors, (273), 9 states have call successors, (43), 5 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 9 states have call successors, (42) Word has length 174 [2024-11-18 14:37:59,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 14:37:59,131 INFO L225 Difference]: With dead ends: 29495 [2024-11-18 14:37:59,131 INFO L226 Difference]: Without dead ends: 20202 [2024-11-18 14:37:59,157 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 401 GetRequests, 345 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=473, Invalid=2833, Unknown=0, NotChecked=0, Total=3306 [2024-11-18 14:37:59,158 INFO L432 NwaCegarLoop]: 528 mSDtfsCounter, 1146 mSDsluCounter, 5799 mSDsCounter, 0 mSdLazyCounter, 2933 mSolverCounterSat, 345 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1146 SdHoareTripleChecker+Valid, 6327 SdHoareTripleChecker+Invalid, 3278 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 345 IncrementalHoareTripleChecker+Valid, 2933 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2024-11-18 14:37:59,158 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1146 Valid, 6327 Invalid, 3278 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [345 Valid, 2933 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2024-11-18 14:37:59,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20202 states. [2024-11-18 14:38:02,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20202 to 15193. [2024-11-18 14:38:02,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15193 states, 11082 states have (on average 1.2902003248511098) internal successors, (14298), 11201 states have internal predecessors, (14298), 2658 states have call successors, (2658), 1452 states have call predecessors, (2658), 1452 states have return successors, (2658), 2539 states have call predecessors, (2658), 2658 states have call successors, (2658) [2024-11-18 14:38:02,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15193 states to 15193 states and 19614 transitions. [2024-11-18 14:38:02,153 INFO L78 Accepts]: Start accepts. Automaton has 15193 states and 19614 transitions. Word has length 174 [2024-11-18 14:38:02,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 14:38:02,154 INFO L471 AbstractCegarLoop]: Abstraction has 15193 states and 19614 transitions. [2024-11-18 14:38:02,154 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 11.869565217391305) internal successors, (273), 21 states have internal predecessors, (273), 9 states have call successors, (43), 5 states have call predecessors, (43), 7 states have return successors, (42), 11 states have call predecessors, (42), 9 states have call successors, (42) [2024-11-18 14:38:02,154 INFO L276 IsEmpty]: Start isEmpty. Operand 15193 states and 19614 transitions. [2024-11-18 14:38:02,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2024-11-18 14:38:02,169 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 14:38:02,170 INFO L215 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:38:02,193 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2024-11-18 14:38:02,370 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2024-11-18 14:38:02,371 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 14:38:02,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 14:38:02,371 INFO L85 PathProgramCache]: Analyzing trace with hash -1961151993, now seen corresponding path program 1 times [2024-11-18 14:38:02,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 14:38:02,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002213014] [2024-11-18 14:38:02,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 14:38:02,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 14:38:02,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 14:38:02,529 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-18 14:38:02,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 14:38:02,751 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-18 14:38:02,751 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-18 14:38:02,752 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2024-11-18 14:38:02,754 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-18 14:38:02,757 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 14:38:02,944 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-18 14:38:02,948 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 02:38:02 BoogieIcfgContainer [2024-11-18 14:38:02,949 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-18 14:38:02,949 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-18 14:38:02,950 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-18 14:38:02,950 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-18 14:38:02,951 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 02:36:59" (3/4) ... [2024-11-18 14:38:02,952 INFO L136 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-18 14:38:03,138 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2024-11-18 14:38:03,138 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-18 14:38:03,139 INFO L158 Benchmark]: Toolchain (without parser) took 65752.34ms. Allocated memory was 159.4MB in the beginning and 3.4GB in the end (delta: 3.3GB). Free memory was 104.2MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-18 14:38:03,139 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 159.4MB. Free memory is still 121.3MB. There was no memory consumed. Max. memory is 16.1GB. [2024-11-18 14:38:03,143 INFO L158 Benchmark]: CACSL2BoogieTranslator took 452.49ms. Allocated memory is still 159.4MB. Free memory was 104.2MB in the beginning and 83.7MB in the end (delta: 20.5MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. [2024-11-18 14:38:03,143 INFO L158 Benchmark]: Boogie Procedure Inliner took 62.44ms. Allocated memory is still 159.4MB. Free memory was 83.7MB in the beginning and 80.0MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-11-18 14:38:03,143 INFO L158 Benchmark]: Boogie Preprocessor took 110.84ms. Allocated memory is still 159.4MB. Free memory was 80.0MB in the beginning and 75.4MB in the end (delta: 4.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-11-18 14:38:03,143 INFO L158 Benchmark]: RCFGBuilder took 1004.51ms. Allocated memory is still 159.4MB. Free memory was 75.4MB in the beginning and 98.8MB in the end (delta: -23.5MB). Peak memory consumption was 19.4MB. Max. memory is 16.1GB. [2024-11-18 14:38:03,144 INFO L158 Benchmark]: TraceAbstraction took 63923.43ms. Allocated memory was 159.4MB in the beginning and 3.4GB in the end (delta: 3.3GB). Free memory was 98.0MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. [2024-11-18 14:38:03,144 INFO L158 Benchmark]: Witness Printer took 188.92ms. Allocated memory is still 3.4GB. Free memory was 2.3GB in the beginning and 2.2GB in the end (delta: 34.6MB). Peak memory consumption was 35.7MB. Max. memory is 16.1GB. [2024-11-18 14:38:03,145 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 159.4MB. Free memory is still 121.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 452.49ms. Allocated memory is still 159.4MB. Free memory was 104.2MB in the beginning and 83.7MB in the end (delta: 20.5MB). Peak memory consumption was 21.0MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 62.44ms. Allocated memory is still 159.4MB. Free memory was 83.7MB in the beginning and 80.0MB in the end (delta: 3.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 110.84ms. Allocated memory is still 159.4MB. Free memory was 80.0MB in the beginning and 75.4MB in the end (delta: 4.7MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 1004.51ms. Allocated memory is still 159.4MB. Free memory was 75.4MB in the beginning and 98.8MB in the end (delta: -23.5MB). Peak memory consumption was 19.4MB. Max. memory is 16.1GB. * TraceAbstraction took 63923.43ms. Allocated memory was 159.4MB in the beginning and 3.4GB in the end (delta: 3.3GB). Free memory was 98.0MB in the beginning and 2.3GB in the end (delta: -2.2GB). Peak memory consumption was 1.1GB. Max. memory is 16.1GB. * Witness Printer took 188.92ms. Allocated memory is still 3.4GB. Free memory was 2.3GB in the beginning and 2.2GB in the end (delta: 34.6MB). Peak memory consumption was 35.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 611]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L534] int c1 ; [L535] int i2 ; [L538] c1 = 0 [L539] side1Failed = __VERIFIER_nondet_bool() [L540] side2Failed = __VERIFIER_nondet_bool() [L541] side1_written = __VERIFIER_nondet_char() [L542] side2_written = __VERIFIER_nondet_char() [L543] side1Failed_History_0 = __VERIFIER_nondet_bool() [L544] side1Failed_History_1 = __VERIFIER_nondet_bool() [L545] side1Failed_History_2 = __VERIFIER_nondet_bool() [L546] side2Failed_History_0 = __VERIFIER_nondet_bool() [L547] side2Failed_History_1 = __VERIFIER_nondet_bool() [L548] side2Failed_History_2 = __VERIFIER_nondet_bool() [L549] active_side_History_0 = __VERIFIER_nondet_char() [L550] active_side_History_1 = __VERIFIER_nondet_char() [L551] active_side_History_2 = __VERIFIER_nondet_char() [L552] manual_selection_History_0 = __VERIFIER_nondet_char() [L553] manual_selection_History_1 = __VERIFIER_nondet_char() [L554] manual_selection_History_2 = __VERIFIER_nondet_char() [L555] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L555] RET, EXPR init() [L555] i2 = init() [L556] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L556] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L557] cs1_old = nomsg [L558] cs1_new = nomsg [L559] cs2_old = nomsg [L560] cs2_new = nomsg [L561] s1s2_old = nomsg [L562] s1s2_new = nomsg [L563] s1s1_old = nomsg [L564] s1s1_new = nomsg [L565] s2s1_old = nomsg [L566] s2s1_new = nomsg [L567] s2s2_old = nomsg [L568] s2s2_new = nomsg [L569] s1p_old = nomsg [L570] s1p_new = nomsg [L571] s2p_old = nomsg [L572] s2p_new = nomsg [L573] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND TRUE \read(side1Failed) [L278] s1s1_new = nomsg != nomsg && s1s1_new == nomsg ? nomsg : s1s1_new [L279] s1s2_new = nomsg != nomsg && s1s2_new == nomsg ? nomsg : s1s2_new [L280] s1p_new = nomsg != nomsg && s1p_new == nomsg ? nomsg : s1p_new [L281] side1_written = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=1, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=0, s2p_old=-1, s2s1=0, s2s1_new=0, s2s1_old=-1, s2s2=0, s2s2_new=0, s2s2_old=-1, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L439] COND FALSE !(! side1Failed) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L442] COND TRUE ! side2Failed [L443] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L450] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L450] tmp___1 = read_side1_failed_history((unsigned char)1) [L451] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L452] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L452] tmp___2 = read_side1_failed_history((unsigned char)0) [L453] COND FALSE !(! tmp___2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND FALSE !(\read(tmp___7)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L494] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L494] tmp___11 = read_side1_failed_history((unsigned char)1) [L495] COND TRUE ! tmp___11 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L496] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L496] tmp___12 = read_side2_failed_history((unsigned char)1) [L497] COND FALSE !(\read(tmp___12)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] CALL, EXPR read_active_side_history((unsigned char)2) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L148] COND FALSE !((int )index == 0) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L151] COND FALSE !((int )index == 1) VAL [\old(index)=2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=2, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L154] COND TRUE (int )index == 2 [L155] return (active_side_History_2); VAL [\old(index)=2, \result=-2, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L510] RET, EXPR read_active_side_history((unsigned char)2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L510] tmp___20 = read_active_side_history((unsigned char)2) [L511] COND FALSE !((int )tmp___20 > -2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L529] return (1); VAL [\result=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L609] COND FALSE !(! arg) VAL [\old(arg)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L597] RET assert(c1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, i2=0, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L598] i2 ++ VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, c1=1, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, i2=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L574] COND TRUE i2 < 10 [L576] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=1, side1Failed_History_0=1, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L576] RET Console_task_each_pals_period() [L577] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=0, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND FALSE !((int )side1 == (int )side2) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L293] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L294] COND TRUE (int )side2 != (int )nomsg [L295] next_state = (int8_t )0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, next_state=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L577] RET Side1_activestandby_task_each_pals_period() [L578] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND TRUE \read(side2Failed) [L335] s2s1_new = nomsg != nomsg && s2s1_new == nomsg ? nomsg : s2s1_new [L336] s2s2_new = nomsg != nomsg && s2s2_new == nomsg ? nomsg : s2s2_new [L337] s2p_new = nomsg != nomsg && s2p_new == nomsg ? nomsg : s2p_new [L338] side2_written = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L578] RET Side2_activestandby_task_each_pals_period() [L579] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=0, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L400] COND FALSE !((int )side1 == 0) [L407] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=-1, s1s1=0, s1s1_new=0, s1s1_old=-1, s1s2=0, s1s2_new=0, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L409] RET write_active_side_history(active_side) [L579] RET Pendulum_prism_task_each_pals_period() [L580] cs1_old = cs1_new [L581] cs1_new = nomsg [L582] cs2_old = cs2_new [L583] cs2_new = nomsg [L584] s1s2_old = s1s2_new [L585] s1s2_new = nomsg [L586] s1s1_old = s1s1_new [L587] s1s1_new = nomsg [L588] s2s1_old = s2s1_new [L589] s2s1_new = nomsg [L590] s2s2_old = s2s2_new [L591] s2s2_new = nomsg [L592] s1p_old = s1p_new [L593] s1p_new = nomsg [L594] s2p_old = s2p_new [L595] s2p_new = nomsg [L596] CALL, EXPR check() [L415] int tmp ; [L416] msg_t tmp___0 ; [L417] _Bool tmp___1 ; [L418] _Bool tmp___2 ; [L419] _Bool tmp___3 ; [L420] _Bool tmp___4 ; [L421] int8_t tmp___5 ; [L422] _Bool tmp___6 ; [L423] _Bool tmp___7 ; [L424] _Bool tmp___8 ; [L425] int8_t tmp___9 ; [L426] _Bool tmp___10 ; [L427] _Bool tmp___11 ; [L428] _Bool tmp___12 ; [L429] msg_t tmp___13 ; [L430] _Bool tmp___14 ; [L431] _Bool tmp___15 ; [L432] _Bool tmp___16 ; [L433] _Bool tmp___17 ; [L434] int8_t tmp___18 ; [L435] int8_t tmp___19 ; [L436] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L439] COND TRUE ! side1Failed [L440] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L447] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L447] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=127, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L448] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L448] tmp___0 = read_manual_selection_history((unsigned char)1) [L449] COND FALSE !(! tmp___0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L478] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L478] tmp___7 = read_side1_failed_history((unsigned char)1) [L479] COND TRUE \read(tmp___7) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, index=1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L480] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L480] tmp___8 = read_side2_failed_history((unsigned char)1) [L481] COND TRUE ! tmp___8 VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L482] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L482] tmp___5 = read_active_side_history((unsigned char)0) [L483] COND TRUE ! ((int )tmp___5 == 2) [L484] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1, tmp=1] [L596] RET, EXPR check() [L596] c1 = check() [L597] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L609] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] [L611] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=0, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=-1, manual_selection_History_1=127, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=0, s1s1=0, s1s1_new=-1, s1s1_old=0, s1s2=0, s1s2_new=-1, s1s2_old=0, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=1, side1Failed_History_2=0, side1_written=0, side2Failed=1, side2Failed_History_0=1, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=-1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 179 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 63.7s, OverallIterations: 35, TraceHistogramMax: 5, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 27.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12836 SdHoareTripleChecker+Valid, 9.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12752 mSDsluCounter, 56732 SdHoareTripleChecker+Invalid, 7.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 45834 mSDsCounter, 3209 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 12639 IncrementalHoareTripleChecker+Invalid, 15848 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 3209 mSolverCounterUnsat, 10898 mSDtfsCounter, 12639 mSolverCounterSat, 0.3s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 2625 GetRequests, 2211 SyntacticMatches, 0 SemanticMatches, 414 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3187 ImplicationChecksByTransitivity, 5.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=15193occurred in iteration=34, InterpolantAutomatonStates: 326, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 13.4s AutomataMinimizationTime, 34 MinimizatonAttempts, 16504 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.5s SsaConstructionTime, 2.0s SatisfiabilityAnalysisTime, 16.6s InterpolantComputationTime, 4667 NumberOfCodeBlocks, 4667 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 5401 ConstructedInterpolants, 0 QuantifiedInterpolants, 15989 SizeOfPredicates, 24 NumberOfNonLiveVariables, 5911 ConjunctsInSsa, 212 ConjunctsInUnsatCore, 48 InterpolantComputations, 28 PerfectInterpolantSequences, 1879/2097 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-18 14:38:03,190 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE