./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version 3061b6dc Calling Ultimate with: /root/.sdkman/candidates/java/11.0.12-open/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d9dd329404607c04c3b8409033c911abc5eb1af40daa0f8673d76c8f1e85e1ae --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-3061b6d-m [2024-11-18 16:20:46,142 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-18 16:20:46,198 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2024-11-18 16:20:46,203 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-18 16:20:46,204 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-18 16:20:46,227 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-18 16:20:46,227 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-18 16:20:46,227 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-18 16:20:46,228 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-18 16:20:46,229 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-18 16:20:46,229 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-11-18 16:20:46,229 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-11-18 16:20:46,230 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-18 16:20:46,231 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-18 16:20:46,231 INFO L153 SettingsManager]: * Use SBE=true [2024-11-18 16:20:46,232 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-18 16:20:46,232 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-11-18 16:20:46,232 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-18 16:20:46,232 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-18 16:20:46,233 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-18 16:20:46,236 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-18 16:20:46,236 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-18 16:20:46,237 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-18 16:20:46,237 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 16:20:46,238 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-11-18 16:20:46,238 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-11-18 16:20:46,239 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-18 16:20:46,239 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-11-18 16:20:46,239 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-11-18 16:20:46,239 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2024-11-18 16:20:46,239 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2024-11-18 16:20:46,240 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2024-11-18 16:20:46,240 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d9dd329404607c04c3b8409033c911abc5eb1af40daa0f8673d76c8f1e85e1ae [2024-11-18 16:20:46,465 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-18 16:20:46,485 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-18 16:20:46,488 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-18 16:20:46,489 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-18 16:20:46,489 INFO L274 PluginConnector]: CDTParser initialized [2024-11-18 16:20:46,490 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c [2024-11-18 16:20:47,866 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-18 16:20:48,032 INFO L384 CDTParser]: Found 1 translation units. [2024-11-18 16:20:48,033 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c [2024-11-18 16:20:48,047 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54b1c0e71/e09bc7ce39a743f7a87b3d391ca55805/FLAG64e5f2d51 [2024-11-18 16:20:48,060 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/54b1c0e71/e09bc7ce39a743f7a87b3d391ca55805 [2024-11-18 16:20:48,063 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-18 16:20:48,064 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-18 16:20:48,065 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-18 16:20:48,065 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-18 16:20:48,070 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-18 16:20:48,071 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,072 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@341ce42a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48, skipping insertion in model container [2024-11-18 16:20:48,072 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,109 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-18 16:20:48,250 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[911,924] [2024-11-18 16:20:48,316 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[8416,8429] [2024-11-18 16:20:48,352 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 16:20:48,366 INFO L200 MainTranslator]: Completed pre-run [2024-11-18 16:20:48,379 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[911,924] [2024-11-18 16:20:48,412 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[8416,8429] [2024-11-18 16:20:48,442 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-18 16:20:48,466 INFO L204 MainTranslator]: Completed translation [2024-11-18 16:20:48,466 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48 WrapperNode [2024-11-18 16:20:48,466 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-18 16:20:48,468 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-18 16:20:48,468 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-18 16:20:48,468 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-18 16:20:48,477 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,529 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,605 INFO L138 Inliner]: procedures = 59, calls = 68, calls flagged for inlining = 27, calls inlined = 27, statements flattened = 512 [2024-11-18 16:20:48,606 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-18 16:20:48,607 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-18 16:20:48,607 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-18 16:20:48,607 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-18 16:20:48,635 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,635 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,643 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,670 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-18 16:20:48,676 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,676 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,687 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,692 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,694 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,696 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,698 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-18 16:20:48,699 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-18 16:20:48,699 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-18 16:20:48,699 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-18 16:20:48,700 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (1/1) ... [2024-11-18 16:20:48,705 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2024-11-18 16:20:48,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:20:48,741 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2024-11-18 16:20:48,751 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2024-11-18 16:20:48,807 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-18 16:20:48,807 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2024-11-18 16:20:48,807 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2024-11-18 16:20:48,807 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2024-11-18 16:20:48,809 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread1 [2024-11-18 16:20:48,840 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread1 [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread2 [2024-11-18 16:20:48,840 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread2 [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events1 [2024-11-18 16:20:48,840 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events1 [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events2 [2024-11-18 16:20:48,840 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events2 [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads2 [2024-11-18 16:20:48,840 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads2 [2024-11-18 16:20:48,840 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads1 [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads1 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels1 [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels1 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels2 [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels2 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events2 [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events2 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events1 [2024-11-18 16:20:48,841 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events1 [2024-11-18 16:20:48,841 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-18 16:20:48,842 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-18 16:20:48,842 INFO L130 BoogieDeclarations]: Found specification of procedure error1 [2024-11-18 16:20:48,842 INFO L138 BoogieDeclarations]: Found implementation of procedure error1 [2024-11-18 16:20:48,842 INFO L130 BoogieDeclarations]: Found specification of procedure error2 [2024-11-18 16:20:48,842 INFO L138 BoogieDeclarations]: Found implementation of procedure error2 [2024-11-18 16:20:48,991 INFO L238 CfgBuilder]: Building ICFG [2024-11-18 16:20:48,993 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-18 16:20:49,355 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##56: assume !(1 == ~q_free~0); [2024-11-18 16:20:49,356 INFO L735 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##55: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0#1; [2024-11-18 16:20:49,434 INFO L? ?]: Removed 74 outVars from TransFormulas that were not future-live. [2024-11-18 16:20:49,434 INFO L287 CfgBuilder]: Performing block encoding [2024-11-18 16:20:49,464 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-18 16:20:49,465 INFO L316 CfgBuilder]: Removed 9 assume(true) statements. [2024-11-18 16:20:49,465 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:20:49 BoogieIcfgContainer [2024-11-18 16:20:49,465 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-18 16:20:49,467 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-11-18 16:20:49,467 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-11-18 16:20:49,471 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-11-18 16:20:49,471 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.11 04:20:48" (1/3) ... [2024-11-18 16:20:49,472 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8e200b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:20:49, skipping insertion in model container [2024-11-18 16:20:49,472 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.11 04:20:48" (2/3) ... [2024-11-18 16:20:49,472 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@8e200b6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.11 04:20:49, skipping insertion in model container [2024-11-18 16:20:49,472 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:20:49" (3/3) ... [2024-11-18 16:20:49,474 INFO L112 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.02.cil-2.c [2024-11-18 16:20:49,487 INFO L214 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-11-18 16:20:49,487 INFO L154 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2024-11-18 16:20:49,549 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-11-18 16:20:49,554 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@5dbf9c79, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-11-18 16:20:49,554 INFO L334 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2024-11-18 16:20:49,560 INFO L276 IsEmpty]: Start isEmpty. Operand has 260 states, 208 states have (on average 1.5576923076923077) internal successors, (324), 216 states have internal predecessors, (324), 34 states have call successors, (34), 15 states have call predecessors, (34), 15 states have return successors, (34), 32 states have call predecessors, (34), 34 states have call successors, (34) [2024-11-18 16:20:49,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-18 16:20:49,571 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:49,572 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:49,572 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:49,576 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:49,576 INFO L85 PathProgramCache]: Analyzing trace with hash -1504426887, now seen corresponding path program 1 times [2024-11-18 16:20:49,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:49,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242991115] [2024-11-18 16:20:49,584 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:49,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:49,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:50,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:50,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:50,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242991115] [2024-11-18 16:20:50,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1242991115] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:50,033 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:50,033 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:50,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1237589947] [2024-11-18 16:20:50,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:50,047 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:50,047 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:50,075 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:50,076 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:50,079 INFO L87 Difference]: Start difference. First operand has 260 states, 208 states have (on average 1.5576923076923077) internal successors, (324), 216 states have internal predecessors, (324), 34 states have call successors, (34), 15 states have call predecessors, (34), 15 states have return successors, (34), 32 states have call predecessors, (34), 34 states have call successors, (34) Second operand has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:20:50,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:50,771 INFO L93 Difference]: Finished difference Result 620 states and 943 transitions. [2024-11-18 16:20:50,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-18 16:20:50,773 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 65 [2024-11-18 16:20:50,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:50,790 INFO L225 Difference]: With dead ends: 620 [2024-11-18 16:20:50,793 INFO L226 Difference]: Without dead ends: 368 [2024-11-18 16:20:50,801 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:50,808 INFO L432 NwaCegarLoop]: 281 mSDtfsCounter, 321 mSDsluCounter, 655 mSDsCounter, 0 mSdLazyCounter, 503 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 330 SdHoareTripleChecker+Valid, 936 SdHoareTripleChecker+Invalid, 555 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 503 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:50,809 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [330 Valid, 936 Invalid, 555 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 503 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2024-11-18 16:20:50,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 368 states. [2024-11-18 16:20:50,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 368 to 361. [2024-11-18 16:20:50,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 361 states, 290 states have (on average 1.4517241379310344) internal successors, (421), 297 states have internal predecessors, (421), 47 states have call successors, (47), 22 states have call predecessors, (47), 22 states have return successors, (48), 44 states have call predecessors, (48), 43 states have call successors, (48) [2024-11-18 16:20:50,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 516 transitions. [2024-11-18 16:20:50,893 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 516 transitions. Word has length 65 [2024-11-18 16:20:50,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:50,894 INFO L471 AbstractCegarLoop]: Abstraction has 361 states and 516 transitions. [2024-11-18 16:20:50,894 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:20:50,894 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 516 transitions. [2024-11-18 16:20:50,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2024-11-18 16:20:50,898 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:50,899 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:50,899 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2024-11-18 16:20:50,899 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:50,900 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:50,900 INFO L85 PathProgramCache]: Analyzing trace with hash 33913143, now seen corresponding path program 1 times [2024-11-18 16:20:50,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:50,900 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982787032] [2024-11-18 16:20:50,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:50,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:50,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:50,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:50,987 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:50,987 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982787032] [2024-11-18 16:20:50,987 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [982787032] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:50,988 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:50,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 16:20:50,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [770768726] [2024-11-18 16:20:50,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:50,989 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 16:20:50,989 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:50,990 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 16:20:50,990 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:20:50,990 INFO L87 Difference]: Start difference. First operand 361 states and 516 transitions. Second operand has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:51,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:51,159 INFO L93 Difference]: Finished difference Result 962 states and 1364 transitions. [2024-11-18 16:20:51,159 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 16:20:51,160 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) Word has length 65 [2024-11-18 16:20:51,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:51,167 INFO L225 Difference]: With dead ends: 962 [2024-11-18 16:20:51,168 INFO L226 Difference]: Without dead ends: 753 [2024-11-18 16:20:51,170 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:20:51,171 INFO L432 NwaCegarLoop]: 475 mSDtfsCounter, 455 mSDsluCounter, 414 mSDsCounter, 0 mSdLazyCounter, 116 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 455 SdHoareTripleChecker+Valid, 889 SdHoareTripleChecker+Invalid, 129 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 116 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:51,172 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [455 Valid, 889 Invalid, 129 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 116 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:20:51,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 753 states. [2024-11-18 16:20:51,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 753 to 735. [2024-11-18 16:20:51,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 735 states, 592 states have (on average 1.4138513513513513) internal successors, (837), 603 states have internal predecessors, (837), 87 states have call successors, (87), 50 states have call predecessors, (87), 54 states have return successors, (100), 84 states have call predecessors, (100), 83 states have call successors, (100) [2024-11-18 16:20:51,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 735 states to 735 states and 1024 transitions. [2024-11-18 16:20:51,223 INFO L78 Accepts]: Start accepts. Automaton has 735 states and 1024 transitions. Word has length 65 [2024-11-18 16:20:51,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:51,223 INFO L471 AbstractCegarLoop]: Abstraction has 735 states and 1024 transitions. [2024-11-18 16:20:51,223 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 4 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 3 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:51,224 INFO L276 IsEmpty]: Start isEmpty. Operand 735 states and 1024 transitions. [2024-11-18 16:20:51,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2024-11-18 16:20:51,226 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:51,226 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:51,226 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2024-11-18 16:20:51,226 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:51,227 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:51,227 INFO L85 PathProgramCache]: Analyzing trace with hash -1774921652, now seen corresponding path program 1 times [2024-11-18 16:20:51,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:51,227 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335486115] [2024-11-18 16:20:51,227 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:51,227 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:51,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:51,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:51,328 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:51,328 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335486115] [2024-11-18 16:20:51,329 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1335486115] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:51,329 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:51,329 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:51,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269302495] [2024-11-18 16:20:51,329 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:51,329 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:51,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:51,331 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:51,332 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:51,332 INFO L87 Difference]: Start difference. First operand 735 states and 1024 transitions. Second operand has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-18 16:20:51,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:51,415 INFO L93 Difference]: Finished difference Result 1333 states and 1860 transitions. [2024-11-18 16:20:51,415 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-18 16:20:51,415 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 66 [2024-11-18 16:20:51,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:51,420 INFO L225 Difference]: With dead ends: 1333 [2024-11-18 16:20:51,421 INFO L226 Difference]: Without dead ends: 750 [2024-11-18 16:20:51,423 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:51,424 INFO L432 NwaCegarLoop]: 355 mSDtfsCounter, 0 mSDsluCounter, 1414 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1769 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:51,426 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1769 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:20:51,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 750 states. [2024-11-18 16:20:51,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 750 to 750. [2024-11-18 16:20:51,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 750 states, 604 states have (on average 1.400662251655629) internal successors, (846), 615 states have internal predecessors, (846), 87 states have call successors, (87), 50 states have call predecessors, (87), 57 states have return successors, (105), 87 states have call predecessors, (105), 83 states have call successors, (105) [2024-11-18 16:20:51,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 750 states and 1038 transitions. [2024-11-18 16:20:51,469 INFO L78 Accepts]: Start accepts. Automaton has 750 states and 1038 transitions. Word has length 66 [2024-11-18 16:20:51,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:51,470 INFO L471 AbstractCegarLoop]: Abstraction has 750 states and 1038 transitions. [2024-11-18 16:20:51,470 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2024-11-18 16:20:51,471 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 1038 transitions. [2024-11-18 16:20:51,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2024-11-18 16:20:51,474 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:51,474 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:51,475 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2024-11-18 16:20:51,475 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:51,475 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:51,475 INFO L85 PathProgramCache]: Analyzing trace with hash 1490686346, now seen corresponding path program 1 times [2024-11-18 16:20:51,475 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:51,475 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327512010] [2024-11-18 16:20:51,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:51,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:51,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:51,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:51,564 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:51,565 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327512010] [2024-11-18 16:20:51,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [327512010] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:51,565 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:51,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:51,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625301878] [2024-11-18 16:20:51,565 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:51,566 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:51,566 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:51,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:51,568 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:51,568 INFO L87 Difference]: Start difference. First operand 750 states and 1038 transitions. Second operand has 6 states, 6 states have (on average 8.5) internal successors, (51), 6 states have internal predecessors, (51), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:52,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:52,088 INFO L93 Difference]: Finished difference Result 2445 states and 3376 transitions. [2024-11-18 16:20:52,088 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-18 16:20:52,088 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 6 states have internal predecessors, (51), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 66 [2024-11-18 16:20:52,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:52,094 INFO L225 Difference]: With dead ends: 2445 [2024-11-18 16:20:52,095 INFO L226 Difference]: Without dead ends: 949 [2024-11-18 16:20:52,099 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:52,102 INFO L432 NwaCegarLoop]: 639 mSDtfsCounter, 1206 mSDsluCounter, 1196 mSDsCounter, 0 mSdLazyCounter, 450 mSolverCounterSat, 231 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1214 SdHoareTripleChecker+Valid, 1835 SdHoareTripleChecker+Invalid, 681 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 231 IncrementalHoareTripleChecker+Valid, 450 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:52,102 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1214 Valid, 1835 Invalid, 681 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [231 Valid, 450 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-18 16:20:52,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 949 states. [2024-11-18 16:20:52,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 949 to 696. [2024-11-18 16:20:52,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 696 states, 550 states have (on average 1.3690909090909091) internal successors, (753), 561 states have internal predecessors, (753), 87 states have call successors, (87), 50 states have call predecessors, (87), 57 states have return successors, (97), 87 states have call predecessors, (97), 83 states have call successors, (97) [2024-11-18 16:20:52,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 696 states to 696 states and 937 transitions. [2024-11-18 16:20:52,159 INFO L78 Accepts]: Start accepts. Automaton has 696 states and 937 transitions. Word has length 66 [2024-11-18 16:20:52,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:52,162 INFO L471 AbstractCegarLoop]: Abstraction has 696 states and 937 transitions. [2024-11-18 16:20:52,162 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 6 states have internal predecessors, (51), 4 states have call successors, (8), 2 states have call predecessors, (8), 4 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:52,162 INFO L276 IsEmpty]: Start isEmpty. Operand 696 states and 937 transitions. [2024-11-18 16:20:52,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2024-11-18 16:20:52,163 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:52,163 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:52,163 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2024-11-18 16:20:52,164 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:52,164 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:52,164 INFO L85 PathProgramCache]: Analyzing trace with hash -1441856857, now seen corresponding path program 1 times [2024-11-18 16:20:52,164 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:52,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163434947] [2024-11-18 16:20:52,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:52,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:52,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:52,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:52,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:52,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1163434947] [2024-11-18 16:20:52,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1163434947] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:52,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:52,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 16:20:52,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443333495] [2024-11-18 16:20:52,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:52,293 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 16:20:52,293 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:52,293 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 16:20:52,293 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2024-11-18 16:20:52,294 INFO L87 Difference]: Start difference. First operand 696 states and 937 transitions. Second operand has 7 states, 6 states have (on average 8.666666666666666) internal successors, (52), 6 states have internal predecessors, (52), 4 states have call successors, (8), 3 states have call predecessors, (8), 4 states have return successors, (7), 5 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:52,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:52,833 INFO L93 Difference]: Finished difference Result 1510 states and 2021 transitions. [2024-11-18 16:20:52,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2024-11-18 16:20:52,834 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 6 states have (on average 8.666666666666666) internal successors, (52), 6 states have internal predecessors, (52), 4 states have call successors, (8), 3 states have call predecessors, (8), 4 states have return successors, (7), 5 states have call predecessors, (7), 4 states have call successors, (7) Word has length 67 [2024-11-18 16:20:52,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:52,836 INFO L225 Difference]: With dead ends: 1510 [2024-11-18 16:20:52,836 INFO L226 Difference]: Without dead ends: 138 [2024-11-18 16:20:52,838 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2024-11-18 16:20:52,839 INFO L432 NwaCegarLoop]: 247 mSDtfsCounter, 723 mSDsluCounter, 734 mSDsCounter, 0 mSdLazyCounter, 712 mSolverCounterSat, 97 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 756 SdHoareTripleChecker+Valid, 981 SdHoareTripleChecker+Invalid, 809 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 97 IncrementalHoareTripleChecker+Valid, 712 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:52,839 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [756 Valid, 981 Invalid, 809 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [97 Valid, 712 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-18 16:20:52,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2024-11-18 16:20:52,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2024-11-18 16:20:52,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 113 states have (on average 1.4778761061946903) internal successors, (167), 115 states have internal predecessors, (167), 18 states have call successors, (18), 7 states have call predecessors, (18), 6 states have return successors, (16), 16 states have call predecessors, (16), 16 states have call successors, (16) [2024-11-18 16:20:52,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 201 transitions. [2024-11-18 16:20:52,845 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 201 transitions. Word has length 67 [2024-11-18 16:20:52,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:52,846 INFO L471 AbstractCegarLoop]: Abstraction has 138 states and 201 transitions. [2024-11-18 16:20:52,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 6 states have (on average 8.666666666666666) internal successors, (52), 6 states have internal predecessors, (52), 4 states have call successors, (8), 3 states have call predecessors, (8), 4 states have return successors, (7), 5 states have call predecessors, (7), 4 states have call successors, (7) [2024-11-18 16:20:52,846 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 201 transitions. [2024-11-18 16:20:52,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:52,846 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:52,846 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:52,847 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2024-11-18 16:20:52,847 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:52,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:52,847 INFO L85 PathProgramCache]: Analyzing trace with hash -166345420, now seen corresponding path program 1 times [2024-11-18 16:20:52,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:52,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127669615] [2024-11-18 16:20:52,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:52,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:52,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:52,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:52,920 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:52,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127669615] [2024-11-18 16:20:52,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [127669615] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:52,920 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:52,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:52,921 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1766817892] [2024-11-18 16:20:52,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:52,921 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:52,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:52,921 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:52,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:52,922 INFO L87 Difference]: Start difference. First operand 138 states and 201 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:53,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:53,244 INFO L93 Difference]: Finished difference Result 400 states and 589 transitions. [2024-11-18 16:20:53,245 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-18 16:20:53,245 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:53,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:53,247 INFO L225 Difference]: With dead ends: 400 [2024-11-18 16:20:53,247 INFO L226 Difference]: Without dead ends: 273 [2024-11-18 16:20:53,247 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:53,248 INFO L432 NwaCegarLoop]: 157 mSDtfsCounter, 319 mSDsluCounter, 380 mSDsCounter, 0 mSdLazyCounter, 227 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 329 SdHoareTripleChecker+Valid, 537 SdHoareTripleChecker+Invalid, 267 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:53,248 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [329 Valid, 537 Invalid, 267 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 227 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-18 16:20:53,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2024-11-18 16:20:53,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 262. [2024-11-18 16:20:53,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 262 states, 219 states have (on average 1.4885844748858448) internal successors, (326), 222 states have internal predecessors, (326), 29 states have call successors, (29), 13 states have call predecessors, (29), 13 states have return successors, (28), 27 states have call predecessors, (28), 27 states have call successors, (28) [2024-11-18 16:20:53,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 383 transitions. [2024-11-18 16:20:53,258 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 383 transitions. Word has length 69 [2024-11-18 16:20:53,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:53,259 INFO L471 AbstractCegarLoop]: Abstraction has 262 states and 383 transitions. [2024-11-18 16:20:53,259 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:53,259 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 383 transitions. [2024-11-18 16:20:53,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:53,259 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:53,259 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:53,259 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2024-11-18 16:20:53,260 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:53,260 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:53,260 INFO L85 PathProgramCache]: Analyzing trace with hash -63631056, now seen corresponding path program 1 times [2024-11-18 16:20:53,260 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:53,260 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736107896] [2024-11-18 16:20:53,260 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:53,260 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:53,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:53,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:53,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:53,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736107896] [2024-11-18 16:20:53,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [736107896] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:53,349 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:53,349 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:53,349 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [11763804] [2024-11-18 16:20:53,350 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:53,350 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:53,350 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:53,350 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:53,350 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:53,351 INFO L87 Difference]: Start difference. First operand 262 states and 383 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:53,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:53,907 INFO L93 Difference]: Finished difference Result 665 states and 978 transitions. [2024-11-18 16:20:53,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:53,907 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:53,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:53,910 INFO L225 Difference]: With dead ends: 665 [2024-11-18 16:20:53,910 INFO L226 Difference]: Without dead ends: 414 [2024-11-18 16:20:53,910 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:53,911 INFO L432 NwaCegarLoop]: 258 mSDtfsCounter, 308 mSDsluCounter, 742 mSDsCounter, 0 mSdLazyCounter, 437 mSolverCounterSat, 24 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 318 SdHoareTripleChecker+Valid, 1000 SdHoareTripleChecker+Invalid, 461 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 24 IncrementalHoareTripleChecker+Valid, 437 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:53,915 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [318 Valid, 1000 Invalid, 461 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [24 Valid, 437 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-18 16:20:53,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414 states. [2024-11-18 16:20:53,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414 to 379. [2024-11-18 16:20:53,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 379 states, 318 states have (on average 1.4811320754716981) internal successors, (471), 322 states have internal predecessors, (471), 40 states have call successors, (40), 19 states have call predecessors, (40), 20 states have return successors, (42), 39 states have call predecessors, (42), 38 states have call successors, (42) [2024-11-18 16:20:53,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 553 transitions. [2024-11-18 16:20:53,946 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 553 transitions. Word has length 69 [2024-11-18 16:20:53,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:53,950 INFO L471 AbstractCegarLoop]: Abstraction has 379 states and 553 transitions. [2024-11-18 16:20:53,950 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:53,951 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 553 transitions. [2024-11-18 16:20:53,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:53,951 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:53,952 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:53,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2024-11-18 16:20:53,952 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:53,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:53,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1323154354, now seen corresponding path program 1 times [2024-11-18 16:20:53,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:53,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78473878] [2024-11-18 16:20:53,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:53,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:53,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:54,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:54,036 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:54,036 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78473878] [2024-11-18 16:20:54,036 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [78473878] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:54,036 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:54,036 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:54,036 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [780444364] [2024-11-18 16:20:54,037 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:54,037 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:54,037 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:54,037 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:54,038 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:54,038 INFO L87 Difference]: Start difference. First operand 379 states and 553 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:54,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:54,168 INFO L93 Difference]: Finished difference Result 767 states and 1127 transitions. [2024-11-18 16:20:54,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 16:20:54,169 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:54,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:54,172 INFO L225 Difference]: With dead ends: 767 [2024-11-18 16:20:54,172 INFO L226 Difference]: Without dead ends: 399 [2024-11-18 16:20:54,173 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:54,174 INFO L432 NwaCegarLoop]: 135 mSDtfsCounter, 241 mSDsluCounter, 216 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 251 SdHoareTripleChecker+Valid, 351 SdHoareTripleChecker+Invalid, 197 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:54,174 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [251 Valid, 351 Invalid, 197 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 168 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:20:54,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 399 states. [2024-11-18 16:20:54,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 399 to 379. [2024-11-18 16:20:54,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 379 states, 318 states have (on average 1.471698113207547) internal successors, (468), 322 states have internal predecessors, (468), 40 states have call successors, (40), 19 states have call predecessors, (40), 20 states have return successors, (42), 39 states have call predecessors, (42), 38 states have call successors, (42) [2024-11-18 16:20:54,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 379 states to 379 states and 550 transitions. [2024-11-18 16:20:54,194 INFO L78 Accepts]: Start accepts. Automaton has 379 states and 550 transitions. Word has length 69 [2024-11-18 16:20:54,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:54,194 INFO L471 AbstractCegarLoop]: Abstraction has 379 states and 550 transitions. [2024-11-18 16:20:54,194 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:54,195 INFO L276 IsEmpty]: Start isEmpty. Operand 379 states and 550 transitions. [2024-11-18 16:20:54,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:54,195 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:54,195 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:54,196 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2024-11-18 16:20:54,196 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:54,196 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:54,199 INFO L85 PathProgramCache]: Analyzing trace with hash 1767055028, now seen corresponding path program 1 times [2024-11-18 16:20:54,199 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:54,199 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340411645] [2024-11-18 16:20:54,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:54,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:54,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:54,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:54,285 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:54,285 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340411645] [2024-11-18 16:20:54,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [340411645] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:54,286 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:54,286 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:54,286 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [395016889] [2024-11-18 16:20:54,286 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:54,286 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:54,287 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:54,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:54,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:54,287 INFO L87 Difference]: Start difference. First operand 379 states and 550 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:54,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:54,595 INFO L93 Difference]: Finished difference Result 1032 states and 1499 transitions. [2024-11-18 16:20:54,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:54,595 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:54,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:54,598 INFO L225 Difference]: With dead ends: 1032 [2024-11-18 16:20:54,598 INFO L226 Difference]: Without dead ends: 664 [2024-11-18 16:20:54,599 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:54,600 INFO L432 NwaCegarLoop]: 242 mSDtfsCounter, 335 mSDsluCounter, 692 mSDsCounter, 0 mSdLazyCounter, 440 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 348 SdHoareTripleChecker+Valid, 934 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 440 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:54,600 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [348 Valid, 934 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 440 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 16:20:54,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 664 states. [2024-11-18 16:20:54,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 664 to 590. [2024-11-18 16:20:54,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 590 states, 493 states have (on average 1.4503042596348885) internal successors, (715), 501 states have internal predecessors, (715), 60 states have call successors, (60), 31 states have call predecessors, (60), 36 states have return successors, (74), 61 states have call predecessors, (74), 58 states have call successors, (74) [2024-11-18 16:20:54,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 590 states to 590 states and 849 transitions. [2024-11-18 16:20:54,632 INFO L78 Accepts]: Start accepts. Automaton has 590 states and 849 transitions. Word has length 69 [2024-11-18 16:20:54,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:54,632 INFO L471 AbstractCegarLoop]: Abstraction has 590 states and 849 transitions. [2024-11-18 16:20:54,633 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:54,633 INFO L276 IsEmpty]: Start isEmpty. Operand 590 states and 849 transitions. [2024-11-18 16:20:54,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:54,633 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:54,634 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:54,634 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2024-11-18 16:20:54,634 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:54,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:54,634 INFO L85 PathProgramCache]: Analyzing trace with hash -989572238, now seen corresponding path program 1 times [2024-11-18 16:20:54,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:54,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928992819] [2024-11-18 16:20:54,635 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:54,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:54,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:54,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:54,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:54,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928992819] [2024-11-18 16:20:54,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [928992819] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:54,707 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:54,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:54,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1108204843] [2024-11-18 16:20:54,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:54,708 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:54,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:54,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:54,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:54,709 INFO L87 Difference]: Start difference. First operand 590 states and 849 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:55,069 INFO L93 Difference]: Finished difference Result 1671 states and 2410 transitions. [2024-11-18 16:20:55,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:55,070 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:55,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:55,074 INFO L225 Difference]: With dead ends: 1671 [2024-11-18 16:20:55,074 INFO L226 Difference]: Without dead ends: 1092 [2024-11-18 16:20:55,076 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:55,076 INFO L432 NwaCegarLoop]: 240 mSDtfsCounter, 290 mSDsluCounter, 686 mSDsCounter, 0 mSdLazyCounter, 470 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 299 SdHoareTripleChecker+Valid, 926 SdHoareTripleChecker+Invalid, 496 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 470 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:55,077 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [299 Valid, 926 Invalid, 496 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 470 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2024-11-18 16:20:55,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1092 states. [2024-11-18 16:20:55,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1092 to 1035. [2024-11-18 16:20:55,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1035 states, 862 states have (on average 1.437354988399072) internal successors, (1239), 884 states have internal predecessors, (1239), 98 states have call successors, (98), 55 states have call predecessors, (98), 74 states have return successors, (160), 103 states have call predecessors, (160), 96 states have call successors, (160) [2024-11-18 16:20:55,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1035 states to 1035 states and 1497 transitions. [2024-11-18 16:20:55,134 INFO L78 Accepts]: Start accepts. Automaton has 1035 states and 1497 transitions. Word has length 69 [2024-11-18 16:20:55,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:55,135 INFO L471 AbstractCegarLoop]: Abstraction has 1035 states and 1497 transitions. [2024-11-18 16:20:55,135 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,135 INFO L276 IsEmpty]: Start isEmpty. Operand 1035 states and 1497 transitions. [2024-11-18 16:20:55,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:55,136 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:55,136 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:55,137 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2024-11-18 16:20:55,137 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:55,137 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:55,137 INFO L85 PathProgramCache]: Analyzing trace with hash 1276808948, now seen corresponding path program 1 times [2024-11-18 16:20:55,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:55,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1659542638] [2024-11-18 16:20:55,138 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:55,138 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:55,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:55,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:55,181 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:55,181 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1659542638] [2024-11-18 16:20:55,181 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1659542638] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:55,181 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:55,181 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:55,182 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [742958493] [2024-11-18 16:20:55,182 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:55,182 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:55,182 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:55,182 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:55,182 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:55,183 INFO L87 Difference]: Start difference. First operand 1035 states and 1497 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:55,237 INFO L93 Difference]: Finished difference Result 2085 states and 3051 transitions. [2024-11-18 16:20:55,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:20:55,237 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:55,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:55,243 INFO L225 Difference]: With dead ends: 2085 [2024-11-18 16:20:55,244 INFO L226 Difference]: Without dead ends: 1062 [2024-11-18 16:20:55,246 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:55,247 INFO L432 NwaCegarLoop]: 197 mSDtfsCounter, 0 mSDsluCounter, 585 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 782 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:55,247 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 782 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:20:55,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1062 states. [2024-11-18 16:20:55,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1062 to 1062. [2024-11-18 16:20:55,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1062 states, 889 states have (on average 1.4240719910011248) internal successors, (1266), 911 states have internal predecessors, (1266), 98 states have call successors, (98), 55 states have call predecessors, (98), 74 states have return successors, (160), 103 states have call predecessors, (160), 96 states have call successors, (160) [2024-11-18 16:20:55,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1062 states to 1062 states and 1524 transitions. [2024-11-18 16:20:55,345 INFO L78 Accepts]: Start accepts. Automaton has 1062 states and 1524 transitions. Word has length 69 [2024-11-18 16:20:55,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:55,346 INFO L471 AbstractCegarLoop]: Abstraction has 1062 states and 1524 transitions. [2024-11-18 16:20:55,347 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,347 INFO L276 IsEmpty]: Start isEmpty. Operand 1062 states and 1524 transitions. [2024-11-18 16:20:55,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:55,349 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:55,349 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:55,349 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2024-11-18 16:20:55,349 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:55,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:55,350 INFO L85 PathProgramCache]: Analyzing trace with hash 1524955442, now seen corresponding path program 1 times [2024-11-18 16:20:55,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:55,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866641417] [2024-11-18 16:20:55,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:55,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:55,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:55,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:55,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:55,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [866641417] [2024-11-18 16:20:55,391 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [866641417] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:55,391 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:55,392 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 16:20:55,392 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1516411813] [2024-11-18 16:20:55,392 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:55,392 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 16:20:55,392 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:55,393 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 16:20:55,393 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:20:55,393 INFO L87 Difference]: Start difference. First operand 1062 states and 1524 transitions. Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:55,594 INFO L93 Difference]: Finished difference Result 3128 states and 4514 transitions. [2024-11-18 16:20:55,594 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 16:20:55,595 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:55,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:55,604 INFO L225 Difference]: With dead ends: 3128 [2024-11-18 16:20:55,604 INFO L226 Difference]: Without dead ends: 2078 [2024-11-18 16:20:55,608 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:20:55,608 INFO L432 NwaCegarLoop]: 361 mSDtfsCounter, 345 mSDsluCounter, 300 mSDsCounter, 0 mSdLazyCounter, 79 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 345 SdHoareTripleChecker+Valid, 661 SdHoareTripleChecker+Invalid, 84 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 79 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:55,609 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [345 Valid, 661 Invalid, 84 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 79 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:20:55,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2078 states. [2024-11-18 16:20:55,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2078 to 2056. [2024-11-18 16:20:55,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2056 states, 1722 states have (on average 1.4152148664343787) internal successors, (2437), 1764 states have internal predecessors, (2437), 185 states have call successors, (185), 109 states have call predecessors, (185), 148 states have return successors, (304), 190 states have call predecessors, (304), 183 states have call successors, (304) [2024-11-18 16:20:55,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2056 states to 2056 states and 2926 transitions. [2024-11-18 16:20:55,761 INFO L78 Accepts]: Start accepts. Automaton has 2056 states and 2926 transitions. Word has length 69 [2024-11-18 16:20:55,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:55,762 INFO L471 AbstractCegarLoop]: Abstraction has 2056 states and 2926 transitions. [2024-11-18 16:20:55,762 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,762 INFO L276 IsEmpty]: Start isEmpty. Operand 2056 states and 2926 transitions. [2024-11-18 16:20:55,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:55,764 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:55,764 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:55,764 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2024-11-18 16:20:55,765 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:55,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:55,765 INFO L85 PathProgramCache]: Analyzing trace with hash 1924946641, now seen corresponding path program 1 times [2024-11-18 16:20:55,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:55,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456138532] [2024-11-18 16:20:55,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:55,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:55,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:55,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:55,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:55,810 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [456138532] [2024-11-18 16:20:55,810 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [456138532] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:55,810 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:55,811 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:55,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952007093] [2024-11-18 16:20:55,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:55,811 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:55,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:55,812 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:55,812 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:55,812 INFO L87 Difference]: Start difference. First operand 2056 states and 2926 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:55,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:55,913 INFO L93 Difference]: Finished difference Result 4127 states and 5942 transitions. [2024-11-18 16:20:55,914 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:20:55,914 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:55,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:55,924 INFO L225 Difference]: With dead ends: 4127 [2024-11-18 16:20:55,925 INFO L226 Difference]: Without dead ends: 2083 [2024-11-18 16:20:55,930 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:55,931 INFO L432 NwaCegarLoop]: 197 mSDtfsCounter, 0 mSDsluCounter, 585 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 782 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:55,931 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 782 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:20:55,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2083 states. [2024-11-18 16:20:56,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2083 to 2083. [2024-11-18 16:20:56,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2083 states, 1749 states have (on average 1.403659233847913) internal successors, (2455), 1791 states have internal predecessors, (2455), 185 states have call successors, (185), 109 states have call predecessors, (185), 148 states have return successors, (304), 190 states have call predecessors, (304), 183 states have call successors, (304) [2024-11-18 16:20:56,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2083 states to 2083 states and 2944 transitions. [2024-11-18 16:20:56,068 INFO L78 Accepts]: Start accepts. Automaton has 2083 states and 2944 transitions. Word has length 69 [2024-11-18 16:20:56,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:56,068 INFO L471 AbstractCegarLoop]: Abstraction has 2083 states and 2944 transitions. [2024-11-18 16:20:56,068 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:56,068 INFO L276 IsEmpty]: Start isEmpty. Operand 2083 states and 2944 transitions. [2024-11-18 16:20:56,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:56,070 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:56,070 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:56,070 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2024-11-18 16:20:56,071 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:56,071 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:56,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1530579855, now seen corresponding path program 1 times [2024-11-18 16:20:56,071 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:56,071 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397662210] [2024-11-18 16:20:56,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:56,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:56,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:56,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:56,113 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:56,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397662210] [2024-11-18 16:20:56,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [397662210] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:56,114 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:56,114 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:20:56,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914200524] [2024-11-18 16:20:56,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:56,114 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:20:56,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:56,115 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:20:56,115 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:56,115 INFO L87 Difference]: Start difference. First operand 2083 states and 2944 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:56,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:56,233 INFO L93 Difference]: Finished difference Result 4208 states and 6014 transitions. [2024-11-18 16:20:56,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:20:56,234 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:56,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:56,242 INFO L225 Difference]: With dead ends: 4208 [2024-11-18 16:20:56,242 INFO L226 Difference]: Without dead ends: 2137 [2024-11-18 16:20:56,246 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:56,247 INFO L432 NwaCegarLoop]: 197 mSDtfsCounter, 0 mSDsluCounter, 585 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 782 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:56,247 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 782 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:20:56,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2137 states. [2024-11-18 16:20:56,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2137 to 2137. [2024-11-18 16:20:56,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2137 states, 1803 states have (on average 1.3915696062118692) internal successors, (2509), 1845 states have internal predecessors, (2509), 185 states have call successors, (185), 109 states have call predecessors, (185), 148 states have return successors, (304), 190 states have call predecessors, (304), 183 states have call successors, (304) [2024-11-18 16:20:56,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2137 states to 2137 states and 2998 transitions. [2024-11-18 16:20:56,346 INFO L78 Accepts]: Start accepts. Automaton has 2137 states and 2998 transitions. Word has length 69 [2024-11-18 16:20:56,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:56,347 INFO L471 AbstractCegarLoop]: Abstraction has 2137 states and 2998 transitions. [2024-11-18 16:20:56,348 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:56,348 INFO L276 IsEmpty]: Start isEmpty. Operand 2137 states and 2998 transitions. [2024-11-18 16:20:56,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:56,349 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:56,349 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:56,350 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2024-11-18 16:20:56,351 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:56,351 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:56,351 INFO L85 PathProgramCache]: Analyzing trace with hash 1553212109, now seen corresponding path program 1 times [2024-11-18 16:20:56,351 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:56,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354474628] [2024-11-18 16:20:56,351 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:56,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:56,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:56,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:56,446 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:56,446 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354474628] [2024-11-18 16:20:56,446 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1354474628] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:56,446 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:56,446 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:56,446 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568350225] [2024-11-18 16:20:56,446 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:56,447 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:56,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:56,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:56,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:56,447 INFO L87 Difference]: Start difference. First operand 2137 states and 2998 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:56,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:56,802 INFO L93 Difference]: Finished difference Result 2741 states and 3854 transitions. [2024-11-18 16:20:56,802 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:56,802 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:56,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:56,810 INFO L225 Difference]: With dead ends: 2741 [2024-11-18 16:20:56,810 INFO L226 Difference]: Without dead ends: 1503 [2024-11-18 16:20:56,813 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:56,814 INFO L432 NwaCegarLoop]: 159 mSDtfsCounter, 301 mSDsluCounter, 513 mSDsCounter, 0 mSdLazyCounter, 347 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 310 SdHoareTripleChecker+Valid, 672 SdHoareTripleChecker+Invalid, 383 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 347 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:56,814 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [310 Valid, 672 Invalid, 383 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 347 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 16:20:56,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1503 states. [2024-11-18 16:20:56,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1503 to 1409. [2024-11-18 16:20:56,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1409 states, 1196 states have (on average 1.3854515050167224) internal successors, (1657), 1210 states have internal predecessors, (1657), 128 states have call successors, (128), 73 states have call predecessors, (128), 84 states have return successors, (155), 129 states have call predecessors, (155), 126 states have call successors, (155) [2024-11-18 16:20:56,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1409 states to 1409 states and 1940 transitions. [2024-11-18 16:20:56,920 INFO L78 Accepts]: Start accepts. Automaton has 1409 states and 1940 transitions. Word has length 69 [2024-11-18 16:20:56,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:56,921 INFO L471 AbstractCegarLoop]: Abstraction has 1409 states and 1940 transitions. [2024-11-18 16:20:56,921 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:56,921 INFO L276 IsEmpty]: Start isEmpty. Operand 1409 states and 1940 transitions. [2024-11-18 16:20:56,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:56,922 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:56,922 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:56,922 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2024-11-18 16:20:56,922 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:56,923 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:56,923 INFO L85 PathProgramCache]: Analyzing trace with hash 1693760719, now seen corresponding path program 1 times [2024-11-18 16:20:56,923 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:56,923 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369653652] [2024-11-18 16:20:56,923 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:56,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:56,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:57,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:57,004 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:57,004 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1369653652] [2024-11-18 16:20:57,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1369653652] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:57,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:57,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:57,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1820140401] [2024-11-18 16:20:57,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:57,005 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:57,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:57,006 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:57,006 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:57,006 INFO L87 Difference]: Start difference. First operand 1409 states and 1940 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:57,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:57,373 INFO L93 Difference]: Finished difference Result 3855 states and 5346 transitions. [2024-11-18 16:20:57,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:57,374 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:57,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:57,383 INFO L225 Difference]: With dead ends: 3855 [2024-11-18 16:20:57,383 INFO L226 Difference]: Without dead ends: 2459 [2024-11-18 16:20:57,386 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:57,387 INFO L432 NwaCegarLoop]: 160 mSDtfsCounter, 293 mSDsluCounter, 515 mSDsCounter, 0 mSdLazyCounter, 354 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 302 SdHoareTripleChecker+Valid, 675 SdHoareTripleChecker+Invalid, 391 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 354 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:57,387 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [302 Valid, 675 Invalid, 391 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 354 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 16:20:57,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2459 states. [2024-11-18 16:20:57,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2459 to 2337. [2024-11-18 16:20:57,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2337 states, 1978 states have (on average 1.3665318503538928) internal successors, (2703), 2010 states have internal predecessors, (2703), 208 states have call successors, (208), 121 states have call predecessors, (208), 150 states have return successors, (279), 213 states have call predecessors, (279), 206 states have call successors, (279) [2024-11-18 16:20:57,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2337 states to 2337 states and 3190 transitions. [2024-11-18 16:20:57,499 INFO L78 Accepts]: Start accepts. Automaton has 2337 states and 3190 transitions. Word has length 69 [2024-11-18 16:20:57,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:57,500 INFO L471 AbstractCegarLoop]: Abstraction has 2337 states and 3190 transitions. [2024-11-18 16:20:57,500 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:57,500 INFO L276 IsEmpty]: Start isEmpty. Operand 2337 states and 3190 transitions. [2024-11-18 16:20:57,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:57,501 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:57,501 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:57,502 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2024-11-18 16:20:57,502 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:57,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:57,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1559747213, now seen corresponding path program 1 times [2024-11-18 16:20:57,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:57,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540646745] [2024-11-18 16:20:57,502 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:57,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:57,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:57,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:57,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:57,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540646745] [2024-11-18 16:20:57,575 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [540646745] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:57,575 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:57,575 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:57,575 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204396017] [2024-11-18 16:20:57,575 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:57,575 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:57,575 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:57,576 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:57,576 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:57,576 INFO L87 Difference]: Start difference. First operand 2337 states and 3190 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:57,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:57,984 INFO L93 Difference]: Finished difference Result 4051 states and 5576 transitions. [2024-11-18 16:20:57,984 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:57,985 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:57,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:57,995 INFO L225 Difference]: With dead ends: 4051 [2024-11-18 16:20:57,995 INFO L226 Difference]: Without dead ends: 2567 [2024-11-18 16:20:57,999 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:58,000 INFO L432 NwaCegarLoop]: 154 mSDtfsCounter, 298 mSDsluCounter, 491 mSDsCounter, 0 mSdLazyCounter, 407 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 306 SdHoareTripleChecker+Valid, 645 SdHoareTripleChecker+Invalid, 442 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 407 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:58,000 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [306 Valid, 645 Invalid, 442 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 407 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 16:20:58,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2567 states. [2024-11-18 16:20:58,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2567 to 2305. [2024-11-18 16:20:58,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2305 states, 1958 states have (on average 1.3621041879468845) internal successors, (2667), 1978 states have internal predecessors, (2667), 208 states have call successors, (208), 121 states have call predecessors, (208), 138 states have return successors, (243), 209 states have call predecessors, (243), 206 states have call successors, (243) [2024-11-18 16:20:58,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2305 states to 2305 states and 3118 transitions. [2024-11-18 16:20:58,110 INFO L78 Accepts]: Start accepts. Automaton has 2305 states and 3118 transitions. Word has length 69 [2024-11-18 16:20:58,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:58,110 INFO L471 AbstractCegarLoop]: Abstraction has 2305 states and 3118 transitions. [2024-11-18 16:20:58,110 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:58,111 INFO L276 IsEmpty]: Start isEmpty. Operand 2305 states and 3118 transitions. [2024-11-18 16:20:58,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:58,111 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:58,111 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:58,112 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2024-11-18 16:20:58,112 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:58,112 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:58,112 INFO L85 PathProgramCache]: Analyzing trace with hash 1778601931, now seen corresponding path program 1 times [2024-11-18 16:20:58,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:58,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [96947198] [2024-11-18 16:20:58,112 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:58,112 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:58,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:58,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:58,198 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:58,199 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [96947198] [2024-11-18 16:20:58,199 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [96947198] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:58,199 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:58,199 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:20:58,199 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1506931750] [2024-11-18 16:20:58,199 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:58,199 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:20:58,199 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:58,200 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:20:58,200 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:20:58,200 INFO L87 Difference]: Start difference. First operand 2305 states and 3118 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:58,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:58,577 INFO L93 Difference]: Finished difference Result 3401 states and 4607 transitions. [2024-11-18 16:20:58,577 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-11-18 16:20:58,577 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2024-11-18 16:20:58,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:58,585 INFO L225 Difference]: With dead ends: 3401 [2024-11-18 16:20:58,586 INFO L226 Difference]: Without dead ends: 1987 [2024-11-18 16:20:58,589 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2024-11-18 16:20:58,590 INFO L432 NwaCegarLoop]: 152 mSDtfsCounter, 287 mSDsluCounter, 485 mSDsCounter, 0 mSdLazyCounter, 382 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 295 SdHoareTripleChecker+Valid, 637 SdHoareTripleChecker+Invalid, 419 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 382 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:58,590 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [295 Valid, 637 Invalid, 419 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 382 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2024-11-18 16:20:58,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1987 states. [2024-11-18 16:20:58,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1987 to 1865. [2024-11-18 16:20:58,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1865 states, 1590 states have (on average 1.3622641509433961) internal successors, (2166), 1600 states have internal predecessors, (2166), 170 states have call successors, (170), 97 states have call predecessors, (170), 104 states have return successors, (183), 169 states have call predecessors, (183), 168 states have call successors, (183) [2024-11-18 16:20:58,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1865 states to 1865 states and 2519 transitions. [2024-11-18 16:20:58,675 INFO L78 Accepts]: Start accepts. Automaton has 1865 states and 2519 transitions. Word has length 69 [2024-11-18 16:20:58,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:58,676 INFO L471 AbstractCegarLoop]: Abstraction has 1865 states and 2519 transitions. [2024-11-18 16:20:58,676 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 6 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 3 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2024-11-18 16:20:58,676 INFO L276 IsEmpty]: Start isEmpty. Operand 1865 states and 2519 transitions. [2024-11-18 16:20:58,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2024-11-18 16:20:58,677 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:58,677 INFO L215 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:58,677 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2024-11-18 16:20:58,677 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:58,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:58,678 INFO L85 PathProgramCache]: Analyzing trace with hash -2093663539, now seen corresponding path program 1 times [2024-11-18 16:20:58,678 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:58,678 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1792165230] [2024-11-18 16:20:58,678 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:58,678 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:58,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:58,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-18 16:20:58,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:58,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1792165230] [2024-11-18 16:20:58,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1792165230] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:58,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:58,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 16:20:58,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [206219969] [2024-11-18 16:20:58,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:58,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:20:58,714 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:58,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:20:58,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:20:58,715 INFO L87 Difference]: Start difference. First operand 1865 states and 2519 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 16:20:58,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:58,880 INFO L93 Difference]: Finished difference Result 4359 states and 5921 transitions. [2024-11-18 16:20:58,881 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:20:58,881 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 69 [2024-11-18 16:20:58,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:58,894 INFO L225 Difference]: With dead ends: 4359 [2024-11-18 16:20:58,894 INFO L226 Difference]: Without dead ends: 2507 [2024-11-18 16:20:58,900 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:20:58,901 INFO L432 NwaCegarLoop]: 200 mSDtfsCounter, 155 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 155 SdHoareTripleChecker+Valid, 373 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:58,901 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [155 Valid, 373 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:20:58,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2507 states. [2024-11-18 16:20:59,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2507 to 2497. [2024-11-18 16:20:59,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2497 states, 2128 states have (on average 1.3468045112781954) internal successors, (2866), 2150 states have internal predecessors, (2866), 226 states have call successors, (226), 133 states have call predecessors, (226), 142 states have return successors, (241), 215 states have call predecessors, (241), 224 states have call successors, (241) [2024-11-18 16:20:59,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2497 states to 2497 states and 3333 transitions. [2024-11-18 16:20:59,101 INFO L78 Accepts]: Start accepts. Automaton has 2497 states and 3333 transitions. Word has length 69 [2024-11-18 16:20:59,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:59,102 INFO L471 AbstractCegarLoop]: Abstraction has 2497 states and 3333 transitions. [2024-11-18 16:20:59,102 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2024-11-18 16:20:59,103 INFO L276 IsEmpty]: Start isEmpty. Operand 2497 states and 3333 transitions. [2024-11-18 16:20:59,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-11-18 16:20:59,105 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:59,105 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:59,105 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2024-11-18 16:20:59,106 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:59,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:59,107 INFO L85 PathProgramCache]: Analyzing trace with hash 1517981594, now seen corresponding path program 1 times [2024-11-18 16:20:59,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:59,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958358327] [2024-11-18 16:20:59,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:59,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:59,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:59,197 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-18 16:20:59,197 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:59,197 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958358327] [2024-11-18 16:20:59,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958358327] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:59,197 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:59,197 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 16:20:59,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [519063657] [2024-11-18 16:20:59,198 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:59,198 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 16:20:59,198 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:59,199 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 16:20:59,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:20:59,199 INFO L87 Difference]: Start difference. First operand 2497 states and 3333 transitions. Second operand has 4 states, 4 states have (on average 18.0) internal successors, (72), 4 states have internal predecessors, (72), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-18 16:20:59,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:20:59,597 INFO L93 Difference]: Finished difference Result 7568 states and 10193 transitions. [2024-11-18 16:20:59,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:20:59,601 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.0) internal successors, (72), 4 states have internal predecessors, (72), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 112 [2024-11-18 16:20:59,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:20:59,633 INFO L225 Difference]: With dead ends: 7568 [2024-11-18 16:20:59,637 INFO L226 Difference]: Without dead ends: 5086 [2024-11-18 16:20:59,643 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:20:59,644 INFO L432 NwaCegarLoop]: 194 mSDtfsCounter, 249 mSDsluCounter, 263 mSDsCounter, 0 mSdLazyCounter, 141 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 255 SdHoareTripleChecker+Valid, 457 SdHoareTripleChecker+Invalid, 180 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:20:59,645 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [255 Valid, 457 Invalid, 180 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 141 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:20:59,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5086 states. [2024-11-18 16:20:59,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5086 to 5058. [2024-11-18 16:20:59,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5058 states, 4300 states have (on average 1.3306976744186048) internal successors, (5722), 4359 states have internal predecessors, (5722), 441 states have call successors, (441), 265 states have call predecessors, (441), 316 states have return successors, (595), 437 states have call predecessors, (595), 439 states have call successors, (595) [2024-11-18 16:20:59,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5058 states to 5058 states and 6758 transitions. [2024-11-18 16:20:59,881 INFO L78 Accepts]: Start accepts. Automaton has 5058 states and 6758 transitions. Word has length 112 [2024-11-18 16:20:59,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:20:59,881 INFO L471 AbstractCegarLoop]: Abstraction has 5058 states and 6758 transitions. [2024-11-18 16:20:59,882 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.0) internal successors, (72), 4 states have internal predecessors, (72), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-18 16:20:59,882 INFO L276 IsEmpty]: Start isEmpty. Operand 5058 states and 6758 transitions. [2024-11-18 16:20:59,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2024-11-18 16:20:59,886 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:20:59,887 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:20:59,887 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2024-11-18 16:20:59,887 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:20:59,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:20:59,887 INFO L85 PathProgramCache]: Analyzing trace with hash -515412452, now seen corresponding path program 1 times [2024-11-18 16:20:59,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:20:59,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970005133] [2024-11-18 16:20:59,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:20:59,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:20:59,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:20:59,918 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-11-18 16:20:59,919 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:20:59,919 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [970005133] [2024-11-18 16:20:59,919 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [970005133] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:20:59,919 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:20:59,919 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 16:20:59,919 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1092575867] [2024-11-18 16:20:59,919 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:20:59,920 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:20:59,920 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:20:59,920 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:20:59,921 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:20:59,921 INFO L87 Difference]: Start difference. First operand 5058 states and 6758 transitions. Second operand has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:21:00,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:00,125 INFO L93 Difference]: Finished difference Result 9188 states and 12248 transitions. [2024-11-18 16:21:00,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:00,126 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 112 [2024-11-18 16:21:00,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:00,140 INFO L225 Difference]: With dead ends: 9188 [2024-11-18 16:21:00,141 INFO L226 Difference]: Without dead ends: 4145 [2024-11-18 16:21:00,151 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:00,152 INFO L432 NwaCegarLoop]: 198 mSDtfsCounter, 192 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 199 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:00,152 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 199 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:00,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4145 states. [2024-11-18 16:21:00,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4145 to 4145. [2024-11-18 16:21:00,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4145 states, 3532 states have (on average 1.3270101925254814) internal successors, (4687), 3582 states have internal predecessors, (4687), 352 states have call successors, (352), 213 states have call predecessors, (352), 260 states have return successors, (475), 351 states have call predecessors, (475), 350 states have call successors, (475) [2024-11-18 16:21:00,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4145 states to 4145 states and 5514 transitions. [2024-11-18 16:21:00,339 INFO L78 Accepts]: Start accepts. Automaton has 4145 states and 5514 transitions. Word has length 112 [2024-11-18 16:21:00,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:00,340 INFO L471 AbstractCegarLoop]: Abstraction has 4145 states and 5514 transitions. [2024-11-18 16:21:00,340 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.333333333333332) internal successors, (67), 3 states have internal predecessors, (67), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:21:00,340 INFO L276 IsEmpty]: Start isEmpty. Operand 4145 states and 5514 transitions. [2024-11-18 16:21:00,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-11-18 16:21:00,343 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:00,343 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:00,343 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2024-11-18 16:21:00,343 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:00,344 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:00,344 INFO L85 PathProgramCache]: Analyzing trace with hash -1689860065, now seen corresponding path program 1 times [2024-11-18 16:21:00,344 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:00,344 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294813171] [2024-11-18 16:21:00,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:00,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:00,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:00,447 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2024-11-18 16:21:00,448 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:00,448 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294813171] [2024-11-18 16:21:00,448 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294813171] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:00,448 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:00,448 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 16:21:00,448 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1448812461] [2024-11-18 16:21:00,448 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:00,449 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 16:21:00,449 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:00,449 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 16:21:00,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:00,449 INFO L87 Difference]: Start difference. First operand 4145 states and 5514 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-18 16:21:01,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:01,004 INFO L93 Difference]: Finished difference Result 12423 states and 16550 transitions. [2024-11-18 16:21:01,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:21:01,005 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 114 [2024-11-18 16:21:01,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:01,033 INFO L225 Difference]: With dead ends: 12423 [2024-11-18 16:21:01,033 INFO L226 Difference]: Without dead ends: 8293 [2024-11-18 16:21:01,043 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:21:01,044 INFO L432 NwaCegarLoop]: 183 mSDtfsCounter, 237 mSDsluCounter, 242 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 243 SdHoareTripleChecker+Valid, 425 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:01,044 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [243 Valid, 425 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:21:01,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8293 states. [2024-11-18 16:21:01,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8293 to 8169. [2024-11-18 16:21:01,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8169 states, 6893 states have (on average 1.3145219788190918) internal successors, (9061), 7050 states have internal predecessors, (9061), 661 states have call successors, (661), 417 states have call predecessors, (661), 614 states have return successors, (1135), 705 states have call predecessors, (1135), 659 states have call successors, (1135) [2024-11-18 16:21:01,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8169 states to 8169 states and 10857 transitions. [2024-11-18 16:21:01,788 INFO L78 Accepts]: Start accepts. Automaton has 8169 states and 10857 transitions. Word has length 114 [2024-11-18 16:21:01,788 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:01,788 INFO L471 AbstractCegarLoop]: Abstraction has 8169 states and 10857 transitions. [2024-11-18 16:21:01,789 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2024-11-18 16:21:01,789 INFO L276 IsEmpty]: Start isEmpty. Operand 8169 states and 10857 transitions. [2024-11-18 16:21:01,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2024-11-18 16:21:01,793 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:01,794 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:01,794 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2024-11-18 16:21:01,794 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:01,794 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:01,794 INFO L85 PathProgramCache]: Analyzing trace with hash -300566051, now seen corresponding path program 1 times [2024-11-18 16:21:01,794 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:01,795 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457054037] [2024-11-18 16:21:01,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:01,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:01,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:01,816 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2024-11-18 16:21:01,816 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:01,817 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1457054037] [2024-11-18 16:21:01,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1457054037] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:01,817 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:01,817 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 16:21:01,817 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806034205] [2024-11-18 16:21:01,817 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:01,817 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:01,817 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:01,818 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:01,818 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:01,818 INFO L87 Difference]: Start difference. First operand 8169 states and 10857 transitions. Second operand has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:21:02,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:02,143 INFO L93 Difference]: Finished difference Result 16319 states and 21680 transitions. [2024-11-18 16:21:02,144 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:02,144 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 114 [2024-11-18 16:21:02,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:02,175 INFO L225 Difference]: With dead ends: 16319 [2024-11-18 16:21:02,175 INFO L226 Difference]: Without dead ends: 8163 [2024-11-18 16:21:02,195 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:02,196 INFO L432 NwaCegarLoop]: 197 mSDtfsCounter, 190 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 198 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:02,197 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [190 Valid, 198 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:02,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8163 states. [2024-11-18 16:21:02,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8163 to 8163. [2024-11-18 16:21:02,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8163 states, 6892 states have (on average 1.3144225188624492) internal successors, (9059), 7048 states have internal predecessors, (9059), 656 states have call successors, (656), 417 states have call predecessors, (656), 614 states have return successors, (1127), 699 states have call predecessors, (1127), 654 states have call successors, (1127) [2024-11-18 16:21:02,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8163 states to 8163 states and 10842 transitions. [2024-11-18 16:21:02,649 INFO L78 Accepts]: Start accepts. Automaton has 8163 states and 10842 transitions. Word has length 114 [2024-11-18 16:21:02,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:02,649 INFO L471 AbstractCegarLoop]: Abstraction has 8163 states and 10842 transitions. [2024-11-18 16:21:02,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 23.0) internal successors, (69), 3 states have internal predecessors, (69), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2024-11-18 16:21:02,650 INFO L276 IsEmpty]: Start isEmpty. Operand 8163 states and 10842 transitions. [2024-11-18 16:21:02,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2024-11-18 16:21:02,654 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:02,654 INFO L215 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:02,654 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2024-11-18 16:21:02,654 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:02,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:02,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1793795290, now seen corresponding path program 1 times [2024-11-18 16:21:02,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:02,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330780966] [2024-11-18 16:21:02,655 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:02,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:02,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:02,718 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2024-11-18 16:21:02,718 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:02,718 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330780966] [2024-11-18 16:21:02,718 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [330780966] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:02,718 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:02,718 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2024-11-18 16:21:02,719 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570670462] [2024-11-18 16:21:02,719 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:02,719 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2024-11-18 16:21:02,719 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:02,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-18 16:21:02,720 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 16:21:02,720 INFO L87 Difference]: Start difference. First operand 8163 states and 10842 transitions. Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 6 states have internal predecessors, (79), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 16:21:03,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:03,955 INFO L93 Difference]: Finished difference Result 23143 states and 31336 transitions. [2024-11-18 16:21:03,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2024-11-18 16:21:03,956 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 6 states have internal predecessors, (79), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 116 [2024-11-18 16:21:03,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:04,052 INFO L225 Difference]: With dead ends: 23143 [2024-11-18 16:21:04,052 INFO L226 Difference]: Without dead ends: 12129 [2024-11-18 16:21:04,113 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=201, Unknown=0, NotChecked=0, Total=272 [2024-11-18 16:21:04,114 INFO L432 NwaCegarLoop]: 235 mSDtfsCounter, 1245 mSDsluCounter, 821 mSDsCounter, 0 mSdLazyCounter, 601 mSolverCounterSat, 261 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1257 SdHoareTripleChecker+Valid, 1056 SdHoareTripleChecker+Invalid, 862 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 261 IncrementalHoareTripleChecker+Valid, 601 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:04,114 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [1257 Valid, 1056 Invalid, 862 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [261 Valid, 601 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2024-11-18 16:21:04,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12129 states. [2024-11-18 16:21:05,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12129 to 11927. [2024-11-18 16:21:05,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11927 states, 10074 states have (on average 1.2918403811792734) internal successors, (13014), 10292 states have internal predecessors, (13014), 938 states have call successors, (938), 617 states have call predecessors, (938), 914 states have return successors, (1767), 1019 states have call predecessors, (1767), 936 states have call successors, (1767) [2024-11-18 16:21:05,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11927 states to 11927 states and 15719 transitions. [2024-11-18 16:21:05,290 INFO L78 Accepts]: Start accepts. Automaton has 11927 states and 15719 transitions. Word has length 116 [2024-11-18 16:21:05,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:05,290 INFO L471 AbstractCegarLoop]: Abstraction has 11927 states and 15719 transitions. [2024-11-18 16:21:05,291 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 6 states have internal predecessors, (79), 4 states have call successors, (9), 3 states have call predecessors, (9), 3 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2024-11-18 16:21:05,291 INFO L276 IsEmpty]: Start isEmpty. Operand 11927 states and 15719 transitions. [2024-11-18 16:21:05,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2024-11-18 16:21:05,302 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:05,302 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:05,303 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2024-11-18 16:21:05,303 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:05,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:05,304 INFO L85 PathProgramCache]: Analyzing trace with hash 1100137730, now seen corresponding path program 1 times [2024-11-18 16:21:05,304 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:05,304 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410011092] [2024-11-18 16:21:05,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:05,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:05,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:05,342 INFO L134 CoverageAnalysis]: Checked inductivity of 73 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2024-11-18 16:21:05,343 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:05,343 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410011092] [2024-11-18 16:21:05,343 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1410011092] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:05,343 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:05,343 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 16:21:05,343 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930220304] [2024-11-18 16:21:05,343 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:05,344 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:05,344 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:05,344 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:05,344 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:05,344 INFO L87 Difference]: Start difference. First operand 11927 states and 15719 transitions. Second operand has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-18 16:21:06,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:06,306 INFO L93 Difference]: Finished difference Result 29217 states and 38605 transitions. [2024-11-18 16:21:06,307 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:06,307 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 147 [2024-11-18 16:21:06,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:06,384 INFO L225 Difference]: With dead ends: 29217 [2024-11-18 16:21:06,384 INFO L226 Difference]: Without dead ends: 17303 [2024-11-18 16:21:06,417 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:06,418 INFO L432 NwaCegarLoop]: 195 mSDtfsCounter, 149 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 149 SdHoareTripleChecker+Valid, 368 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:06,418 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [149 Valid, 368 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:06,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17303 states. [2024-11-18 16:21:07,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17303 to 17203. [2024-11-18 16:21:07,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17203 states, 14561 states have (on average 1.2812306847057207) internal successors, (18656), 14843 states have internal predecessors, (18656), 1367 states have call successors, (1367), 913 states have call predecessors, (1367), 1274 states have return successors, (2378), 1448 states have call predecessors, (2378), 1365 states have call successors, (2378) [2024-11-18 16:21:07,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17203 states to 17203 states and 22401 transitions. [2024-11-18 16:21:07,662 INFO L78 Accepts]: Start accepts. Automaton has 17203 states and 22401 transitions. Word has length 147 [2024-11-18 16:21:07,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:07,662 INFO L471 AbstractCegarLoop]: Abstraction has 17203 states and 22401 transitions. [2024-11-18 16:21:07,662 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.666666666666668) internal successors, (86), 3 states have internal predecessors, (86), 3 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2024-11-18 16:21:07,663 INFO L276 IsEmpty]: Start isEmpty. Operand 17203 states and 22401 transitions. [2024-11-18 16:21:07,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-11-18 16:21:07,681 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:07,682 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:07,682 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2024-11-18 16:21:07,682 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:07,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:07,682 INFO L85 PathProgramCache]: Analyzing trace with hash -629341951, now seen corresponding path program 1 times [2024-11-18 16:21:07,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:07,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094694898] [2024-11-18 16:21:07,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:07,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:07,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:07,759 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 27 proven. 3 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2024-11-18 16:21:07,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:07,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094694898] [2024-11-18 16:21:07,760 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1094694898] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:07,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1105170611] [2024-11-18 16:21:07,760 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:07,760 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:07,760 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:07,765 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:07,768 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-18 16:21:07,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:07,877 INFO L255 TraceCheckSpWp]: Trace formula consists of 541 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-18 16:21:07,886 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:07,950 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 78 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-11-18 16:21:07,950 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:07,950 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1105170611] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:07,950 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:07,951 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2024-11-18 16:21:07,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1445531027] [2024-11-18 16:21:07,951 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:07,951 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:07,951 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:07,951 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:07,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-18 16:21:07,952 INFO L87 Difference]: Start difference. First operand 17203 states and 22401 transitions. Second operand has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-18 16:21:08,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:08,917 INFO L93 Difference]: Finished difference Result 35940 states and 47410 transitions. [2024-11-18 16:21:08,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:08,918 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 168 [2024-11-18 16:21:08,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:09,013 INFO L225 Difference]: With dead ends: 35940 [2024-11-18 16:21:09,013 INFO L226 Difference]: Without dead ends: 19271 [2024-11-18 16:21:09,050 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 169 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2024-11-18 16:21:09,051 INFO L432 NwaCegarLoop]: 199 mSDtfsCounter, 151 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 233 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:09,052 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 233 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:09,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19271 states. [2024-11-18 16:21:10,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19271 to 17923. [2024-11-18 16:21:10,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17923 states, 15255 states have (on average 1.2501474926253688) internal successors, (19071), 15505 states have internal predecessors, (19071), 1391 states have call successors, (1391), 985 states have call predecessors, (1391), 1276 states have return successors, (2020), 1434 states have call predecessors, (2020), 1389 states have call successors, (2020) [2024-11-18 16:21:10,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17923 states to 17923 states and 22482 transitions. [2024-11-18 16:21:10,322 INFO L78 Accepts]: Start accepts. Automaton has 17923 states and 22482 transitions. Word has length 168 [2024-11-18 16:21:10,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:10,322 INFO L471 AbstractCegarLoop]: Abstraction has 17923 states and 22482 transitions. [2024-11-18 16:21:10,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-18 16:21:10,323 INFO L276 IsEmpty]: Start isEmpty. Operand 17923 states and 22482 transitions. [2024-11-18 16:21:10,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-11-18 16:21:10,340 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:10,341 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:10,360 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2024-11-18 16:21:10,541 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2024-11-18 16:21:10,542 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:10,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:10,542 INFO L85 PathProgramCache]: Analyzing trace with hash 1864691460, now seen corresponding path program 1 times [2024-11-18 16:21:10,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:10,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137880454] [2024-11-18 16:21:10,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:10,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:10,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:10,655 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 27 proven. 3 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2024-11-18 16:21:10,655 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:10,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137880454] [2024-11-18 16:21:10,655 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2137880454] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:10,655 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [962807458] [2024-11-18 16:21:10,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:10,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:10,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:10,657 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:10,665 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-18 16:21:10,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:10,776 INFO L255 TraceCheckSpWp]: Trace formula consists of 537 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-18 16:21:10,783 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:10,811 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2024-11-18 16:21:10,813 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:10,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [962807458] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:10,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:10,814 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2024-11-18 16:21:10,814 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948633564] [2024-11-18 16:21:10,814 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:10,815 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:10,815 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:10,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:10,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-18 16:21:10,815 INFO L87 Difference]: Start difference. First operand 17923 states and 22482 transitions. Second operand has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-18 16:21:11,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:11,915 INFO L93 Difference]: Finished difference Result 30101 states and 37783 transitions. [2024-11-18 16:21:11,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:11,915 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) Word has length 168 [2024-11-18 16:21:11,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:11,981 INFO L225 Difference]: With dead ends: 30101 [2024-11-18 16:21:11,981 INFO L226 Difference]: Without dead ends: 16429 [2024-11-18 16:21:12,007 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 169 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2024-11-18 16:21:12,008 INFO L432 NwaCegarLoop]: 342 mSDtfsCounter, 153 mSDsluCounter, 184 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 526 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:12,008 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 526 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:12,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16429 states. [2024-11-18 16:21:13,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16429 to 16405. [2024-11-18 16:21:13,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16405 states, 14056 states have (on average 1.247723392145703) internal successors, (17538), 14294 states have internal predecessors, (17538), 1192 states have call successors, (1192), 881 states have call predecessors, (1192), 1156 states have return successors, (1725), 1231 states have call predecessors, (1725), 1190 states have call successors, (1725) [2024-11-18 16:21:13,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16405 states to 16405 states and 20455 transitions. [2024-11-18 16:21:13,182 INFO L78 Accepts]: Start accepts. Automaton has 16405 states and 20455 transitions. Word has length 168 [2024-11-18 16:21:13,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:13,183 INFO L471 AbstractCegarLoop]: Abstraction has 16405 states and 20455 transitions. [2024-11-18 16:21:13,183 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.666666666666664) internal successors, (122), 3 states have internal predecessors, (122), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2024-11-18 16:21:13,183 INFO L276 IsEmpty]: Start isEmpty. Operand 16405 states and 20455 transitions. [2024-11-18 16:21:13,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2024-11-18 16:21:13,193 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:13,193 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:13,208 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-11-18 16:21:13,394 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2024-11-18 16:21:13,395 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:13,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:13,395 INFO L85 PathProgramCache]: Analyzing trace with hash -614519117, now seen corresponding path program 1 times [2024-11-18 16:21:13,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:13,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958636333] [2024-11-18 16:21:13,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:13,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:13,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:13,475 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 27 proven. 0 refuted. 0 times theorem prover too weak. 76 trivial. 0 not checked. [2024-11-18 16:21:13,476 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:13,476 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [958636333] [2024-11-18 16:21:13,476 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [958636333] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:13,476 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:13,476 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2024-11-18 16:21:13,476 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400091791] [2024-11-18 16:21:13,476 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:13,477 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2024-11-18 16:21:13,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:13,477 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2024-11-18 16:21:13,478 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2024-11-18 16:21:13,478 INFO L87 Difference]: Start difference. First operand 16405 states and 20455 transitions. Second operand has 6 states, 6 states have (on average 17.0) internal successors, (102), 5 states have internal predecessors, (102), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-18 16:21:14,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:14,885 INFO L93 Difference]: Finished difference Result 28161 states and 35264 transitions. [2024-11-18 16:21:14,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2024-11-18 16:21:14,885 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 17.0) internal successors, (102), 5 states have internal predecessors, (102), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) Word has length 168 [2024-11-18 16:21:14,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:14,942 INFO L225 Difference]: With dead ends: 28161 [2024-11-18 16:21:14,942 INFO L226 Difference]: Without dead ends: 16785 [2024-11-18 16:21:14,962 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=123, Unknown=0, NotChecked=0, Total=182 [2024-11-18 16:21:14,963 INFO L432 NwaCegarLoop]: 234 mSDtfsCounter, 676 mSDsluCounter, 728 mSDsCounter, 0 mSdLazyCounter, 477 mSolverCounterSat, 98 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 690 SdHoareTripleChecker+Valid, 962 SdHoareTripleChecker+Invalid, 575 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 98 IncrementalHoareTripleChecker+Valid, 477 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:14,963 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [690 Valid, 962 Invalid, 575 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [98 Valid, 477 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2024-11-18 16:21:14,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16785 states. [2024-11-18 16:21:15,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16785 to 16405. [2024-11-18 16:21:15,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16405 states, 14056 states have (on average 1.244450768355151) internal successors, (17492), 14294 states have internal predecessors, (17492), 1192 states have call successors, (1192), 881 states have call predecessors, (1192), 1156 states have return successors, (1707), 1231 states have call predecessors, (1707), 1190 states have call successors, (1707) [2024-11-18 16:21:15,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16405 states to 16405 states and 20391 transitions. [2024-11-18 16:21:15,763 INFO L78 Accepts]: Start accepts. Automaton has 16405 states and 20391 transitions. Word has length 168 [2024-11-18 16:21:15,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:15,764 INFO L471 AbstractCegarLoop]: Abstraction has 16405 states and 20391 transitions. [2024-11-18 16:21:15,764 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 17.0) internal successors, (102), 5 states have internal predecessors, (102), 4 states have call successors, (11), 3 states have call predecessors, (11), 2 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-18 16:21:15,764 INFO L276 IsEmpty]: Start isEmpty. Operand 16405 states and 20391 transitions. [2024-11-18 16:21:15,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-11-18 16:21:15,773 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:15,773 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:15,773 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2024-11-18 16:21:15,774 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:15,774 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:15,774 INFO L85 PathProgramCache]: Analyzing trace with hash 1488866448, now seen corresponding path program 1 times [2024-11-18 16:21:15,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:15,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2107496478] [2024-11-18 16:21:15,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:15,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:15,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:15,809 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-11-18 16:21:15,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:15,810 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2107496478] [2024-11-18 16:21:15,810 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2107496478] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:15,810 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:15,810 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-11-18 16:21:15,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2067844613] [2024-11-18 16:21:15,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:15,811 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-11-18 16:21:15,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:15,811 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-11-18 16:21:15,811 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:15,811 INFO L87 Difference]: Start difference. First operand 16405 states and 20391 transitions. Second operand has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-18 16:21:16,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:16,613 INFO L93 Difference]: Finished difference Result 30920 states and 38848 transitions. [2024-11-18 16:21:16,613 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2024-11-18 16:21:16,613 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) Word has length 169 [2024-11-18 16:21:16,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:16,666 INFO L225 Difference]: With dead ends: 30920 [2024-11-18 16:21:16,666 INFO L226 Difference]: Without dead ends: 14530 [2024-11-18 16:21:16,695 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:16,696 INFO L432 NwaCegarLoop]: 216 mSDtfsCounter, 165 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 393 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:16,696 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 393 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:21:16,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14530 states. [2024-11-18 16:21:17,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14530 to 14450. [2024-11-18 16:21:17,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14450 states, 12417 states have (on average 1.2141419022308126) internal successors, (15076), 12618 states have internal predecessors, (15076), 1007 states have call successors, (1007), 775 states have call predecessors, (1007), 1025 states have return successors, (1327), 1058 states have call predecessors, (1327), 1005 states have call successors, (1327) [2024-11-18 16:21:17,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14450 states to 14450 states and 17410 transitions. [2024-11-18 16:21:17,818 INFO L78 Accepts]: Start accepts. Automaton has 14450 states and 17410 transitions. Word has length 169 [2024-11-18 16:21:17,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:17,818 INFO L471 AbstractCegarLoop]: Abstraction has 14450 states and 17410 transitions. [2024-11-18 16:21:17,818 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 28.5) internal successors, (114), 4 states have internal predecessors, (114), 3 states have call successors, (10), 2 states have call predecessors, (10), 3 states have return successors, (10), 4 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-18 16:21:17,819 INFO L276 IsEmpty]: Start isEmpty. Operand 14450 states and 17410 transitions. [2024-11-18 16:21:17,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2024-11-18 16:21:17,827 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:17,827 INFO L215 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:17,827 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2024-11-18 16:21:17,827 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:17,828 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:17,828 INFO L85 PathProgramCache]: Analyzing trace with hash -1637262977, now seen corresponding path program 1 times [2024-11-18 16:21:17,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:17,828 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [617974753] [2024-11-18 16:21:17,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:17,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:17,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:17,970 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 29 proven. 7 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2024-11-18 16:21:17,970 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:17,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [617974753] [2024-11-18 16:21:17,971 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [617974753] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:17,971 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [576353208] [2024-11-18 16:21:17,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:17,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:17,971 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:17,973 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:17,974 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-18 16:21:18,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:18,078 INFO L255 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-18 16:21:18,081 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:18,139 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 86 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-11-18 16:21:18,139 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:18,139 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [576353208] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:18,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:18,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 7 [2024-11-18 16:21:18,140 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1845108944] [2024-11-18 16:21:18,140 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:18,141 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:18,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:18,141 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:18,141 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 16:21:18,142 INFO L87 Difference]: Start difference. First operand 14450 states and 17410 transitions. Second operand has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-18 16:21:19,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:19,185 INFO L93 Difference]: Finished difference Result 26280 states and 32325 transitions. [2024-11-18 16:21:19,186 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:19,186 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 169 [2024-11-18 16:21:19,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:19,261 INFO L225 Difference]: With dead ends: 26280 [2024-11-18 16:21:19,262 INFO L226 Difference]: Without dead ends: 12866 [2024-11-18 16:21:19,290 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2024-11-18 16:21:19,290 INFO L432 NwaCegarLoop]: 192 mSDtfsCounter, 139 mSDsluCounter, 43 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 235 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:19,291 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 235 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:19,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12866 states. [2024-11-18 16:21:20,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12866 to 12722. [2024-11-18 16:21:20,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12722 states, 10975 states have (on average 1.1933485193621869) internal successors, (13097), 11094 states have internal predecessors, (13097), 901 states have call successors, (901), 713 states have call predecessors, (901), 845 states have return successors, (1210), 916 states have call predecessors, (1210), 899 states have call successors, (1210) [2024-11-18 16:21:20,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12722 states to 12722 states and 15208 transitions. [2024-11-18 16:21:20,084 INFO L78 Accepts]: Start accepts. Automaton has 12722 states and 15208 transitions. Word has length 169 [2024-11-18 16:21:20,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:20,084 INFO L471 AbstractCegarLoop]: Abstraction has 12722 states and 15208 transitions. [2024-11-18 16:21:20,085 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2024-11-18 16:21:20,085 INFO L276 IsEmpty]: Start isEmpty. Operand 12722 states and 15208 transitions. [2024-11-18 16:21:20,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2024-11-18 16:21:20,093 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:20,093 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:20,107 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2024-11-18 16:21:20,297 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:20,298 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:20,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:20,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1533230843, now seen corresponding path program 1 times [2024-11-18 16:21:20,299 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:20,299 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417416895] [2024-11-18 16:21:20,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:20,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:20,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:20,336 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 40 proven. 15 refuted. 0 times theorem prover too weak. 114 trivial. 0 not checked. [2024-11-18 16:21:20,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:20,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417416895] [2024-11-18 16:21:20,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [417416895] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:20,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [501618952] [2024-11-18 16:21:20,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:20,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:20,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:20,339 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:20,340 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-18 16:21:20,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:20,445 INFO L255 TraceCheckSpWp]: Trace formula consists of 641 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-18 16:21:20,448 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:20,486 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 133 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2024-11-18 16:21:20,486 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:20,486 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [501618952] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:20,486 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:20,486 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2024-11-18 16:21:20,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1119280636] [2024-11-18 16:21:20,487 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:20,487 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:20,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:20,489 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:20,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:20,489 INFO L87 Difference]: Start difference. First operand 12722 states and 15208 transitions. Second operand has 3 states, 3 states have (on average 52.333333333333336) internal successors, (157), 3 states have internal predecessors, (157), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-18 16:21:21,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:21,100 INFO L93 Difference]: Finished difference Result 22539 states and 27424 transitions. [2024-11-18 16:21:21,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:21,101 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 52.333333333333336) internal successors, (157), 3 states have internal predecessors, (157), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) Word has length 204 [2024-11-18 16:21:21,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:21,144 INFO L225 Difference]: With dead ends: 22539 [2024-11-18 16:21:21,144 INFO L226 Difference]: Without dead ends: 12554 [2024-11-18 16:21:21,162 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:21,162 INFO L432 NwaCegarLoop]: 294 mSDtfsCounter, 139 mSDsluCounter, 153 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 139 SdHoareTripleChecker+Valid, 447 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:21,163 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [139 Valid, 447 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:21,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12554 states. [2024-11-18 16:21:21,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12554 to 12530. [2024-11-18 16:21:21,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12530 states, 10783 states have (on average 1.1730501715663544) internal successors, (12649), 10902 states have internal predecessors, (12649), 901 states have call successors, (901), 713 states have call predecessors, (901), 845 states have return successors, (1210), 916 states have call predecessors, (1210), 899 states have call successors, (1210) [2024-11-18 16:21:21,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12530 states to 12530 states and 14760 transitions. [2024-11-18 16:21:21,787 INFO L78 Accepts]: Start accepts. Automaton has 12530 states and 14760 transitions. Word has length 204 [2024-11-18 16:21:21,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:21,788 INFO L471 AbstractCegarLoop]: Abstraction has 12530 states and 14760 transitions. [2024-11-18 16:21:21,788 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 52.333333333333336) internal successors, (157), 3 states have internal predecessors, (157), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (12), 3 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-18 16:21:21,788 INFO L276 IsEmpty]: Start isEmpty. Operand 12530 states and 14760 transitions. [2024-11-18 16:21:21,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2024-11-18 16:21:21,794 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:21,794 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:21,808 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2024-11-18 16:21:21,995 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:21,995 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:21,995 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:21,995 INFO L85 PathProgramCache]: Analyzing trace with hash 1236898553, now seen corresponding path program 1 times [2024-11-18 16:21:21,995 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:21,995 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319658349] [2024-11-18 16:21:21,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:21,996 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:22,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:22,039 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 64 proven. 19 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2024-11-18 16:21:22,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:22,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319658349] [2024-11-18 16:21:22,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319658349] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:22,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [258106693] [2024-11-18 16:21:22,040 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:22,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:22,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:22,042 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:22,048 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-11-18 16:21:22,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:22,155 INFO L255 TraceCheckSpWp]: Trace formula consists of 645 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-18 16:21:22,158 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:22,176 INFO L134 CoverageAnalysis]: Checked inductivity of 172 backedges. 123 proven. 0 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2024-11-18 16:21:22,176 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:22,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [258106693] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:22,177 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:22,177 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2024-11-18 16:21:22,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1220075619] [2024-11-18 16:21:22,177 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:22,177 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:22,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:22,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:22,178 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:22,178 INFO L87 Difference]: Start difference. First operand 12530 states and 14760 transitions. Second operand has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (13), 3 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-18 16:21:22,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:22,803 INFO L93 Difference]: Finished difference Result 21839 states and 26165 transitions. [2024-11-18 16:21:22,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:22,804 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (13), 3 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) Word has length 206 [2024-11-18 16:21:22,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:22,845 INFO L225 Difference]: With dead ends: 21839 [2024-11-18 16:21:22,846 INFO L226 Difference]: Without dead ends: 12046 [2024-11-18 16:21:22,864 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 207 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:22,865 INFO L432 NwaCegarLoop]: 282 mSDtfsCounter, 159 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 6 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 159 SdHoareTripleChecker+Valid, 434 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 6 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:22,866 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [159 Valid, 434 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 6 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:22,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12046 states. [2024-11-18 16:21:23,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12046 to 12034. [2024-11-18 16:21:23,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12034 states, 10343 states have (on average 1.1568210383834479) internal successors, (11965), 10446 states have internal predecessors, (11965), 877 states have call successors, (877), 689 states have call predecessors, (877), 813 states have return successors, (1178), 900 states have call predecessors, (1178), 875 states have call successors, (1178) [2024-11-18 16:21:23,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12034 states to 12034 states and 14020 transitions. [2024-11-18 16:21:23,563 INFO L78 Accepts]: Start accepts. Automaton has 12034 states and 14020 transitions. Word has length 206 [2024-11-18 16:21:23,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:23,564 INFO L471 AbstractCegarLoop]: Abstraction has 12034 states and 14020 transitions. [2024-11-18 16:21:23,564 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (13), 3 states have call predecessors, (13), 2 states have return successors, (12), 2 states have call predecessors, (12), 3 states have call successors, (12) [2024-11-18 16:21:23,564 INFO L276 IsEmpty]: Start isEmpty. Operand 12034 states and 14020 transitions. [2024-11-18 16:21:23,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2024-11-18 16:21:23,570 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:23,570 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:23,585 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2024-11-18 16:21:23,771 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:23,772 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:23,772 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:23,772 INFO L85 PathProgramCache]: Analyzing trace with hash 779520488, now seen corresponding path program 1 times [2024-11-18 16:21:23,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:23,772 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669941688] [2024-11-18 16:21:23,773 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:23,773 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:23,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:23,808 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 58 proven. 14 refuted. 0 times theorem prover too weak. 101 trivial. 0 not checked. [2024-11-18 16:21:23,808 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:23,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669941688] [2024-11-18 16:21:23,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669941688] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-18 16:21:23,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1975151962] [2024-11-18 16:21:23,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:23,809 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:23,809 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-18 16:21:23,811 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-18 16:21:23,814 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2024-11-18 16:21:23,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:23,925 INFO L255 TraceCheckSpWp]: Trace formula consists of 647 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-18 16:21:23,928 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-18 16:21:23,995 INFO L134 CoverageAnalysis]: Checked inductivity of 173 backedges. 150 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2024-11-18 16:21:23,996 INFO L307 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2024-11-18 16:21:23,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1975151962] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:23,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2024-11-18 16:21:23,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2024-11-18 16:21:23,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047873781] [2024-11-18 16:21:23,997 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:23,997 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:23,997 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:23,997 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:23,997 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:23,998 INFO L87 Difference]: Start difference. First operand 12034 states and 14020 transitions. Second operand has 3 states, 3 states have (on average 54.666666666666664) internal successors, (164), 3 states have internal predecessors, (164), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2024-11-18 16:21:24,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:24,593 INFO L93 Difference]: Finished difference Result 20795 states and 24542 transitions. [2024-11-18 16:21:24,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:24,597 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 54.666666666666664) internal successors, (164), 3 states have internal predecessors, (164), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) Word has length 207 [2024-11-18 16:21:24,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:24,646 INFO L225 Difference]: With dead ends: 20795 [2024-11-18 16:21:24,646 INFO L226 Difference]: Without dead ends: 12058 [2024-11-18 16:21:24,664 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-11-18 16:21:24,667 INFO L432 NwaCegarLoop]: 275 mSDtfsCounter, 109 mSDsluCounter, 169 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 444 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:24,667 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [109 Valid, 444 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:24,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12058 states. [2024-11-18 16:21:25,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12058 to 12030. [2024-11-18 16:21:25,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12030 states, 10339 states have (on average 1.138891575587581) internal successors, (11775), 10442 states have internal predecessors, (11775), 877 states have call successors, (877), 689 states have call predecessors, (877), 813 states have return successors, (1178), 900 states have call predecessors, (1178), 875 states have call successors, (1178) [2024-11-18 16:21:25,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12030 states to 12030 states and 13830 transitions. [2024-11-18 16:21:25,672 INFO L78 Accepts]: Start accepts. Automaton has 12030 states and 13830 transitions. Word has length 207 [2024-11-18 16:21:25,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:25,673 INFO L471 AbstractCegarLoop]: Abstraction has 12030 states and 13830 transitions. [2024-11-18 16:21:25,673 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 54.666666666666664) internal successors, (164), 3 states have internal predecessors, (164), 3 states have call successors, (13), 3 states have call predecessors, (13), 3 states have return successors, (13), 3 states have call predecessors, (13), 3 states have call successors, (13) [2024-11-18 16:21:25,674 INFO L276 IsEmpty]: Start isEmpty. Operand 12030 states and 13830 transitions. [2024-11-18 16:21:25,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2024-11-18 16:21:25,681 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:25,681 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:25,695 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2024-11-18 16:21:25,885 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-18 16:21:25,886 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:25,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:25,886 INFO L85 PathProgramCache]: Analyzing trace with hash -404906680, now seen corresponding path program 1 times [2024-11-18 16:21:25,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:25,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1472941380] [2024-11-18 16:21:25,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:25,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:25,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:26,087 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 148 trivial. 0 not checked. [2024-11-18 16:21:26,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:26,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1472941380] [2024-11-18 16:21:26,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1472941380] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:26,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:26,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-11-18 16:21:26,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [846992180] [2024-11-18 16:21:26,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:26,089 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-11-18 16:21:26,089 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:26,091 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-18 16:21:26,091 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:21:26,092 INFO L87 Difference]: Start difference. First operand 12030 states and 13830 transitions. Second operand has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-18 16:21:28,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:28,254 INFO L93 Difference]: Finished difference Result 36791 states and 42755 transitions. [2024-11-18 16:21:28,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-18 16:21:28,255 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) Word has length 209 [2024-11-18 16:21:28,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:28,352 INFO L225 Difference]: With dead ends: 36791 [2024-11-18 16:21:28,352 INFO L226 Difference]: Without dead ends: 29831 [2024-11-18 16:21:28,379 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-18 16:21:28,379 INFO L432 NwaCegarLoop]: 474 mSDtfsCounter, 438 mSDsluCounter, 803 mSDsCounter, 0 mSdLazyCounter, 185 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 438 SdHoareTripleChecker+Valid, 1277 SdHoareTripleChecker+Invalid, 190 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 185 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:28,379 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [438 Valid, 1277 Invalid, 190 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 185 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2024-11-18 16:21:28,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29831 states. [2024-11-18 16:21:29,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29831 to 23647. [2024-11-18 16:21:29,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23647 states, 20302 states have (on average 1.1437789380356616) internal successors, (23221), 20520 states have internal predecessors, (23221), 1732 states have call successors, (1732), 1355 states have call predecessors, (1732), 1612 states have return successors, (2405), 1773 states have call predecessors, (2405), 1730 states have call successors, (2405) [2024-11-18 16:21:29,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23647 states to 23647 states and 27358 transitions. [2024-11-18 16:21:29,832 INFO L78 Accepts]: Start accepts. Automaton has 23647 states and 27358 transitions. Word has length 209 [2024-11-18 16:21:29,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:29,833 INFO L471 AbstractCegarLoop]: Abstraction has 23647 states and 27358 transitions. [2024-11-18 16:21:29,833 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.6) internal successors, (118), 5 states have internal predecessors, (118), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2024-11-18 16:21:29,833 INFO L276 IsEmpty]: Start isEmpty. Operand 23647 states and 27358 transitions. [2024-11-18 16:21:29,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2024-11-18 16:21:29,839 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:29,840 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:29,840 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2024-11-18 16:21:29,840 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:29,840 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:29,840 INFO L85 PathProgramCache]: Analyzing trace with hash 1948098800, now seen corresponding path program 1 times [2024-11-18 16:21:29,840 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:29,840 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614816603] [2024-11-18 16:21:29,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:29,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:29,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-18 16:21:29,880 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2024-11-18 16:21:29,881 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-18 16:21:29,881 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614816603] [2024-11-18 16:21:29,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1614816603] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-18 16:21:29,881 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-18 16:21:29,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-18 16:21:29,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761810437] [2024-11-18 16:21:29,881 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-18 16:21:29,882 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2024-11-18 16:21:29,882 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-18 16:21:29,882 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-18 16:21:29,882 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:29,882 INFO L87 Difference]: Start difference. First operand 23647 states and 27358 transitions. Second operand has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) [2024-11-18 16:21:31,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-18 16:21:31,369 INFO L93 Difference]: Finished difference Result 41970 states and 48682 transitions. [2024-11-18 16:21:31,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-18 16:21:31,369 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) Word has length 213 [2024-11-18 16:21:31,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2024-11-18 16:21:31,464 INFO L225 Difference]: With dead ends: 41970 [2024-11-18 16:21:31,464 INFO L226 Difference]: Without dead ends: 23667 [2024-11-18 16:21:31,501 INFO L431 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-18 16:21:31,502 INFO L432 NwaCegarLoop]: 188 mSDtfsCounter, 0 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 365 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2024-11-18 16:21:31,502 INFO L433 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 365 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2024-11-18 16:21:31,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23667 states. [2024-11-18 16:21:33,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23667 to 23667. [2024-11-18 16:21:33,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23667 states, 20322 states have (on average 1.1436374372601121) internal successors, (23241), 20540 states have internal predecessors, (23241), 1732 states have call successors, (1732), 1355 states have call predecessors, (1732), 1612 states have return successors, (2405), 1773 states have call predecessors, (2405), 1730 states have call successors, (2405) [2024-11-18 16:21:33,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23667 states to 23667 states and 27378 transitions. [2024-11-18 16:21:33,537 INFO L78 Accepts]: Start accepts. Automaton has 23667 states and 27378 transitions. Word has length 213 [2024-11-18 16:21:33,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2024-11-18 16:21:33,538 INFO L471 AbstractCegarLoop]: Abstraction has 23667 states and 27378 transitions. [2024-11-18 16:21:33,538 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) [2024-11-18 16:21:33,538 INFO L276 IsEmpty]: Start isEmpty. Operand 23667 states and 27378 transitions. [2024-11-18 16:21:33,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2024-11-18 16:21:33,546 INFO L207 NwaCegarLoop]: Found error trace [2024-11-18 16:21:33,546 INFO L215 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:33,547 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2024-11-18 16:21:33,547 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2024-11-18 16:21:33,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-18 16:21:33,547 INFO L85 PathProgramCache]: Analyzing trace with hash 1490559973, now seen corresponding path program 1 times [2024-11-18 16:21:33,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-18 16:21:33,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658820041] [2024-11-18 16:21:33,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-18 16:21:33,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-18 16:21:33,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 16:21:33,571 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-18 16:21:33,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-18 16:21:33,659 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-18 16:21:33,660 INFO L325 BasicCegarLoop]: Counterexample is feasible [2024-11-18 16:21:33,661 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location error2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 2 remaining) [2024-11-18 16:21:33,663 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location error1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 2 remaining) [2024-11-18 16:21:33,664 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2024-11-18 16:21:33,666 INFO L407 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-18 16:21:33,844 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2024-11-18 16:21:33,847 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.11 04:21:33 BoogieIcfgContainer [2024-11-18 16:21:33,848 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2024-11-18 16:21:33,849 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2024-11-18 16:21:33,849 INFO L270 PluginConnector]: Initializing Witness Printer... [2024-11-18 16:21:33,849 INFO L274 PluginConnector]: Witness Printer initialized [2024-11-18 16:21:33,849 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.11 04:20:49" (3/4) ... [2024-11-18 16:21:33,850 INFO L136 WitnessPrinter]: Generating witness for reachability counterexample [2024-11-18 16:21:34,023 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/witness.graphml [2024-11-18 16:21:34,023 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2024-11-18 16:21:34,024 INFO L158 Benchmark]: Toolchain (without parser) took 45960.25ms. Allocated memory was 182.5MB in the beginning and 8.2GB in the end (delta: 8.0GB). Free memory was 112.4MB in the beginning and 7.5GB in the end (delta: -7.4GB). Peak memory consumption was 554.1MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,026 INFO L158 Benchmark]: CDTParser took 0.64ms. Allocated memory is still 107.0MB. Free memory was 66.2MB in the beginning and 66.1MB in the end (delta: 119.0kB). There was no memory consumed. Max. memory is 16.1GB. [2024-11-18 16:21:34,026 INFO L158 Benchmark]: CACSL2BoogieTranslator took 402.28ms. Allocated memory is still 182.5MB. Free memory was 112.1MB in the beginning and 91.4MB in the end (delta: 20.7MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,027 INFO L158 Benchmark]: Boogie Procedure Inliner took 138.38ms. Allocated memory is still 182.5MB. Free memory was 91.4MB in the beginning and 88.3MB in the end (delta: 3.1MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,027 INFO L158 Benchmark]: Boogie Preprocessor took 91.92ms. Allocated memory is still 182.5MB. Free memory was 88.3MB in the beginning and 84.7MB in the end (delta: 3.6MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,027 INFO L158 Benchmark]: RCFGBuilder took 766.05ms. Allocated memory is still 182.5MB. Free memory was 84.7MB in the beginning and 118.7MB in the end (delta: -34.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,027 INFO L158 Benchmark]: TraceAbstraction took 44381.41ms. Allocated memory was 182.5MB in the beginning and 8.2GB in the end (delta: 8.0GB). Free memory was 118.0MB in the beginning and 7.6GB in the end (delta: -7.5GB). Peak memory consumption was 522.0MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,027 INFO L158 Benchmark]: Witness Printer took 174.83ms. Allocated memory is still 8.2GB. Free memory was 7.6GB in the beginning and 7.5GB in the end (delta: 36.7MB). Peak memory consumption was 37.7MB. Max. memory is 16.1GB. [2024-11-18 16:21:34,028 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.64ms. Allocated memory is still 107.0MB. Free memory was 66.2MB in the beginning and 66.1MB in the end (delta: 119.0kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 402.28ms. Allocated memory is still 182.5MB. Free memory was 112.1MB in the beginning and 91.4MB in the end (delta: 20.7MB). Peak memory consumption was 18.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 138.38ms. Allocated memory is still 182.5MB. Free memory was 91.4MB in the beginning and 88.3MB in the end (delta: 3.1MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * Boogie Preprocessor took 91.92ms. Allocated memory is still 182.5MB. Free memory was 88.3MB in the beginning and 84.7MB in the end (delta: 3.6MB). Peak memory consumption was 4.2MB. Max. memory is 16.1GB. * RCFGBuilder took 766.05ms. Allocated memory is still 182.5MB. Free memory was 84.7MB in the beginning and 118.7MB in the end (delta: -34.0MB). Peak memory consumption was 10.5MB. Max. memory is 16.1GB. * TraceAbstraction took 44381.41ms. Allocated memory was 182.5MB in the beginning and 8.2GB in the end (delta: 8.0GB). Free memory was 118.0MB in the beginning and 7.6GB in the end (delta: -7.5GB). Peak memory consumption was 522.0MB. Max. memory is 16.1GB. * Witness Printer took 174.83ms. Allocated memory is still 8.2GB. Free memory was 7.6GB in the beginning and 7.5GB in the end (delta: 36.7MB). Peak memory consumption was 37.7MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int t2_pc = 0; [L606] int m_st ; [L607] int t1_st ; [L608] int t2_st ; [L609] int m_i ; [L610] int t1_i ; [L611] int t2_i ; [L612] int M_E = 2; [L613] int T1_E = 2; [L614] int T2_E = 2; [L615] int E_M = 2; [L616] int E_1 = 2; [L617] int E_2 = 2; [L622] int token ; [L624] int local ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=0, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=0, t1_pc=0, t1_st=0, t2_i=0, t2_pc=0, t2_st=0, t=0, token=0] [L1202] COND FALSE !(__VERIFIER_nondet_int()) [L1205] CALL main2() [L1189] int __retres1 ; [L1193] CALL init_model2() [L1103] m_i = 1 [L1104] t1_i = 1 [L1105] t2_i = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1193] RET init_model2() [L1194] CALL start_simulation2() [L1130] int kernel_st ; [L1131] int tmp ; [L1132] int tmp___0 ; [L1136] kernel_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1137] FCALL update_channels2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1138] CALL init_threads2() [L822] COND TRUE m_i == 1 [L823] m_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L827] COND TRUE t1_i == 1 [L828] t1_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L832] COND TRUE t2_i == 1 [L833] t2_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1138] RET init_threads2() [L1139] CALL fire_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L935] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L940] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L945] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L950] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L955] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L960] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1139] RET fire_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1140] CALL activate_threads2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L757] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L767] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L769] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L776] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L786] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L788] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L795] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L805] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L807] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1140] RET activate_threads2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1141] CALL reset_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L973] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L978] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L983] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L988] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L993] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L998] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1141] RET reset_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1144] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1147] kernel_st = 1 [L1148] CALL eval2() [L868] int tmp ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L896] COND TRUE t1_st == 0 [L897] int tmp_ndt_2; [L898] tmp_ndt_2 = __VERIFIER_nondet_int() [L899] COND TRUE \read(tmp_ndt_2) [L901] t1_st = 1 [L902] CALL transmit1() [L685] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L696] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L698] t1_pc = 1 [L699] t1_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L902] RET transmit1() [L910] COND TRUE t2_st == 0 [L911] int tmp_ndt_3; [L912] tmp_ndt_3 = __VERIFIER_nondet_int() [L913] COND TRUE \read(tmp_ndt_3) [L915] t2_st = 1 [L916] CALL transmit2() [L721] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=1, t=0, token=0] [L732] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=1, t=0, token=0] [L734] t2_pc = 1 [L735] t2_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L916] RET transmit2() [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND TRUE \read(tmp_ndt_1) [L887] m_st = 1 [L888] CALL master() [L627] int tmp_var = __VERIFIER_nondet_int(); [L629] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L640] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L643] token = __VERIFIER_nondet_int() [L644] local = token [L645] E_1 = 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L646] CALL immediate_notify() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1046] CALL activate_threads2() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L757] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L767] __retres1 = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L769] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L776] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L777] COND TRUE E_1 == 1 [L778] __retres1 = 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L788] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND TRUE \read(tmp___0) [L1025] t1_st = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L795] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L796] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L805] __retres1 = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L807] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1046] RET activate_threads2() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L646] RET immediate_notify() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L647] E_1 = 2 [L648] m_pc = 1 [L649] m_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L888] RET master() [L896] COND TRUE t1_st == 0 [L897] int tmp_ndt_2; [L898] tmp_ndt_2 = __VERIFIER_nondet_int() [L899] COND TRUE \read(tmp_ndt_2) [L901] t1_st = 1 [L902] CALL transmit1() [L685] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L688] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L704] token += 1 [L705] E_2 = 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L706] CALL immediate_notify() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1046] CALL activate_threads2() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L757] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L758] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L767] __retres1 = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L769] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L776] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L777] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L786] __retres1 = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L788] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L795] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L796] COND TRUE E_2 == 1 [L797] __retres1 = 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L807] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND TRUE \read(tmp___1) [L1033] t2_st = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L1046] RET activate_threads2() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L706] RET immediate_notify() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L707] E_2 = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L696] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L698] t1_pc = 1 [L699] t1_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L902] RET transmit1() [L910] COND TRUE t2_st == 0 [L911] int tmp_ndt_3; [L912] tmp_ndt_3 = __VERIFIER_nondet_int() [L913] COND TRUE \read(tmp_ndt_3) [L915] t2_st = 1 [L916] CALL transmit2() [L721] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=1] [L724] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=1] [L740] token += 1 [L741] E_M = 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L742] CALL immediate_notify() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1046] CALL activate_threads2() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L757] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L758] COND TRUE E_M == 1 [L759] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L769] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND TRUE \read(tmp) [L1017] m_st = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L776] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L777] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L786] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L788] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L795] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L796] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L805] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L807] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1046] RET activate_threads2() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L742] RET immediate_notify() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L743] E_M = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L732] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L734] t2_pc = 1 [L735] t2_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L916] RET transmit2() [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND TRUE \read(tmp_ndt_1) [L887] m_st = 1 [L888] CALL master() [L627] int tmp_var = __VERIFIER_nondet_int(); [L629] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L632] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L654] COND FALSE !(token != local + 2) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L659] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L660] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L665] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L666] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L667] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L668] CALL error2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L599] reach_error() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] - UnprovableResult [Line: 27]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 260 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 44.1s, OverallIterations: 36, TraceHistogramMax: 4, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 22.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 10442 SdHoareTripleChecker+Valid, 5.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 10268 mSDsluCounter, 24186 SdHoareTripleChecker+Invalid, 4.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 15482 mSDsCounter, 1160 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 6833 IncrementalHoareTripleChecker+Invalid, 7993 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1160 mSolverCounterUnsat, 8704 mSDtfsCounter, 6833 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 1409 GetRequests, 1249 SyntacticMatches, 0 SemanticMatches, 160 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=23667occurred in iteration=35, InterpolantAutomatonStates: 203, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.2s AutomataMinimizationTime, 35 MinimizatonAttempts, 9785 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.2s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 5227 NumberOfCodeBlocks, 5227 NumberOfCodeBlocksAsserted, 42 NumberOfCheckSat, 4972 ConstructedInterpolants, 0 QuantifiedInterpolants, 7869 SizeOfPredicates, 0 NumberOfNonLiveVariables, 3557 ConjunctsInSsa, 16 ConjunctsInUnsatCore, 41 InterpolantComputations, 35 PerfectInterpolantSequences, 2375/2436 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2024-11-18 16:21:34,060 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE