./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-acceleration/array_3-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 803cd42f Calling Ultimate with: /root/.sdkman/candidates/java/current/bin/java -Dosgi.configuration.area=/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-acceleration/array_3-1.i -s /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 --- Real Ultimate output --- This is Ultimate 0.2.5-tmp.dk.eval-assert-order-craig-803cd42-m [2024-11-23 02:36:12,985 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-23 02:36:13,068 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-23 02:36:13,072 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-23 02:36:13,074 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-23 02:36:13,093 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-23 02:36:13,093 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-23 02:36:13,093 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-23 02:36:13,094 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-23 02:36:13,094 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-23 02:36:13,094 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-23 02:36:13,095 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-23 02:36:13,095 INFO L153 SettingsManager]: * Use SBE=true [2024-11-23 02:36:13,096 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-23 02:36:13,097 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-23 02:36:13,097 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-23 02:36:13,097 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-23 02:36:13,097 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-23 02:36:13,097 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-23 02:36:13,098 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-23 02:36:13,098 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-23 02:36:13,101 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-23 02:36:13,101 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-23 02:36:13,102 INFO L153 SettingsManager]: * Allow undefined functions=false [2024-11-23 02:36:13,103 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-23 02:36:13,103 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-23 02:36:13,103 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-23 02:36:13,103 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-23 02:36:13,103 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-23 02:36:13,103 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-23 02:36:13,104 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-23 02:36:13,104 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-23 02:36:13,104 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-11-23 02:36:13,104 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-23 02:36:13,105 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472 [2024-11-23 02:36:13,320 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-23 02:36:13,347 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-23 02:36:13,349 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-23 02:36:13,351 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-23 02:36:13,351 INFO L274 PluginConnector]: CDTParser initialized [2024-11-23 02:36:13,352 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-acceleration/array_3-1.i [2024-11-23 02:36:14,844 INFO L533 CDTParser]: Created temporary CDT project at NULL [2024-11-23 02:36:15,014 INFO L384 CDTParser]: Found 1 translation units. [2024-11-23 02:36:15,015 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/releaseScripts/default/sv-benchmarks/c/loop-acceleration/array_3-1.i [2024-11-23 02:36:15,021 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/613a1d405/615352aa884742f9ab88246fa2a78ade/FLAGc0cd099c4 [2024-11-23 02:36:15,039 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/613a1d405/615352aa884742f9ab88246fa2a78ade [2024-11-23 02:36:15,041 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-23 02:36:15,044 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-23 02:36:15,050 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-23 02:36:15,051 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-23 02:36:15,055 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-23 02:36:15,058 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,060 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@17f092ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15, skipping insertion in model container [2024-11-23 02:36:15,060 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,088 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-23 02:36:15,301 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-23 02:36:15,315 INFO L200 MainTranslator]: Completed pre-run [2024-11-23 02:36:15,335 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-23 02:36:15,350 INFO L204 MainTranslator]: Completed translation [2024-11-23 02:36:15,351 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15 WrapperNode [2024-11-23 02:36:15,351 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-23 02:36:15,352 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-23 02:36:15,352 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-23 02:36:15,352 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-23 02:36:15,358 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,364 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,402 INFO L138 Inliner]: procedures = 16, calls = 12, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 45 [2024-11-23 02:36:15,402 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-23 02:36:15,403 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-23 02:36:15,403 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-23 02:36:15,406 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-23 02:36:15,415 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,416 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,421 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,436 INFO L175 MemorySlicer]: Split 4 memory accesses to 2 slices as follows [2, 2]. 50 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 1 writes are split as follows [0, 1]. [2024-11-23 02:36:15,437 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,441 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,449 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,456 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,457 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,462 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,463 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-23 02:36:15,464 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-23 02:36:15,465 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-23 02:36:15,468 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-23 02:36:15,469 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (1/1) ... [2024-11-23 02:36:15,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:15,501 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:15,539 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:15,556 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-23 02:36:15,626 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-23 02:36:15,630 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-23 02:36:15,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2024-11-23 02:36:15,631 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2024-11-23 02:36:15,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2024-11-23 02:36:15,631 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2024-11-23 02:36:15,631 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-23 02:36:15,632 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-23 02:36:15,632 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2024-11-23 02:36:15,632 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2024-11-23 02:36:15,632 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2024-11-23 02:36:15,755 INFO L238 CfgBuilder]: Building ICFG [2024-11-23 02:36:15,756 INFO L264 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-23 02:36:15,864 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2024-11-23 02:36:15,864 INFO L287 CfgBuilder]: Performing block encoding [2024-11-23 02:36:15,879 INFO L311 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-23 02:36:15,879 INFO L316 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-23 02:36:15,879 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:36:15 BoogieIcfgContainer [2024-11-23 02:36:15,880 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-23 02:36:15,880 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-23 02:36:15,880 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-23 02:36:15,884 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-23 02:36:15,884 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-23 02:36:15,885 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 02:36:15" (1/3) ... [2024-11-23 02:36:15,886 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25adb478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 02:36:15, skipping insertion in model container [2024-11-23 02:36:15,887 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-23 02:36:15,887 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 02:36:15" (2/3) ... [2024-11-23 02:36:15,887 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25adb478 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 02:36:15, skipping insertion in model container [2024-11-23 02:36:15,888 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-23 02:36:15,888 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 02:36:15" (3/3) ... [2024-11-23 02:36:15,889 INFO L332 chiAutomizerObserver]: Analyzing ICFG array_3-1.i [2024-11-23 02:36:15,940 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-23 02:36:15,940 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-23 02:36:15,941 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-23 02:36:15,942 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-23 02:36:15,942 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-23 02:36:15,942 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-23 02:36:15,943 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-23 02:36:15,943 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-23 02:36:15,946 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:15,960 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-23 02:36:15,960 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:15,961 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:15,964 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-23 02:36:15,965 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-23 02:36:15,965 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-23 02:36:15,965 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:15,967 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 6 [2024-11-23 02:36:15,967 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:15,967 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:15,967 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2024-11-23 02:36:15,968 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2024-11-23 02:36:15,974 INFO L745 eck$LassoCheckResult]: Stem: 12#$Ultimate##0true assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 8#L-1true assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 14#L24-3true [2024-11-23 02:36:15,974 INFO L747 eck$LassoCheckResult]: Loop: 14#L24-3true assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 5#L24-2true main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 14#L24-3true [2024-11-23 02:36:15,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:15,981 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2024-11-23 02:36:15,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:15,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754325413] [2024-11-23 02:36:15,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:15,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:16,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,108 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:16,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,143 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:16,147 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:16,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1283, now seen corresponding path program 1 times [2024-11-23 02:36:16,147 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:16,148 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569189399] [2024-11-23 02:36:16,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:16,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:16,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,167 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:16,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,180 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:16,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:16,183 INFO L85 PathProgramCache]: Analyzing trace with hash 925765, now seen corresponding path program 1 times [2024-11-23 02:36:16,183 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:16,183 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238416557] [2024-11-23 02:36:16,183 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:16,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:16,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,217 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:16,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:16,242 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:16,573 INFO L204 LassoAnalysis]: Preferences: [2024-11-23 02:36:16,574 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-23 02:36:16,574 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-23 02:36:16,574 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-23 02:36:16,575 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2024-11-23 02:36:16,575 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:16,575 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-23 02:36:16,575 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-23 02:36:16,575 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_3-1.i_Iteration1_Lasso [2024-11-23 02:36:16,575 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-23 02:36:16,575 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-23 02:36:16,592 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,599 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,617 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,775 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,778 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,780 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,808 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-23 02:36:16,986 INFO L259 LassoAnalysis]: Preprocessing complete. [2024-11-23 02:36:16,989 INFO L451 LassoAnalysis]: Using template 'affine'. [2024-11-23 02:36:16,990 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:16,991 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:16,993 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:16,994 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2024-11-23 02:36:16,996 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,007 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,007 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2024-11-23 02:36:17,007 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,007 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,008 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,009 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2024-11-23 02:36:17,010 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2024-11-23 02:36:17,011 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,018 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2024-11-23 02:36:17,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,019 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,021 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,025 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2024-11-23 02:36:17,026 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,038 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,039 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,039 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,039 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,046 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,046 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,054 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,069 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2024-11-23 02:36:17,071 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,071 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,073 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2024-11-23 02:36:17,083 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,095 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,096 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,096 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,096 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,098 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,098 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,103 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,121 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2024-11-23 02:36:17,122 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,122 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,124 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,130 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2024-11-23 02:36:17,132 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,143 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,143 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,143 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,143 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,148 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,148 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,152 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,160 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2024-11-23 02:36:17,160 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,160 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,161 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,162 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2024-11-23 02:36:17,164 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,177 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,177 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,177 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,177 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,179 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,180 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,186 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,196 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2024-11-23 02:36:17,196 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,197 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,198 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,199 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2024-11-23 02:36:17,200 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,212 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,213 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,213 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,213 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,215 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,216 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,219 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,231 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2024-11-23 02:36:17,231 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,231 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,233 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,235 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2024-11-23 02:36:17,237 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,248 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,248 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,248 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,248 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,251 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,251 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,255 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,262 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2024-11-23 02:36:17,262 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,263 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,264 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,267 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2024-11-23 02:36:17,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,281 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,281 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,281 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,281 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,285 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,285 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,289 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,297 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Forceful destruction successful, exit code 0 [2024-11-23 02:36:17,297 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,298 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,300 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,302 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2024-11-23 02:36:17,304 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,314 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,315 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,315 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,315 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,317 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,318 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,320 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,328 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0 [2024-11-23 02:36:17,329 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,329 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,330 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,332 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2024-11-23 02:36:17,333 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,343 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,343 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,343 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,343 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,345 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,345 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,348 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2024-11-23 02:36:17,354 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2024-11-23 02:36:17,355 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,355 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,356 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,357 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2024-11-23 02:36:17,359 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2024-11-23 02:36:17,369 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2024-11-23 02:36:17,369 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2024-11-23 02:36:17,369 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2024-11-23 02:36:17,369 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2024-11-23 02:36:17,372 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2024-11-23 02:36:17,372 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2024-11-23 02:36:17,378 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2024-11-23 02:36:17,393 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2024-11-23 02:36:17,393 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero. [2024-11-23 02:36:17,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-23 02:36:17,395 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,397 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,399 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2024-11-23 02:36:17,401 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2024-11-23 02:36:17,415 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2024-11-23 02:36:17,415 INFO L474 LassoAnalysis]: Proved termination. [2024-11-23 02:36:17,416 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2047*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2024-11-23 02:36:17,422 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2024-11-23 02:36:17,432 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2024-11-23 02:36:17,441 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2024-11-23 02:36:17,441 WARN L976 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2024-11-23 02:36:17,454 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-23 02:36:17,466 INFO L255 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-23 02:36:17,467 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:17,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-23 02:36:17,479 INFO L255 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-23 02:36:17,479 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:17,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,535 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2024-11-23 02:36:17,536 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,570 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 18 states, 17 states have (on average 1.411764705882353) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 34 states and 47 transitions. Complement of second has 6 states. [2024-11-23 02:36:17,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2024-11-23 02:36:17,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 23 transitions. [2024-11-23 02:36:17,577 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 2 letters. [2024-11-23 02:36:17,577 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-23 02:36:17,577 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 4 letters. Loop has 2 letters. [2024-11-23 02:36:17,577 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-23 02:36:17,577 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 23 transitions. Stem has 2 letters. Loop has 4 letters. [2024-11-23 02:36:17,578 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2024-11-23 02:36:17,578 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 47 transitions. [2024-11-23 02:36:17,580 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,582 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 10 states and 12 transitions. [2024-11-23 02:36:17,582 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2024-11-23 02:36:17,582 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2024-11-23 02:36:17,583 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2024-11-23 02:36:17,583 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:17,583 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-11-23 02:36:17,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2024-11-23 02:36:17,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 10. [2024-11-23 02:36:17,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.2) internal successors, (12), 9 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 12 transitions. [2024-11-23 02:36:17,601 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-11-23 02:36:17,601 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2024-11-23 02:36:17,602 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-23 02:36:17,602 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 12 transitions. [2024-11-23 02:36:17,602 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,602 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:17,602 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:17,602 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2024-11-23 02:36:17,602 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:17,602 INFO L745 eck$LassoCheckResult]: Stem: 109#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 110#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 112#L24-3 assume !(main_~i~0#1 < 1024); 113#L24-4 main_~i~0#1 := 0; 111#L28-4 [2024-11-23 02:36:17,603 INFO L747 eck$LassoCheckResult]: Loop: 111#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 106#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 107#L29 assume !(main_~i~0#1 >= 1023); 108#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 111#L28-4 [2024-11-23 02:36:17,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,603 INFO L85 PathProgramCache]: Analyzing trace with hash 925707, now seen corresponding path program 1 times [2024-11-23 02:36:17,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:17,603 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706112597] [2024-11-23 02:36:17,603 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:17,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:17,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-23 02:36:17,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:17,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706112597] [2024-11-23 02:36:17,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [706112597] provided 1 perfect and 0 imperfect interpolant sequences [2024-11-23 02:36:17,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-11-23 02:36:17,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-11-23 02:36:17,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1649012704] [2024-11-23 02:36:17,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-11-23 02:36:17,645 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:36:17,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,646 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 1 times [2024-11-23 02:36:17,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:17,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2054189872] [2024-11-23 02:36:17,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:17,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:17,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:17,650 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:17,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:17,654 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:17,685 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:36:17,687 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-23 02:36:17,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-23 02:36:17,688 INFO L87 Difference]: Start difference. First operand 10 states and 12 transitions. cyclomatic complexity: 4 Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:36:17,702 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2024-11-23 02:36:17,702 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2024-11-23 02:36:17,703 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,703 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2024-11-23 02:36:17,703 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2024-11-23 02:36:17,704 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2024-11-23 02:36:17,704 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2024-11-23 02:36:17,704 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:17,704 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2024-11-23 02:36:17,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2024-11-23 02:36:17,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 10. [2024-11-23 02:36:17,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2024-11-23 02:36:17,705 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-11-23 02:36:17,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-23 02:36:17,706 INFO L425 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2024-11-23 02:36:17,706 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-23 02:36:17,706 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2024-11-23 02:36:17,706 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,706 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:17,706 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:17,707 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2024-11-23 02:36:17,707 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:17,707 INFO L745 eck$LassoCheckResult]: Stem: 140#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 141#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 143#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 135#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 136#L24-3 assume !(main_~i~0#1 < 1024); 144#L24-4 main_~i~0#1 := 0; 142#L28-4 [2024-11-23 02:36:17,707 INFO L747 eck$LassoCheckResult]: Loop: 142#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 137#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 138#L29 assume !(main_~i~0#1 >= 1023); 139#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 142#L28-4 [2024-11-23 02:36:17,707 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,707 INFO L85 PathProgramCache]: Analyzing trace with hash 889660429, now seen corresponding path program 1 times [2024-11-23 02:36:17,707 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:17,707 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406793431] [2024-11-23 02:36:17,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:17,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:17,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-23 02:36:17,744 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,744 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:17,744 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406793431] [2024-11-23 02:36:17,744 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1406793431] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:36:17,745 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1483855942] [2024-11-23 02:36:17,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-23 02:36:17,745 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:36:17,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,747 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,748 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2024-11-23 02:36:17,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-23 02:36:17,777 INFO L255 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 3 conjuncts are in the unsatisfiable core [2024-11-23 02:36:17,777 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:17,786 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,787 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-23 02:36:17,801 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1483855942] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-23 02:36:17,802 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-23 02:36:17,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4] total 7 [2024-11-23 02:36:17,802 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780166384] [2024-11-23 02:36:17,802 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-23 02:36:17,803 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:36:17,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,803 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 2 times [2024-11-23 02:36:17,803 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:17,803 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769232513] [2024-11-23 02:36:17,803 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-23 02:36:17,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:17,808 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-23 02:36:17,808 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-23 02:36:17,808 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:17,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:17,815 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:17,849 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:36:17,849 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-23 02:36:17,849 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2024-11-23 02:36:17,850 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 7 states, 7 states have (on average 1.8571428571428572) internal successors, (13), 7 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:36:17,881 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2024-11-23 02:36:17,881 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2024-11-23 02:36:17,882 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2024-11-23 02:36:17,882 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2024-11-23 02:36:17,882 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2024-11-23 02:36:17,882 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2024-11-23 02:36:17,883 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:17,883 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2024-11-23 02:36:17,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2024-11-23 02:36:17,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 16. [2024-11-23 02:36:17,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:17,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2024-11-23 02:36:17,884 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-11-23 02:36:17,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2024-11-23 02:36:17,885 INFO L425 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2024-11-23 02:36:17,885 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-23 02:36:17,885 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2024-11-23 02:36:17,886 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:17,886 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:17,886 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:17,886 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 1, 1, 1, 1] [2024-11-23 02:36:17,886 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:17,887 INFO L745 eck$LassoCheckResult]: Stem: 217#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 218#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 220#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 212#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 213#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 221#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 227#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 226#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 225#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 224#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 223#L24-3 assume !(main_~i~0#1 < 1024); 222#L24-4 main_~i~0#1 := 0; 219#L28-4 [2024-11-23 02:36:17,887 INFO L747 eck$LassoCheckResult]: Loop: 219#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 214#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 215#L29 assume !(main_~i~0#1 >= 1023); 216#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 219#L28-4 [2024-11-23 02:36:17,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:17,887 INFO L85 PathProgramCache]: Analyzing trace with hash 833936659, now seen corresponding path program 2 times [2024-11-23 02:36:17,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:17,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778586272] [2024-11-23 02:36:17,887 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-23 02:36:17,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:17,899 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-23 02:36:17,899 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:17,967 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:17,967 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:17,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778586272] [2024-11-23 02:36:17,967 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [778586272] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:36:17,967 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [611877837] [2024-11-23 02:36:17,968 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-11-23 02:36:17,968 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:36:17,968 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:17,972 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:36:17,999 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2024-11-23 02:36:18,004 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2024-11-23 02:36:18,038 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-11-23 02:36:18,038 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:18,039 INFO L255 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 6 conjuncts are in the unsatisfiable core [2024-11-23 02:36:18,039 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:18,065 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:18,065 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-23 02:36:18,118 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:18,118 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [611877837] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-23 02:36:18,118 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-23 02:36:18,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2024-11-23 02:36:18,119 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [383439221] [2024-11-23 02:36:18,119 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-23 02:36:18,119 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:36:18,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:18,119 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 3 times [2024-11-23 02:36:18,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:18,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127744078] [2024-11-23 02:36:18,120 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-23 02:36:18,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:18,123 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2024-11-23 02:36:18,123 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-23 02:36:18,123 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:18,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:18,130 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:18,173 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:36:18,174 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2024-11-23 02:36:18,174 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2024-11-23 02:36:18,174 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 13 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:18,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:36:18,243 INFO L93 Difference]: Finished difference Result 63 states and 64 transitions. [2024-11-23 02:36:18,243 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 64 transitions. [2024-11-23 02:36:18,247 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:18,248 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 63 states and 64 transitions. [2024-11-23 02:36:18,248 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2024-11-23 02:36:18,248 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2024-11-23 02:36:18,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 64 transitions. [2024-11-23 02:36:18,248 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:18,248 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 64 transitions. [2024-11-23 02:36:18,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 64 transitions. [2024-11-23 02:36:18,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 28. [2024-11-23 02:36:18,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:18,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2024-11-23 02:36:18,252 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-11-23 02:36:18,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2024-11-23 02:36:18,252 INFO L425 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2024-11-23 02:36:18,252 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2024-11-23 02:36:18,253 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2024-11-23 02:36:18,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:18,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:18,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:18,255 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 10, 1, 1, 1, 1] [2024-11-23 02:36:18,255 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:18,255 INFO L745 eck$LassoCheckResult]: Stem: 377#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 378#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 381#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 373#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 374#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 382#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 400#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 399#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 398#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 397#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 396#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 395#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 394#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 393#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 392#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 391#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 390#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 389#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 388#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 387#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 386#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 385#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 384#L24-3 assume !(main_~i~0#1 < 1024); 383#L24-4 main_~i~0#1 := 0; 380#L28-4 [2024-11-23 02:36:18,255 INFO L747 eck$LassoCheckResult]: Loop: 380#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 375#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 376#L29 assume !(main_~i~0#1 >= 1023); 379#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 380#L28-4 [2024-11-23 02:36:18,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:18,256 INFO L85 PathProgramCache]: Analyzing trace with hash 2127272351, now seen corresponding path program 3 times [2024-11-23 02:36:18,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:18,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022114329] [2024-11-23 02:36:18,256 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-23 02:36:18,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:18,291 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-23 02:36:18,291 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:18,474 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:18,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:18,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022114329] [2024-11-23 02:36:18,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022114329] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:36:18,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [369707179] [2024-11-23 02:36:18,475 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-11-23 02:36:18,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:36:18,475 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:18,477 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:36:18,478 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2024-11-23 02:36:18,566 INFO L227 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2024-11-23 02:36:18,567 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:18,568 INFO L255 TraceCheckSpWp]: Trace formula consists of 144 conjuncts, 12 conjuncts are in the unsatisfiable core [2024-11-23 02:36:18,569 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:18,609 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:18,609 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-23 02:36:18,793 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:18,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [369707179] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-23 02:36:18,794 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-23 02:36:18,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 25 [2024-11-23 02:36:18,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851195994] [2024-11-23 02:36:18,794 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-23 02:36:18,794 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:36:18,795 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:18,795 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 4 times [2024-11-23 02:36:18,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:18,795 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [659107618] [2024-11-23 02:36:18,795 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-23 02:36:18,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:18,798 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-23 02:36:18,798 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-23 02:36:18,799 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:18,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:18,801 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:18,838 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:36:18,839 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2024-11-23 02:36:18,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2024-11-23 02:36:18,840 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 25 states, 25 states have (on average 1.96) internal successors, (49), 25 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:19,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:36:19,046 INFO L93 Difference]: Finished difference Result 135 states and 136 transitions. [2024-11-23 02:36:19,046 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 135 states and 136 transitions. [2024-11-23 02:36:19,048 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:19,049 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 135 states to 135 states and 136 transitions. [2024-11-23 02:36:19,049 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 91 [2024-11-23 02:36:19,049 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 91 [2024-11-23 02:36:19,049 INFO L73 IsDeterministic]: Start isDeterministic. Operand 135 states and 136 transitions. [2024-11-23 02:36:19,050 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:19,050 INFO L218 hiAutomatonCegarLoop]: Abstraction has 135 states and 136 transitions. [2024-11-23 02:36:19,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states and 136 transitions. [2024-11-23 02:36:19,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 52. [2024-11-23 02:36:19,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:19,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2024-11-23 02:36:19,053 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-11-23 02:36:19,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-11-23 02:36:19,054 INFO L425 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2024-11-23 02:36:19,054 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2024-11-23 02:36:19,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2024-11-23 02:36:19,055 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:19,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:19,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:19,060 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 22, 1, 1, 1, 1] [2024-11-23 02:36:19,060 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:19,061 INFO L745 eck$LassoCheckResult]: Stem: 706#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 707#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 710#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 702#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 703#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 711#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 753#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 752#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 751#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 750#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 749#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 748#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 747#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 746#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 745#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 744#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 743#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 742#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 741#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 740#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 739#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 738#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 737#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 736#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 735#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 734#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 733#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 732#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 731#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 730#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 729#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 728#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 727#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 726#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 725#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 724#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 723#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 722#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 721#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 720#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 719#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 718#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 717#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 716#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 715#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 714#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 713#L24-3 assume !(main_~i~0#1 < 1024); 712#L24-4 main_~i~0#1 := 0; 709#L28-4 [2024-11-23 02:36:19,061 INFO L747 eck$LassoCheckResult]: Loop: 709#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 704#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 705#L29 assume !(main_~i~0#1 >= 1023); 708#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 709#L28-4 [2024-11-23 02:36:19,062 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:19,062 INFO L85 PathProgramCache]: Analyzing trace with hash 828161207, now seen corresponding path program 4 times [2024-11-23 02:36:19,062 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:19,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009886309] [2024-11-23 02:36:19,063 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-23 02:36:19,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:19,143 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-23 02:36:19,147 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:19,797 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:19,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:19,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1009886309] [2024-11-23 02:36:19,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1009886309] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:36:19,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1337136327] [2024-11-23 02:36:19,800 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-11-23 02:36:19,800 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:36:19,800 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:19,802 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:36:19,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2024-11-23 02:36:19,874 INFO L227 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-11-23 02:36:19,874 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:19,875 INFO L255 TraceCheckSpWp]: Trace formula consists of 276 conjuncts, 24 conjuncts are in the unsatisfiable core [2024-11-23 02:36:19,877 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:36:19,942 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:19,942 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-23 02:36:20,617 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:20,617 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1337136327] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-23 02:36:20,617 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-23 02:36:20,617 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 48 [2024-11-23 02:36:20,618 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400139598] [2024-11-23 02:36:20,618 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-23 02:36:20,618 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:36:20,618 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:20,618 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 5 times [2024-11-23 02:36:20,618 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:20,619 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592609174] [2024-11-23 02:36:20,619 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-23 02:36:20,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:20,623 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2024-11-23 02:36:20,628 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-23 02:36:20,628 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:36:20,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:36:20,636 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:36:20,675 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:36:20,676 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2024-11-23 02:36:20,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2024-11-23 02:36:20,679 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 48 states, 48 states have (on average 1.9583333333333333) internal successors, (94), 48 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:21,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:36:21,112 INFO L93 Difference]: Finished difference Result 279 states and 280 transitions. [2024-11-23 02:36:21,112 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 279 states and 280 transitions. [2024-11-23 02:36:21,114 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:21,117 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 279 states to 279 states and 280 transitions. [2024-11-23 02:36:21,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 187 [2024-11-23 02:36:21,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 187 [2024-11-23 02:36:21,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 279 states and 280 transitions. [2024-11-23 02:36:21,122 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:36:21,122 INFO L218 hiAutomatonCegarLoop]: Abstraction has 279 states and 280 transitions. [2024-11-23 02:36:21,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states and 280 transitions. [2024-11-23 02:36:21,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 100. [2024-11-23 02:36:21,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:36:21,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2024-11-23 02:36:21,132 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-11-23 02:36:21,134 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2024-11-23 02:36:21,135 INFO L425 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2024-11-23 02:36:21,135 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2024-11-23 02:36:21,135 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2024-11-23 02:36:21,136 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:36:21,136 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:36:21,136 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:36:21,138 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 46, 1, 1, 1, 1] [2024-11-23 02:36:21,138 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:36:21,138 INFO L745 eck$LassoCheckResult]: Stem: 1370#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 1371#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 1374#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1366#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1367#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1375#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1465#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1464#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1463#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1462#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1461#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1460#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1459#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1458#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1457#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1456#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1455#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1454#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1453#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1452#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1451#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1450#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1449#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1448#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1447#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1446#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1445#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1444#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1443#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1442#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1441#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1440#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1439#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1438#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1437#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1436#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1435#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1434#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1433#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1432#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1431#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1430#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1429#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1428#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1427#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1426#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1425#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1424#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1423#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1422#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1421#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1420#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1419#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1418#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1417#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1416#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1415#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1414#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1413#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1412#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1411#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1410#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1409#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1408#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1407#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1406#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1405#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1404#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1403#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1402#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1401#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1400#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1399#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1398#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1397#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1396#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1395#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1394#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1393#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1392#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1391#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1390#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1389#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1388#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1387#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1386#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1385#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1384#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1383#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1382#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1381#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1380#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1379#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 1378#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 1377#L24-3 assume !(main_~i~0#1 < 1024); 1376#L24-4 main_~i~0#1 := 0; 1373#L28-4 [2024-11-23 02:36:21,138 INFO L747 eck$LassoCheckResult]: Loop: 1373#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 1368#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 1369#L29 assume !(main_~i~0#1 >= 1023); 1372#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 1373#L28-4 [2024-11-23 02:36:21,139 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:36:21,139 INFO L85 PathProgramCache]: Analyzing trace with hash 830581479, now seen corresponding path program 5 times [2024-11-23 02:36:21,139 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:36:21,139 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [104382875] [2024-11-23 02:36:21,139 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-23 02:36:21,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:36:21,262 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-23 02:36:21,262 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:36:22,855 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:36:22,855 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:36:22,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [104382875] [2024-11-23 02:36:22,855 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [104382875] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:36:22,855 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [897312815] [2024-11-23 02:36:22,856 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2024-11-23 02:36:22,856 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:36:22,856 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:36:22,858 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:36:22,861 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2024-11-23 02:37:36,493 INFO L227 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2024-11-23 02:37:36,493 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:37:36,522 INFO L255 TraceCheckSpWp]: Trace formula consists of 540 conjuncts, 48 conjuncts are in the unsatisfiable core [2024-11-23 02:37:36,525 INFO L278 TraceCheckSpWp]: Computing forward predicates... [2024-11-23 02:37:36,651 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:37:36,652 INFO L311 TraceCheckSpWp]: Computing backward predicates... [2024-11-23 02:37:39,043 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 2116 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:37:39,043 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [897312815] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-23 02:37:39,043 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-23 02:37:39,044 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 96 [2024-11-23 02:37:39,044 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2128350148] [2024-11-23 02:37:39,044 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-23 02:37:39,044 INFO L750 eck$LassoCheckResult]: stem already infeasible [2024-11-23 02:37:39,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:37:39,045 INFO L85 PathProgramCache]: Analyzing trace with hash 1544328, now seen corresponding path program 6 times [2024-11-23 02:37:39,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:37:39,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1446728650] [2024-11-23 02:37:39,045 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-23 02:37:39,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:37:39,048 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2024-11-23 02:37:39,048 INFO L228 tOrderPrioritization]: Conjunction of SSA is sat [2024-11-23 02:37:39,049 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-23 02:37:39,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-23 02:37:39,050 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2024-11-23 02:37:39,082 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-11-23 02:37:39,083 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2024-11-23 02:37:39,086 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2024-11-23 02:37:39,086 INFO L87 Difference]: Start difference. First operand 100 states and 101 transitions. cyclomatic complexity: 3 Second operand has 96 states, 96 states have (on average 1.9791666666666667) internal successors, (190), 96 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:37:40,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-23 02:37:40,692 INFO L93 Difference]: Finished difference Result 567 states and 568 transitions. [2024-11-23 02:37:40,692 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 567 states and 568 transitions. [2024-11-23 02:37:40,701 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:37:40,703 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 567 states to 567 states and 568 transitions. [2024-11-23 02:37:40,703 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 379 [2024-11-23 02:37:40,704 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 379 [2024-11-23 02:37:40,704 INFO L73 IsDeterministic]: Start isDeterministic. Operand 567 states and 568 transitions. [2024-11-23 02:37:40,707 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-23 02:37:40,708 INFO L218 hiAutomatonCegarLoop]: Abstraction has 567 states and 568 transitions. [2024-11-23 02:37:40,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states and 568 transitions. [2024-11-23 02:37:40,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 196. [2024-11-23 02:37:40,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 196 states, 196 states have (on average 1.0051020408163265) internal successors, (197), 195 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-23 02:37:40,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 197 transitions. [2024-11-23 02:37:40,721 INFO L240 hiAutomatonCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-11-23 02:37:40,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2024-11-23 02:37:40,725 INFO L425 stractBuchiCegarLoop]: Abstraction has 196 states and 197 transitions. [2024-11-23 02:37:40,725 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2024-11-23 02:37:40,725 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 196 states and 197 transitions. [2024-11-23 02:37:40,725 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2024-11-23 02:37:40,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-23 02:37:40,726 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-23 02:37:40,727 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 94, 1, 1, 1, 1] [2024-11-23 02:37:40,727 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2024-11-23 02:37:40,727 INFO L745 eck$LassoCheckResult]: Stem: 2706#$Ultimate##0 assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2); 2707#L-1 assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0; 2710#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2702#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2703#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2711#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2897#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2896#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2895#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2894#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2893#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2892#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2891#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2890#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2889#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2888#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2887#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2886#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2885#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2884#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2883#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2882#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2881#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2880#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2879#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2878#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2877#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2876#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2875#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2874#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2873#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2872#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2871#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2870#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2869#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2868#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2867#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2866#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2865#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2864#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2863#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2862#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2861#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2860#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2859#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2858#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2857#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2856#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2855#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2854#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2853#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2852#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2851#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2850#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2849#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2848#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2847#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2846#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2845#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2844#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2843#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2842#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2841#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2840#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2839#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2838#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2837#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2836#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2835#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2834#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2833#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2832#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2831#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2830#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2829#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2828#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2827#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2826#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2825#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2824#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2823#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2822#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2821#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2820#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2819#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2818#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2817#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2816#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2815#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2814#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2813#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2812#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2811#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2810#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2809#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2808#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2807#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2806#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2805#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2804#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2803#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2802#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2801#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2800#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2799#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2798#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2797#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2796#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2795#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2794#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2793#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2792#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2791#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2790#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2789#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2788#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2787#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2786#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2785#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2784#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2783#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2782#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2781#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2780#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2779#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2778#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2777#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2776#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2775#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2774#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2773#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2772#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2771#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2770#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2769#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2768#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2767#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2766#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2765#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2764#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2763#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2762#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2761#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2760#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2759#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2758#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2757#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2756#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2755#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2754#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2753#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2752#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2751#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2750#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2749#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2748#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2747#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2746#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2745#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2744#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2743#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2742#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2741#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2740#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2739#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2738#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2737#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2736#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2735#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2734#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2733#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2732#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2731#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2730#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2729#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2728#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2727#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2726#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2725#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2724#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2723#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2722#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2721#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2720#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2719#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2718#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2717#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2716#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2715#L24-3 assume !!(main_~i~0#1 < 1024);havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1; 2714#L24-2 main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1; 2713#L24-3 assume !(main_~i~0#1 < 1024); 2712#L24-4 main_~i~0#1 := 0; 2709#L28-4 [2024-11-23 02:37:40,728 INFO L747 eck$LassoCheckResult]: Loop: 2709#L28-4 call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4); 2704#L28-1 assume !!(0 != main_#t~mem3#1);havoc main_#t~mem3#1; 2705#L29 assume !(main_~i~0#1 >= 1023); 2708#L28-3 main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1; 2709#L28-4 [2024-11-23 02:37:40,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-23 02:37:40,728 INFO L85 PathProgramCache]: Analyzing trace with hash 1165371207, now seen corresponding path program 6 times [2024-11-23 02:37:40,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-11-23 02:37:40,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813850981] [2024-11-23 02:37:40,729 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-23 02:37:40,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-23 02:37:40,975 INFO L227 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2024-11-23 02:37:40,976 INFO L228 tOrderPrioritization]: Conjunction of SSA is unsat [2024-11-23 02:37:45,924 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 8836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-11-23 02:37:45,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-11-23 02:37:45,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813850981] [2024-11-23 02:37:45,925 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1813850981] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-23 02:37:45,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349231517] [2024-11-23 02:37:45,925 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2024-11-23 02:37:45,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-23 02:37:45,925 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2024-11-23 02:37:45,927 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-23 02:37:45,928 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process