./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/loop-acceleration/array_3-1.i --full-output --architecture 32bit
--------------------------------------------------------------------------------
Checking for termination
Using default analysis
Version 6497de01
Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/loop-acceleration/array_3-1.i -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472
--- Real Ultimate output ---
This is Ultimate 0.3.0-dev-6497de0
[2024-11-23 18:41:21,213 INFO L188 SettingsManager]: Resetting all preferences to default values...
[2024-11-23 18:41:21,304 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf
[2024-11-23 18:41:21,309 WARN L101 SettingsManager]: Preference file contains the following unknown settings:
[2024-11-23 18:41:21,310 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-23 18:41:21,339 INFO L130 SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-23 18:41:21,340 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-23 18:41:21,341 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-23 18:41:21,341 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-23 18:41:21,341 INFO L153 SettingsManager]: * Use memory slicer=true
[2024-11-23 18:41:21,343 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-23 18:41:21,343 INFO L153 SettingsManager]: * Create parallel compositions if possible=false
[2024-11-23 18:41:21,343 INFO L153 SettingsManager]: * Use SBE=true
[2024-11-23 18:41:21,344 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * Use old map elimination=false
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES
[2024-11-23 18:41:21,344 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME
[2024-11-23 18:41:21,344 INFO L153 SettingsManager]: * sizeof long=4
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * sizeof POINTER=4
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Check division by zero=IGNORE
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * sizeof long double=12
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Check if freed pointer was valid=false
[2024-11-23 18:41:21,345 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false
[2024-11-23 18:41:21,346 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR
[2024-11-23 18:41:21,346 INFO L153 SettingsManager]: * Use constant arrays=true
[2024-11-23 18:41:21,346 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-23 18:41:21,346 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements
[2024-11-23 18:41:21,346 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-23 18:41:21,346 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM
[2024-11-23 18:41:21,347 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2024-11-23 18:41:21,347 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9c5d8dd6c87f471ee77fd3b765c8ecabfaf01dd976e127275ea7c589f724f472
[2024-11-23 18:41:21,794 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-23 18:41:21,806 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-23 18:41:21,809 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-23 18:41:21,811 INFO L270 PluginConnector]: Initializing CDTParser...
[2024-11-23 18:41:21,812 INFO L274 PluginConnector]: CDTParser initialized
[2024-11-23 18:41:21,814 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/loop-acceleration/array_3-1.i
[2024-11-23 18:41:24,833 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/data/4e2b6a97e/371fcbca92a34ac18de7e91fc4f85c9d/FLAGd82bfaa9f
[2024-11-23 18:41:25,115 INFO L384 CDTParser]: Found 1 translation units.
[2024-11-23 18:41:25,116 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/sv-benchmarks/c/loop-acceleration/array_3-1.i
[2024-11-23 18:41:25,138 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/data/4e2b6a97e/371fcbca92a34ac18de7e91fc4f85c9d/FLAGd82bfaa9f
[2024-11-23 18:41:25,152 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/data/4e2b6a97e/371fcbca92a34ac18de7e91fc4f85c9d
[2024-11-23 18:41:25,155 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-23 18:41:25,156 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-23 18:41:25,157 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-23 18:41:25,158 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-23 18:41:25,162 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-23 18:41:25,163 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,164 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12bf285c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25, skipping insertion in model container
[2024-11-23 18:41:25,164 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,180 INFO L175 MainTranslator]: Built tables and reachable declarations
[2024-11-23 18:41:25,367 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-23 18:41:25,379 INFO L200 MainTranslator]: Completed pre-run
[2024-11-23 18:41:25,391 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-23 18:41:25,405 INFO L204 MainTranslator]: Completed translation
[2024-11-23 18:41:25,405 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25 WrapperNode
[2024-11-23 18:41:25,406 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-23 18:41:25,406 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-23 18:41:25,407 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-23 18:41:25,407 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-23 18:41:25,414 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,421 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,435 INFO L138 Inliner]: procedures = 16, calls = 12, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 43
[2024-11-23 18:41:25,436 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-23 18:41:25,436 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-23 18:41:25,436 INFO L270 PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-23 18:41:25,437 INFO L274 PluginConnector]: Boogie Preprocessor initialized
[2024-11-23 18:41:25,445 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,445 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,446 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,458 INFO L175 MemorySlicer]: Split 4 memory accesses to 2 slices as follows [2, 2]. 50 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 1 writes are split as follows [0, 1].
[2024-11-23 18:41:25,458 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,458 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,463 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,464 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,467 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,468 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,469 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,470 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-23 18:41:25,471 INFO L112 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-23 18:41:25,471 INFO L270 PluginConnector]: Initializing RCFGBuilder...
[2024-11-23 18:41:25,471 INFO L274 PluginConnector]: RCFGBuilder initialized
[2024-11-23 18:41:25,472 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (1/1) ...
[2024-11-23 18:41:25,478 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:25,494 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:25,513 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:25,520 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2024-11-23 18:41:25,546 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-23 18:41:25,546 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-23 18:41:25,547 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1
[2024-11-23 18:41:25,547 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2024-11-23 18:41:25,621 INFO L234 CfgBuilder]: Building ICFG
[2024-11-23 18:41:25,623 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-23 18:41:25,788 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live.
[2024-11-23 18:41:25,788 INFO L283 CfgBuilder]: Performing block encoding
[2024-11-23 18:41:25,799 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-23 18:41:25,800 INFO L312 CfgBuilder]: Removed 2 assume(true) statements.
[2024-11-23 18:41:25,800 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:41:25 BoogieIcfgContainer
[2024-11-23 18:41:25,801 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-23 18:41:25,801 INFO L112 PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2024-11-23 18:41:25,802 INFO L270 PluginConnector]: Initializing BuchiAutomizer...
[2024-11-23 18:41:25,808 INFO L274 PluginConnector]: BuchiAutomizer initialized
[2024-11-23 18:41:25,809 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-23 18:41:25,809 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 23.11 06:41:25" (1/3) ...
[2024-11-23 18:41:25,811 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23f082d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 06:41:25, skipping insertion in model container
[2024-11-23 18:41:25,811 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-23 18:41:25,812 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.11 06:41:25" (2/3) ...
[2024-11-23 18:41:25,812 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23f082d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 23.11 06:41:25, skipping insertion in model container
[2024-11-23 18:41:25,813 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-23 18:41:25,813 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.11 06:41:25" (3/3) ...
[2024-11-23 18:41:25,814 INFO L363 chiAutomizerObserver]: Analyzing ICFG array_3-1.i
[2024-11-23 18:41:25,889 INFO L300 stractBuchiCegarLoop]: Interprodecural is true
[2024-11-23 18:41:25,890 INFO L301 stractBuchiCegarLoop]: Hoare is None
[2024-11-23 18:41:25,890 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2024-11-23 18:41:25,890 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2024-11-23 18:41:25,890 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2024-11-23 18:41:25,890 INFO L305 stractBuchiCegarLoop]: Difference is false
[2024-11-23 18:41:25,891 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2024-11-23 18:41:25,892 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2024-11-23 18:41:25,899 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:25,917 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5
[2024-11-23 18:41:25,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:25,918 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:25,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-23 18:41:25,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1]
[2024-11-23 18:41:25,924 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============
[2024-11-23 18:41:25,924 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:25,927 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5
[2024-11-23 18:41:25,927 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:25,927 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:25,928 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2024-11-23 18:41:25,928 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1]
[2024-11-23 18:41:25,936 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;"
[2024-11-23 18:41:25,937 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;"
[2024-11-23 18:41:25,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:25,943 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times
[2024-11-23 18:41:25,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:25,958 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694169353]
[2024-11-23 18:41:25,959 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:25,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:26,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,079 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:26,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,107 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:26,111 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:26,112 INFO L85 PathProgramCache]: Analyzing trace with hash 1221, now seen corresponding path program 1 times
[2024-11-23 18:41:26,112 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:26,112 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1744647864]
[2024-11-23 18:41:26,112 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:26,113 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:26,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,130 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:26,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,147 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:26,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:26,149 INFO L85 PathProgramCache]: Analyzing trace with hash 925703, now seen corresponding path program 1 times
[2024-11-23 18:41:26,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:26,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [979356642]
[2024-11-23 18:41:26,149 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:26,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:26,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,178 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:26,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:26,197 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:26,629 INFO L204 LassoAnalysis]: Preferences:
[2024-11-23 18:41:26,630 INFO L125 ssoRankerPreferences]: Compute integeral hull: false
[2024-11-23 18:41:26,630 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true
[2024-11-23 18:41:26,630 INFO L127 ssoRankerPreferences]: Term annotations enabled: false
[2024-11-23 18:41:26,630 INFO L128 ssoRankerPreferences]: Use exernal solver: false
[2024-11-23 18:41:26,632 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:26,633 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false
[2024-11-23 18:41:26,633 INFO L131 ssoRankerPreferences]: Path of dumped script:
[2024-11-23 18:41:26,633 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_3-1.i_Iteration1_Lasso
[2024-11-23 18:41:26,633 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank
[2024-11-23 18:41:26,633 INFO L241 LassoAnalysis]: Starting lasso preprocessing...
[2024-11-23 18:41:26,652 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,692 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,953 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,957 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,959 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:26,962 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-23 18:41:27,207 INFO L259 LassoAnalysis]: Preprocessing complete.
[2024-11-23 18:41:27,212 INFO L451 LassoAnalysis]: Using template 'affine'.
[2024-11-23 18:41:27,214 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,215 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,217 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,221 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,226 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,238 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,238 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation.
[2024-11-23 18:41:27,240 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,240 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,240 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,247 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications.
[2024-11-23 18:41:27,247 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added.
[2024-11-23 18:41:27,251 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,261 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0
[2024-11-23 18:41:27,261 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,261 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,263 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,267 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,268 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,283 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,283 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,283 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,283 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,287 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,287 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,292 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,302 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,303 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,304 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,307 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,311 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,312 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,324 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,324 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,325 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,325 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,328 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,328 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,334 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,343 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,344 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,346 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,350 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,351 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,366 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,366 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,366 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,366 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,370 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,370 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,375 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,384 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,385 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,385 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,388 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,393 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,396 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,412 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,412 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,412 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,412 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,415 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,415 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,421 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,430 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,431 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,431 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,433 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,438 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,438 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,453 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,453 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,453 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,453 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,458 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,458 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,468 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,478 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,478 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,479 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,481 INFO L229 MonitoredProcess]: Starting monitored process 8 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,484 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,487 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,502 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,502 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,502 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,502 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,506 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,506 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,514 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,522 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0
[2024-11-23 18:41:27,523 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,523 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,524 INFO L229 MonitoredProcess]: Starting monitored process 9 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,526 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,527 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,539 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,539 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,540 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,540 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,543 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,543 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,549 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,558 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0
[2024-11-23 18:41:27,559 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,559 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,561 INFO L229 MonitoredProcess]: Starting monitored process 10 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,563 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,564 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,579 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,579 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,579 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,579 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,582 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,582 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,588 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings.
[2024-11-23 18:41:27,597 INFO L540 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Forceful destruction successful, exit code 0
[2024-11-23 18:41:27,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,598 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,600 INFO L229 MonitoredProcess]: Starting monitored process 11 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,603 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,604 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false
[2024-11-23 18:41:27,619 INFO L338 nArgumentSynthesizer]: Template has degree 0.
[2024-11-23 18:41:27,620 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts
[2024-11-23 18:41:27,620 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts
[2024-11-23 18:41:27,620 INFO L205 nArgumentSynthesizer]: 2 template conjuncts.
[2024-11-23 18:41:27,625 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications.
[2024-11-23 18:41:27,625 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added.
[2024-11-23 18:41:27,639 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify.
[2024-11-23 18:41:27,685 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver.
[2024-11-23 18:41:27,688 INFO L444 ModelExtractionUtils]: 3 out of 13 variables were initially zero. Simplification set additionally 7 variables to zero.
[2024-11-23 18:41:27,690 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-23 18:41:27,691 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:27,694 INFO L229 MonitoredProcess]: Starting monitored process 12 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-23 18:41:27,696 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process
[2024-11-23 18:41:27,697 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants...
[2024-11-23 18:41:27,714 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2.
[2024-11-23 18:41:27,714 INFO L474 LassoAnalysis]: Proved termination.
[2024-11-23 18:41:27,714 INFO L476 LassoAnalysis]: Termination argument consisting of:
Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2047*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1
Supporting invariants []
[2024-11-23 18:41:27,724 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0
[2024-11-23 18:41:27,743 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed
[2024-11-23 18:41:27,757 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length
[2024-11-23 18:41:27,757 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL]
[2024-11-23 18:41:27,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:27,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:27,805 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:27,806 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:27,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:27,826 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:27,827 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:27,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2024-11-23 18:41:27,889 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates
[2024-11-23 18:41:27,891 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:27,937 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 17 states, 16 states have (on average 1.4375) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 32 states and 45 transitions. Complement of second has 6 states.
[2024-11-23 18:41:27,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states
[2024-11-23 18:41:27,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 1.3333333333333333) internal successors, (4), 3 states have internal predecessors, (4), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:27,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 22 transitions.
[2024-11-23 18:41:27,970 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 22 transitions. Stem has 2 letters. Loop has 2 letters.
[2024-11-23 18:41:27,973 INFO L116 BuchiAccepts]: Finished buchiAccepts.
[2024-11-23 18:41:27,973 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 22 transitions. Stem has 4 letters. Loop has 2 letters.
[2024-11-23 18:41:27,973 INFO L116 BuchiAccepts]: Finished buchiAccepts.
[2024-11-23 18:41:27,973 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 22 transitions. Stem has 2 letters. Loop has 4 letters.
[2024-11-23 18:41:27,974 INFO L116 BuchiAccepts]: Finished buchiAccepts.
[2024-11-23 18:41:27,975 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 45 transitions.
[2024-11-23 18:41:27,979 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:27,983 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 9 states and 11 transitions.
[2024-11-23 18:41:27,984 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6
[2024-11-23 18:41:27,985 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7
[2024-11-23 18:41:27,985 INFO L552 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0
[2024-11-23 18:41:27,985 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions.
[2024-11-23 18:41:27,987 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:27,988 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions.
[2024-11-23 18:41:28,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions.
[2024-11-23 18:41:28,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9.
[2024-11-23 18:41:28,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.2222222222222223) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:28,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions.
[2024-11-23 18:41:28,012 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 11 transitions.
[2024-11-23 18:41:28,012 INFO L425 stractBuchiCegarLoop]: Abstraction has 9 states and 11 transitions.
[2024-11-23 18:41:28,012 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============
[2024-11-23 18:41:28,013 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 11 transitions.
[2024-11-23 18:41:28,013 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:28,013 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:28,013 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:28,013 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1]
[2024-11-23 18:41:28,013 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:28,014 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:28,014 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:28,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:28,019 INFO L85 PathProgramCache]: Analyzing trace with hash 925769, now seen corresponding path program 1 times
[2024-11-23 18:41:28,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:28,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858595619]
[2024-11-23 18:41:28,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:28,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:28,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:28,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858595619]
[2024-11-23 18:41:28,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1858595619] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:28,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1452913024]
[2024-11-23 18:41:28,132 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:28,133 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:28,138 INFO L229 MonitoredProcess]: Starting monitored process 13 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:28,143 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process
[2024-11-23 18:41:28,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:28,183 INFO L256 TraceCheckSpWp]: Trace formula consists of 34 conjuncts, 2 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:28,183 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:28,193 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:28,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1452913024] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:28,211 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:28,212 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 5
[2024-11-23 18:41:28,212 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273405347]
[2024-11-23 18:41:28,214 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:28,216 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:28,217 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:28,217 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 1 times
[2024-11-23 18:41:28,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:28,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1252569486]
[2024-11-23 18:41:28,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:28,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:28,230 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:28,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:28,238 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:28,310 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:28,311 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-23 18:41:28,312 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20
[2024-11-23 18:41:28,316 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. cyclomatic complexity: 4 Second operand has 5 states, 5 states have (on average 1.6) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:28,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:28,360 INFO L93 Difference]: Finished difference Result 14 states and 15 transitions.
[2024-11-23 18:41:28,360 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 15 transitions.
[2024-11-23 18:41:28,360 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:28,361 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 15 transitions.
[2024-11-23 18:41:28,361 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10
[2024-11-23 18:41:28,361 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10
[2024-11-23 18:41:28,361 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 15 transitions.
[2024-11-23 18:41:28,361 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:28,361 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 15 transitions.
[2024-11-23 18:41:28,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 15 transitions.
[2024-11-23 18:41:28,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 11.
[2024-11-23 18:41:28,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.0909090909090908) internal successors, (12), 10 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:28,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 12 transitions.
[2024-11-23 18:41:28,365 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 12 transitions.
[2024-11-23 18:41:28,366 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2024-11-23 18:41:28,367 INFO L425 stractBuchiCegarLoop]: Abstraction has 11 states and 12 transitions.
[2024-11-23 18:41:28,367 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============
[2024-11-23 18:41:28,367 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 12 transitions.
[2024-11-23 18:41:28,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:28,367 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:28,367 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:28,368 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1]
[2024-11-23 18:41:28,368 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:28,368 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:28,368 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:28,372 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:28,372 INFO L85 PathProgramCache]: Analyzing trace with hash 207918545, now seen corresponding path program 1 times
[2024-11-23 18:41:28,372 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:28,372 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522912117]
[2024-11-23 18:41:28,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:28,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:28,517 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:28,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522912117]
[2024-11-23 18:41:28,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1522912117] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:28,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1327113977]
[2024-11-23 18:41:28,518 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,518 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:28,518 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:28,521 INFO L229 MonitoredProcess]: Starting monitored process 14 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:28,525 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process
[2024-11-23 18:41:28,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:28,576 INFO L256 TraceCheckSpWp]: Trace formula consists of 56 conjuncts, 4 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:28,577 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:28,605 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:28,650 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1327113977] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:28,650 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:28,650 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 9
[2024-11-23 18:41:28,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689773973]
[2024-11-23 18:41:28,650 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:28,651 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:28,651 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:28,651 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 2 times
[2024-11-23 18:41:28,651 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:28,651 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332249408]
[2024-11-23 18:41:28,651 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:28,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:28,657 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:28,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:28,662 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:28,726 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:28,727 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2024-11-23 18:41:28,727 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72
[2024-11-23 18:41:28,727 INFO L87 Difference]: Start difference. First operand 11 states and 12 transitions. cyclomatic complexity: 3 Second operand has 9 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:28,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:28,803 INFO L93 Difference]: Finished difference Result 34 states and 35 transitions.
[2024-11-23 18:41:28,803 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 35 transitions.
[2024-11-23 18:41:28,804 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:28,805 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 35 transitions.
[2024-11-23 18:41:28,805 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22
[2024-11-23 18:41:28,805 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22
[2024-11-23 18:41:28,805 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 35 transitions.
[2024-11-23 18:41:28,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:28,806 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 35 transitions.
[2024-11-23 18:41:28,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 35 transitions.
[2024-11-23 18:41:28,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 19.
[2024-11-23 18:41:28,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.0526315789473684) internal successors, (20), 18 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:28,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 20 transitions.
[2024-11-23 18:41:28,814 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 20 transitions.
[2024-11-23 18:41:28,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2024-11-23 18:41:28,816 INFO L425 stractBuchiCegarLoop]: Abstraction has 19 states and 20 transitions.
[2024-11-23 18:41:28,816 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============
[2024-11-23 18:41:28,816 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 20 transitions.
[2024-11-23 18:41:28,816 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:28,817 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:28,817 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:28,817 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 1, 1, 1, 1]
[2024-11-23 18:41:28,817 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:28,817 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:28,818 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:28,818 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:28,818 INFO L85 PathProgramCache]: Analyzing trace with hash -681478943, now seen corresponding path program 2 times
[2024-11-23 18:41:28,818 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:28,818 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943900792]
[2024-11-23 18:41:28,818 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:28,818 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:28,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:29,158 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:29,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1943900792]
[2024-11-23 18:41:29,159 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1943900792] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:29,159 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [179222792]
[2024-11-23 18:41:29,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:29,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:29,159 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:29,163 INFO L229 MonitoredProcess]: Starting monitored process 15 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:29,166 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process
[2024-11-23 18:41:29,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:29,236 INFO L256 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 8 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:29,238 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:29,283 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:29,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [179222792] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:29,447 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:29,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 17
[2024-11-23 18:41:29,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1586166525]
[2024-11-23 18:41:29,447 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:29,447 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:29,448 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:29,448 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 3 times
[2024-11-23 18:41:29,448 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:29,448 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563310301]
[2024-11-23 18:41:29,448 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:29,448 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:29,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:29,457 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:29,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:29,463 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:29,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:29,536 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants.
[2024-11-23 18:41:29,536 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272
[2024-11-23 18:41:29,536 INFO L87 Difference]: Start difference. First operand 19 states and 20 transitions. cyclomatic complexity: 3 Second operand has 17 states, 17 states have (on average 1.9411764705882353) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:29,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:29,714 INFO L93 Difference]: Finished difference Result 74 states and 75 transitions.
[2024-11-23 18:41:29,714 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 74 states and 75 transitions.
[2024-11-23 18:41:29,716 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:29,718 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 74 states to 74 states and 75 transitions.
[2024-11-23 18:41:29,718 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46
[2024-11-23 18:41:29,718 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46
[2024-11-23 18:41:29,718 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 75 transitions.
[2024-11-23 18:41:29,719 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:29,719 INFO L218 hiAutomatonCegarLoop]: Abstraction has 74 states and 75 transitions.
[2024-11-23 18:41:29,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 75 transitions.
[2024-11-23 18:41:29,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 35.
[2024-11-23 18:41:29,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 35 states have (on average 1.0285714285714285) internal successors, (36), 34 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:29,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 36 transitions.
[2024-11-23 18:41:29,722 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35 states and 36 transitions.
[2024-11-23 18:41:29,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2024-11-23 18:41:29,724 INFO L425 stractBuchiCegarLoop]: Abstraction has 35 states and 36 transitions.
[2024-11-23 18:41:29,724 INFO L332 stractBuchiCegarLoop]: ======== Iteration 5 ============
[2024-11-23 18:41:29,724 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 36 transitions.
[2024-11-23 18:41:29,725 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:29,725 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:29,725 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:29,726 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [14, 14, 1, 1, 1, 1]
[2024-11-23 18:41:29,726 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:29,726 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:29,726 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:29,727 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:29,727 INFO L85 PathProgramCache]: Analyzing trace with hash 491979521, now seen corresponding path program 3 times
[2024-11-23 18:41:29,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:29,727 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170535634]
[2024-11-23 18:41:29,727 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:29,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:29,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:30,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:30,410 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170535634]
[2024-11-23 18:41:30,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [170535634] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:30,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [403938337]
[2024-11-23 18:41:30,411 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:30,411 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:30,411 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:30,415 INFO L229 MonitoredProcess]: Starting monitored process 16 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:30,417 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process
[2024-11-23 18:41:30,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:30,519 INFO L256 TraceCheckSpWp]: Trace formula consists of 188 conjuncts, 16 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:30,522 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:30,616 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:31,162 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [403938337] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:31,163 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:31,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 33
[2024-11-23 18:41:31,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1477802870]
[2024-11-23 18:41:31,164 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:31,164 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:31,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:31,165 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 4 times
[2024-11-23 18:41:31,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:31,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549997761]
[2024-11-23 18:41:31,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:31,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:31,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:31,171 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:31,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:31,176 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:31,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:31,227 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants.
[2024-11-23 18:41:31,228 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056
[2024-11-23 18:41:31,229 INFO L87 Difference]: Start difference. First operand 35 states and 36 transitions. cyclomatic complexity: 3 Second operand has 33 states, 33 states have (on average 1.9696969696969697) internal successors, (65), 33 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:31,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:31,616 INFO L93 Difference]: Finished difference Result 154 states and 155 transitions.
[2024-11-23 18:41:31,617 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 154 states and 155 transitions.
[2024-11-23 18:41:31,620 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:31,622 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 154 states to 154 states and 155 transitions.
[2024-11-23 18:41:31,622 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94
[2024-11-23 18:41:31,622 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94
[2024-11-23 18:41:31,622 INFO L73 IsDeterministic]: Start isDeterministic. Operand 154 states and 155 transitions.
[2024-11-23 18:41:31,623 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:31,623 INFO L218 hiAutomatonCegarLoop]: Abstraction has 154 states and 155 transitions.
[2024-11-23 18:41:31,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states and 155 transitions.
[2024-11-23 18:41:31,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 67.
[2024-11-23 18:41:31,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 67 states have (on average 1.0149253731343284) internal successors, (68), 66 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:31,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions.
[2024-11-23 18:41:31,629 INFO L240 hiAutomatonCegarLoop]: Abstraction has 67 states and 68 transitions.
[2024-11-23 18:41:31,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states.
[2024-11-23 18:41:31,630 INFO L425 stractBuchiCegarLoop]: Abstraction has 67 states and 68 transitions.
[2024-11-23 18:41:31,630 INFO L332 stractBuchiCegarLoop]: ======== Iteration 6 ============
[2024-11-23 18:41:31,631 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 68 transitions.
[2024-11-23 18:41:31,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:31,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:31,632 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:31,636 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [30, 30, 1, 1, 1, 1]
[2024-11-23 18:41:31,637 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:31,637 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:31,637 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:31,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:31,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1456824129, now seen corresponding path program 4 times
[2024-11-23 18:41:31,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:31,638 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005314182]
[2024-11-23 18:41:31,638 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:31,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:31,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:33,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:33,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005314182]
[2024-11-23 18:41:33,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005314182] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:33,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [393121268]
[2024-11-23 18:41:33,113 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:33,113 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:33,113 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:33,119 INFO L229 MonitoredProcess]: Starting monitored process 17 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:33,120 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process
[2024-11-23 18:41:33,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:33,271 INFO L256 TraceCheckSpWp]: Trace formula consists of 364 conjuncts, 32 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:33,274 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:33,466 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:35,134 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [393121268] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:35,135 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:35,135 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33] total 65
[2024-11-23 18:41:35,135 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086980619]
[2024-11-23 18:41:35,135 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:35,136 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:35,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:35,136 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 5 times
[2024-11-23 18:41:35,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:35,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981492005]
[2024-11-23 18:41:35,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:35,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:35,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:35,142 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:35,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:35,146 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:35,196 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:35,199 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants.
[2024-11-23 18:41:35,202 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=2080, Invalid=2080, Unknown=0, NotChecked=0, Total=4160
[2024-11-23 18:41:35,202 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. cyclomatic complexity: 3 Second operand has 65 states, 65 states have (on average 1.9846153846153847) internal successors, (129), 65 states have internal predecessors, (129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:36,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:36,171 INFO L93 Difference]: Finished difference Result 314 states and 315 transitions.
[2024-11-23 18:41:36,171 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 314 states and 315 transitions.
[2024-11-23 18:41:36,178 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:36,180 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 314 states to 314 states and 315 transitions.
[2024-11-23 18:41:36,180 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 190
[2024-11-23 18:41:36,181 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 190
[2024-11-23 18:41:36,181 INFO L73 IsDeterministic]: Start isDeterministic. Operand 314 states and 315 transitions.
[2024-11-23 18:41:36,185 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:36,185 INFO L218 hiAutomatonCegarLoop]: Abstraction has 314 states and 315 transitions.
[2024-11-23 18:41:36,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states and 315 transitions.
[2024-11-23 18:41:36,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 131.
[2024-11-23 18:41:36,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 131 states, 131 states have (on average 1.0076335877862594) internal successors, (132), 130 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:36,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 132 transitions.
[2024-11-23 18:41:36,194 INFO L240 hiAutomatonCegarLoop]: Abstraction has 131 states and 132 transitions.
[2024-11-23 18:41:36,198 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states.
[2024-11-23 18:41:36,198 INFO L425 stractBuchiCegarLoop]: Abstraction has 131 states and 132 transitions.
[2024-11-23 18:41:36,198 INFO L332 stractBuchiCegarLoop]: ======== Iteration 7 ============
[2024-11-23 18:41:36,198 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 131 states and 132 transitions.
[2024-11-23 18:41:36,200 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:36,200 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:36,200 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:36,206 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [62, 62, 1, 1, 1, 1]
[2024-11-23 18:41:36,208 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:36,209 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:36,209 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:36,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:36,210 INFO L85 PathProgramCache]: Analyzing trace with hash 1851201473, now seen corresponding path program 5 times
[2024-11-23 18:41:36,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:36,211 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74115430]
[2024-11-23 18:41:36,211 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:36,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:36,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:40,390 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:41:40,390 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74115430]
[2024-11-23 18:41:40,390 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [74115430] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:41:40,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [424993738]
[2024-11-23 18:41:40,391 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:40,391 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:41:40,391 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:41:40,394 INFO L229 MonitoredProcess]: Starting monitored process 18 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:41:40,397 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process
[2024-11-23 18:41:40,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:41:40,643 INFO L256 TraceCheckSpWp]: Trace formula consists of 716 conjuncts, 64 conjuncts are in the unsatisfiable core
[2024-11-23 18:41:40,655 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:41:40,969 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:41:46,385 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [424993738] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:41:46,386 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:41:46,386 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65] total 129
[2024-11-23 18:41:46,386 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1136247505]
[2024-11-23 18:41:46,386 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:41:46,387 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:41:46,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:46,388 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 6 times
[2024-11-23 18:41:46,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:46,388 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110596063]
[2024-11-23 18:41:46,388 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:46,388 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:46,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:46,393 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:41:46,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:41:46,397 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:41:46,447 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:41:46,451 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 129 interpolants.
[2024-11-23 18:41:46,458 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8256, Invalid=8256, Unknown=0, NotChecked=0, Total=16512
[2024-11-23 18:41:46,460 INFO L87 Difference]: Start difference. First operand 131 states and 132 transitions. cyclomatic complexity: 3 Second operand has 129 states, 129 states have (on average 1.9922480620155039) internal successors, (257), 129 states have internal predecessors, (257), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:51,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:41:51,971 INFO L93 Difference]: Finished difference Result 634 states and 635 transitions.
[2024-11-23 18:41:51,971 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 634 states and 635 transitions.
[2024-11-23 18:41:51,976 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:51,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 634 states to 634 states and 635 transitions.
[2024-11-23 18:41:51,980 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 382
[2024-11-23 18:41:51,980 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 382
[2024-11-23 18:41:51,980 INFO L73 IsDeterministic]: Start isDeterministic. Operand 634 states and 635 transitions.
[2024-11-23 18:41:51,982 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:41:51,982 INFO L218 hiAutomatonCegarLoop]: Abstraction has 634 states and 635 transitions.
[2024-11-23 18:41:51,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states and 635 transitions.
[2024-11-23 18:41:51,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 259.
[2024-11-23 18:41:51,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 259 states, 259 states have (on average 1.0038610038610039) internal successors, (260), 258 states have internal predecessors, (260), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:41:52,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 260 transitions.
[2024-11-23 18:41:52,005 INFO L240 hiAutomatonCegarLoop]: Abstraction has 259 states and 260 transitions.
[2024-11-23 18:41:52,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states.
[2024-11-23 18:41:52,007 INFO L425 stractBuchiCegarLoop]: Abstraction has 259 states and 260 transitions.
[2024-11-23 18:41:52,008 INFO L332 stractBuchiCegarLoop]: ======== Iteration 8 ============
[2024-11-23 18:41:52,008 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 259 states and 260 transitions.
[2024-11-23 18:41:52,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:41:52,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:41:52,010 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:41:52,016 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [126, 126, 1, 1, 1, 1]
[2024-11-23 18:41:52,016 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:41:52,016 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:41:52,016 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:41:52,021 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:41:52,021 INFO L85 PathProgramCache]: Analyzing trace with hash -1622243135, now seen corresponding path program 6 times
[2024-11-23 18:41:52,021 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:41:52,021 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439363630]
[2024-11-23 18:41:52,021 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:41:52,021 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:41:52,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:42:04,497 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:42:04,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439363630]
[2024-11-23 18:42:04,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439363630] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:42:04,497 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [964854481]
[2024-11-23 18:42:04,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:42:04,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:42:04,497 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:42:04,499 INFO L229 MonitoredProcess]: Starting monitored process 19 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:42:04,501 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process
[2024-11-23 18:42:04,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:42:04,887 INFO L256 TraceCheckSpWp]: Trace formula consists of 1420 conjuncts, 128 conjuncts are in the unsatisfiable core
[2024-11-23 18:42:04,895 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:42:05,329 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:42:24,942 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [964854481] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:42:24,943 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:42:24,943 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [129, 129, 129] total 257
[2024-11-23 18:42:24,943 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [854278032]
[2024-11-23 18:42:24,943 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:42:24,944 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:42:24,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:42:24,944 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 7 times
[2024-11-23 18:42:24,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:42:24,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533903126]
[2024-11-23 18:42:24,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:42:24,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:42:24,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:42:24,949 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:42:24,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:42:24,953 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:42:24,995 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:42:25,001 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 257 interpolants.
[2024-11-23 18:42:25,010 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=32896, Invalid=32896, Unknown=0, NotChecked=0, Total=65792
[2024-11-23 18:42:25,010 INFO L87 Difference]: Start difference. First operand 259 states and 260 transitions. cyclomatic complexity: 3 Second operand has 257 states, 257 states have (on average 1.9961089494163424) internal successors, (513), 257 states have internal predecessors, (513), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:43:18,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-23 18:43:18,744 INFO L93 Difference]: Finished difference Result 1274 states and 1275 transitions.
[2024-11-23 18:43:18,744 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1274 states and 1275 transitions.
[2024-11-23 18:43:18,753 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:43:18,759 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1274 states to 1274 states and 1275 transitions.
[2024-11-23 18:43:18,759 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 766
[2024-11-23 18:43:18,760 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 766
[2024-11-23 18:43:18,760 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1274 states and 1275 transitions.
[2024-11-23 18:43:18,762 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-23 18:43:18,762 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1274 states and 1275 transitions.
[2024-11-23 18:43:18,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1274 states and 1275 transitions.
[2024-11-23 18:43:18,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1274 to 515.
[2024-11-23 18:43:18,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 515 states, 515 states have (on average 1.0019417475728156) internal successors, (516), 514 states have internal predecessors, (516), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-23 18:43:18,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 515 states to 515 states and 516 transitions.
[2024-11-23 18:43:18,799 INFO L240 hiAutomatonCegarLoop]: Abstraction has 515 states and 516 transitions.
[2024-11-23 18:43:18,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 256 states.
[2024-11-23 18:43:18,800 INFO L425 stractBuchiCegarLoop]: Abstraction has 515 states and 516 transitions.
[2024-11-23 18:43:18,802 INFO L332 stractBuchiCegarLoop]: ======== Iteration 9 ============
[2024-11-23 18:43:18,802 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 515 states and 516 transitions.
[2024-11-23 18:43:18,805 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3
[2024-11-23 18:43:18,805 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-23 18:43:18,805 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-23 18:43:18,814 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [254, 254, 1, 1, 1, 1]
[2024-11-23 18:43:18,814 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1]
[2024-11-23 18:43:18,815 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(12, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1024;" "havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1024);" "main_~i~0#1 := 0;"
[2024-11-23 18:43:18,815 INFO L749 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "assume !(main_~i~0#1 >= 1023);main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;"
[2024-11-23 18:43:18,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:43:18,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1995609407, now seen corresponding path program 7 times
[2024-11-23 18:43:18,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:43:18,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167417894]
[2024-11-23 18:43:18,816 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:43:18,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:43:19,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:44:01,574 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-23 18:44:01,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167417894]
[2024-11-23 18:44:01,574 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167417894] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-23 18:44:01,574 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2131191962]
[2024-11-23 18:44:01,574 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:44:01,575 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-23 18:44:01,575 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-23 18:44:01,577 INFO L229 MonitoredProcess]: Starting monitored process 20 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-23 18:44:01,578 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_043d6f45-b121-4bd9-8798-b637978c21c1/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process
[2024-11-23 18:44:02,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-23 18:44:02,322 INFO L256 TraceCheckSpWp]: Trace formula consists of 2828 conjuncts, 256 conjuncts are in the unsatisfiable core
[2024-11-23 18:44:02,335 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-23 18:44:03,122 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-23 18:45:22,011 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2131191962] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-23 18:45:22,011 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-23 18:45:22,011 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [257, 257, 257] total 513
[2024-11-23 18:45:22,011 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013227361]
[2024-11-23 18:45:22,011 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-23 18:45:22,014 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-23 18:45:22,014 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-23 18:45:22,014 INFO L85 PathProgramCache]: Analyzing trace with hash 49755, now seen corresponding path program 8 times
[2024-11-23 18:45:22,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-23 18:45:22,014 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871931068]
[2024-11-23 18:45:22,014 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-23 18:45:22,014 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-23 18:45:22,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:45:22,019 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-23 18:45:22,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-23 18:45:22,024 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-23 18:45:22,064 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-23 18:45:22,081 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 513 interpolants.
[2024-11-23 18:45:22,100 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=131328, Invalid=131328, Unknown=0, NotChecked=0, Total=262656
[2024-11-23 18:45:22,102 INFO L87 Difference]: Start difference. First operand 515 states and 516 transitions. cyclomatic complexity: 3 Second operand has 513 states, 513 states have (on average 1.9980506822612085) internal successors, (1025), 513 states have internal predecessors, (1025), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)