./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c --full-output --architecture 32bit
--------------------------------------------------------------------------------
Checking for termination
Using default analysis
Version 6497de01
Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )
--witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5cbdd74a230613e4bdaea53735767d2cb8a557f2fb27b4c6d6d20587e28e4a0f
--- Real Ultimate output ---
This is Ultimate 0.3.0-dev-6497de0
[2024-11-24 01:48:21,306 INFO L188 SettingsManager]: Resetting all preferences to default values...
[2024-11-24 01:48:21,408 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf
[2024-11-24 01:48:21,419 WARN L101 SettingsManager]: Preference file contains the following unknown settings:
[2024-11-24 01:48:21,419 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2024-11-24 01:48:21,445 INFO L130 SettingsManager]: Preferences different from defaults after loading the file:
[2024-11-24 01:48:21,445 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2024-11-24 01:48:21,446 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2024-11-24 01:48:21,446 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2024-11-24 01:48:21,446 INFO L153 SettingsManager]: * Use memory slicer=true
[2024-11-24 01:48:21,447 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2024-11-24 01:48:21,447 INFO L153 SettingsManager]: * Create parallel compositions if possible=false
[2024-11-24 01:48:21,447 INFO L153 SettingsManager]: * Use SBE=true
[2024-11-24 01:48:21,447 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2024-11-24 01:48:21,447 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3
[2024-11-24 01:48:21,448 INFO L153 SettingsManager]: * Use old map elimination=false
[2024-11-24 01:48:21,448 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false
[2024-11-24 01:48:21,448 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true
[2024-11-24 01:48:21,448 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES
[2024-11-24 01:48:21,448 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * sizeof long=4
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * sizeof POINTER=4
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * Check division by zero=IGNORE
[2024-11-24 01:48:21,449 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * sizeof long double=12
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Check if freed pointer was valid=false
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR
[2024-11-24 01:48:21,450 INFO L153 SettingsManager]: * Use constant arrays=true
[2024-11-24 01:48:21,451 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2024-11-24 01:48:21,451 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements
[2024-11-24 01:48:21,451 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2024-11-24 01:48:21,451 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM
[2024-11-24 01:48:21,452 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2024-11-24 01:48:21,452 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5cbdd74a230613e4bdaea53735767d2cb8a557f2fb27b4c6d6d20587e28e4a0f
[2024-11-24 01:48:21,889 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp
[2024-11-24 01:48:21,901 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2024-11-24 01:48:21,905 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2024-11-24 01:48:21,906 INFO L270 PluginConnector]: Initializing CDTParser...
[2024-11-24 01:48:21,907 INFO L274 PluginConnector]: CDTParser initialized
[2024-11-24 01:48:21,908 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c
[2024-11-24 01:48:25,289 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/data/676b6cd4d/d44b42d7992b4d53a7428b105393bb62/FLAGfc6de1be5
[2024-11-24 01:48:25,664 INFO L384 CDTParser]: Found 1 translation units.
[2024-11-24 01:48:25,665 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/sv-benchmarks/c/seq-mthreaded/pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c
[2024-11-24 01:48:25,697 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/data/676b6cd4d/d44b42d7992b4d53a7428b105393bb62/FLAGfc6de1be5
[2024-11-24 01:48:25,893 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/data/676b6cd4d/d44b42d7992b4d53a7428b105393bb62
[2024-11-24 01:48:25,897 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2024-11-24 01:48:25,899 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements.
[2024-11-24 01:48:25,900 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2024-11-24 01:48:25,901 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2024-11-24 01:48:25,907 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized
[2024-11-24 01:48:25,908 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:48:25" (1/1) ...
[2024-11-24 01:48:25,909 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c961d33 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:25, skipping insertion in model container
[2024-11-24 01:48:25,909 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:48:25" (1/1) ...
[2024-11-24 01:48:25,943 INFO L175 MainTranslator]: Built tables and reachable declarations
[2024-11-24 01:48:26,437 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-24 01:48:26,485 INFO L200 MainTranslator]: Completed pre-run
[2024-11-24 01:48:26,597 INFO L210 PostProcessor]: Analyzing one entry point: main
[2024-11-24 01:48:26,619 INFO L204 MainTranslator]: Completed translation
[2024-11-24 01:48:26,620 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26 WrapperNode
[2024-11-24 01:48:26,620 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2024-11-24 01:48:26,622 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2024-11-24 01:48:26,622 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner...
[2024-11-24 01:48:26,622 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized
[2024-11-24 01:48:26,638 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,655 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,732 INFO L138 Inliner]: procedures = 25, calls = 18, calls flagged for inlining = 13, calls inlined = 13, statements flattened = 435
[2024-11-24 01:48:26,733 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2024-11-24 01:48:26,741 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2024-11-24 01:48:26,741 INFO L270 PluginConnector]: Initializing Boogie Preprocessor...
[2024-11-24 01:48:26,741 INFO L274 PluginConnector]: Boogie Preprocessor initialized
[2024-11-24 01:48:26,769 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,769 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,778 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,825 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2024-11-24 01:48:26,825 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,825 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,856 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,857 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,870 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,875 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,878 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,889 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2024-11-24 01:48:26,891 INFO L112 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2024-11-24 01:48:26,894 INFO L270 PluginConnector]: Initializing RCFGBuilder...
[2024-11-24 01:48:26,895 INFO L274 PluginConnector]: RCFGBuilder initialized
[2024-11-24 01:48:26,896 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (1/1) ...
[2024-11-24 01:48:26,908 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-24 01:48:26,932 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:26,952 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2024-11-24 01:48:26,959 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2024-11-24 01:48:26,992 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2024-11-24 01:48:26,992 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0
[2024-11-24 01:48:26,992 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2024-11-24 01:48:26,992 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2024-11-24 01:48:27,148 INFO L234 CfgBuilder]: Building ICFG
[2024-11-24 01:48:27,151 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation
[2024-11-24 01:48:27,964 INFO L? ?]: Removed 51 outVars from TransFormulas that were not future-live.
[2024-11-24 01:48:27,964 INFO L283 CfgBuilder]: Performing block encoding
[2024-11-24 01:48:27,983 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2024-11-24 01:48:27,984 INFO L312 CfgBuilder]: Removed 1 assume(true) statements.
[2024-11-24 01:48:27,984 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:48:27 BoogieIcfgContainer
[2024-11-24 01:48:27,984 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2024-11-24 01:48:27,985 INFO L112 PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2024-11-24 01:48:27,985 INFO L270 PluginConnector]: Initializing BuchiAutomizer...
[2024-11-24 01:48:27,990 INFO L274 PluginConnector]: BuchiAutomizer initialized
[2024-11-24 01:48:27,991 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-24 01:48:27,991 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 24.11 01:48:25" (1/3) ...
[2024-11-24 01:48:27,992 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51ed072f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.11 01:48:27, skipping insertion in model container
[2024-11-24 01:48:27,992 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-24 01:48:27,992 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:48:26" (2/3) ...
[2024-11-24 01:48:27,992 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@51ed072f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.11 01:48:27, skipping insertion in model container
[2024-11-24 01:48:27,993 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2024-11-24 01:48:27,993 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:48:27" (3/3) ...
[2024-11-24 01:48:27,994 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c
[2024-11-24 01:48:28,056 INFO L300 stractBuchiCegarLoop]: Interprodecural is true
[2024-11-24 01:48:28,057 INFO L301 stractBuchiCegarLoop]: Hoare is None
[2024-11-24 01:48:28,057 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2024-11-24 01:48:28,057 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2024-11-24 01:48:28,057 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2024-11-24 01:48:28,057 INFO L305 stractBuchiCegarLoop]: Difference is false
[2024-11-24 01:48:28,057 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2024-11-24 01:48:28,057 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2024-11-24 01:48:28,065 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:28,092 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71
[2024-11-24 01:48:28,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-24 01:48:28,094 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-24 01:48:28,108 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:28,108 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:28,108 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============
[2024-11-24 01:48:28,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:28,120 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 71
[2024-11-24 01:48:28,122 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-24 01:48:28,122 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-24 01:48:28,124 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:28,125 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:28,135 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == ~r1~0);init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume 0 == assume_abort_if_not_~cond#1;assume false;" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;"
[2024-11-24 01:48:28,136 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 12;" "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume 0 != ~mode2~0 % 256;node2_~m2~0#1 := ~p1_old~0;~p1_old~0 := ~nomsg~0;" "assume !(node2_~m2~0#1 != ~nomsg~0);" "~mode2~0 := 0;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume 0 != ~mode3~0 % 256;node3_~m3~0#1 := ~p2_old~0;~p2_old~0 := ~nomsg~0;" "assume !(node3_~m3~0#1 != ~nomsg~0);" "~mode3~0 := 0;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);" "assume 0 != ~alive4~0 % 256;~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);" "~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0;" "assume !(node5_~m5~0#1 != ~nomsg~0);" "~mode5~0 := 0;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);" "assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);" "~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1;"
[2024-11-24 01:48:28,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:28,143 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845626, now seen corresponding path program 1 times
[2024-11-24 01:48:28,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:28,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035666963]
[2024-11-24 01:48:28,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:28,160 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:28,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:28,477 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:28,478 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035666963]
[2024-11-24 01:48:28,480 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1035666963] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:28,480 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1376164428]
[2024-11-24 01:48:28,481 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:28,481 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:28,481 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:28,486 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:28,489 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process
[2024-11-24 01:48:28,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:28,656 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 1 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:28,661 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:28,667 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:28,670 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1376164428] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:28,670 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:28,671 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2, 2, 2] total 2
[2024-11-24 01:48:28,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1716267181]
[2024-11-24 01:48:28,673 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:28,677 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-24 01:48:28,678 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:28,679 INFO L85 PathProgramCache]: Analyzing trace with hash 1132429052, now seen corresponding path program 1 times
[2024-11-24 01:48:28,679 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:28,679 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956504323]
[2024-11-24 01:48:28,679 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:28,679 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:28,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:29,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:29,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956504323]
[2024-11-24 01:48:29,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [956504323] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:29,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1387826675]
[2024-11-24 01:48:29,462 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:29,462 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:29,463 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:29,468 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:29,471 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process
[2024-11-24 01:48:29,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:29,591 INFO L256 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:29,594 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:29,647 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:29,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1387826675] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:29,774 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:29,775 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7
[2024-11-24 01:48:29,778 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49897842]
[2024-11-24 01:48:29,779 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:29,780 INFO L764 eck$LassoCheckResult]: loop already infeasible
[2024-11-24 01:48:29,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-24 01:48:29,820 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants.
[2024-11-24 01:48:29,821 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2
[2024-11-24 01:48:29,825 INFO L87 Difference]: Start difference. First operand has 122 states, 121 states have (on average 1.743801652892562) internal successors, (211), 121 states have internal predecessors, (211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:29,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-24 01:48:29,855 INFO L93 Difference]: Finished difference Result 121 states and 207 transitions.
[2024-11-24 01:48:29,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 121 states and 207 transitions.
[2024-11-24 01:48:29,863 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:29,877 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 121 states to 116 states and 202 transitions.
[2024-11-24 01:48:29,878 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116
[2024-11-24 01:48:29,879 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116
[2024-11-24 01:48:29,879 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 202 transitions.
[2024-11-24 01:48:29,882 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-24 01:48:29,883 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 202 transitions.
[2024-11-24 01:48:29,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 202 transitions.
[2024-11-24 01:48:29,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116.
[2024-11-24 01:48:29,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.7413793103448276) internal successors, (202), 115 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:29,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 202 transitions.
[2024-11-24 01:48:29,915 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 202 transitions.
[2024-11-24 01:48:29,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states.
[2024-11-24 01:48:29,920 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 202 transitions.
[2024-11-24 01:48:29,920 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============
[2024-11-24 01:48:29,920 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 202 transitions.
[2024-11-24 01:48:29,922 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:29,923 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-24 01:48:29,923 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-24 01:48:29,924 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:29,924 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:29,924 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == ~r1~0);init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;"
[2024-11-24 01:48:29,924 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 12;" "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);" "assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);" "~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0;" "assume !(node4_~m4~0#1 != ~nomsg~0);" "~mode4~0 := 0;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0;" "assume !(node5_~m5~0#1 != ~nomsg~0);" "~mode5~0 := 0;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);" "assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);" "~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1;"
[2024-11-24 01:48:29,925 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:29,925 INFO L85 PathProgramCache]: Analyzing trace with hash 2035845688, now seen corresponding path program 1 times
[2024-11-24 01:48:29,925 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:29,925 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422014173]
[2024-11-24 01:48:29,925 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:29,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:29,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:30,135 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:30,136 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422014173]
[2024-11-24 01:48:30,136 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422014173] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:30,136 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1574092650]
[2024-11-24 01:48:30,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:30,136 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:30,136 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:30,142 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:30,144 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process
[2024-11-24 01:48:30,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:30,285 INFO L256 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:30,287 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:30,305 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:30,316 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1574092650] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:30,316 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:30,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 5
[2024-11-24 01:48:30,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067444918]
[2024-11-24 01:48:30,317 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:30,317 INFO L752 eck$LassoCheckResult]: stem already infeasible
[2024-11-24 01:48:30,318 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:30,318 INFO L85 PathProgramCache]: Analyzing trace with hash 959599165, now seen corresponding path program 1 times
[2024-11-24 01:48:30,318 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:30,318 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013150144]
[2024-11-24 01:48:30,319 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:30,319 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:30,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:30,581 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:30,581 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013150144]
[2024-11-24 01:48:30,581 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013150144] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:30,582 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [932031033]
[2024-11-24 01:48:30,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:30,582 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:30,582 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:30,587 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:30,589 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process
[2024-11-24 01:48:30,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:30,696 INFO L256 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:30,698 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:30,728 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:30,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [932031033] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:30,805 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:30,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7
[2024-11-24 01:48:30,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224501025]
[2024-11-24 01:48:30,805 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:30,806 INFO L764 eck$LassoCheckResult]: loop already infeasible
[2024-11-24 01:48:30,806 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-24 01:48:30,810 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2024-11-24 01:48:30,810 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2024-11-24 01:48:30,810 INFO L87 Difference]: Start difference. First operand 116 states and 202 transitions. cyclomatic complexity: 87 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:30,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-24 01:48:30,992 INFO L93 Difference]: Finished difference Result 119 states and 204 transitions.
[2024-11-24 01:48:30,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 204 transitions.
[2024-11-24 01:48:30,995 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:31,000 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 116 states and 161 transitions.
[2024-11-24 01:48:31,000 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116
[2024-11-24 01:48:31,000 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116
[2024-11-24 01:48:31,000 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 161 transitions.
[2024-11-24 01:48:31,001 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-24 01:48:31,001 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 161 transitions.
[2024-11-24 01:48:31,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 161 transitions.
[2024-11-24 01:48:31,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116.
[2024-11-24 01:48:31,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.3879310344827587) internal successors, (161), 115 states have internal predecessors, (161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:31,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 161 transitions.
[2024-11-24 01:48:31,016 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 161 transitions.
[2024-11-24 01:48:31,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-24 01:48:31,021 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 161 transitions.
[2024-11-24 01:48:31,021 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============
[2024-11-24 01:48:31,021 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 161 transitions.
[2024-11-24 01:48:31,023 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:31,025 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-24 01:48:31,025 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-24 01:48:31,027 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:31,028 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:31,028 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == ~r1~0;" "assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;"
[2024-11-24 01:48:31,028 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 12;" "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);" "assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);" "~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0;" "assume !(node4_~m4~0#1 != ~nomsg~0);" "~mode4~0 := 0;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume 0 != ~mode5~0 % 256;node5_~m5~0#1 := ~p4_old~0;~p4_old~0 := ~nomsg~0;" "assume !(node5_~m5~0#1 != ~nomsg~0);" "~mode5~0 := 0;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);" "assume 0 != ~alive6~0 % 256;~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);" "~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1;"
[2024-11-24 01:48:31,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:31,029 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 1 times
[2024-11-24 01:48:31,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:31,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1935235549]
[2024-11-24 01:48:31,030 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:31,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:31,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:31,135 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-24 01:48:31,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:31,298 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-24 01:48:31,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:31,300 INFO L85 PathProgramCache]: Analyzing trace with hash 959599165, now seen corresponding path program 2 times
[2024-11-24 01:48:31,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:31,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296904313]
[2024-11-24 01:48:31,300 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:31,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:31,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:31,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:31,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296904313]
[2024-11-24 01:48:31,595 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1296904313] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:31,595 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [924987851]
[2024-11-24 01:48:31,595 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:31,595 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:31,595 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:31,598 INFO L229 MonitoredProcess]: Starting monitored process 6 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:31,602 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process
[2024-11-24 01:48:31,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:31,768 INFO L256 TraceCheckSpWp]: Trace formula consists of 99 conjuncts, 11 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:31,770 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:31,795 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:31,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [924987851] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:31,862 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:31,862 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7
[2024-11-24 01:48:31,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [864579889]
[2024-11-24 01:48:31,862 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:31,863 INFO L764 eck$LassoCheckResult]: loop already infeasible
[2024-11-24 01:48:31,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM
[2024-11-24 01:48:31,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2024-11-24 01:48:31,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42
[2024-11-24 01:48:31,867 INFO L87 Difference]: Start difference. First operand 116 states and 161 transitions. cyclomatic complexity: 46 Second operand has 7 states, 7 states have (on average 5.0) internal successors, (35), 7 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:31,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2024-11-24 01:48:31,922 INFO L93 Difference]: Finished difference Result 119 states and 163 transitions.
[2024-11-24 01:48:31,922 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 119 states and 163 transitions.
[2024-11-24 01:48:31,923 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:31,924 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 119 states to 116 states and 159 transitions.
[2024-11-24 01:48:31,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 116
[2024-11-24 01:48:31,925 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 116
[2024-11-24 01:48:31,925 INFO L73 IsDeterministic]: Start isDeterministic. Operand 116 states and 159 transitions.
[2024-11-24 01:48:31,926 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2024-11-24 01:48:31,926 INFO L218 hiAutomatonCegarLoop]: Abstraction has 116 states and 159 transitions.
[2024-11-24 01:48:31,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states and 159 transitions.
[2024-11-24 01:48:31,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116.
[2024-11-24 01:48:31,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 116 states, 116 states have (on average 1.3706896551724137) internal successors, (159), 115 states have internal predecessors, (159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2024-11-24 01:48:31,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 159 transitions.
[2024-11-24 01:48:31,936 INFO L240 hiAutomatonCegarLoop]: Abstraction has 116 states and 159 transitions.
[2024-11-24 01:48:31,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2024-11-24 01:48:31,937 INFO L425 stractBuchiCegarLoop]: Abstraction has 116 states and 159 transitions.
[2024-11-24 01:48:31,937 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============
[2024-11-24 01:48:31,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 116 states and 159 transitions.
[2024-11-24 01:48:31,939 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 69
[2024-11-24 01:48:31,939 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2024-11-24 01:48:31,939 INFO L119 BuchiIsEmpty]: Starting construction of run
[2024-11-24 01:48:31,940 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:31,941 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2024-11-24 01:48:31,941 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(50, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~alive1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~alive2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~alive3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~alive4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~alive5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~alive6~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~ret35#1, main_#t~ret36#1, main_#t~post37#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;assume 0 == main_#t~nondet9#1 || 1 == main_#t~nondet9#1;~alive1~0 := (if 0 == main_#t~nondet9#1 % 256 then 0 else 1);havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~id2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~st2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;~send2~0 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;assume 0 == main_#t~nondet13#1 || 1 == main_#t~nondet13#1;~mode2~0 := (if 0 == main_#t~nondet13#1 % 256 then 0 else 1);havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;assume 0 == main_#t~nondet14#1 || 1 == main_#t~nondet14#1;~alive2~0 := (if 0 == main_#t~nondet14#1 % 256 then 0 else 1);havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~id3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;~st3~0 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~send3~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;assume 0 == main_#t~nondet18#1 || 1 == main_#t~nondet18#1;~mode3~0 := (if 0 == main_#t~nondet18#1 % 256 then 0 else 1);havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;assume 0 == main_#t~nondet19#1 || 1 == main_#t~nondet19#1;~alive3~0 := (if 0 == main_#t~nondet19#1 % 256 then 0 else 1);havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;~id4~0 := main_#t~nondet20#1;havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~st4~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~send4~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;assume 0 == main_#t~nondet23#1 || 1 == main_#t~nondet23#1;~mode4~0 := (if 0 == main_#t~nondet23#1 % 256 then 0 else 1);havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~alive4~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id5~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st5~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send5~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode5~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;assume 0 == main_#t~nondet29#1 || 1 == main_#t~nondet29#1;~alive5~0 := (if 0 == main_#t~nondet29#1 % 256 then 0 else 1);havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~id6~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~st6~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;~send6~0 := main_#t~nondet32#1;havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;assume 0 == main_#t~nondet33#1 || 1 == main_#t~nondet33#1;~mode6~0 := (if 0 == main_#t~nondet33#1 % 256 then 0 else 1);havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;assume 0 == main_#t~nondet34#1 || 1 == main_#t~nondet34#1;~alive6~0 := (if 0 == main_#t~nondet34#1 % 256 then 0 else 1);havoc main_#t~nondet34#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == ~r1~0;" "assume (if ~alive1~0 % 256 % 4294967296 <= 2147483647 then ~alive1~0 % 256 % 4294967296 else ~alive1~0 % 256 % 4294967296 - 4294967296) + (if ~alive2~0 % 256 % 4294967296 <= 2147483647 then ~alive2~0 % 256 % 4294967296 else ~alive2~0 % 256 % 4294967296 - 4294967296) + (if ~alive3~0 % 256 % 4294967296 <= 2147483647 then ~alive3~0 % 256 % 4294967296 else ~alive3~0 % 256 % 4294967296 - 4294967296) + (if ~alive4~0 % 256 % 4294967296 <= 2147483647 then ~alive4~0 % 256 % 4294967296 else ~alive4~0 % 256 % 4294967296 - 4294967296) + (if ~alive5~0 % 256 % 4294967296 <= 2147483647 then ~alive5~0 % 256 % 4294967296 else ~alive5~0 % 256 % 4294967296 - 4294967296) + (if ~alive6~0 % 256 % 4294967296 <= 2147483647 then ~alive6~0 % 256 % 4294967296 else ~alive6~0 % 256 % 4294967296 - 4294967296) >= 1;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id5~0 != ~id6~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret35#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret35#1;havoc main_#t~ret35#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;main_~i2~0#1 := 0;"
[2024-11-24 01:48:31,941 INFO L749 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 12;" "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);" "assume 0 != ~alive1~0 % 256;~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);" "~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);" "assume 0 != ~alive2~0 % 256;~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);" "~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);" "assume 0 != ~alive3~0 % 256;~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);" "~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume 0 != ~mode4~0 % 256;node4_~m4~0#1 := ~p3_old~0;~p3_old~0 := ~nomsg~0;" "assume !(node4_~m4~0#1 != ~nomsg~0);" "~mode4~0 := 0;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);" "assume 0 != ~alive5~0 % 256;~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);" "~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume 0 != ~mode6~0 % 256;node6_~m6~0#1 := ~p5_old~0;~p5_old~0 := ~nomsg~0;" "assume !(node6_~m6~0#1 != ~nomsg~0);" "~mode6~0 := 0;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 <= 1;" "assume ~r1~0 < 6;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret36#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret36#1;havoc main_#t~ret36#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post37#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post37#1;havoc main_#t~post37#1;"
[2024-11-24 01:48:31,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:31,942 INFO L85 PathProgramCache]: Analyzing trace with hash -1766357374, now seen corresponding path program 2 times
[2024-11-24 01:48:31,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:31,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520164849]
[2024-11-24 01:48:31,942 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:31,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:32,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:32,013 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-24 01:48:32,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:32,083 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-24 01:48:32,083 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:32,084 INFO L85 PathProgramCache]: Analyzing trace with hash 745311026, now seen corresponding path program 1 times
[2024-11-24 01:48:32,084 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:32,084 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426892240]
[2024-11-24 01:48:32,084 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:32,084 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:32,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:32,126 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2024-11-24 01:48:32,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2024-11-24 01:48:32,161 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace
[2024-11-24 01:48:32,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier
[2024-11-24 01:48:32,165 INFO L85 PathProgramCache]: Analyzing trace with hash 2101464499, now seen corresponding path program 1 times
[2024-11-24 01:48:32,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM
[2024-11-24 01:48:32,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747631159]
[2024-11-24 01:48:32,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:32,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2024-11-24 01:48:32,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:32,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace
[2024-11-24 01:48:32,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747631159]
[2024-11-24 01:48:32,334 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747631159] provided 0 perfect and 1 imperfect interpolant sequences
[2024-11-24 01:48:32,334 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1016409663]
[2024-11-24 01:48:32,334 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2024-11-24 01:48:32,335 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true
[2024-11-24 01:48:32,335 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3
[2024-11-24 01:48:32,341 INFO L229 MonitoredProcess]: Starting monitored process 7 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null)
[2024-11-24 01:48:32,344 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_bf3524ac-b9e5-48eb-bf09-94f3da9a7dac/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process
[2024-11-24 01:48:32,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2024-11-24 01:48:32,535 INFO L256 TraceCheckSpWp]: Trace formula consists of 354 conjuncts, 2 conjuncts are in the unsatisfiable core
[2024-11-24 01:48:32,537 INFO L279 TraceCheckSpWp]: Computing forward predicates...
[2024-11-24 01:48:32,665 INFO L312 TraceCheckSpWp]: Computing backward predicates...
[2024-11-24 01:48:32,798 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1016409663] provided 0 perfect and 2 imperfect interpolant sequences
[2024-11-24 01:48:32,798 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences.
[2024-11-24 01:48:32,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 3
[2024-11-24 01:48:32,799 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410832677]
[2024-11-24 01:48:32,799 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton
[2024-11-24 01:48:38,684 INFO L204 LassoAnalysis]: Preferences:
[2024-11-24 01:48:38,685 INFO L125 ssoRankerPreferences]: Compute integeral hull: false
[2024-11-24 01:48:38,685 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true
[2024-11-24 01:48:38,686 INFO L127 ssoRankerPreferences]: Term annotations enabled: false
[2024-11-24 01:48:38,686 INFO L128 ssoRankerPreferences]: Use exernal solver: true
[2024-11-24 01:48:38,686 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2024-11-24 01:48:38,686 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false
[2024-11-24 01:48:38,686 INFO L131 ssoRankerPreferences]: Path of dumped script:
[2024-11-24 01:48:38,687 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr-var-start-time.6.1.ufo.BOUNDED-12.pals.c_Iteration4_Loop
[2024-11-24 01:48:38,687 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank
[2024-11-24 01:48:38,687 INFO L241 LassoAnalysis]: Starting lasso preprocessing...
[2024-11-24 01:48:38,740 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:38,747 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:38,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,177 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,183 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,187 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,190 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,195 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,202 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,205 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,207 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,211 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,216 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,219 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,221 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,224 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,227 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,234 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,240 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,242 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,245 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,252 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,258 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,265 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,273 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:41,276 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true
[2024-11-24 01:48:43,893 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 25