./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 6497de01 Calling Ultimate with: /usr/bin/java -Dosgi.configuration.area=/tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/data/config -Xmx15G -Xms4m -jar /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/data -tc /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c -s /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a3df27f87602fca8935d2269a873dfd3f1a5195383d477434680a0bc703d239a --- Real Ultimate output --- This is Ultimate 0.3.0-dev-6497de0 [2024-11-24 01:38:27,857 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-11-24 01:38:27,931 INFO L114 SettingsManager]: Loading settings from /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/config/svcomp-Termination-32bit-Automizer_Default.epf [2024-11-24 01:38:27,937 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-11-24 01:38:27,937 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-11-24 01:38:27,977 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-11-24 01:38:27,978 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-11-24 01:38:27,978 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-11-24 01:38:27,978 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2024-11-24 01:38:27,978 INFO L153 SettingsManager]: * Use memory slicer=true [2024-11-24 01:38:27,979 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Use SBE=true [2024-11-24 01:38:27,979 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Use old map elimination=false [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2024-11-24 01:38:27,979 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2024-11-24 01:38:27,979 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * sizeof long=4 [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * sizeof long double=12 [2024-11-24 01:38:27,980 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-11-24 01:38:27,981 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2024-11-24 01:38:27,981 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2024-11-24 01:38:27,981 INFO L153 SettingsManager]: * Use constant arrays=true [2024-11-24 01:38:27,983 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-11-24 01:38:27,983 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-11-24 01:38:27,983 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-11-24 01:38:27,983 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL_NO_AM [2024-11-24 01:38:27,983 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2024-11-24 01:38:27,984 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a3df27f87602fca8935d2269a873dfd3f1a5195383d477434680a0bc703d239a [2024-11-24 01:38:28,246 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-11-24 01:38:28,255 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-11-24 01:38:28,258 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-11-24 01:38:28,260 INFO L270 PluginConnector]: Initializing CDTParser... [2024-11-24 01:38:28,260 INFO L274 PluginConnector]: CDTParser initialized [2024-11-24 01:38:28,262 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/../../sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2024-11-24 01:38:31,281 INFO L533 CDTParser]: Created temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/data/55ba0e459/58c53771491f4d0399877632a54e7097/FLAG020882654 [2024-11-24 01:38:31,621 INFO L384 CDTParser]: Found 1 translation units. [2024-11-24 01:38:31,621 INFO L180 CDTParser]: Scanning /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/sv-benchmarks/c/seq-mthreaded/pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2024-11-24 01:38:31,638 INFO L427 CDTParser]: About to delete temporary CDT project at /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/data/55ba0e459/58c53771491f4d0399877632a54e7097/FLAG020882654 [2024-11-24 01:38:31,662 INFO L435 CDTParser]: Successfully deleted /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/data/55ba0e459/58c53771491f4d0399877632a54e7097 [2024-11-24 01:38:31,665 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-11-24 01:38:31,666 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2024-11-24 01:38:31,668 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2024-11-24 01:38:31,668 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2024-11-24 01:38:31,679 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2024-11-24 01:38:31,680 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:38:31" (1/1) ... [2024-11-24 01:38:31,681 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5315d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:31, skipping insertion in model container [2024-11-24 01:38:31,681 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.11 01:38:31" (1/1) ... [2024-11-24 01:38:31,717 INFO L175 MainTranslator]: Built tables and reachable declarations [2024-11-24 01:38:32,017 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:38:32,032 INFO L200 MainTranslator]: Completed pre-run [2024-11-24 01:38:32,108 INFO L210 PostProcessor]: Analyzing one entry point: main [2024-11-24 01:38:32,126 INFO L204 MainTranslator]: Completed translation [2024-11-24 01:38:32,127 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32 WrapperNode [2024-11-24 01:38:32,127 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2024-11-24 01:38:32,128 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-11-24 01:38:32,128 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-11-24 01:38:32,129 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-11-24 01:38:32,135 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,148 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,183 INFO L138 Inliner]: procedures = 28, calls = 20, calls flagged for inlining = 15, calls inlined = 15, statements flattened = 505 [2024-11-24 01:38:32,184 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-11-24 01:38:32,184 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-11-24 01:38:32,184 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-11-24 01:38:32,184 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-11-24 01:38:32,193 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,194 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,197 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,214 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2024-11-24 01:38:32,215 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,215 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,232 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,236 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,252 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,254 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,259 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,264 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-11-24 01:38:32,264 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-11-24 01:38:32,265 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-11-24 01:38:32,265 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-11-24 01:38:32,266 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (1/1) ... [2024-11-24 01:38:32,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-24 01:38:32,287 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:38:32,302 INFO L229 MonitoredProcess]: Starting monitored process 1 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2024-11-24 01:38:32,305 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2024-11-24 01:38:32,338 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2024-11-24 01:38:32,338 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2024-11-24 01:38:32,338 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-11-24 01:38:32,338 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-11-24 01:38:32,481 INFO L234 CfgBuilder]: Building ICFG [2024-11-24 01:38:32,483 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2024-11-24 01:38:33,221 INFO L? ?]: Removed 55 outVars from TransFormulas that were not future-live. [2024-11-24 01:38:33,221 INFO L283 CfgBuilder]: Performing block encoding [2024-11-24 01:38:33,236 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-11-24 01:38:33,238 INFO L312 CfgBuilder]: Removed 2 assume(true) statements. [2024-11-24 01:38:33,239 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:38:33 BoogieIcfgContainer [2024-11-24 01:38:33,239 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-11-24 01:38:33,240 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2024-11-24 01:38:33,240 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2024-11-24 01:38:33,246 INFO L274 PluginConnector]: BuchiAutomizer initialized [2024-11-24 01:38:33,247 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-24 01:38:33,247 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 24.11 01:38:31" (1/3) ... [2024-11-24 01:38:33,249 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@562ae5e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.11 01:38:33, skipping insertion in model container [2024-11-24 01:38:33,249 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-24 01:38:33,249 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.11 01:38:32" (2/3) ... [2024-11-24 01:38:33,251 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@562ae5e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 24.11 01:38:33, skipping insertion in model container [2024-11-24 01:38:33,251 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2024-11-24 01:38:33,251 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.11 01:38:33" (3/3) ... [2024-11-24 01:38:33,252 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_lcr.8.1.ufo.UNBOUNDED.pals.c [2024-11-24 01:38:33,312 INFO L300 stractBuchiCegarLoop]: Interprodecural is true [2024-11-24 01:38:33,313 INFO L301 stractBuchiCegarLoop]: Hoare is None [2024-11-24 01:38:33,313 INFO L302 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2024-11-24 01:38:33,313 INFO L303 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2024-11-24 01:38:33,313 INFO L304 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2024-11-24 01:38:33,313 INFO L305 stractBuchiCegarLoop]: Difference is false [2024-11-24 01:38:33,314 INFO L306 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2024-11-24 01:38:33,314 INFO L310 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2024-11-24 01:38:33,321 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:33,350 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-11-24 01:38:33,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-24 01:38:33,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-24 01:38:33,359 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:33,360 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:33,360 INFO L332 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2024-11-24 01:38:33,362 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:33,373 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 62 [2024-11-24 01:38:33,373 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-24 01:38:33,373 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-24 01:38:33,374 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:33,375 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:33,421 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~mode7~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~mode8~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296));init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-24 01:38:33,422 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0;" "assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1;" "havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0;" "assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1;" "havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-24 01:38:33,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:33,433 INFO L85 PathProgramCache]: Analyzing trace with hash -2144605008, now seen corresponding path program 1 times [2024-11-24 01:38:33,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:33,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [105059405] [2024-11-24 01:38:33,441 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:33,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:33,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:33,995 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-24 01:38:33,995 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [105059405] [2024-11-24 01:38:33,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [105059405] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:38:33,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2005157837] [2024-11-24 01:38:34,000 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:34,000 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:38:34,000 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:38:34,002 INFO L229 MonitoredProcess]: Starting monitored process 2 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:38:34,006 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2024-11-24 01:38:34,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:34,173 INFO L256 TraceCheckSpWp]: Trace formula consists of 243 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:38:34,178 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:38:34,206 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:38:34,221 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2005157837] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:38:34,223 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:38:34,223 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 5 [2024-11-24 01:38:34,225 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [479895478] [2024-11-24 01:38:34,225 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:38:34,229 INFO L752 eck$LassoCheckResult]: stem already infeasible [2024-11-24 01:38:34,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:34,230 INFO L85 PathProgramCache]: Analyzing trace with hash 37408224, now seen corresponding path program 1 times [2024-11-24 01:38:34,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:34,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476567398] [2024-11-24 01:38:34,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:34,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:34,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:34,792 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-24 01:38:34,792 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476567398] [2024-11-24 01:38:34,792 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1476567398] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:38:34,793 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [734492197] [2024-11-24 01:38:34,793 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:34,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:38:34,793 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:38:34,797 INFO L229 MonitoredProcess]: Starting monitored process 3 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:38:34,799 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-11-24 01:38:34,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:34,906 INFO L256 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:38:34,907 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:38:34,934 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:38:35,016 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [734492197] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:38:35,019 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:38:35,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-11-24 01:38:35,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1607873830] [2024-11-24 01:38:35,019 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:38:35,020 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-24 01:38:35,022 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-24 01:38:35,049 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-11-24 01:38:35,050 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-11-24 01:38:35,053 INFO L87 Difference]: Start difference. First operand has 133 states, 132 states have (on average 1.7803030303030303) internal successors, (235), 132 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:35,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:38:35,231 INFO L93 Difference]: Finished difference Result 131 states and 229 transitions. [2024-11-24 01:38:35,232 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 131 states and 229 transitions. [2024-11-24 01:38:35,235 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-24 01:38:35,242 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 131 states to 127 states and 165 transitions. [2024-11-24 01:38:35,243 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2024-11-24 01:38:35,244 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2024-11-24 01:38:35,244 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 165 transitions. [2024-11-24 01:38:35,245 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-24 01:38:35,245 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2024-11-24 01:38:35,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 165 transitions. [2024-11-24 01:38:35,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2024-11-24 01:38:35,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2992125984251968) internal successors, (165), 126 states have internal predecessors, (165), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:35,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 165 transitions. [2024-11-24 01:38:35,274 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 165 transitions. [2024-11-24 01:38:35,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:38:35,279 INFO L425 stractBuchiCegarLoop]: Abstraction has 127 states and 165 transitions. [2024-11-24 01:38:35,279 INFO L332 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2024-11-24 01:38:35,279 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 165 transitions. [2024-11-24 01:38:35,281 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-24 01:38:35,281 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-24 01:38:35,281 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-24 01:38:35,282 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:35,283 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:35,283 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~mode7~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~mode8~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id7~0 >= 0;" "assume 0 == ~st7~0;" "assume ~send7~0 == ~id7~0;" "assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296);" "assume ~id8~0 >= 0;" "assume 0 == ~st8~0;" "assume ~send8~0 == ~id8~0;" "assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id1~0 != ~id7~0;" "assume ~id1~0 != ~id8~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id2~0 != ~id7~0;" "assume ~id2~0 != ~id8~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id3~0 != ~id7~0;" "assume ~id3~0 != ~id8~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id4~0 != ~id7~0;" "assume ~id4~0 != ~id8~0;" "assume ~id5~0 != ~id6~0;" "assume ~id5~0 != ~id7~0;" "assume ~id5~0 != ~id8~0;" "assume ~id6~0 != ~id7~0;" "assume ~id6~0 != ~id8~0;" "assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-24 01:38:35,284 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0;" "assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1;" "havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0;" "assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1;" "havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-24 01:38:35,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:35,284 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 1 times [2024-11-24 01:38:35,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:35,285 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361552086] [2024-11-24 01:38:35,285 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:35,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:35,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:35,381 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:38:35,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:35,515 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-24 01:38:35,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:35,516 INFO L85 PathProgramCache]: Analyzing trace with hash 37408224, now seen corresponding path program 2 times [2024-11-24 01:38:35,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:35,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2087793524] [2024-11-24 01:38:35,517 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:35,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:35,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:35,842 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-24 01:38:35,843 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2087793524] [2024-11-24 01:38:35,845 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2087793524] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:38:35,845 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1973376797] [2024-11-24 01:38:35,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:35,846 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:38:35,846 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:38:35,852 INFO L229 MonitoredProcess]: Starting monitored process 4 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:38:35,855 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-11-24 01:38:35,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:35,952 INFO L256 TraceCheckSpWp]: Trace formula consists of 111 conjuncts, 11 conjuncts are in the unsatisfiable core [2024-11-24 01:38:35,954 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:38:35,980 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:38:36,045 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1973376797] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:38:36,045 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:38:36,046 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 7 [2024-11-24 01:38:36,046 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503364118] [2024-11-24 01:38:36,046 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:38:36,046 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-24 01:38:36,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-24 01:38:36,046 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2024-11-24 01:38:36,047 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2024-11-24 01:38:36,047 INFO L87 Difference]: Start difference. First operand 127 states and 165 transitions. cyclomatic complexity: 39 Second operand has 7 states, 7 states have (on average 3.7142857142857144) internal successors, (26), 7 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:36,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:38:36,111 INFO L93 Difference]: Finished difference Result 130 states and 167 transitions. [2024-11-24 01:38:36,111 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 130 states and 167 transitions. [2024-11-24 01:38:36,113 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-24 01:38:36,116 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 130 states to 127 states and 162 transitions. [2024-11-24 01:38:36,116 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 127 [2024-11-24 01:38:36,117 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 127 [2024-11-24 01:38:36,117 INFO L73 IsDeterministic]: Start isDeterministic. Operand 127 states and 162 transitions. [2024-11-24 01:38:36,117 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-24 01:38:36,118 INFO L218 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2024-11-24 01:38:36,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states and 162 transitions. [2024-11-24 01:38:36,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2024-11-24 01:38:36,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 127 states, 127 states have (on average 1.2755905511811023) internal successors, (162), 126 states have internal predecessors, (162), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:36,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 162 transitions. [2024-11-24 01:38:36,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 127 states and 162 transitions. [2024-11-24 01:38:36,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-11-24 01:38:36,130 INFO L425 stractBuchiCegarLoop]: Abstraction has 127 states and 162 transitions. [2024-11-24 01:38:36,130 INFO L332 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2024-11-24 01:38:36,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 127 states and 162 transitions. [2024-11-24 01:38:36,131 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 60 [2024-11-24 01:38:36,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-24 01:38:36,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-24 01:38:36,135 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:36,135 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:36,136 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~mode7~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~mode8~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id7~0 >= 0;" "assume 0 == ~st7~0;" "assume ~send7~0 == ~id7~0;" "assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296);" "assume ~id8~0 >= 0;" "assume 0 == ~st8~0;" "assume ~send8~0 == ~id8~0;" "assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id1~0 != ~id7~0;" "assume ~id1~0 != ~id8~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id2~0 != ~id7~0;" "assume ~id2~0 != ~id8~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id3~0 != ~id7~0;" "assume ~id3~0 != ~id8~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id4~0 != ~id7~0;" "assume ~id4~0 != ~id8~0;" "assume ~id5~0 != ~id6~0;" "assume ~id5~0 != ~id7~0;" "assume ~id5~0 != ~id8~0;" "assume ~id6~0 != ~id7~0;" "assume ~id6~0 != ~id8~0;" "assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-24 01:38:36,136 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0;" "assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1;" "havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0;" "assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1;" "havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 8;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 8;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-24 01:38:36,138 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:36,138 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 2 times [2024-11-24 01:38:36,138 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:36,138 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974923463] [2024-11-24 01:38:36,139 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,139 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:36,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,219 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:38:36,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,307 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-24 01:38:36,307 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:36,308 INFO L85 PathProgramCache]: Analyzing trace with hash 173692176, now seen corresponding path program 1 times [2024-11-24 01:38:36,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:36,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689273275] [2024-11-24 01:38:36,308 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,308 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:36,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:36,368 INFO L136 FreeRefinementEngine]: Strategy CAMEL_NO_AM found an infeasible trace [2024-11-24 01:38:36,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [689273275] [2024-11-24 01:38:36,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [689273275] provided 0 perfect and 1 imperfect interpolant sequences [2024-11-24 01:38:36,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1052808786] [2024-11-24 01:38:36,369 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-11-24 01:38:36,369 INFO L189 MonitoredProcess]: No working directory specified, using /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 [2024-11-24 01:38:36,373 INFO L229 MonitoredProcess]: Starting monitored process 5 with /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-11-24 01:38:36,375 INFO L327 MonitoredProcess]: [MP /tmp/vcloud_worker_vcloud-master_on_vcloud-master/run_dir_66592599-a950-49ec-9dbd-33a24d309cfd/bin/uautomizer-verify-LYvppIcaGC/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-11-24 01:38:36,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-11-24 01:38:36,486 INFO L256 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 2 conjuncts are in the unsatisfiable core [2024-11-24 01:38:36,487 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2024-11-24 01:38:36,503 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2024-11-24 01:38:36,510 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1052808786] provided 0 perfect and 2 imperfect interpolant sequences [2024-11-24 01:38:36,511 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-11-24 01:38:36,511 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 3 [2024-11-24 01:38:36,511 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [59835563] [2024-11-24 01:38:36,511 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-11-24 01:38:36,511 INFO L764 eck$LassoCheckResult]: loop already infeasible [2024-11-24 01:38:36,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL_NO_AM [2024-11-24 01:38:36,512 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2024-11-24 01:38:36,512 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2024-11-24 01:38:36,512 INFO L87 Difference]: Start difference. First operand 127 states and 162 transitions. cyclomatic complexity: 36 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:36,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2024-11-24 01:38:36,552 INFO L93 Difference]: Finished difference Result 181 states and 246 transitions. [2024-11-24 01:38:36,552 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 181 states and 246 transitions. [2024-11-24 01:38:36,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 114 [2024-11-24 01:38:36,555 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 181 states to 181 states and 246 transitions. [2024-11-24 01:38:36,555 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 181 [2024-11-24 01:38:36,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 181 [2024-11-24 01:38:36,556 INFO L73 IsDeterministic]: Start isDeterministic. Operand 181 states and 246 transitions. [2024-11-24 01:38:36,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2024-11-24 01:38:36,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 181 states and 246 transitions. [2024-11-24 01:38:36,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states and 246 transitions. [2024-11-24 01:38:36,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2024-11-24 01:38:36,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 179 states, 179 states have (on average 1.3575418994413408) internal successors, (243), 178 states have internal predecessors, (243), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-11-24 01:38:36,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 243 transitions. [2024-11-24 01:38:36,564 INFO L240 hiAutomatonCegarLoop]: Abstraction has 179 states and 243 transitions. [2024-11-24 01:38:36,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2024-11-24 01:38:36,565 INFO L425 stractBuchiCegarLoop]: Abstraction has 179 states and 243 transitions. [2024-11-24 01:38:36,566 INFO L332 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2024-11-24 01:38:36,566 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 179 states and 243 transitions. [2024-11-24 01:38:36,567 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 112 [2024-11-24 01:38:36,568 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2024-11-24 01:38:36,568 INFO L119 BuchiIsEmpty]: Starting construction of run [2024-11-24 01:38:36,569 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:36,569 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2024-11-24 01:38:36,569 INFO L747 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(34, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;~p6~0 := 0;~p6_old~0 := 0;~p6_new~0 := 0;~id6~0 := 0;~st6~0 := 0;~send6~0 := 0;~mode6~0 := 0;~p7~0 := 0;~p7_old~0 := 0;~p7_new~0 := 0;~id7~0 := 0;~st7~0 := 0;~send7~0 := 0;~mode7~0 := 0;~p8~0 := 0;~p8_old~0 := 0;~p8_new~0 := 0;~id8~0 := 0;~st8~0 := 0;~send8~0 := 0;~mode8~0 := 0;~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[0 := #funAddr~node1.base], ~nodes~0.offset[0 := #funAddr~node1.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[1 := #funAddr~node2.base], ~nodes~0.offset[1 := #funAddr~node2.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[2 := #funAddr~node3.base], ~nodes~0.offset[2 := #funAddr~node3.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[3 := #funAddr~node4.base], ~nodes~0.offset[3 := #funAddr~node4.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[4 := #funAddr~node5.base], ~nodes~0.offset[4 := #funAddr~node5.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[5 := #funAddr~node6.base], ~nodes~0.offset[5 := #funAddr~node6.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[6 := #funAddr~node7.base], ~nodes~0.offset[6 := #funAddr~node7.offset];~nodes~0.base, ~nodes~0.offset := ~nodes~0.base[7 := #funAddr~node8.base], ~nodes~0.offset[7 := #funAddr~node8.offset];" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~nondet25#1, main_#t~nondet26#1, main_#t~nondet27#1, main_#t~nondet28#1, main_#t~nondet29#1, main_#t~nondet30#1, main_#t~nondet31#1, main_#t~nondet32#1, main_#t~nondet33#1, main_#t~nondet34#1, main_#t~nondet35#1, main_#t~nondet36#1, main_#t~ret37#1, main_#t~ret38#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;havoc main_#t~nondet25#1;~id6~0 := main_#t~nondet25#1;havoc main_#t~nondet25#1;havoc main_#t~nondet26#1;~st6~0 := main_#t~nondet26#1;havoc main_#t~nondet26#1;havoc main_#t~nondet27#1;~send6~0 := main_#t~nondet27#1;havoc main_#t~nondet27#1;havoc main_#t~nondet28#1;assume 0 == main_#t~nondet28#1 || 1 == main_#t~nondet28#1;~mode6~0 := (if 0 == main_#t~nondet28#1 % 256 then 0 else 1);havoc main_#t~nondet28#1;havoc main_#t~nondet29#1;~id7~0 := main_#t~nondet29#1;havoc main_#t~nondet29#1;havoc main_#t~nondet30#1;~st7~0 := main_#t~nondet30#1;havoc main_#t~nondet30#1;havoc main_#t~nondet31#1;~send7~0 := main_#t~nondet31#1;havoc main_#t~nondet31#1;havoc main_#t~nondet32#1;assume 0 == main_#t~nondet32#1 || 1 == main_#t~nondet32#1;~mode7~0 := (if 0 == main_#t~nondet32#1 % 256 then 0 else 1);havoc main_#t~nondet32#1;havoc main_#t~nondet33#1;~id8~0 := main_#t~nondet33#1;havoc main_#t~nondet33#1;havoc main_#t~nondet34#1;~st8~0 := main_#t~nondet34#1;havoc main_#t~nondet34#1;havoc main_#t~nondet35#1;~send8~0 := main_#t~nondet35#1;havoc main_#t~nondet35#1;havoc main_#t~nondet36#1;assume 0 == main_#t~nondet36#1 || 1 == main_#t~nondet36#1;~mode8~0 := (if 0 == main_#t~nondet36#1 % 256 then 0 else 1);havoc main_#t~nondet36#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id6~0 >= 0;" "assume 0 == ~st6~0;" "assume ~send6~0 == ~id6~0;" "assume 0 == (if ~mode6~0 % 256 % 4294967296 <= 2147483647 then ~mode6~0 % 256 % 4294967296 else ~mode6~0 % 256 % 4294967296 - 4294967296);" "assume ~id7~0 >= 0;" "assume 0 == ~st7~0;" "assume ~send7~0 == ~id7~0;" "assume 0 == (if ~mode7~0 % 256 % 4294967296 <= 2147483647 then ~mode7~0 % 256 % 4294967296 else ~mode7~0 % 256 % 4294967296 - 4294967296);" "assume ~id8~0 >= 0;" "assume 0 == ~st8~0;" "assume ~send8~0 == ~id8~0;" "assume 0 == (if ~mode8~0 % 256 % 4294967296 <= 2147483647 then ~mode8~0 % 256 % 4294967296 else ~mode8~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id1~0 != ~id6~0;" "assume ~id1~0 != ~id7~0;" "assume ~id1~0 != ~id8~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id2~0 != ~id6~0;" "assume ~id2~0 != ~id7~0;" "assume ~id2~0 != ~id8~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id3~0 != ~id6~0;" "assume ~id3~0 != ~id7~0;" "assume ~id3~0 != ~id8~0;" "assume ~id4~0 != ~id5~0;" "assume ~id4~0 != ~id6~0;" "assume ~id4~0 != ~id7~0;" "assume ~id4~0 != ~id8~0;" "assume ~id5~0 != ~id6~0;" "assume ~id5~0 != ~id7~0;" "assume ~id5~0 != ~id8~0;" "assume ~id6~0 != ~id7~0;" "assume ~id6~0 != ~id8~0;" "assume ~id7~0 != ~id8~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret37#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret37#1;havoc main_#t~ret37#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~nomsg~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~nomsg~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~nomsg~0;~p8_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2024-11-24 01:38:36,570 INFO L749 eck$LassoCheckResult]: Loop: "assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;assume { :begin_inline_node6 } true;havoc node6_~m6~0#1;havoc node6_~m6~0#1;node6_~m6~0#1 := ~nomsg~0;" "assume !(0 != ~mode6~0 % 256);~p6_new~0 := (if (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 <= 127 then (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 else (if ~send6~0 != ~nomsg~0 && ~p6_new~0 == ~nomsg~0 then ~send6~0 else ~p6_new~0) % 256 - 256);~mode6~0 := 1;" "havoc node6_~m6~0#1;assume { :end_inline_node6 } true;assume { :begin_inline_node7 } true;havoc node7_~m7~0#1;havoc node7_~m7~0#1;node7_~m7~0#1 := ~nomsg~0;" "assume !(0 != ~mode7~0 % 256);~p7_new~0 := (if (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 <= 127 then (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 else (if ~send7~0 != ~nomsg~0 && ~p7_new~0 == ~nomsg~0 then ~send7~0 else ~p7_new~0) % 256 - 256);~mode7~0 := 1;" "havoc node7_~m7~0#1;assume { :end_inline_node7 } true;assume { :begin_inline_node8 } true;havoc node8_~m8~0#1;havoc node8_~m8~0#1;node8_~m8~0#1 := ~nomsg~0;" "assume !(0 != ~mode8~0 % 256);~p8_new~0 := (if (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 <= 127 then (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 else (if ~send8~0 != ~nomsg~0 && ~p8_new~0 == ~nomsg~0 then ~send8~0 else ~p8_new~0) % 256 - 256);~mode8~0 := 1;" "havoc node8_~m8~0#1;assume { :end_inline_node8 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;~p6_old~0 := ~p6_new~0;~p6_new~0 := ~nomsg~0;~p7_old~0 := ~p7_new~0;~p7_new~0 := ~nomsg~0;~p8_old~0 := ~p8_new~0;~p8_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0 <= 1;" "assume !((if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) >= 8);" "assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 + ~st6~0 + ~st7~0 + ~st8~0;" "assume (if ~r1~0 % 256 % 4294967296 <= 2147483647 then ~r1~0 % 256 % 4294967296 else ~r1~0 % 256 % 4294967296 - 4294967296) < 8;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret38#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret38#1;havoc main_#t~ret38#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;" [2024-11-24 01:38:36,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:36,570 INFO L85 PathProgramCache]: Analyzing trace with hash 354076320, now seen corresponding path program 3 times [2024-11-24 01:38:36,570 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:36,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [970551437] [2024-11-24 01:38:36,571 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:36,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,616 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:38:36,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,657 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-24 01:38:36,657 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:36,658 INFO L85 PathProgramCache]: Analyzing trace with hash -1558906841, now seen corresponding path program 1 times [2024-11-24 01:38:36,658 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:36,658 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141667194] [2024-11-24 01:38:36,658 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,658 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:36,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,695 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:38:36,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,742 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-24 01:38:36,743 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2024-11-24 01:38:36,743 INFO L85 PathProgramCache]: Analyzing trace with hash -612396440, now seen corresponding path program 1 times [2024-11-24 01:38:36,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL_NO_AM [2024-11-24 01:38:36,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1910577023] [2024-11-24 01:38:36,743 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-11-24 01:38:36,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-11-24 01:38:36,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,837 INFO L357 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-11-24 01:38:36,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-11-24 01:38:36,975 INFO L130 FreeRefinementEngine]: Strategy CAMEL_NO_AM found a feasible trace [2024-11-24 01:38:45,760 INFO L204 LassoAnalysis]: Preferences: [2024-11-24 01:38:45,761 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2024-11-24 01:38:45,761 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2024-11-24 01:38:45,761 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2024-11-24 01:38:45,762 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2024-11-24 01:38:45,762 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2024-11-24 01:38:45,762 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2024-11-24 01:38:45,762 INFO L131 ssoRankerPreferences]: Path of dumped script: [2024-11-24 01:38:45,762 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.8.1.ufo.UNBOUNDED.pals.c_Iteration4_Loop [2024-11-24 01:38:45,762 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2024-11-24 01:38:45,763 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2024-11-24 01:38:45,826 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,838 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,842 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,846 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,853 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,857 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,859 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,862 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,869 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,872 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,876 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,879 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,882 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,889 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,891 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,894 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:45,897 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,706 WARN L286 SmtUtils]: Spent 6.78s on a formula simplification. DAG size of input: 465 DAG size of output: 194 (called from [L 270] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.setFormulaAndSimplify) [2024-11-24 01:38:52,706 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,710 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,716 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,718 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,720 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,723 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,730 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,733 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,736 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,739 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,742 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,747 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,753 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,760 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,766 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,769 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,771 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,773 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,776 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,779 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,781 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:52,786 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2024-11-24 01:38:56,327 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 45